Content-Length: 739548 | pFad | http://github.com/stm32-rs/stm32-rs/commit/edfe7104ececfd69ab41c90475a95d5b43cc9dc9

66 fix GPIO AFSEL + WB0/N6/MP1 · stm32-rs/stm32-rs@edfe710 · GitHub
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fix GPIO AFSEL + WB0/N6/MP1
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‎CHANGELOG.md

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@@ -4,6 +4,8 @@
44

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* Updated to `svdtools` 0.5.0
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* refactor COMP & OPAMP on F3/G4/L4
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* Fix bug in GPIO AFSEL collect
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* Add GPIO for WB0/N6/MP1
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810
Family-specific:
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‎devices/collect/gpio/gpioa_afsel.yaml

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AFRH:
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_derive:
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AFSEL%s: AFRL.AFSEL%s

‎devices/collect/gpio/v2r.yaml

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@@ -38,7 +38,8 @@ LCKR:
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description: Port x lock pin %s
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AFR[LH]:
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_array:
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"AFR*,AFSEL*": {}
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"?~AFSEL*": {}
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"?~AFR*": {}
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"?~HSLVR":
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_array:
@@ -47,3 +48,19 @@ AFR[LH]:
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"?~SECCFGR":
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_array:
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SEC*: {}
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"?~PRIVCFGR":
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_array:
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PRIV*: {}
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"?~RCFGLOCKR":
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_array:
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RLOCK*: {}
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"?~DELAYR[LH]":
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_array:
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DELAY*: {}
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"?~PIOCFGR[LH]":
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_array:
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PIOCFG*: {}

‎devices/patches/gpio/add_pin4-7.yaml

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# used in STM32WB0 for field arrays
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MODER:
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_add:
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MODE4:
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bitOffset: 8
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bitWidth: 2
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access: read-write
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MODE5:
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bitOffset: 10
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bitWidth: 2
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access: read-write
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MODE6:
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bitOffset: 12
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bitWidth: 2
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access: read-write
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MODE7:
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bitOffset: 14
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bitWidth: 2
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access: read-write
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OTYPER:
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_add:
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OT4:
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bitOffset: 4
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bitWidth: 1
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access: read-write
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OT5:
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bitOffset: 5
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bitWidth: 1
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access: read-write
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OT6:
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bitOffset: 6
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bitWidth: 1
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access: read-write
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OT7:
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bitOffset: 7
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bitWidth: 1
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access: read-write
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OSPEEDR:
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_add:
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OSPEED4:
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bitOffset: 8
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bitWidth: 2
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access: read-write
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OSPEED5:
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bitOffset: 10
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bitWidth: 2
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access: read-write
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OSPEED6:
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bitOffset: 12
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bitWidth: 2
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access: read-write
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OSPEED7:
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bitOffset: 14
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bitWidth: 2
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access: read-write
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PUPDR:
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_add:
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PUPD4:
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bitOffset: 8
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bitWidth: 2
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access: read-write
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PUPD5:
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bitOffset: 10
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bitWidth: 2
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access: read-write
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PUPD6:
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bitOffset: 12
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bitWidth: 2
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access: read-write
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PUPD7:
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bitOffset: 14
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bitWidth: 2
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access: read-write
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IDR:
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_add:
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ID4:
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bitOffset: 4
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bitWidth: 1
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access: read-only
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ID5:
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bitOffset: 5
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bitWidth: 1
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access: read-only
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ID6:
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bitOffset: 6
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bitWidth: 1
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access: read-only
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ID7:
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bitOffset: 7
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bitWidth: 1
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access: read-only
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ODR:
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_add:
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OD4:
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bitOffset: 4
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bitWidth: 1
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access: read-write
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OD5:
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bitOffset: 5
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bitWidth: 1
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access: read-write
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OD6:
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bitOffset: 6
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bitWidth: 1
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access: read-write
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OD7:
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bitOffset: 7
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bitWidth: 1
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access: read-write
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BSRR:
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_add:
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BS4:
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bitOffset: 4
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bitWidth: 1
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access: write-only
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BS5:
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bitOffset: 5
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bitWidth: 1
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access: write-only
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BS6:
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bitOffset: 6
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bitWidth: 1
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access: write-only
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BS7:
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bitOffset: 7
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bitWidth: 1
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access: write-only
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BR4:
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bitOffset: 20
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bitWidth: 1
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access: write-only
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BR5:
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bitOffset: 21
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bitWidth: 1
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access: write-only
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BR6:
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bitOffset: 22
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bitWidth: 1
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access: write-only
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BR7:
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bitOffset: 23
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bitWidth: 1
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access: write-only
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LCKR:
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_add:
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LCK4:
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bitOffset: 4
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bitWidth: 1
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access: read-write
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LCK5:
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bitOffset: 5
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bitWidth: 1
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access: read-write
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LCK6:
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bitOffset: 6
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bitWidth: 1
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access: read-write
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LCK7:
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bitOffset: 7
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bitWidth: 1
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access: read-write
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BRR:
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_add:
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BR4:
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bitOffset: 4
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bitWidth: 1
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access: read-write
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BR5:
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bitOffset: 5
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bitWidth: 1
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access: read-write
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BR6:
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bitOffset: 6
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bitWidth: 1
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access: read-write
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BR7:
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bitOffset: 7
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bitWidth: 1
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access: read-write

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