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D1 i2C register definitions for stm32g4xx by Geens · Pull Request #510 · stm32-rs/stm32-rs · GitHub
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i2C register definitions for stm32g4xx #510

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Merged
merged 4 commits into from
Mar 14, 2021
Merged

i2C register definitions for stm32g4xx #510

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8eed072
Register definitions for stm32g4xx
Geens Mar 7, 2021
a2d1bd7
Added missing underscore
Geens Mar 7, 2021
e0eeb95
Deleted separate i2c_g4 and replaced with i2c_v2
Geens Mar 14, 2021
76cd881
Merge remote-tracking branch 'origen/master' into i2c_g4
Geens Mar 14, 2021
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Added missing underscore
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@Geens
Geens committed Mar 7, 2021
commit a2d1bd7c86142119a9486128344011b05031951a
2 changes: 1 addition & 1 deletion peripherals/i2c/i2c_g4.yaml
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Expand Up @@ -97,7 +97,7 @@
enabled: [1, "Own address 1 enabled. The received slave address OA1 is ACKed."]
OA1MODE:
mode_7_bit: [0, "Own address is a 7-bit address."]
mode 10_bit: [1, "Own address 1 is a 10-bit address."]
mode_10_bit: [1, "Own address 1 is a 10-bit address."]
OA1: [0, 0b_0011_1111_1111]
OAR2:
OA2EN:
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