Content-Length: 25827 | pFad | http://github.com/stm32-rs/stm32-rs/pull/682.patch

thub.com From 20661a7e73c56ee4c9b4546424f0f895eb3c64b1 Mon Sep 17 00:00:00 2001 From: oldsheep68 Date: Mon, 27 Dec 2021 23:28:08 +0100 Subject: [PATCH 1/4] shorter registernames for stm32l4 devices of the COMP registers + adding the register descriptions --- .../comp/l4x1_comp_reg_rename.yaml | 55 ++++++++++++++ .../comp/l4x6_comp_reg_rename.yaml | 51 +++++++++++++ devices/stm32l4x1.yaml | 2 + devices/stm32l4x2.yaml | 2 + devices/stm32l4x3.yaml | 2 + devices/stm32l4x5.yaml | 5 ++ devices/stm32l4x6.yaml | 2 + peripherals/comp/comp_l4x1.yaml | 75 +++++++++++++++++++ peripherals/comp/comp_l4x6.yaml | 63 ++++++++++++++++ 9 files changed, 257 insertions(+) create mode 100644 devices/common_patches/comp/l4x1_comp_reg_rename.yaml create mode 100644 devices/common_patches/comp/l4x6_comp_reg_rename.yaml create mode 100644 peripherals/comp/comp_l4x1.yaml create mode 100644 peripherals/comp/comp_l4x6.yaml diff --git a/devices/common_patches/comp/l4x1_comp_reg_rename.yaml b/devices/common_patches/comp/l4x1_comp_reg_rename.yaml new file mode 100644 index 000000000..e847850be --- /dev/null +++ b/devices/common_patches/comp/l4x1_comp_reg_rename.yaml @@ -0,0 +1,55 @@ +COMP: + COMP1_CSR: + _modify: + COMP1_EN: + name: EN + COMP1_PWRMODE: + name: PWRMODE + COMP1_INMSEL: + name: INMSEL + COMP1_INPSEL: + name: INPSEL + COMP1_POLARITY: + name: POLARITY + COMP1_HYST: + name: HYST + COMP1_BLANKING: + name: BLANKING + COMP1_BRGEN: + name: BRGEN + COMP1_SCALEN: + name: SCALEN + COMP1_INMESEL: + name: INMESEL + COMP1_VALUE: + name: VALUE + COMP1_LOCK: + name: LOCK + COMP2_CSR: + _modify: + COMP2_EN: + name: EN + COMP2_PWRMODE: + name: PWRMODE + COMP2_INMSEL: + name: INMSEL + COMP2_INPSEL: + name: INPSEL + COMP2_WINMODE: + name: WINMODE + COMP2_POLARITY: + name: POLARITY + COMP2_HYST: + name: HYST + COMP2_BLANKING: + name: BLANKING + COMP2_BRGEN: + name: BRGEN + COMP2_SCALEN: + name: SCALEN + COMP2_INMESEL: + name: INMESEL + COMP2_VALUE: + name: VALUE + COMP2_LOCK: + name: LOCK diff --git a/devices/common_patches/comp/l4x6_comp_reg_rename.yaml b/devices/common_patches/comp/l4x6_comp_reg_rename.yaml new file mode 100644 index 000000000..625a5ebfd --- /dev/null +++ b/devices/common_patches/comp/l4x6_comp_reg_rename.yaml @@ -0,0 +1,51 @@ +COMP: + COMP1_CSR: + _modify: + COMP1_EN: + name: EN + COMP1_PWRMODE: + name: PWRMODE + COMP1_INMSEL: + name: INMSEL + COMP1_INPSEL: + name: INPSEL + COMP1_POLARITY: + name: POLARITY + COMP1_HYST: + name: HYST + COMP1_BLANKING: + name: BLANKING + COMP1_BRGEN: + name: BRGEN + COMP1_SCALEN: + name: SCALEN + COMP1_VALUE: + name: VALUE + COMP1_LOCK: + name: LOCK + COMP2_CSR: + _modify: + COMP2_EN: + name: EN + COMP2_PWRMODE: + name: PWRMODE + COMP2_INMSEL: + name: INMSEL + COMP2_INPSEL: + name: INPSEL + COMP2_WINMODE: + name: WINMODE + COMP2_POLARITY: + name: POLARITY + COMP2_HYST: + name: HYST + COMP2_BLANKING: + name: BLANKING + COMP2_BRGEN: + name: BRGEN + COMP2_SCALEN: + name: SCALEN + COMP2_VALUE: + name: VALUE + COMP2_LOCK: + name: LOCK diff --git a/devices/stm32l4x1.yaml b/devices/stm32l4x1.yaml index 85fda2d6c..9a6e56dff 100644 --- a/devices/stm32l4x1.yaml +++ b/devices/stm32l4x1.yaml @@ -138,3 +138,5 @@ _include: - ./common_patches/l4_gpio_brr.yaml - ./common_patches/l4_tim15_ch2.yaml - ../peripherals/spi/spi_l4.yaml + - ./common_patches/comp/l4x1_comp_reg_rename.yaml + - ../peripherals/comp/comp_l4x1.yaml diff --git a/devices/stm32l4x2.yaml b/devices/stm32l4x2.yaml index a1b9cbcc2..f85252e75 100644 --- a/devices/stm32l4x2.yaml +++ b/devices/stm32l4x2.yaml @@ -13,3 +13,5 @@ _include: - ../peripherals/fw/fw_l0_l4.yaml - ../peripherals/rcc/rcc_l4_usart2_3.yaml - ../peripherals/rcc/rcc_l4_uart4.yaml + - ./common_patches/comp/l4xx_comp_reg_rename.yaml + - ../peripherals/comp/comp_l4x1.yaml diff --git a/devices/stm32l4x3.yaml b/devices/stm32l4x3.yaml index ab17ab8c8..3ce2b3c2e 100644 --- a/devices/stm32l4x3.yaml +++ b/devices/stm32l4x3.yaml @@ -168,3 +168,5 @@ _include: - ./common_patches/l4_gpio_brr.yaml - ../peripherals/spi/spi_l4.yaml - ./common_patches/l4_lcd_segment.yaml + - ./common_patches/comp/l4x6_comp_reg_rename.yaml + - ../peripherals/comp/comp_l4x6.yaml diff --git a/devices/stm32l4x5.yaml b/devices/stm32l4x5.yaml index b2e39665a..5bf401439 100644 --- a/devices/stm32l4x5.yaml +++ b/devices/stm32l4x5.yaml @@ -200,3 +200,8 @@ _include: - ../peripherals/spi/spi_l4.yaml - ./common_patches/l4_tim15_ch2.yaml - common_patches/adc_common_group_name.yaml + - ./common_patches/comp/l4xx_comp_reg_rename.yaml + - ../peripherals/comp/comp_l4x6.yaml + - ./common_patches/dac/dac_rename_stm32l4xx.yaml + - ../peripherals/dac/dac_l4xx.yaml + - ../peripherals/opamp/opamp_l4.yaml diff --git a/devices/stm32l4x6.yaml b/devices/stm32l4x6.yaml index d3bc19f68..7ed058de7 100644 --- a/devices/stm32l4x6.yaml +++ b/devices/stm32l4x6.yaml @@ -94,3 +94,5 @@ _include: - ./common_patches/l4_dbg_apb_fzr_rename.yaml - ./common_patches/l4_lcd_segment.yaml - common_patches/adc_common_group_name.yaml + - ./common_patches/comp/l4xx_comp_reg_rename.yaml + - ../peripherals/comp/comp_l4x6.yaml diff --git a/peripherals/comp/comp_l4x1.yaml b/peripherals/comp/comp_l4x1.yaml new file mode 100644 index 000000000..a50af4dca --- /dev/null +++ b/peripherals/comp/comp_l4x1.yaml @@ -0,0 +1,75 @@ +COMP: + COMP?_CSR: + # LOCK: + # Unlocked: [0, "Comparator CSR bits are read-write"] + # Locked: [1, "Comparator CSR bits are read-only"] + #COMP?_VALUE: + VALUE: + Low: [0, "Comparator output is low"] + High: [1, "Comparator output is high"] + SCALEN: + Disabled: [0, "Voltage scaler disabled"] + Enabled: [1, "Voltage scaler enabled"] + BRGEN: + Disabled: [0, "Scaler resistor bridge disabled"] + Enabled: [1, "Scaler resistor bridge enabled"] + BLANKING: + NoBlanking: [0, "No blanking"] + TIM1OC5: [4, "TIM15 OC1 selected as blanking source"] + HYST: + NoHysteresis: [0, "No hysteresis"] + LowHysteresis: [1, "Low hysteresis"] + MediumHysteresis: [2, "Medium hysteresis"] + HighHysteresis: [3, "High hysteresis"] + POLARITY: + NotInverted: [0, "Output is not inverted"] + Inverted: [1, "Output is inverted"] + PWRMODE: + HighSpeed: [0, "High speed / full power"] + MediumSpeed: [1, "Medium speed / medium power"] + LowSpeed: [3, "Low speed / ultra-low power"] + EN: + Disabled: [0, "Comparator 1 disabled"] + Enabled: [1, "Comparator 1 enabled"] + + COMP1_CSR: + INPSEL: + PC5: [0, "PC5 connected to input plus"] + PB2: [1, "PB2 connected to input plus"] + PA3: [2, "PA3 connected to input plus"] + INMSEL: + OneQuarterVRef: [0, "1/4 of VRefint"] + OneHalfVRef: [1, "1/2 of VRefint"] + ThreeQuarterVRef: [2, "3/4 of VRefint"] + VRef: [3, "VRefint"] + DAC_CH1: [4, "DAC Channel 1"] + DAC_CH2: [5, "DAC Channel 2"] + GPIOx: [6, "GPIO selected with INMESEL"] + INMESEL: + PC4: [0, "PC4"] + PA0: [1, "PA0"] + PA4: [2, "PA4"] + PA5: [3, "PA5"] + + COMP2_CSR: + WINMODE: + Disabled: [0, "COMP2 input plus is not connected to COMP1"] + Enabled: [1, "COMP2 input plus is connected to COMP1 plus"] + INPSEL: + PB4: [0, "PB4 connected to input plus"] + PB6: [1, "PB6 connected to input plus"] + PA3: [2, "PA3 connected to input plus"] + INMSEL: + OneQuarterVRef: [0, "1/4 of VRefint"] + OneHalfVRef: [1, "1/2 of VRefint"] + ThreeQuarterVRef: [2, "3/4 of VRefint"] + VRef: [3, "VRefint"] + DAC_CH1: [4, "DAC Channel 1"] + DAC_CH2: [5, "DAC Channel 2"] + PB3: [6, "PB3"] + GPIOx: [7, "GPIO selected by INMESEL"] + INMESEL: + PB7: [0, "PB7"] + PA2: [1, "PA2"] + PA4: [2, "PA4"] + PA5: [3, "PA5"] diff --git a/peripherals/comp/comp_l4x6.yaml b/peripherals/comp/comp_l4x6.yaml new file mode 100644 index 000000000..afb8d8e03 --- /dev/null +++ b/peripherals/comp/comp_l4x6.yaml @@ -0,0 +1,63 @@ +COMP: + COMP?_CSR: + # LOCK: + # Unlocked: [0, "Comparator CSR bits are read-write"] + # Locked: [1, "Comparator CSR bits are read-only"] + #COMP?_VALUE: + VALUE: + Low: [0, "Comparator output is low"] + High: [1, "Comparator output is high"] + SCALEN: + Disabled: [0, "Voltage scaler disabled"] + Enabled: [1, "Voltage scaler enabled"] + BRGEN: + Disabled: [0, "Scaler resistor bridge disabled"] + Enabled: [1, "Scaler resistor bridge enabled"] + BLANKING: + NoBlanking: [0, "No blanking"] + TIM1OC5: [4, "TIM15 OC1 selected as blanking source"] + HYST: + NoHysteresis: [0, "No hysteresis"] + LowHysteresis: [1, "Low hysteresis"] + MediumHysteresis: [2, "Medium hysteresis"] + HighHysteresis: [3, "High hysteresis"] + POLARITY: + NotInverted: [0, "Output is not inverted"] + Inverted: [1, "Output is inverted"] + PWRMODE: + HighSpeed: [0, "High speed / full power"] + MediumSpeed: [1, "Medium speed / medium power"] + LowSpeed: [3, "Low speed / ultra-low power"] + EN: + Disabled: [0, "Comparator 1 disabled"] + Enabled: [1, "Comparator 1 enabled"] + + COMP1_CSR: + INPSEL: + PC5: [0, "PC5 connected to input plus"] + PB2: [1, "PB2 connected to input plus"] + INMSEL: + OneQuarterVRef: [0, "1/4 of VRefint"] + OneHalfVRef: [1, "1/2 of VRefint"] + ThreeQuarterVRef: [2, "3/4 of VRefint"] + VRef: [3, "VRefint"] + DAC_CH1: [4, "DAC Channel 1"] + DAC_CH2: [5, "DAC Channel 2"] + PC4: [6, "PC4"] + + COMP2_CSR: + WINMODE: + Disabled: [0, "COMP2 input plus is not connected to COMP1"] + Enabled: [1, "COMP2 input plus is connected to COMP1 plus"] + INPSEL: + PB4: [0, "PB4 connected to input plus"] + PB6: [1, "PB6 connected to input plus"] + INMSEL: + OneQuarterVRef: [0, "1/4 of VRefint"] + OneHalfVRef: [1, "1/2 of VRefint"] + ThreeQuarterVRef: [2, "3/4 of VRefint"] + VRef: [3, "VRefint"] + DAC_CH1: [4, "DAC Channel 1"] + DAC_CH2: [5, "DAC Channel 2"] + PB3: [6, "PB3"] + PB7: [7, "PB7"] From a67f902c070fb98b2b782b7fb4d2aac3d119515d Mon Sep 17 00:00:00 2001 From: oldsheep68 Date: Tue, 28 Dec 2021 20:32:59 +0100 Subject: [PATCH 2/4] simplified renaming according to recomondation of burrbull --- .../comp/l4x1_comp_reg_rename.yaml | 55 ------------------- .../comp/l4x6_comp_reg_rename.yaml | 51 ----------------- .../comp/l4xx_comp_reg_rename.yaml | 7 +++ devices/stm32l4x1.yaml | 2 +- devices/stm32l4x3.yaml | 2 +- 5 files changed, 9 insertions(+), 108 deletions(-) delete mode 100644 devices/common_patches/comp/l4x1_comp_reg_rename.yaml delete mode 100644 devices/common_patches/comp/l4x6_comp_reg_rename.yaml create mode 100644 devices/common_patches/comp/l4xx_comp_reg_rename.yaml diff --git a/devices/common_patches/comp/l4x1_comp_reg_rename.yaml b/devices/common_patches/comp/l4x1_comp_reg_rename.yaml deleted file mode 100644 index e847850be..000000000 --- a/devices/common_patches/comp/l4x1_comp_reg_rename.yaml +++ /dev/null @@ -1,55 +0,0 @@ -COMP: - COMP1_CSR: - _modify: - COMP1_EN: - name: EN - COMP1_PWRMODE: - name: PWRMODE - COMP1_INMSEL: - name: INMSEL - COMP1_INPSEL: - name: INPSEL - COMP1_POLARITY: - name: POLARITY - COMP1_HYST: - name: HYST - COMP1_BLANKING: - name: BLANKING - COMP1_BRGEN: - name: BRGEN - COMP1_SCALEN: - name: SCALEN - COMP1_INMESEL: - name: INMESEL - COMP1_VALUE: - name: VALUE - COMP1_LOCK: - name: LOCK - COMP2_CSR: - _modify: - COMP2_EN: - name: EN - COMP2_PWRMODE: - name: PWRMODE - COMP2_INMSEL: - name: INMSEL - COMP2_INPSEL: - name: INPSEL - COMP2_WINMODE: - name: WINMODE - COMP2_POLARITY: - name: POLARITY - COMP2_HYST: - name: HYST - COMP2_BLANKING: - name: BLANKING - COMP2_BRGEN: - name: BRGEN - COMP2_SCALEN: - name: SCALEN - COMP2_INMESEL: - name: INMESEL - COMP2_VALUE: - name: VALUE - COMP2_LOCK: - name: LOCK diff --git a/devices/common_patches/comp/l4x6_comp_reg_rename.yaml b/devices/common_patches/comp/l4x6_comp_reg_rename.yaml deleted file mode 100644 index 625a5ebfd..000000000 --- a/devices/common_patches/comp/l4x6_comp_reg_rename.yaml +++ /dev/null @@ -1,51 +0,0 @@ -COMP: - COMP1_CSR: - _modify: - COMP1_EN: - name: EN - COMP1_PWRMODE: - name: PWRMODE - COMP1_INMSEL: - name: INMSEL - COMP1_INPSEL: - name: INPSEL - COMP1_POLARITY: - name: POLARITY - COMP1_HYST: - name: HYST - COMP1_BLANKING: - name: BLANKING - COMP1_BRGEN: - name: BRGEN - COMP1_SCALEN: - name: SCALEN - COMP1_VALUE: - name: VALUE - COMP1_LOCK: - name: LOCK - COMP2_CSR: - _modify: - COMP2_EN: - name: EN - COMP2_PWRMODE: - name: PWRMODE - COMP2_INMSEL: - name: INMSEL - COMP2_INPSEL: - name: INPSEL - COMP2_WINMODE: - name: WINMODE - COMP2_POLARITY: - name: POLARITY - COMP2_HYST: - name: HYST - COMP2_BLANKING: - name: BLANKING - COMP2_BRGEN: - name: BRGEN - COMP2_SCALEN: - name: SCALEN - COMP2_VALUE: - name: VALUE - COMP2_LOCK: - name: LOCK diff --git a/devices/common_patches/comp/l4xx_comp_reg_rename.yaml b/devices/common_patches/comp/l4xx_comp_reg_rename.yaml new file mode 100644 index 000000000..d1af23b23 --- /dev/null +++ b/devices/common_patches/comp/l4xx_comp_reg_rename.yaml @@ -0,0 +1,7 @@ +COMP: + COMP1_CSR: + _strip: + - "COMP1_" + COMP2_CSR: + _strip: + - "COMP2_" \ No newline at end of file diff --git a/devices/stm32l4x1.yaml b/devices/stm32l4x1.yaml index 9a6e56dff..39807f993 100644 --- a/devices/stm32l4x1.yaml +++ b/devices/stm32l4x1.yaml @@ -138,5 +138,5 @@ _include: - ./common_patches/l4_gpio_brr.yaml - ./common_patches/l4_tim15_ch2.yaml - ../peripherals/spi/spi_l4.yaml - - ./common_patches/comp/l4x1_comp_reg_rename.yaml + - ./common_patches/comp/l4xx_comp_reg_rename.yaml - ../peripherals/comp/comp_l4x1.yaml diff --git a/devices/stm32l4x3.yaml b/devices/stm32l4x3.yaml index 3ce2b3c2e..02753f82e 100644 --- a/devices/stm32l4x3.yaml +++ b/devices/stm32l4x3.yaml @@ -168,5 +168,5 @@ _include: - ./common_patches/l4_gpio_brr.yaml - ../peripherals/spi/spi_l4.yaml - ./common_patches/l4_lcd_segment.yaml - - ./common_patches/comp/l4x6_comp_reg_rename.yaml + - ./common_patches/comp/l4xx_comp_reg_rename.yaml - ../peripherals/comp/comp_l4x6.yaml From dfd1f12d6a78194d15e90938883f80904ed63ca3 Mon Sep 17 00:00:00 2001 From: oldsheep68 Date: Tue, 4 Jan 2022 20:15:35 +0100 Subject: [PATCH 3/4] DAC smal rename DAC1 -> DAC for all l4x types opamp added description --- .../dac/dac_rename_stm32l4xx.yaml | 4 + devices/stm32l4x1.yaml | 3 + devices/stm32l4x2.yaml | 4 + devices/stm32l4x3.yaml | 3 + devices/stm32l4x6.yaml | 3 + peripherals/dac/dac_l4xx.yaml | 95 +++++++++++++++++++ peripherals/opamp/opamp_l4.yaml | 47 +++++++++ 7 files changed, 159 insertions(+) create mode 100644 devices/common_patches/dac/dac_rename_stm32l4xx.yaml create mode 100644 peripherals/dac/dac_l4xx.yaml create mode 100644 peripherals/opamp/opamp_l4.yaml diff --git a/devices/common_patches/dac/dac_rename_stm32l4xx.yaml b/devices/common_patches/dac/dac_rename_stm32l4xx.yaml new file mode 100644 index 000000000..7e9243092 --- /dev/null +++ b/devices/common_patches/dac/dac_rename_stm32l4xx.yaml @@ -0,0 +1,4 @@ +_modify: + # Fix DAC peripherals to match other devices + DAC1: + name: DAC \ No newline at end of file diff --git a/devices/stm32l4x1.yaml b/devices/stm32l4x1.yaml index 39807f993..3615d729d 100644 --- a/devices/stm32l4x1.yaml +++ b/devices/stm32l4x1.yaml @@ -140,3 +140,6 @@ _include: - ../peripherals/spi/spi_l4.yaml - ./common_patches/comp/l4xx_comp_reg_rename.yaml - ../peripherals/comp/comp_l4x1.yaml + - ./common_patches/dac/dac_rename_stm32l4xx.yaml + - ../peripherals/dac/dac_l4xx.yaml + - ../peripherals/opamp/opamp_l4.yaml \ No newline at end of file diff --git a/devices/stm32l4x2.yaml b/devices/stm32l4x2.yaml index f85252e75..b7b9ff823 100644 --- a/devices/stm32l4x2.yaml +++ b/devices/stm32l4x2.yaml @@ -3,6 +3,7 @@ _svd: ../svd/stm32l4x2.svd MPU: _strip: - "MPU_" + # Most of the patches and includes for this device are shared with the L412, # so update the common patch file below instead. @@ -15,3 +16,6 @@ _include: - ../peripherals/rcc/rcc_l4_uart4.yaml - ./common_patches/comp/l4xx_comp_reg_rename.yaml - ../peripherals/comp/comp_l4x1.yaml + - ./common_patches/dac/dac_rename_stm32l4xx.yaml + - ../peripherals/dac/dac_l4xx.yaml + - ../peripherals/opamp/opamp_l4.yaml diff --git a/devices/stm32l4x3.yaml b/devices/stm32l4x3.yaml index 02753f82e..e646e6a9b 100644 --- a/devices/stm32l4x3.yaml +++ b/devices/stm32l4x3.yaml @@ -170,3 +170,6 @@ _include: - ./common_patches/l4_lcd_segment.yaml - ./common_patches/comp/l4xx_comp_reg_rename.yaml - ../peripherals/comp/comp_l4x6.yaml + - ./common_patches/dac/dac_rename_stm32l4xx.yaml + - ../peripherals/dac/dac_l4xx.yaml + - ../peripherals/opamp/opamp_l4.yaml diff --git a/devices/stm32l4x6.yaml b/devices/stm32l4x6.yaml index 7ed058de7..9a22fa16f 100644 --- a/devices/stm32l4x6.yaml +++ b/devices/stm32l4x6.yaml @@ -96,3 +96,6 @@ _include: - common_patches/adc_common_group_name.yaml - ./common_patches/comp/l4xx_comp_reg_rename.yaml - ../peripherals/comp/comp_l4x6.yaml + - ../peripherals/dac/dac_l4xx.yaml + - ../peripherals/opamp/opamp_l4.yaml + diff --git a/peripherals/dac/dac_l4xx.yaml b/peripherals/dac/dac_l4xx.yaml new file mode 100644 index 000000000..ca1c8c6f2 --- /dev/null +++ b/peripherals/dac/dac_l4xx.yaml @@ -0,0 +1,95 @@ +DAC,DAC?: + "CR,CR?": + "CEN?": + Normal: [0, 'DAC Channel X Normal operating mode'] + Calibration: [1, 'DAC Channel X calibration mode'] + "DMAUDRIE?": + Disabled: [0, "DAC Channel X DMA Underrun Interrupt disabled"] + Enabled: [1, "DAC Channel X DMA Underrun Interrupt enabled"] + "DMAEN?": + Disabled: [0, "DAC Channel X DMA mode disabled"] + Enabled: [1, "DAC Channel X DMA mode enabled"] + "MAMP?": + Amp1: [0b0000, 'Unmask bit0 of LFSR/ triangle amplitude equal to 1'] + Amp3: [0b0001, 'Unmask bits[1:0] of LFSR/ triangle amplitude equal to 3'] + Amp7: [0b0010, 'Unmask bits[2:0] of LFSR/ triangle amplitude equal to 7'] + Amp15: [0b0011, 'Unmask bits[3:0] of LFSR/ triangle amplitude equal to 15'] + Amp31: [0b0100, 'Unmask bits[4:0] of LFSR/ triangle amplitude equal to 31'] + Amp63: [0b0101, 'Unmask bits[5:0] of LFSR/ triangle amplitude equal 63'] + Amp127: [0b0110, 'Unmask bits[6:0] of LFSR/ triangle amplitude equal to 127'] + Amp255: [0b0111, 'Unmask bits[7:0] of LFSR/ triangle amplitude equal to 255'] + Amp511: [0b1000, 'Unmask bits[8:0] of LFSR/ triangle amplitude equal to 511'] + Amp1023: [0b1001, 'Unmask bits[9:0] of LFSR/ triangle amplitude equal to 1023'] + Amp2047: [0b1010, 'Unmask bits[10:0] of LFSR/ triangle amplitude equal to 2047'] + Amp4095: [0b1011, 'Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095'] + "WAVE?": + Disabled: [0, 'Wave generation disabled'] + Noise: [1, 'Noise wave generation enabled'] + Triangle: [2, 'Triangle wave generation enabled'] + "TSEL?": + TIM6_TRGO: [0, 'TIM6_TRGO event trigger for DAC conversion, if TEN is enabled'] + TIM8_TRGO: [1, 'TIM8_TRGO'] + TIM7_TRGO: [2, 'TIM7_TRGO (Note: Reserved on STM32L45xxx and STM32L46xxx devices)'] + TIM5_TRGO: [3, 'TIM5_TRGO'] + TIM2_TRGO: [4, 'TIM2_TRGO'] + TIM4_TRGO: [5, 'TIM4_TRGO'] + EXTI9: [6, 'External pin'] + SWTRIG: [7, 'Software triger'] + "TEN?": + Disabled: [0, "DAC Channel X trigger disabled"] + Enabled: [1, "DAC Channel X trigger enabled"] + "EN?": + Disabled: [0, "DAC Channel X disabled"] + Enabled: [1, "DAC Channel X enabled"] + + SWTRIGR: + "SWTRIG?": + NoTrigger: [0, 'No trigger'] + Trigger: [1, 'Trigger'] + + "DOR?": + "DACC?DOR": [0, 4095] + + SR: + "BWST?": + Idle: [0, 'There is no write operation of DAC_SHSR1 ongoing: DAC_SHSR1 can be written'] + Busy: [1, 'There is a write operation of DAC_SHSR1 ongoing: DAC_SHSR1 cannot be written'] + "CAL_FLAG?": + Lower: [0, 'Calibration trimming value is lower than the offset correction value'] + Equal_Higher: [1, 'Calibration trimming value is equal or greater than the offset correction value'] + "DMAUDR?": + NoError: [0, 'No DMA underrun error condition occurred for DAC channel x'] + Error: [1, 'DMA underrun error condition occurred for DAC channel x (the currently selected trigger is driving DAC channel1 conversion at a frequency higher than the DMA service capability rate)'] + + CCR: + "OTRIM?": [0, 31] + + MCR: + "MODE?": + NormalPinBuffer: [0b000, 'Normal mode - DAC channelx is connected to external pin with Buffer enabled'] + NormalPinChipBuffer: [0b001, 'Normal mode - DAC channelx is connected to external pin and to on chip peripherals with Buffer enabled'] + NormalPinNoBuffer: [0b010, 'Normal mode - DAC channelx is connected to external pin with Buffer disabled'] + NormalChipNoBuffer: [0b011, 'Normal mode - DAC channelx is connected to on chip peripherals with Buffer disabled'] + SHPinBuffer: [0b100, 'S&H mode - DAC channelx is connected to external pin with Buffer enabled'] + SHPinChipBuffer: [0b101, 'S&H mode - DAC channelx is connected to external pin and to on chip peripherals with Buffer enabled'] + SHPinNoBuffer: [0b110, 'S&H mode - DAC channelx is connected to external pin and to on chip peripherals with Buffer disabled'] + SHChipNoBuffer: [0b111, 'S&H mode - DAC channelx is connected to on chip peripherals with Buffer disabled'] + + "SHSR?": + "TSAMPLE?": [0, 1023] + + SHHR: + "THOLD?": [0, 1023] + + SHRR: + "TREFRESH?": [0, 255] + + "DHR12R?": + "DACC?DHR": [0, 4095] + + "DHR12L?": + "DACC?DHR": [0, 4095] + + "DHR8R?": + "DACC?DHR": [0, 256] + diff --git a/peripherals/opamp/opamp_l4.yaml b/peripherals/opamp/opamp_l4.yaml new file mode 100644 index 000000000..160045b4c --- /dev/null +++ b/peripherals/opamp/opamp_l4.yaml @@ -0,0 +1,47 @@ + +OPAMP: + OPAMP?_CSR: + CALOUT: [0, 1] + PGA_GAIN: + Gain2: [0, "Gain 2"] + Gain4: [1, "Gain 4"] + Gain8: [2, "Gain 8"] + Gain16: [3, "Gain 16"] + CALSEL: + NMOS: [0, "0.2V applied to OPAMP inputs during calibration"] + PMOS: [1, VDDA-0.2V applied to OPAMP inputs during calibration"] + CALON: + Disabled: [0, "Normal mode"] + Enabled: [1, "Calibration mode"] + VP_SEL: + GPIO: [0, "GPIO connectet to VINP"] + DAC: [1, "DAC connected to VPINP"] + VM_SEL: + GPIO: [0, "GPIO connectet to VINM"] + LOW_LEAKAGE: [1, "Low leakage inputs connecte (only available in certen BGA cases"] + PGA_MODE: [2, "OPAMP in PGA mode"] + USERTRIM: + Factory: [0, "Factory trim used"] + User: [1, "User trim used"] + OPAMODE: + PGA_DISABLED: [0, "internal PGA diabled"] + PGA_ENABLED: [2, "internal PGA enabled, gain programmed in PGA_GAIN"] + FOLLOWER: [3, "internal follower"] + OPALPM: + NORMAL: [0, OpAmp in normal mode] + LOW: [1, OpAmp in low power mode] + OPAEN: + Disabled: [0, "OpAmp disabled"] + Enabled: [1, "OpAmp enabled"] + OPAMP?_OTR: + TRIMOFFSETN: [0, 31] + TRIMOFFSETP: [0, 31] + OPAMP?_LPOTR: + TRIMLPOFFSETN: [0, 31] + TRIMLPOFFSETP: [0, 31] + + OPAMP1_CSR: + OPA_RANGE: + LOW: [0, "low range (VDDA < 2.4V"] + HIGH: [1, "low range (VDDA >2.4V"] + From 53bba2f2a60d39867f6d5ed69ed23ab5d3051d39 Mon Sep 17 00:00:00 2001 From: Adam Greig Date: Sun, 3 Jul 2022 21:42:58 +0100 Subject: [PATCH 4/4] L4: Fix limit of DACC?DHR --- peripherals/dac/dac_l4xx.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/peripherals/dac/dac_l4xx.yaml b/peripherals/dac/dac_l4xx.yaml index ca1c8c6f2..d9271c719 100644 --- a/peripherals/dac/dac_l4xx.yaml +++ b/peripherals/dac/dac_l4xx.yaml @@ -91,5 +91,5 @@ DAC,DAC?: "DACC?DHR": [0, 4095] "DHR8R?": - "DACC?DHR": [0, 256] + "DACC?DHR": [0, 255]

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