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35 F7/tim: access to bits() without unsafe for single-field registers by maximeborges · Pull Request #700 · stm32-rs/stm32-rs · GitHub
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F7/tim: access to bits() without unsafe for single-field registers #700

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Merged
merged 1 commit into from
Jul 3, 2022

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maximeborges
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When writing to CNT/ARR/CCR%s single-field registers via bits(), it requires the use of unsafe for timers 9 to 14.
This PR allows to use safe bits() writing just like the other timers

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Memory map comparison

@adamgreig
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Any reason to close this? Is it already in another PR?

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I was sure I did a mistake since I forgot to cleanup some code that was using it in the F7 HAL, but it actually looks fine so I'll reopen it

@maximeborges maximeborges reopened this Feb 10, 2022
@maximeborges maximeborges changed the title f7/tim: access to bits() without unsafe for single-field registers F7/tim: access to bits() without unsafe for single-field registers Feb 10, 2022
@newAM newAM added the stm32f7 label Feb 10, 2022
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Makes sense, thanks!

bors r+

@bors bors bot merged commit fa72d11 into stm32-rs:master Jul 3, 2022
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bors bot commented Jul 3, 2022

Build succeeded:

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