diff --git a/cores/esp8266/core_esp8266_main.cpp b/cores/esp8266/core_esp8266_main.cpp
index 588019f0dd..61c07da909 100644
--- a/cores/esp8266/core_esp8266_main.cpp
+++ b/cores/esp8266/core_esp8266_main.cpp
@@ -60,6 +60,13 @@ static os_event_t s_loop_queue[LOOP_QUEUE_SIZE];
/* Used to implement optimistic_yield */
static uint32_t s_micros_at_task_start;
+/* For ets_intr_lock_nest / ets_intr_unlock_nest
+ * Max nesting seen by SDK so far is 2.
+ */
+#define ETS_INTR_LOCK_NEST_MAX 7
+static uint16_t ets_intr_lock_stack[ETS_INTR_LOCK_NEST_MAX];
+static byte ets_intr_lock_stack_ptr=0;
+
extern "C" {
extern const uint32_t __attribute__((section(".ver_number"))) core_version = ARDUINO_ESP8266_GIT_VER;
@@ -121,6 +128,35 @@ extern "C" void optimistic_yield(uint32_t interval_us) {
}
}
+
+// Replace ets_intr_(un)lock with nestable versions
+extern "C" void IRAM_ATTR ets_intr_lock() {
+ if (ets_intr_lock_stack_ptr < ETS_INTR_LOCK_NEST_MAX)
+ ets_intr_lock_stack[ets_intr_lock_stack_ptr++] = xt_rsil(3);
+ else
+ xt_rsil(3);
+}
+
+extern "C" void IRAM_ATTR ets_intr_unlock() {
+ if (ets_intr_lock_stack_ptr > 0)
+ xt_wsr_ps(ets_intr_lock_stack[--ets_intr_lock_stack_ptr]);
+ else
+ xt_rsil(0);
+}
+
+
+// Save / Restore the PS state across the rom ets_post call as the rom code
+// does not implement this correctly.
+extern "C" bool ets_post_rom(uint8 prio, ETSSignal sig, ETSParam par);
+
+extern "C" bool IRAM_ATTR ets_post(uint8 prio, ETSSignal sig, ETSParam par) {
+ uint32_t saved;
+ asm volatile ("rsr %0,ps":"=a" (saved));
+ bool rc=ets_post_rom(prio, sig, par);
+ xt_wsr_ps(saved);
+ return rc;
+}
+
extern "C" void __loop_end (void)
{
run_scheduled_functions();
diff --git a/tools/sdk/ld/eagle.rom.addr.v6.ld b/tools/sdk/ld/eagle.rom.addr.v6.ld
index 0407fb8806..144c72b557 100644
--- a/tools/sdk/ld/eagle.rom.addr.v6.ld
+++ b/tools/sdk/ld/eagle.rom.addr.v6.ld
@@ -119,8 +119,10 @@ PROVIDE ( ets_install_external_printf = 0x40002450 );
PROVIDE ( ets_install_putc1 = 0x4000242c );
PROVIDE ( ets_install_putc2 = 0x4000248c );
PROVIDE ( ets_install_uart_printf = 0x40002438 );
+/* permanently hide reimplemented ets_intr_*lock(), see #6484
PROVIDE ( ets_intr_lock = 0x40000f74 );
PROVIDE ( ets_intr_unlock = 0x40000f80 );
+*/
PROVIDE ( ets_isr_attach = 0x40000f88 );
PROVIDE ( ets_isr_mask = 0x40000f98 );
PROVIDE ( ets_isr_unmask = 0x40000fa8 );
@@ -128,7 +130,10 @@ PROVIDE ( ets_memcmp = 0x400018d4 );
PROVIDE ( ets_memcpy = 0x400018b4 );
PROVIDE ( ets_memmove = 0x400018c4 );
PROVIDE ( ets_memset = 0x400018a4 );
+/* renamed to ets_post_rom(), see #6484
PROVIDE ( ets_post = 0x40000e24 );
+*/
+PROVIDE ( ets_post_rom = 0x40000e24 );
PROVIDE ( ets_printf = 0x400024cc );
PROVIDE ( ets_putc = 0x40002be8 );
PROVIDE ( ets_rtc_int_register = 0x40002a40 );
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