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esp32/machine_pwm: Rebase source code.
Signed-off-by: Yoann Darche <yoannd@hotmail.com>
1 parent 5c4a5cf commit 56f820b

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‎ports/esp32/machine_pwm.c

Lines changed: 48 additions & 111 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@
3737
#include "esp_err.h"
3838
#include "esp_sleep.h"
3939
#include "esp_clk_tree.h"
40-
#include "soc/clk_tree_defs.h"
40+
// #include "soc/clk_tree_defs.h"
4141
#include "soc/gpio_sig_map.h"
4242

4343

@@ -113,49 +113,6 @@ static ledc_timer_config_t timers[PWM_TIMER_MAX];
113113
#define EMPIRIC_FREQ (10) // Hz
114114
#endif
115115

116-
// Clock alias values (used by clock parameter)
117-
// PWM_LAST_CLK_IDX is not clock by a maker to identify outofindex values
118-
// PWM_AUTO_CLK is used in order to auto determinate the clock (no specific clock has been required)
119-
120-
enum { PWM_AUTO_CLK, PWM_APB_CLK, PWM_RC_FAST_CLK, PWM_REF_TICK, PWM_XTAL_CLK, PWM_PLL_CLK, _PWM_LAST_CLK_IDX };
121-
static const ledc_clk_cfg_t clk_source_map[] = {
122-
-2,
123-
#if SOC_LEDC_SUPPORT_APB_CLOCK
124-
LEDC_USE_APB_CLK,
125-
#else
126-
-1,
127-
#endif
128-
LEDC_USE_RC_FAST_CLK, // LEDC_USE_RC_FAST_CLK == LEDC_USE_RTC8M_CLK
129-
#if SOC_LEDC_SUPPORT_REF_TICK
130-
LEDC_USE_REF_TICK,
131-
#else
132-
-1,
133-
#endif
134-
#if SOC_LEDC_SUPPORT_XTAL_CLOCK
135-
LEDC_USE_XTAL_CLK,
136-
#else
137-
-1,
138-
#endif
139-
#if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
140-
LEDC_USE_PLL_DIV_CLK,
141-
#else
142-
-1,
143-
#endif
144-
};
145-
146-
// MicroPython bindings for ESP32-PWM
147-
#define MICROPY_PY_MACHINE_PWM_CLASS_CONSTANTS \
148-
{ MP_ROM_QSTR(MP_QSTR_PWM_AUTO_CLK), MP_ROM_INT(PWM_AUTO_CLK) }, \
149-
{ MP_ROM_QSTR(MP_QSTR_PWM_APB_CLK), MP_ROM_INT(PWM_APB_CLK) }, \
150-
{ MP_ROM_QSTR(MP_QSTR_PWM_RC_FAST_CLK), MP_ROM_INT(PWM_RC_FAST_CLK) }, \
151-
{ MP_ROM_QSTR(MP_QSTR_PWM_REF_TICK), MP_ROM_INT(PWM_REF_TICK) }, \
152-
{ MP_ROM_QSTR(MP_QSTR_PWM_XTAL_CLK), MP_ROM_INT(PWM_XTAL_CLK) }, \
153-
{ MP_ROM_QSTR(MP_QSTR_PWM_PLL_CLK), MP_ROM_INT(PWM_PLL_CLK) }, \
154-
155-
<<<<<<< HEAD
156-
157-
=======
158-
>>>>>>> 51f170008 (esp32/machine_pwm: Add constants clock defintion.)
159116
// Config of timer upon which we run all PWM'ed GPIO pins
160117
static bool pwm_inited = false;
161118

@@ -315,7 +272,7 @@ static void set_freq(machine_pwm_obj_t *self, unsigned int freq, ledc_timer_conf
315272
timer->clk_cfg = LEDC_AUTO_CLK;
316273

317274
if (err == ESP_FAIL) {
318-
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("unreachable frequency %d"), freq);
275+
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("unreachable frequency %d :: precision=%d"), freq, res);
319276
} else {
320277
check_esp_err(err);
321278
}
@@ -573,32 +530,33 @@ static void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_p
573530

574531
int clk_src = timers[TIMER_IDX(self->mode, self->timer)].clk_cfg;
575532
if (clk_src == LEDC_USE_RC_FAST_CLK) {
576-
mp_printf(print, ", clock=PWM_RC_FAST_CLK(%d)", PWM_RC_FAST_CLK);
533+
mp_printf(print, ", clock=RC_FAST_CLK");
577534
}
578535
#if SOC_LEDC_SUPPORT_APB_CLOCK
579536
else if (clk_src == LEDC_USE_APB_CLK) {
580-
mp_printf(print, ", clock=PWM_APB_CLK(%d)", PWM_APB_CLK);
537+
mp_printf(print, ", clock=APB_CLK");
581538
}
582539
#endif
583540
#if SOC_LEDC_SUPPORT_XTAL_CLOCK
584541
else if (clk_src == LEDC_USE_XTAL_CLK) {
585-
mp_printf(print, ", clock=PWM_XTAL_CLK(%d)", PWM_XTAL_CLK);
542+
mp_printf(print, ", clock=XTAL_CLK");
586543
}
587544
#endif
588545
#if SOC_LEDC_SUPPORT_REF_TICK
589546
else if (clk_src == LEDC_USE_REF_TICK) {
590-
mp_printf(print, ", clock=PWM_REF_TICK(%d)", PWM_REF_TICK);
547+
mp_printf(print, ", clock=REF_TICK");
591548
}
592549
#endif
593550
#if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
594551
else if (clk_src == LEDC_USE_PLL_DIV_CLK) {
595-
mp_printf(print, ", clock=PWM_PLL_CLK(%d)", PWM_PLL_CLK);
552+
mp_printf(print, ", clock=PLL_CLK");
596553
}
597554
#endif
598555
else {
599556
mp_printf(print, ", clock=UNKNOWN");
600557
}
601558

559+
602560
if (self->lightsleepenabled) {
603561
mp_printf(print, ", light sleep enabled");
604562
}
@@ -609,13 +567,12 @@ static void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_p
609567
// This called from pwm.init() method
610568
static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
611569
size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
612-
enum { ARG_freq, ARG_duty, ARG_duty_u16, ARG_duty_ns, ARG_clock, ARG_lightSleepEnable };
570+
enum { ARG_freq, ARG_duty, ARG_duty_u16, ARG_duty_ns, ARG_lightSleepEnable };
613571
static const mp_arg_t allowed_args[] = {
614572
{ MP_QSTR_freq, MP_ARG_INT, {.u_int = -1} },
615573
{ MP_QSTR_duty, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
616574
{ MP_QSTR_duty_u16, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
617575
{ MP_QSTR_duty_ns, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
618-
{ MP_QSTR_clock, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = PWM_AUTO_CLK} },
619576
{ MP_QSTR_light_sleep_enable, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
620577
};
621578
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
@@ -624,69 +581,63 @@ static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
624581

625582
int freq = args[ARG_freq].u_int;
626583

627-
// ***************************** Decode clok and light sleep mode *********************************
628-
int pwm_src_clock = args[ARG_clock].u_int;
629-
if (pwm_src_clock >= _PWM_LAST_CLK_IDX) {
630-
mp_raise_ValueError(MP_ERROR_TEXT("Bad value for clock."));
631-
}
632-
633-
// Check if the clock is available:
634-
if (clk_source_map[pwm_src_clock] < 0) {
635-
mp_raise_ValueError(MP_ERROR_TEXT("Clock source not available for this Soc."));
636-
}
584+
// *********************** Decode light sleep mode and choose clock source ************************
585+
ledc_clk_cfg_t pwm_src_clock = LEDC_AUTO_CLK;
637586

638587
if (args[ARG_lightSleepEnable].u_int > 0) {
639588
// The light sleep enabled is requested
640589
// => GPIO need to be in the not disabled list
641-
642-
if (pwm_src_clock == PWM_AUTO_CLK) {
643-
// In case of Clock auto select, with sleep mode the clock will be PWM_RC_FAST_CLK
644-
pwm_src_clock = PWM_RC_FAST_CLK;
645-
}
646-
// Check if the source clock is valid for light sleep (only LEDC_USE_RC_FAST_CLK is valid )
647-
else if (pwm_src_clock != PWM_RC_FAST_CLK) {
648-
mp_raise_ValueError(MP_ERROR_TEXT("only PWM_RC_FAST_CLK is allowed with light sleep enabled"));
649-
}
590+
// => CLK has to be RC_FAST_CLK
591+
pwm_src_clock = LEDC_USE_RC_FAST_CLK;
650592
self->lightsleepenabled = true;
651-
652593
} else {
653594
self->lightsleepenabled = false;
654-
}
655-
656-
// if auto clock => Determine the best clock
657-
if (pwm_src_clock == PWM_AUTO_CLK) {
658595

596+
// Choose appropriate clock from best available clock
659597
#if !(PWM_SUPPORT_INDEP_CLOCK_SRC)
660-
int pwm_clk = find_clock_in_use();
661-
if (pwm_clk != PWM_AUTO_CLK) {
598+
ledc_clk_cfg_t pwm_clk = find_clock_in_use();
599+
if (pwm_clk != LEDC_AUTO_CLK) {
662600
pwm_src_clock = pwm_clk;
663601
} else {
664-
pwm_src_clock = PWM_APB_CLK;
602+
603+
#if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
604+
pwm_src_clock = LEDC_USE_PLL_DIV_CLK;
605+
#elif SOC_LEDC_SUPPORT_APB_CLOCK
606+
pwm_src_clock = LEDC_USE_APB_CLK;
607+
#elif SOC_LEDC_SUPPORT_XTAL_CLOCK
608+
pwm_src_clock = LEDC_USE_XTAL_CLK;
609+
#else
610+
#error No supported PWM / LEDC clocks.
611+
#endif
665612
}
666613
#else
667614
#if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
668-
pwm_src_clock = PWM_PLL_CLK;
615+
pwm_src_clock = LEDC_USE_PLL_DIV_CLK;
616+
#elif SOC_LEDC_SUPPORT_APB_CLOCK
617+
pwm_src_clock = LEDC_USE_APB_CLK;
618+
#elif SOC_LEDC_SUPPORT_XTAL_CLOCK
619+
pwm_src_clock = LEDC_USE_XTAL_CLK;
620+
#else
621+
#error No supported PWM / LEDC clocks.
669622
#endif
670-
#if SOC_LEDC_SUPPORT_APB_CLOCK
671-
pwm_src_clock = PWM_APB_CLK;
672623
#endif
673624

674625
#if SOC_LEDC_SUPPORT_REF_TICK
675626
if (freq < EMPIRIC_FREQ) {
676-
pwm_src_clock = PWM_REF_TICK; // 1 MHz
627+
pwm_src_clock = LEDC_USE_REF_TICK; // 1 MHz
677628
}
678629
#endif
679-
#endif
680630
}
631+
632+
// Check for clock source conflic in case of ESP32-S3/C3/C6
681633
#if !(PWM_SUPPORT_INDEP_CLOCK_SRC)
682-
else {
683-
int pwm_clk = find_clock_in_use();
684-
if ((pwm_clk != PWM_AUTO_CLK) && (pwm_clk != pwm_src_clock)) {
685-
mp_raise_ValueError(MP_ERROR_TEXT("one or more active timers use a different clock source, not supported by the current SoC."));
686-
}
634+
635+
ledc_clk_cfg_t pwm_clk = find_clock_in_use();
636+
if ((pwm_clk != LEDC_AUTO_CLK) && (pwm_clk != pwm_src_clock)) {
637+
mp_raise_ValueError(MP_ERROR_TEXT("one or more active timers use a different clock source, not supported by the current SoC."));
687638
}
688-
#endif
689639

640+
#endif
690641

691642
// Note: High Speed Mode (available on ESP32 only, not on S2/S3), only supports REF_TICK(1MHz) and APB_CLK(80MHz)
692643
// Low Speed Mode (avail. on ESP32, S2, S3, C3, C6) supports [REF_TICK(1MHz)], RC_FAST_CLK(8Mhz) and APB_CLK(80MHz)
@@ -718,14 +669,7 @@ static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
718669
}
719670
}
720671

721-
if (self->lightsleepenabled) {
722-
if ((freq <= 0) || (freq > 8000000)) {
723-
mp_raise_ValueError(MP_ERROR_TEXT("frequency must be from 1Hz to 8MHz"));
724-
}
725-
} else
726-
if ((freq <= 0) || (freq > 40000000)) {
727-
mp_raise_ValueError(MP_ERROR_TEXT("frequency must be from 1Hz to 40MHz"));
728-
}
672+
check_freq(self, freq);
729673

730674

731675

@@ -734,16 +678,16 @@ static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
734678
int current_timer_idx = chans[channel_idx].timer_idx;
735679
bool current_in_use = is_timer_in_use(channel_idx, current_timer_idx);
736680
if (current_in_use) {
737-
timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, CHANNEL_IDX_TO_MODE(channel_idx), clk_source_map[pwm_src_clock]);
681+
timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, CHANNEL_IDX_TO_MODE(channel_idx), pwm_src_clock);
738682
} else {
739683
timer_idx = chans[channel_idx].timer_idx;
740684
}
741685

742686
if (timer_idx == -1) {
743687
if (self->lightsleepenabled) {
744-
timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, 0, clk_source_map[pwm_src_clock]);
688+
timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, 0, pwm_src_clock);
745689
} else {
746-
timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, ANY_MODE, clk_source_map[pwm_src_clock]);
690+
timer_idx = find_timer(freq, SAME_FREQ_OR_FREE, ANY_MODE, pwm_src_clock);
747691
}
748692
}
749693
if (timer_idx == -1) {
@@ -752,7 +696,7 @@ static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
752696

753697
#if !(PWM_SUPPORT_INDEP_CLOCK_SRC)
754698
// Check for the clock source consistency in case of ESP32-S3/C3 and C6
755-
if (is_timer_with_different_clock(timer_idx, clk_source_map[pwm_src_clock])) {
699+
if (is_timer_with_different_clock(timer_idx, pwm_src_clock)) {
756700
mp_raise_ValueError(MP_ERROR_TEXT("one or more active timers use a different clock source, which is not supported by the current SoC."));
757701
}
758702
#endif
@@ -783,7 +727,7 @@ static void mp_machine_pwm_init_helper(machine_pwm_obj_t *self,
783727
self->active = true;
784728

785729
// Set timer frequency
786-
set_freq(self, freq, &timers[timer_idx], clk_source_map[pwm_src_clock]);
730+
set_freq(self, freq, &timers[timer_idx], pwm_src_clock);
787731

788732
// Set duty cycle?
789733
if (duty_u16 != -1) {
@@ -849,14 +793,7 @@ static mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self) {
849793
static void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) {
850794
pwm_is_active(self);
851795

852-
if (self->lightsleepenabled) {
853-
if ((freq <= 0) || (freq > 8000000)) {
854-
mp_raise_ValueError(MP_ERROR_TEXT("frequency must be from 1Hz to 8MHz"));
855-
}
856-
} else
857-
if ((freq <= 0) || (freq > 40000000)) {
858-
mp_raise_ValueError(MP_ERROR_TEXT("frequency must be from 1Hz to 40MHz"));
859-
}
796+
check_freq(self, freq);
860797

861798
if (freq == timers[TIMER_IDX(self->mode, self->timer)].freq_hz) {
862799
return;

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