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OCTOSPI
1 parent 9193016 commit d957139

27 files changed

+255
-136
lines changed

‎devices/fields/octospi/common.yaml

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,6 @@ DCR1:
6969
"HyperBus register mode, addressing register space. The memory-mapped accesses in this mode must be non-cacheable, or Indirect read/write modes must be used",
7070
]
7171
DEVSIZE: [0, 0x1F]
72-
CSHT: [0, 0x3F]
7372
DLYBYP:
7473
DelayBlockEnabled:
7574
[
@@ -99,7 +98,7 @@ DCR2:
9998

10099
DCR3:
101100
CSBOUND: [0, 0x1F]
102-
MAXTRAN: [0, 0xFF]
101+
"?~MAXTRAN": [0, 0xFF]
103102

104103
DCR4:
105104
REFRESH: [0, 0xFFFFFFFF]
@@ -163,7 +162,7 @@ PIR:
163162
INTERVAL: [0, 0xFFFF]
164163

165164
CCR:
166-
SIOO:
165+
"?~SIOO":
167166
SendEveryTransaction: [0, Send instruction on every transaction]
168167
SendOnlyFirstCmd: [1, Send instruction only for the first command]
169168
DQSE:

‎devices/fields/octospi/l4.yaml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,3 +7,5 @@ CR:
77
DMM:
88
Disabled: [0, Dual-quad configuration disabled]
99
Enabled: [1, Dual-quad configuration enabled]
10+
DCR1:
11+
CSHT: [0, 0x3F]

‎devices/fields/octospi/l5.yaml

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
_include:
2+
- common.yaml
3+
CR:
4+
FSEL:
5+
FLASH1: [0, "FLASH 1 selected (data exchanged over IO[3:0])"]
6+
FLASH2: [1, "FLASH 2 selected (data exchanged over IO[7:4])"]
7+
DMM:
8+
Disabled: [0, Dual-quad configuration disabled]
9+
Enabled: [1, Dual-quad configuration enabled]
10+
DCR1:
11+
CSHT: [0, 7]

‎devices/fields/octospi/u5.yaml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,3 +7,5 @@ CR:
77
DMM:
88
Disabled: [0, Dual-memory configuration disabled]
99
Enabled: [1, Dual-memory configuration enabled]
10+
DCR1:
11+
CSHT: [0, 0x3F]

‎devices/patches/octospi/add_wrap.yaml

Lines changed: 92 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,92 @@
1+
_add:
2+
WPCCR:
3+
description: wrap communication configuration register
4+
addressOffset: 0x140
5+
resetValue: 0x00000000
6+
fields:
7+
DQSE:
8+
description: DQS enable
9+
bitOffset: 29
10+
bitWidth: 1
11+
DDTR:
12+
description: Data double transfer rate
13+
bitOffset: 27
14+
bitWidth: 1
15+
DMODE:
16+
description: Data mode
17+
bitOffset: 24
18+
bitWidth: 3
19+
ABSIZE:
20+
description: Alternate bytes size
21+
bitOffset: 20
22+
bitWidth: 2
23+
ABDTR:
24+
description: Alternate bytes double transfer rate
25+
bitOffset: 19
26+
bitWidth: 1
27+
ABMODE:
28+
description: Alternate-byte mode
29+
bitOffset: 16
30+
bitWidth: 3
31+
ADSIZE:
32+
description: Address size
33+
bitOffset: 12
34+
bitWidth: 2
35+
ADDTR:
36+
description: Address double transfer rate
37+
bitOffset: 11
38+
bitWidth: 1
39+
ADMODE:
40+
description: Address mode
41+
bitOffset: 8
42+
bitWidth: 3
43+
ISIZE:
44+
description: Instruction size
45+
bitOffset: 4
46+
bitWidth: 2
47+
IDTR:
48+
description: Instruction double transfer rate
49+
bitOffset: 3
50+
bitWidth: 1
51+
IMODE:
52+
description: Instruction mode
53+
bitOffset: 0
54+
bitWidth: 3
55+
56+
WPTCR:
57+
description: Wrap timing configuration register
58+
addressOffset: 0x148
59+
resetValue: 0x00000000
60+
fields:
61+
SSHIFT:
62+
description: Sample shift
63+
bitOffset: 30
64+
bitWidth: 1
65+
DHQC:
66+
description: Delay hold quarter cycle
67+
bitOffset: 28
68+
bitWidth: 1
69+
DCYC:
70+
description: Number of dummy cycles
71+
bitOffset: 0
72+
bitWidth: 5
73+
74+
WPIR:
75+
description: Wrap instruction register
76+
addressOffset: 0x150
77+
resetValue: 0x00000000
78+
fields:
79+
INSTRUCTION:
80+
description: Instruction
81+
bitOffset: 0
82+
bitWidth: 32
83+
84+
WPABR:
85+
description: Wrap alternate bytes register
86+
addressOffset: 0x160
87+
resetValue: 0x00000000
88+
fields:
89+
ALTERNATE:
90+
description: Alternate bytes
91+
bitOffset: 0
92+
bitWidth: 32

‎devices/patches/octospi/address.yaml

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,4 @@
1+
AR:
2+
_modify:
3+
ADRESS:
4+
name: ADDRESS

‎devices/patches/octospi/ddm.yaml

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
CR:
2+
_modify:
3+
DQM:
4+
name: DMM
5+
description: Dual-memory configuration

‎devices/patches/octospi/h7.yaml

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,9 @@
11
# OCTOSPI v1 peripheral on at least H7
22

3+
_include:
4+
- address.yaml
5+
- ddm.yaml
6+
37
DCR1:
48
_add:
59
DLYBYP:
@@ -13,7 +17,3 @@ DCR4:
1317
_modify:
1418
REFRESH:
1519
bitWidth: 32
16-
AR:
17-
_modify:
18-
ADRESS:
19-
name: ADDRESS

‎devices/patches/octospi/l4+.yaml

Lines changed: 15 additions & 98 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,7 @@
1+
_include:
2+
- ddm.yaml
3+
- add_wrap.yaml
4+
15
_delete:
26
- HWCFGR
37
- VER
@@ -6,117 +10,27 @@ _delete:
610

711
_add:
812
DCR4:
9-
description: Device configuration register 4
13+
displayName: DCR4
14+
description: device configuration register 4
1015
addressOffset: 0x14
16+
access: read-write
1117
resetValue: 0x00000000
1218
fields:
1319
REFRESH:
1420
description: Refresh rate
1521
bitOffset: 0
1622
bitWidth: 32
1723

18-
WPCCR:
19-
description: wrap communication configuration register
20-
addressOffset: 0x140
21-
resetValue: 0x00000000
22-
fields:
23-
DQSE:
24-
description: DQS enable
25-
bitOffset: 29
26-
bitWidth: 1
27-
DDTR:
28-
description: Data double transfer rate
29-
bitOffset: 27
30-
bitWidth: 1
31-
DMODE:
32-
description: Data mode
33-
bitOffset: 24
34-
bitWidth: 3
35-
ABSIZE:
36-
description: Alternate bytes size
37-
bitOffset: 20
38-
bitWidth: 2
39-
ABDTR:
40-
description: Alternate bytes double transfer rate
41-
bitOffset: 19
42-
bitWidth: 1
43-
ABMODE:
44-
description: Alternate-byte mode
45-
bitOffset: 16
46-
bitWidth: 3
47-
ADSIZE:
48-
description: Address size
49-
bitOffset: 12
50-
bitWidth: 2
51-
ADDTR:
52-
description: Address double transfer rate
53-
bitOffset: 11
54-
bitWidth: 1
55-
ADMODE:
56-
description: Address mode
57-
bitOffset: 8
58-
bitWidth: 3
59-
ISIZE:
60-
description: Instruction size
61-
bitOffset: 4
62-
bitWidth: 2
63-
IDTR:
64-
description: Instruction double transfer rate
65-
bitOffset: 3
66-
bitWidth: 1
67-
IMODE:
68-
description: Instruction mode
69-
bitOffset: 0
70-
bitWidth: 3
71-
72-
WPTCR:
73-
description: Wrap timing configuration register
74-
addressOffset: 0x148
75-
resetValue: 0x00000000
76-
fields:
77-
SSHIFT:
78-
description: Sample shift
79-
bitOffset: 30
80-
bitWidth: 1
81-
DHQC:
82-
description: Delay hold quarter cycle
83-
bitOffset: 28
84-
bitWidth: 1
85-
DCYC:
86-
description: Number of dummy cycles
87-
bitOffset: 0
88-
bitWidth: 5
89-
90-
WPIR:
91-
description: Wrap instruction register
92-
addressOffset: 0x150
93-
resetValue: 0x00000000
94-
fields:
95-
INSTRUCTION:
96-
description: Instruction
97-
bitOffset: 0
98-
bitWidth: 32
99-
100-
WPABR:
101-
description: Wrap alternate bytes register
102-
addressOffset: 0x160
103-
resetValue: 0x00000000
104-
fields:
105-
ALTERNATE:
106-
description: Alternate bytes
107-
bitOffset: 0
108-
bitWidth: 32
109-
110-
CR:
111-
_modify:
112-
DQM:
113-
name: DMM
114-
description: Dual-memory configuration
24+
_modify:
25+
SR:
26+
access: read-only
11527

11628
DCR1:
11729
_modify:
11830
MTYP:
11931
bitWidth: 3
32+
CSHT:
33+
bitWidth: 6
12034

12135
_add:
12236
DLYBYP:
@@ -130,3 +44,6 @@ DCR3:
13044
description: Maximum transfer
13145
bitOffset: 0
13246
bitWidth: 8
47+
48+
WCCR:
49+
_delete: SIOO

‎devices/stm32h523.yaml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -201,6 +201,8 @@ LPUART:
201201

202202
OCTOSPI:
203203
_strip: OCTOSPI_
204+
_include:
205+
- fields/octospi/u5.yaml
204206

205207
PSSI:
206208
_strip: PSSI_

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