3rd Semester

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University of Engineering & Technology T

Time Table (effective fro 1


8:30- 9:20 MON TUE WED THU FRI Library C.A C.A ECD C.A. Lab E1 CA-II Lab E1 CAD Lab CA-II

3rd Semester Electronics Engin

2
9:20- 10:10

3
10:20- 11:10 ECD Lab

Subject

ECD CA-II C.A. I.S. ECD Lab CAD Lab CA-II Lab C.A. Lab

Electronic Circuit Design Circuit Analysis-II Computer Architecture Islamic Studies Electronic Circuit Design LAB Computee Aided Design Lab Circuit Analysis-II Lab Computer Architecture LAB

of Engineering & Technology Taxila, Sub-Campus Chakwal

Time Table (effective from 03 Sep. 2012) 4


11:10-12:00 ECD Lab E1 I.S. CA-II Lab E2 CAD Lab E1 CA-II CA-II Lab E2

rd Semester Electronics Engineering ( 11 Session)

5
12:00-12:50 12:50-13:10

6
13:10-14:00

ECD Lab E

C.A. Lab E

CAD Lab E

Venue

Instructor

RG-02 RG-02 RG-02 RG-02 ECT Lab MCT Lab Compt. Lab Compt. Lab

Engr. Usman Zahid Engr. Faisal+ Engr. Hammad Engr. Babar Hussain Dr. Hafiz M. Yaseen Engr. Usman Zahid Engr. Hafiz Khurram Ali Engr. Faisal Masod Engr. Babar Hussain

7
14:00-14:50 ECD Lab E2 C.A. Lab E2 ECD CAD Lab E2

8
14:50- 15:40

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