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TITLE ABSTRACT LIST OF TABLES LIST OF FIGURES INTRODUTION 1.1 Overview of the project 1.1.1 Symmetric key encryption technique 1.1.2 Asymmetric key encryption technique 1.1.3 Cryptographic hash function 1.1.4 Applications of cryptographic hash functions 1.2 Network- On- Chip 1.2.1 Benefits of Network-On-Chip 1.3 Introduction to VLSI systems 1.4 Cryptographic Processor 1.4.1 Need for the cryptographic processors 1.5 Statement of work 1.5.1 Existing system 1.5.2 Drawbacks of the existing system 1.5.3 Proposed system 1.5.4 Advantages of proposed system v
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1.6 Objective of the project 1.7 Organization of the thesis
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LITERATURE SURVEY 2.1 Introduction 2.2 Survey DESIGNING 3.1 Overall architecture 3.2 RSA algorithm 3.3 Current hash functions background 3.4 BLAKE hash functions 3.4.1 Message padding 3.4.2 Counter 3.4.3 State initialization 3.4.4 State update 3.4.5 G-function 3.4.6 Finalization 3.5 VHDL implementation 3.5.1 VHDL language 3.5.2 Design units 3.6 Software tool 3.6.1 Modelsim RESULTS CONCLUSION REFERENCES vi
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LIST OF TABLES
TABLE NO 3.1 3.2 3.3 3.4 3.5
TITLE RSA algorithm method public and private key pairs Permutation table (rc) Blake constants Finalization Blakes Initialization Vector
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LIST OF FIGURES FIGURE NO 1.1 1.2 1.3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.1 4.2 4.3 4.4 TITLE Symmetric Key Encryption Technique Asymmetric Key Encryption Technique Functional flow diagram of existing system Block diagram of the cryptographic processor Proposed architecture for more secured reconfigurable cryptographic processor Example for RSA Algorithm
Top level diagram of Blake State initialization
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State update: columns and diagonals
G-function
Basic steps for simulating a design in ModelSim Modelsim software Prime no generation in RSA Encryption and Decryption process in RSA Blake encryption Blake decryption
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