Section 4 Switching Methods
Section 4 Switching Methods
Section 4 Switching Methods
Switching Methods
Circuit Switching
Connectionless, datagram
Example: INTERNET
Time frame
4
Time frame
4
Circuit switching
Link
L(1,2)
Messages
(N1,N5)
(N1,N4)
N2
N4
N1
(N1,N4)
N5
(N1,N5)
(N1,N5)
(N1,N4)
N3
Circuit Switching concept: Connection Oriented; user signals the network; network sets up a
connection; a circuit is established to support transport of messages that are part of the
connection; circuit consists of dedicated link capacity resources along the selected path.
Prof. Izhak Rubin
Time frame
Time frame
Link
(N3,N5)
Time frame
Time frame
Time frame
Circuit (N1,N5) established across links (N1,N3) and (N3, N5) through
dedicated TDM slots; e.g., slot 1 in each frame is dedicated to this
circuit
Time frame
Time frame
Link
(N3,N4)
Time frame
Time frame
Time frame
N2
N4
N1
(N1,N4)
N5
(N1,N5)
(N1,N5)
(N1,N4)
N3
A connection is established
A dedicated-bandwidth circuit is allocated to
each connection across a selected path/route
The circuit consists of a tandem collection of
link-circuits along the route links
While multiple link-circuits can be multiplexed
across a link, a single connection is permitted
to use the circuit BW resources
Prof. Izhak Rubin
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Line-In
Time Slot-In
Line-Out
Time Slot-Out
Set by signaling
system
Set by signaling
system
Set by signaling
data received
from preceding
switch
Set by signaling
system
Set by switch in
selecting
available slots
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Time-Space-Time Switching
Space Switching
TD_Demux
TD_Mux
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Signaling
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Delay
Circuit set-up delay key delay measure
Information transmission latency across circuit switch
(such as for time-slot interchange) minimal of the
order of a time frame
Circuit tear-down delay
Blocking and throughput
Grade of service (GOS) = probability that a connection
request is blocked (Pb) key call throughput measure
Information throughput per connection = circuit
capacity
Prof. Izhak Rubin
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Connectionless (Datagram)
packet switching: principles
(N1,N5)
(N1,N5)
Messages
segmented
into packets
N2
N4
(N1,N4)
N1
(N1,N4)
(N1,N5)
(N1,N4)
(N1,N5)
(N1,N5)
(N1,N4)
(N1,N4)
N3
Packet header
information field
N5
Packets
assembled
into
messages
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Input
Buffers
Header
processor
Switching
fabric
Routing
table
Output
Buffers
Output
line
Output
line
23
Mask
Line-Out
Distance
Measure
Time
validity
IP Address
e.g., subnetwork
and hierarchical
routing structure;
to reduce table
size, group
addresses of
packets that
travel along the
same outgoing
link
along the
shortest (best)
path
e.g., number of
hops, delay,
throughput or
$cost oriented
measures
Forwarding entry
is discarded as
its validity time
expires
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N2
N4
N1
(N1,N4)
N5
(N1,N5)
(N1,N5)
(N1,N4)
N3
packet
Signaling
packets
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Line-In
VCI-In
Line-Out
VCI-Out
Set by signaling
system
Set by
signaling
system
Set by
signaling
data
received
from
preceding
switch
Set by
signaling
system
Set by switch
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N2
N4
N1
(N1,N4)
VC(N1,N3)
VC(N1,N4)
(N1,N5)
N5
VC(N1,N4)
(N1,N5)
(N1,N4)
packet
VC(N1,N3)
N3
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VCI
Input
Buffers
Switching/routing rate
measured in packets/sec
Header
processor
Switching
fabric
VCI
VCI
VCI
VC
Routing
table
Output
Buffers
Output
line
Output
line
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Delay
Queueing and processing delays at
packet switch processors
Queueing delays and transmission
latencies across lines
Routing Operation
Router engaged in setting up and
continuous dynamic (and periodic)
updating of the routing tables
Prof. Izhak Rubin
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Delay
VC set-up delay
Queueing and processing delays at packet switch
processors
Queueing delays and transmission latencies across
lines
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Packet Switching
Key phenomena:
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