D900F Esm

Preface
Notebook Computer
D900F
Service Manual
Preface
I
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface
Version 1.0
June 2009
Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and/or registered trademarks of their respective companies.
II
Preface
About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the D900F series
notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Preface
Appendix B, Schematic Diagrams
III
Preface
IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit (Full Range AC/DC Adapter – AC Input 100 - 240V,
50 - 60Hz, DC Output 19V, 1.57A).
Preface
This Computer’s Optical Device is a Laser Class 1 Product
IV
Preface
Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.
2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on
Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.
3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.
V
Preface
4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Use only approved brands of Unplug the power cord before

peripherals. attaching peripheral devices.
Power Safety
Preface
The computer has specific power requirements:

• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies.
you have turned off the
power, and discon-
nected all peripherals Do not plug in the power Do not use the power cord if Do not place heavy objects
and cables (including cord if you are wet. it is broken. on the power cord.
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
VI
Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not remove any batteries from the computer while it is powered on.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Preface

Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of
its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal
waste stream. Check with your local solid waste officials for details in your area for recycling options or proper
disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommend-
ed by the manufacturer. Discard used battery according to the manufacturer’s instructions.
VII
Preface
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
Preface
VIII
Preface
Contents
Introduction ..............................................1-1 Removing the Intel Turbo Memory Card ..................................... 2-22
Overview .........................................................................................1-1 Part Lists ..................................................A-1
System Specifications .....................................................................1-2 Part List Illustration Location ........................................................ A-2
External Locator - Top View with LCD Panel Open ......................1-4 Top ................................................................................................. A-3
External Locator - Front & Right side Views .................................1-5 Bottom ........................................................................................... A-4
External Locator - Left Side & Rear View .....................................1-6 LCD ............................................................................................... A-5
External Locator - Bottom View .....................................................1-7 Mainboard ...................................................................................... A-6
Mainboard Overview - Top (Key Parts) .........................................1-8 Blu-Ray Combo ............................................................................. A-7
Mainboard Overview - Bottom (Key Parts) ....................................1-9 DVD Super Multi .......................................................................... A-8
Mainboard Overview - Top (Connectors) .....................................1-10 Schematic Diagrams................................. B-1
Mainboard Overview - Bottom (Connectors) ...............................1-11
System Block Diagram ...................................................................B-2
Disassembly ...............................................2-1
Preface
LGA1366 Part A DDR3 1/2 ...........................................................B-3
Overview .........................................................................................2-1 LGA1366 Part B DDR3 2/2 ...........................................................B-4
Maintenance Tools ..........................................................................2-2 LGA1366 Part C QPI ......................................................................B-5
Connections .....................................................................................2-2 LGA1366 Part C Power ..................................................................B-6
Maintenance Precautions .................................................................2-3 LGA1366 Part E GND, Thermal ....................................................B-7
Disassembly Steps ...........................................................................2-4 DDR3 Channel A SO-DIMM_0 .....................................................B-8
Removing the Battery ......................................................................2-5 DDR3 Channel B SO-DIMM_1 .....................................................B-9
Removing the Optical (CD/DVD) Device ......................................2-6 DDR3 Channel C SO-DIMM_2 ...................................................B-10
Removing the Hard Disk Drive .......................................................2-7 X58 QPI Interface .........................................................................B-11
Removing the Keyboard ..................................................................2-9 X58 PCIEX16, PCIEX4, DMI ......................................................B-12
Removing the System Memory (RAM) ........................................2-10 X58 Misc ......................................................................................B-13
Removing the Processor ................................................................2-14 X58 PWR ......................................................................................B-14
Removing the VGA Card ..............................................................2-15 X58 GND ......................................................................................B-15
Installing the VGA Card ...............................................................2-17 ICH10 DMI/PCIE/USB/SATA ....................................................B-16
Removing the Wireless LAN Module ...........................................2-18 ICH10 PCI/SPI/Other ...................................................................B-17
Removing the Bluetooth Module ..................................................2-19 ICH10 Power/GND ......................................................................B-18
Removing the Modem ...................................................................2-20 Intel Debug Card & Fan Control ..................................................B-19
Removing the TV Tuner Card .......................................................2-21 Clock Generator CV193 ...............................................................B-20
IX
Preface
MXM3.0 PCI-E ............................................................................ B-21

MXM PWR, SATA ODD ............................................................ B-22
HDMI & e-SATA ......................................................................... B-23
DVI-I ............................................................................................ B-24
LCD, INT ..................................................................................... B-25
Card Reader/1394 ......................................................................... B-26
RTL8111C .................................................................................... B-27
ALC662 / AMP TP6047A-4 ........................................................ B-28
KBC-ITE IT8512E ....................................................................... B-29
Mini WLAN/ TMP/ TPA6017A2 ................................................ B-30
Daughter CONN ........................................................................... B-31
SATA HDD/ CCD/ BT/ PC BEEP .............................................. B-32
New Card/ MDC/ TV/ Robson ..................................................... B-33
Audio Board ................................................................................. B-34
Preface
Card Reader Board ....................................................................... B-35

Click Board .................................................................................. B-36
Hotkey Board ............................................................................... B-37
Switch Board ................................................................................ B-38
USB Board ................................................................................... B-39
Power CPU_VTT ......................................................................... B-40
Power 1.5V, 0.75VS, 12V ............................................................ B-41
Power 1.8VS, 1.1VS .................................................................... B-42
Power AC_In, Charge .................................................................. B-43
Power Switch, ICH_1.1VS ........................................................... B-44
Power VCORE ............................................................................. B-45
Power VDD3, VDD5 ................................................................... B-46
Power Delivery Chart ................................................................... B-47
Power Sequence Diagram ............................................................ B-48
X
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the D900F series notebook computer. Information
about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about driv-
ers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows XP, Windows Vista, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.
The D900F series notebook is designed to be upgradeable. See “Disassembly” on page 2 - 1 for a detailed description
1.Introduction
of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the
“” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
Introduction
System Specifications
Storage
Processor
Up to three (Option) Changeable 2.5" 9.5 mm (h) SATA (Serial) Hard
Intel® Core® i7 Processor Disk Drives supporting RAID level 0/1/5
i7-965 (3.20 GHz, 6.4 GT/s, 8M L3 Cache, 45nm, LGA1366 Package) One 12.7 mm Super Multi/Blu-Ray SATA Optical Device Drive (Option)
i7-940 (2.93 GHz, 4.8 GT/s, 8M L3 Cache, 45nm, LGA1366 Package) Pointing Device
i7-920 (2.66 GHz, 4.8 GT/s, 8M L3 Cache, 45nm, LGA1366 Package)
Built-in TouchPad (scrolling key functionality integrated)
Core Logic
Keyboard
Intel® X58 + ICH10R
“WinKey” keyboard (with embedded numeric keypad)
Display Three Instant Keys (WWW, e-mail, Application)
1.Introduction
17.1” WUXGA (1920 * 1200) TFT LCD Audio
Memory High Definition Audio Compliant Interface

Compliant with Microsoft UAA (Universal Audio Architecture)
Three 64-bit wide DDRIII (DDR3) data channels S/PDIF Digital Output
Three 204 Pin SO-DIMM Sockets Supporting DDRIII (DDR3) 1066/ Supports 5.1 Channel Analog Outputs
1333MHz Memory Modules 4 * Built-In Speakers
Memory Expandable up to 6GB Built-In Microphone
Note: Use either 1066MHz OR 1333MHz DDRIII (DDR3) Modules -
Do not mix DRAM speeds Slots
Video Adapter One ExpressCard/34/54 Slot

Three Mini Card Slots:
nVIDIA® GeForce GTX 280M PCIe *16 Video Card • Slot 1 for PCIe WLAN Module
1GB GDDR3 Video RAM on board • Slot 2 for USB TV Tuner Module
Supports Microsoft DirectX® 10.0
Card Reader
Supports HDCP
Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/ MMC/ RS
BIOS MMC/ MS Duo) Note: MS Duo/ Mini SD/ RS MMC Cards require a PC
One 16Mbit Flash ROM adapter
Phoenix™ BIOS
1 - 2 System Specifications
Introduction
Communication Operating System
10Mb/100Mb/1000Mb Base-T Ethernet LAN Windows Vista Home Premium/ Business/ Enterprise/ Ultimate
56K MDC Modem, V.90 & V.92 Compliant
802.11b/g Wireless LAN Mini-Card Module (Option) Note that the TV Tuner module (factory) option in Windows Vista is
supported by the Windows Media Center software which comes built-
Intel® WiFi Link 5300 Series (3*3 - 802.11a/g/n) Wireless LAN Mini- in to the Windows Vista Home Premium and Ultimate Editions only.
Card Module (Option)
Intel® WiFi Link 5100 Series (1*2 - 802.11a/g/n) Wireless LAN Mini- Power
Card Module (Option)
Full Range AC/DC Adapter
2.0M/3.0M Pixel USB PC Camera Module (Factory Option)
AC Input: 100 - 240V, 50 - 60Hz
Bluetooth 2.1 + EDR (Enhanced Data Rate) Module (Factory Option) DC Output: 20V, 11A or 19V, 11.6A (220 Watts)
Security Battery
Kensington Lock 12 Cell Smart Lithium-Ion Battery Pack, 6600mAh
1.Introduction
BIOS Password
Environmental Spec
Interface
Temperature
Four USB 2.0 Ports Operating: 5°C - 35°C
One HDMI (High-Definition Multimedia Interface) Port with Audio Non-Operating: -20°C - 60°C
Output (with HDCP Support) Relative Humidity
One DVI-Out Port (no HDCP Support) Operating: 20% - 80%
One eSATA Port (hot swapping supported in Windows Vista only) Non-Operating: 10% - 90%
One S/PDIF Out Jack
One Headphone-Out Jack Dimensions & Weight
One Microphone-In Jack
397mm (w) * 298mm (d) * 51 - 60mm (h)
One Mini-IEEE1394a Port
5.4 kg
One Line-In Jack for Audio Input
One RJ-45 LAN Jack Optional
One RJ-11 Modem Jack
One DC-in Jack One 12.7 mm Super Multi/Blu-Ray SATA Optical Device Drive
One Cable (CATV) Antenna (Analog/Digital) Jack (Functions with PCIe or USB Mini-Card Wireless LAN Module (see “Communication”
Optional USB TV Tuner Module) on page 1 - 3)
One Consumer Infrared Transceiver
USB Mini-Card Hybrid TV Tuner Module
(Functions with Optional USB TV Tuner Module)
USB Bluetooth 2.1 + EDR Module (Factory Option - see
“Communication” on page 1 - 3)
USB PC Camera Module (Factory Option - see “Communication”
on page 1 - 3)
System Specifications 1 - 3
Introduction
Figure 1
External Locator - Top View with LCD Panel Open
Top View
1. Optional Built-In 1
PC Camera
2. LCD
3. LED Power &
Communication
Indicators
2
4. Built-In
Microphone
5. LED Status
1.Introduction
Indicators
6. Hot Key Buttons
7. Power Button
8. Keyboard
9. Speakers 4
10. Game Hot Keys 3
11. Touchpad & 6 7
5
Buttons 9 9
8
10
11
1 - 4 External Locator - Top View with LCD Panel Open

Introduction
External Locator - Front & Right side Views Figure 2

Front Views
1. LCD Latches
2. Consumer
Infrared
1 1 Transceiver*
3. Line-In Jack
7 7 4. S/PDIF-Out Jack
2 3 4 5 6 5. Microphone-In
Jack
6. Headphone-Out
Jack
1.Introduction
7. Speakers
Figure 3
Right Side Views
8. USB Ports
9. Security Lock
Slot
8 9
8
External Locator - Front & Right side Views 1 - 5

Introduction
External Locator - Left Side & Rear View

Figure 4
Left Side View
1. HDMI-Out Port
2. e-SATA Port
3. Cable (CATV)
Antenna Jack*
4. RJ-11 Phone Jack
5. RJ-45 LAN Jack 7 9
6
6. Mini-IEEE 1394 1 2 8
3 4 5
Port
7. ExpressCard Slot
1.Introduction
(see page 2 - 7)
8. Optical Device
Drive Bay (for
DVD Device)
9. 7-in-1 Card
Reader
Figure 5
Rear View
10. Vent/Fan Intake 10 12 10 10
11. DC-In Jack 11
12. DVI-Out Port
1 - 6 External Locator - Left Side & Rear View

Introduction
External Locator - Bottom View

Figure 6
Bottom View
1. Fan Outlet/Intake
2. Battery
(Secondary HDD
Bay - HDD3)
4 3. Primary HDD
Bay (HDD1 & 2)
4. Component Bay
1 1
1 Cover
1.Introduction
1
2 3

Overheating
To prevent your com-

puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.
External Locator - Bottom View 1 - 7

Introduction
Figure 7 Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts
1. Mini-Card
Connector (WLAN
Module)
2. Mini-Card
Connector (TV
Module) 1 3
3. Mini-Card
Connector
(Robson Module)
1.Introduction
1 - 8 Mainboard Overview - Top (Key Parts)

Introduction
Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Bottom
Key Parts
1. CPU Socket
2. North Bridge
3. South Bridge
5 4. KBC ITE IT8512E
5. Memory Slots
DDR2 So-DIMM
6. VGA Socket
6
1
1.Introduction
2
4
3
Mainboard Overview - Bottom (Key Parts) 1 - 9

Introduction
Figure 9 Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors
1. CCD Cable
Connector
2. LCD Cable
Connector 1 2 3
3. LED Cable
Connector
4. Wire Cable
Connector
5. SPK 1 Connector
1.Introduction
6. Bluetooth Module
Connector
7. MDC Module 4 5
Connector 6 10
8. AP-Key Cable 9
Connector
7 11
9. Touch Pad 8
Connector
12
10. SW1 Connector
13
11. SPK 2 Connector
12. Keyboard Cable
Connector
13. USB Cable
Connector
14. Audio Cable
Connector 16 15 14
15. RTC Battery
Connector 17
16. SPK Sub Cable
Connector
17. Card Reader Board
Connector
1 - 10 Mainboard Overview - Top (Connectors)

Introduction
Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Bottom
Connectors
1. CPU Fan Cable

Connector
2. System Fan
Cable Connector
3. DDR Fan Cable
Connector
4. VGA Fan Cable
Connector
1.Introduction
4
3
1 2
Mainboard Overview - Bottom (Connectors) 1 - 11

Introduction
1.Introduction
1 - 12
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the D900F series notebook’s parts and subsystems.
When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.

Warning
Overview 2 - 1
Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
2 - 2 Overview
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re-
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines). It is
damaged. advisable to also re-
5. Be careful with power. Avoid accidental shocks, discharges or explosions. move your battery in
2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. order to prevent acci-
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. dentally turning the
machine on.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery: To remove the Wireless LAN Module:

1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the Keyboard page 2 - 9
To remove the Optical Device: 3. Remove the Wireless LAN page 2 - 18
1. Remove the battery page 2 - 5
2. Remove the Optical device page 2 - 6 To remove the Bluetooth Module:
To remove the HDD:
2.Disassembly

1. Remove the battery page 2 - 5 3. Remove the Bluetooth page 2 - 19
2. Remove the HDD page 2 - 7
To remove the Modem:
To remove the Keyboard: 1. Remove the battery page 2 - 5
1. Remove the battery page 2 - 5 2. Remove the Keyboard page 2 - 9
2. Remove the Keyboard page 2 - 9 3. Remove the Modem page 2 - 20
To remove the System Memory: To remove the TV Tuner Card:
1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the System Memory page 2 - 10 2. Remove the Keyboard page 2 - 9
3. Remove the TV tuner card page 2 - 21
To remove the Processor:
1. Remove the battery page 2 - 5 To remove the Intel Turbo Memory Card:
2. Remove the Processor page 2 - 14 1. Remove the battery page 2 - 5
To remove the VGA card:
3. Remove the Intel Turbo Memory card page 2 - 22
2. Remove the VGA card page 2 - 15
2 - 4 Disassembly Steps
Disassembly
Removing the Battery Figure 1

Battery Removal
If you are confident in undertaking upgrade procedures yourself, for safety reasons it is best to remove the battery.
a. Loosen screws.
1. Turn the computer off, and turn it over. b. Release the battery.
2. Loosen screws 1 - 3 . c. Lift the battery out of the
3. Release the battery. bay as indicated.
4. Lift the battery 4 (Figure b) out of the bay as indicated.
a. b.
2.Disassembly
4
1
2
3
c.
4

4. Battery
• 3 Screws
Removing the Battery 2 - 5

Disassembly
Figure 2 Removing the Optical (CD/DVD) Device

Optical Device
1. Turn off the computer, and turn it over and remove the battery (page 2 - 5).
Removal
2. Locate the hard disk bay cover and remove screws 1 - 4 , and remove the bay cover 5 .
3. Remove screw 6 .
a. Remove the screws.
b. Remove the cover. 4. Use the screwdriver to push the optical device 7 out of the computer at point 8 .
c. Remove the screw and 5. Reverse the process to install the new device.
push the optical device
out of the computer at
point 8. a. b.
2.Disassembly
4
1
5
2 3
c.
5
6
5. Hard Disk Bay Cover
7
7. Optical Device 8
• 5 Screws
2 - 6 Removing the Optical (CD/DVD) Device

Disassembly
Removing the Hard Disk Drive Figure 3

The hard disk drive is mounted in a removable case and can be taken out to accommodate other 2.5" SATA hard disk HDD Assembly
drives with a height of 9.5mm (h). Follow your operating system’s installation instructions, and install all necessary driv- Removal
ers and utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk.
Hard Disk Upgrade Process b. Remove the cover
c. Release the cable and lift
1. Turn off the computer, and turn it over and remove the battery (page 2 - 5). the hard disk assembly
2. Locate the hard disk bay cover and remove screws 1 - 4 . up out off the computer.
3. Remove the bay cover 5 . d. Remove the screws and
4. Remove screws 6 - 8 and pull the tab to release the cable 9 from hard disk assembly. separate the HDD(s)
from the bracket and
5. Lift the hard disk assembly 10 out of the computer. connector.
6. Remove screws 11 - 18 .
2.Disassembly
7. Separate the hard disk(s) 21 from the bracket 19 and connector cable 20 .
8. Reverse the process to install a new hard disk(s).
a. c. d.
13
9 14 15
1 3 12 19
7 16
2 4 11
6 18
8
b. 17
21

20 5. Hard Disk Bay Cover
10. Hard Disk Assembly
19. HDD Braket
9 21. HDD
• 15 Screws
10
5
Removing the Hard Disk Drive 2 - 7

Disassembly
Removing the Hard Disk(s) in the Secondary HDD Bay

Figure 4
Secondary HDD 1. Turn off the computer, and turn it over and remove the battery.
Assembly Removal 2. The secondary hard disk bay is located under the battery compartment.
3. Remove screw 1 .
a. Remove the screws and 4. Slide the hard disk assembly in the direction of the arrow 2 .
slide the hard disk as- 5. Lift the hard disk assembly 3 out of the compartment.
sembly in the direction fo 6. Remove the screws 4 - 7 to release the hard disk from the case.
the arrow.
b. Lift the hard disk assem-
bly out off the computer.
c. Remove the screws to re-
lease the hard disk from a. b.
the case.
2.Disassembly
c. 4
3
5
3. Hard Disk Assembly
• 5 Screws
7
2 - 8 Removing the Hard Disk Drive

Disassembly
Removing the Keyboard

1. Turn off the computer, and turn it over and remove the battery (page 2 - 5). Figure 5
2. Turn the computer back over to access the keyboard. Keyboard Removal
3. Press the four keyboard latches 1 - 4 at the top of the keyboard to elevate the keyboard from its normal position
(you may need to use a small screwdriver to do this). a. Press the four latches to
release the keyboard.
4. Carefully lift the keyboard 5 up, being careful not to bend the keyboard ribbon cable 6 (Figure c). b. Lift the keyboard up.
5. Disconnect the keyboard ribbon cable 6 from the locking collar socket 7 . c. Disconnect the cable
6. Carefully lift up the keyboard 5 (Figure d) off the computer. from the locking collar.
d. Remove the keyboard.
a. c.
2.Disassembly
1 2 3 4
7

Re-Inserting the Key-
board
When re-inserting the

keyboard firstly align
b. d. the five keyboard tabs
at the bottom (Figure
b) at the bottom of the
5 keyboard with the slots
in the case.

5. Keyboard
5
Keyboard Tabs
Removing the Keyboard 2 - 9

Disassembly
Figure 6 Removing the System Memory (RAM)

RAM Module The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) DDR III
Removal
(DDR3) supporting 667/800 MHz. The main memory can be expanded up to 6GB. The SO-DIMM modules supported
are 1024MB and 2048MB DDR Modules. The total memory size is automatically detected by the POST routine once
b. Lift off the bay cover. you turn on your computer.
c. Remove the screws
and disconnect the
Memory Upgrade Process
fan cable. 1. Turn off the computer, and turn it over and remove the battery (page 2 - 5).
d. Remove the RAM 2. Locate the memory (RAM) bay cover and remove screws 1 - 10 .
fan. 3. Lift off the bay cover 11 .
4. Remove screws 12 - 14 from the RAM fan, and disconnect the fan cable 15 .
5. Remove the RAM fan unit 16 .
2.Disassembly
a. c. d.
Caution 1 2
The heat sink, and 3
CPU area in general, 10 16
contains parts which 6 5 4
9 8 7 14
are subject to high tem-
peratures. Allow the
area time to cool before 12
removing these parts. 15
13
B.
11

11. Bay Cover
16. RAM Fan Unit
• 13 Screws
2 - 10 Removing the System Memory (RAM)

Disassembly
6. Fully loosen screws 17 - 23 in the order indicated here (and on the label) and disconnect te hcable 24 .
Figure 7
7. Carefully (make sure all the screws are sufficiently loosened and cables disconnected) remove the heat sink and
RAM Module
fan unit 25 .
Removal (cont’d.)
e. f.
e. Loosen the screws
19 20
and disconnect the
cable.
25 f. Remove the heat
sink and fan unit.
22 g. Pull the release
latch(es).
17 18
h. Remove the mod-
24 ule(s).
21 23
2.Disassembly
8. Gently pull the two release latches 26 & 27 on the sides of the memory socket in the direction indicated by
the arrows (Figure g).
9. The RAM module 28 will pop-up (Figure h), and you can then remove it. Contact Warning
g. h. Be careful not to touch

the metal pins on the
module’s connecting
27 27 edge. Even the clean-
est hands have oils
which can attract parti-
cles, and degrade the
28 module’s performance.
26 26
10. Pull the latches to release the second module if necessary.

11. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. 25. heatsink and fan
12. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket unit
as it will go. DO NOT FORCE the module; it should fit without much pressure. 28. RAM Module(s)
13. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
14. Replace the heat sink unit, RAM fan, cover and screws. • 7 Screws
15. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
Removing the System Memory (RAM) 2 - 11

Disassembly
Figure 8 Upgrading a Third System Memory (RAM) Module

Third RAM If you wish to add a third memory module follow the procedure below (note the sidebar warning on RAM speeds).
Module Removal
1. Turn off the computer, and turn it over and remove the battery.
a. Press the four latch- 2. Turn the computer back over to access the keyboard.
es to release the 3. Press the four keyboard latches 1 - 4 at the top of the keyboard to elevate the keyboard from its normal position
keyboard. (you may need to use a small screwdriver or pair of tweezers to do this).
b. Lift the keyboard up.
c. Remove the screws
and keyboard plate. a.
1 2 3 4

2.Disassembly
RAM Module Speeds
Use either 1066MHz

OR 1333MHz DDRIII
(DDR3) modules of the
same brand. Do not mix
DRAM speeds/brands
in order to prevent un-
expected system be- 4. Lift the keyboard up, but be careful not to twist the keyboard ribbon cable 5 .
havior. 5. Remove screws 6 - 7 and remove the keyboard plate 8 .
b. c.
6 7
5
8. Keyboard Plate
• 2 Screws 8
2 - 12 Removing the System Memory (RAM)

Disassembly
6. Gently pull the two release latches ( 9 - 10 ) on the sides of the memory socket in the direction indicated by the
arrows in Figure 9 Figure 9
7. The RAM module 11 will pop-up, and you can remove it. Third RAM Module
Removal (cont’d.)
d. e.
9 d. Pull the release
latch(es).
e. Remove the mod-
ule(s).
11
10
2.Disassembly
Contact Warning
8. Pull the latches to release the second module if necessary. Be careful not to touch
9. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory socket. the metal pins on the
10. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket RAM module’s connect-
as it will go. DO NOT FORCE the module; it should fit without much pressure. ing edge. Even the
11. Press the module in and down towards the mainboard until the socket levers click into place to secure the module. cleanest hands have
oils which can attract
12. Replace the keyboard plate, screws and keyboard. particles, and degrade
13. Restart the computer to allow the BIOS will register the new memory configuration as it starts up. the module’s perfor-
mance.

28. RAM Module
Removing the System Memory (RAM) 2 - 13

Disassembly
Figure 10 Removing the Processor

Processor Removal 1. Turn off the computer, and turn it over, remove the battery (page 2 - 5) and RAM (page 2 - 10).
2. Press down and hold the latch 1 (with the latch held down you will be able to release it).
a. Press and hold the latch. 3. Move the latch 2 and bracket 3 fully in the direction indicated to unlock the CPU.
b. Move the latch and
bracket fully in the direc-
4. Carefully (it may be hot) lift the CPU 4 up out of the socket (Figure c).
tion to unlock the CPU. 5. Reverse the process to install a new CPU.
c. Lift the CPU out of the 6. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
socket.
a. c.
4
2.Disassembly
1
Caution
The heat sink, and CPU

area in general, con-
tains parts which are
subject to high temper-
atures. Allow the area b.
time to cool before re- 2
moving these parts.

4. CPU
2 - 14 Removing the Processor

Disassembly
Removing the VGA Card Figure 11

1. Turn off the computer, and turn it over and remove the battery (page 2 - 5). VGA Card Removal
2. Locate the VGA bay cover and remove screws 1 - 10 .
3. Lift off the bay cover 11 . a. Remove the screws.
b. Remove the cover.
4. Remove screws 12 - 14 from the VGA card fan and disconnect the fan cable 15 .
c. Remove the screws and
5. Remove the VGA card fan 16 . disconnect the cable(s).
6. Remove screws 17 - 20 from the heatsink in the order indicated on the label. d. Release the VGA card
fan.
e. Remove the screws.
a. c.
1 2
10 3
2.Disassembly
9 8 7 6 5 4
14
15
12
13
b. d. e.
11 17 19
18 20
16
11. Bay Cover
20. VGA card fan
VGA Card Fans • 17 Screws
Removing the VGA Card 2 - 15

Disassembly
7. Grip the handle and carefully remove the heatsink 21 .

Figure 12 8. Remove screws 22 & 23 from the video card.
VGA Card Removal 9. Carefully remove the VGA card module 24 from the mainboard.
(cont’d.)
f. g.
f. Remove the VGA mod-
ule from slot A.
h. Remove the VGA mod-
ule.
21
24
21 23
2.Disassembly
10. Reverse the process to install a new VGA card modules.

21. VGA Card Heatsink
24. VGA Card Module
• 2 Screws
2 - 16 Removing the VGA Card

Disassembly
Installing the VGA Card

1. Prepare to fit the VGA card 24 into the slot by holding it at about a 30° angle.
2. The card needs to be fully into the slot, and the VGA card and socket have a guide-key and pin which align to allow
the card to fit securely.
3. Fit the connectors firmly into the socket, straight and evenly.
4. DO NOT attempt to push one end of the card in ahead of the other.
Figure 13
5. The card’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket
VGA Card
as it will go (none of the gold colored contact should be showing). DO NOT FORCE the card; it should fit without
Installation
much pressure.
6. Secure the card with screw 22 & 23 (Figure 12f on page 2 - 16).
a. Carefully Insert the VGA
7. Place the heatsink 24 back on the card, and secure the screws in the order indicated in Figure 11 on page 2 - Card.
15.
8. Attach the VGA card fan and secure with the screws as indicated in Figure 11 on page 2 - 15.
2.Disassembly
9. Reinsert the component bay cover, and secure with the screws as indicated in Figure 11 on page 2 - 15.
a.
25

24. VGA card Module
Removing the VGA Card 2 - 17

Disassembly
Figure 14 Removing the Wireless LAN Module

Wireless LAN
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5) and keyboard (page 2 - 9).
Module Removal
2. Remove screws 1 - 2 from the keyboard shielding.
3. Remove the keyboard shielding 3 , the Wireless LAN Module will be visible at point 4 .
b. Remove the keyboard
4. Carefully disconnect cables 5 and remove screws 6 .
shielding. 5. The Wireless LAN Module 7 (Figure c) will pop-up, and you can remove it.
c. Disconnect the cables
and remove the screws. b.
a.
d. Remove the WLAN
module. 1 2 4
2.Disassembly
Note: Make sure you

reconnect the antenna
cables to the “Main”
socket (Figure c).
c. 3
d.
5
6 7
3. Keyboard Shielding
7
7. Wireless LAN Module
• 3 Screws
2 - 18 Removing the Wireless LAN Module

Disassembly
Removing the Bluetooth Module Figure 15

Bluetooth Module
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5), keyboard (page 2 - 9) and keyboard shield-
Removal
ing (page 2 - 18).
2. The Bluetooth module is visible at point 1 .
a. Disconnect the cables
3. Carefully disconnect cables 2 & 3 and remove the screw 4 . and remove the screw.
4. Lift the Bluetooth module 5 off the computer. b. Remove the Bluetooth
module.
a. b.
Note: Make sure you

2 1
4 reconnect the antenna
3 cables to the socket
2.Disassembly
(Figure a).

5. Bluetooth Module
• 1 Screw
Removing the Bluetooth Module 2 - 19

Disassembly
Figure 16 Removing the Modem

Modem Removal 1. Turn off the computer, and turn it over, remove the battery (page 2 - 5), keyboard (page 2 - 9) and keyboard shield-
ing (page 2 - 18).
a. Remove the screws and 2. The modem is visible at point 1 .
disconnect the cable.
3. Remove the screws 2 - 3 from the modem module and disconnect cable 4 .
b. Lift the modem up off
the socket. 4. Lift the modem up off the socket 5 .
5. Lift the modem 6 up and off the computer.
a. b.
2.Disassembly
2
4
1
3
4
5
6
6
6. Modem
• 2 Screws
2 - 20 Removing the Modem

Disassembly
Removing the TV Tuner Card Figure 17

1. Turn off the computer, and turn it over, remove the battery (page 2 - 5), keyboard (page 2 - 9) and keyboard shield- TV Tuner Card
ing (page 2 - 18). Removal
2. The TV tuner card is visible at point 1 .
3. Remove the screws 2 from the TV tuner module and disconnect cable 3 . a. Remove the screws and
4. The TV tuner card 4 will pop-up and and you can remove it. disconnect the cable.
b. The TV tuner card will
. pop up and remove it.
a. b.
3 2
2.Disassembly
4
4

4. TV tuner card
• 1 Screw
Removing the TV Tuner Card 2 - 21

Disassembly
Figure 18
Removing the Intel Turbo Memory Card
Intel Turbo Memory 1. Turn off the computer, and turn it over, remove the battery (page 2 - 5), keyboard (page 2 - 9) and keyboard shield-
Card Removal ing (page 2 - 18).
2. The Intel turbo memory card is visible at point 1 .
a. Remove the screws and 3. Remove the screws 2 from the module and disconnect cable 3 .
disconnect the cable. 4. The Intel turbo memory card 4 will pop-up and and you can remove it.
b. The Intel turbo memory
card will pop up and re-
.
move it.
a. b.
2.Disassembly
2 3
4

4. Intel turbo memory
card
• 1 Screw
2 - 22 Removing the Intel Turbo Memory Card

Part Lists
Appendix A: Part Lists

This appendix breaks down the D900F series notebook’s construction into a series of illustrations. The component part
numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part Lists
Part List Illustration Location

The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location
Parts
Top page A - 3
Bottom page A - 4
LCD page A - 5
A.Part Lists
Mainboard page A - 6
Blu-Ray Combo page A - 7
DVD Super Multi page A - 8
A - 2 Part List Illustration Location

Part Lists
Top
Figure A - 1
Top
A.Part Lists
㾲䈷
㾲䈷╭
╭╭
╭╭
╭
㾲䈷
╭
╭╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㺉䧰㾕䓒▂
╭▁
㘔㹽㞝䐂〈〉▂
╭▁
㻬㘐䍉䞷㖬▂
●▕▉
▊◎㾲䈷╭
╭
╭╭
╭╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷
▁
㥽䈜▂
╭▁
㾲䈷▂
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷
㾲䈷
╭
╭╭
╭╭
╭㾲䈷
㾲䈷
㾲䈷
㾲䈷
╭
㾲䈷
㾲䈷
▁
㥽䈜▂
╭▁
㾲䈷▂
╭
㾲䈷
╭
㪾䒅╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷
╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷
㾲䈷
㦓䥶䓐╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
㾲䈷
㾲䈷
╭
╭╭
╭╭
╭╭
╭㾲䈷
╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷
Top A - 3
Part Lists
Bottom
Figure A - 2
A.Part Lists
Bottom
㾲䈷
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
╭
╭㾲䈷╭
╭╭
╭╭
╭
㾲䈷
㾲䈷
㾲䈷╭
╭╭
╭╭
╭
㾲䈷
㾲䈷
╭
╭╭
╭╭
╭╭
╭╭
╭╭
㾲䈷
╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷
╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷
╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
╭
㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
A - 4 Bottom
Part Lists
LCD
Figure A - 3
LCD
A.Part Lists
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
╭
▁㳰㛨䨑㛽▂
╭㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
褜㬘╭
㾲䈷
㾲䈷▁
䐈㗱㗺㖛㟯㧹▂
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
褜㬘╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
▁䐈㗱㗺㟯㧹▂
╭╭
╭╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
▁
㺉䧰▂
╭╭
╭╭
╭╭
╭╭
▁㙰䕊▂
╭㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
ー㞁褜▂
╭㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
䐥㴆㞝䧰╯
╭╭
㾲䈷
褜㬘╭
╭╭
╭╭
╭╭
╭╭
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
㾲䈷╭
╭╭
╭╭
╭
╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
褜㬘╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷╭
╭╭
╭╭
╭
╭
╭╭
╭㾲䈷╭
╭╭
╭╭
╭
LCD A - 5
Part Lists
Mainboard
Figure A - 4
A.Part Lists
Mainboard 㾲䈷
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
╭
╭㾲䈷╭
╭╭
╭╭
╭
㾲䈷
㾲䈷╭
╭╭
╭╭
╭
㾲䈷╭
╭╭
╭╭
╭
䠂㖨╭
▓╭
㖃䏧╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭
╭╭╭
╭
╭㾲䈷
㾲䈷
╭
╭╭
╭╭
▁㗸㗺▂
╭╭
╭╭
╭㾲䈷
▁
㗸㗺▂
╭╭
╭╭
㾲䈷
╭
㯵䀜╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
䧰㞡╭
╭╭
╭╭
╭㾲䈷
㾲䈷╭
╭╭
╭╭
╭
㾲䈷
㾲䈷
╭
╭╭
㾲䈷
╭
╭㾲䈷
▁
㺉䧰㖯㕨▂
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭
㾲䈷
╭
╭╭
㾲䈷
╭
╭╭
╭╭
╭㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
▁
㦈㪾䇃▂
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭㾲䈷
㾲䈷
㾲䈷
╭
╭╭
╭╭
╭╭
╭╭
㾲䈷
╭
╭╭
╭╭
╭╭
㾲䈷
㾲䈷
㾲䈷
╭
䙾㦴╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
㾲䈷
㾲䈷
㾲䈷
㻗䌨╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
㾲䈷
╭
㠓㛁╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
㾲䈷
㾲䈷
▁
㦈㪾䇃▂
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
╭╭
㾲䈷
A - 6 Mainboard
Part Lists
Blu-Ray Combo
Figure A - 5
Blu-Ray Combo
A.Part Lists
㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
㾲䈷
Blu-Ray Combo A - 7
Part Lists
DVD Super Multi
Figure A - 6
A.Part Lists
DVD Super Multi
㾲䈷
㾲䈷
㾲䈷
㖑䜛㾲䈷
㖑䜛㾲䈷
㕰㖑䜛㾲䈷
㾲䈷
㾲䈷
A - 8 DVD Super Multi

Schematic Diagrams
Appendix B: Schematic Diagrams

This appendix has circuit diagrams of the D900F notebook’s PCB’s. The following table indicates where to find the ap-
propriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page Table B - 1

System Block Diagram - Page B - 2 Intel Debug Card & Fan Control - Page B - 19 Click Board - Page B - 36 Schematic
Diagrams
LGA1366 Part A DDR3 1/2 - Page B - 3 Clock Generator CV193 - Page B - 20 Hotkey Board - Page B - 37
B.Schematic Diagrams
LGA1366 Part B DDR3 2/2 - Page B - 4 MXM3.0 PCI-E - Page B - 21 Switch Board - Page B - 38
LGA1366 Part C QPI - Page B - 5 MXM PWR, SATA ODD - Page B - 22 USB Board - Page B - 39
LGA1366 Part C Power - Page B - 6 HDMI & e-SATA - Page B - 23 Power CPU_VTT - Page B - 40
LGA1366 Part E GND, Thermal - Page B - 7 DVI-I - Page B - 24 Power 1.5V, 0.75VS, 12V - Page B - 41
DDR3 Channel A SO-DIMM_0 - Page B - 8 LCD, INT - Page B - 25 Power 1.8VS, 1.1VS - Page B - 42
DDR3 Channel B SO-DIMM_1 - Page B - 9 Card Reader/1394 - Page B - 26 Power AC_In, Charge - Page B - 43
DDR3 Channel C SO-DIMM_2 - Page B - 10 RTL8111C - Page B - 27 Power Switch, ICH_1.1VS - Page B - 44
Version Note
X58 QPI Interface - Page B - 11 ALC662 / AMP TP6047A-4 - Page B - 28 Power VCORE - Page B - 45
The schematic dia-
X58 PCIEX16, PCIEX4, DMI - Page B - 12 KBC-ITE IT8512E - Page B - 29 Power VDD3, VDD5 - Page B - 46
grams in this chapter
X58 Misc - Page B - 13 Mini WLAN/ TMP/ TPA6017A2 - Page B - 30 Power Delivery Chart - Page B - 47 are based upon ver-
sion 6-7P-M8103-003.
X58 PWR - Page B - 14 Daughter CONN - Page B - 31 Power Sequence Diagram - Page B - 48 If your mainboard (or
other boards) are a lat-
X58 GND - Page B - 15 SATA HDD/ CCD/ BT/ PC BEEP - Page B - 32 er version, please
check with the Service
ICH10 DMI/PCIE/USB/SATA - Page B - 16 New Card/ MDC/ TV/ Robson - Page B - 33 Center for updated di-
agrams (if required).
ICH10 PCI/SPI/Other - Page B - 17 Audio Board - Page B - 34
ICH10 Power/GND - Page B - 18 Card Reader Board - Page B - 35
B - 1
Schematic Diagrams
System Block Diagram
BUTTOM BOARD CLEVO D900F System Block Diagram SYS5V, SYS10V, SYS15V,VDD3,VDD5
BOT TOM P .45
POW ER BOTTOM LED P .37 VIN,VA
DDR3 SDRAM SOCKET P .42
CPU_VT T
CLICK BOARD P .35 CLOC K GEN .
CV193
PROCESSOR P .39
1.5V,0 .75VS,1 2V
P .19 Bloomfield P .40
1.8VS, 1.1VS
14.31 8 MHz LGA1366 DDRIII
80 0/106 6 MHz P .41
P .2,3,4,5,6 5VS,3 VS,1.5 VS,5V,3 V,VCCA_1.1VS
S ocket-B P .43
HDMI
P.22 6.4 GT/s VCORE
QPI P .44
Def ault 4.8 GT/s SO -DIMM0 P .7
SO -DIMM1 P .8
DVI/R GB
Sheet 1 of 47 P.23 SO -DIMM2 P .9
IOH
System Block LVDS Intel SPDIF
OUT
MIC
IN
HP
OUT
LINE
IN
Diagram TOUCH
P.24
Tylersburg RJ-11
PAD P .26
5.1 CHANNEL OUT P .33
P .35
MXM-3.0 PCI -E x16 1295 ball
VGA CARD
P .20,21 P .10,11,12,13,14 A ZALIA
AZALIA
C ODEC+
MDC
A MPLIFIER
X4 MODULE ALC662+
10 M Hz INT.
EC DMI TPA6047A4+ SPK
33 M Hz MDC CONN. TPA6017A2
IT8512E LPC S YSTEM SMBUS P .32 P .27,29
P .28 SOUTH BRIDGE AZALIA LINK 24 M Hz

INT. K/B 3 2.768
EC SMBUS K Hz
P .28 ICH10
PCIE 100 MH z
676 mBGA
THE RMAL SMART SMA RT TPM 24.5 76
25 MHz MHz
SEN SOR FAN BAT TERY P .15,16,17
Mini CARD Mini CARD Mini CARD NEW GLAN(G bE) JMB38 0
CARD
EMC1402 SOCKET SOCKET SOCKET AR8111 C P .25
P.06 P .18 P .42 P.29 USB7 USB11 USB9 USB10 48pins QFN
WLAN ROBSON TV CARD
3 2.768 6mm x 6mm
P .29 P .32 P.32 P .32 P .26 CAR D IEE E
K Hz
REA DER 139 4
SATA 300MB/s 7 IN 1
P .25,34 P .25
RJ-45
U SB2.0 MMC/SD/MS/MS Pro
P .26
e- SATA SATA PO RT0 PORT1 P ORT2 PORT3

S ATA CC D BT H ot Key & Cl ick
ODD HDD C onnect or
USB0 US B1 USB2 US B3 U SB4 U SB5
P .22 P .21 P .31 P.38 P.31 P .31
P .36 ( M /B sid e)
B - 2 System Block Diagram

Schematic Diagrams
LGA1366 Part A DDR3 1/2
J_CPU 1A J _C PU1B J_ CPU 1C
M_ DATA_A63 W4 T43 M_D QS_ A_D P0 M_D ATA _B63 W9 Y 38 M_DQS_B_DP0 M_D ATA_ C6 3 U9 W3 7 M_D QS_ C_DP0
ChannelA
M_ DATA_A62
M_ DATA_A61
M_ DATA_A60
V4
U3
U1
DD R0 _D Q_63
DD R0 _D Q_62
DD R0 _D Q_61
DD R0 _D Q_60
D DR 0_ DQS_P0
DD R0_D QS_N0
D DR 0_ DQS_P1
U43 M_D QS_ A_D N0
L41 M_D QS_ A_D P1

M_D ATA _B62
M_D ATA _B61
M_D ATA _B60
AA7
W5
V9
D DR 1_ DQ_63
D DR 1_ DQ_62
D DR 1_ DQ_61
D DR 1_ DQ_60
DD R1 _D QS_ P0
D DR 1_DQS_N 0
DD R1 _D QS_ P1
Y 37 M_DQS_B_DN 0
R 38 M_DQS_B_DP1
M_D ATA_ C6 2
M_D ATA_ C6 1
M_D ATA_ C6 0
V8
T7
T6
DD R2_D Q_63
DD R2_D Q_62
DD R2_D Q_61
DD R2_D Q_60
D DR 2_DQS_P0
DD R2_D QS_N0
D DR 2_DQS_P1
W3 6 M_D QS_ C_DN 0
T37 M_D QS_ C_DP1

Sheet 2 of 47
M_ DATA_A59 Y3 M41 M_D QS_ A_D N1 M_D ATA _B59 W10 R 37 M_DQS_B_DN 1 M_D ATA_ C5 9 U 10 T38 M_D QS_ C_DN 1
7 M_D ATA_A[6 3: 0]
M_DATA_A[ 63:0]
M_ DATA_A58
M_ DATA_A57
M_ DATA_A56
Y2
V1
U4
DD R0 _D Q_59
DD R0 _D Q_58
DD R0 _D Q_57
DD R0_D QS_N1
D DR 0_ DQS_P2
F41 M_D QS_ A_D P2
G41 M_D QS_ A_D N2
M_D ATA _B58
M_D ATA _B57
M_D ATA _B56
Y10
W7
W6
D DR 1_ DQ_59
D DR 1_ DQ_58
D DR 1_ DQ_57
D DR 1_DQS_N 1
DD R1 _D QS_ P2
L35 M_DQS_B_DP2
L36 M_DQS_B_DN 2
M_D ATA_ C5 8
M_D ATA_ C5 7
M_D ATA_ C5 6
T10
U6
U5
DD R2_D Q_59
DD R2_D Q_58
DD R2_D Q_57
DD R2_D QS_N1
D DR 2_DQS_P2
K40 M_D QS_ C_DP2
K39 M_D QS_ C_DN 2
LGA1366 Part A
DD R0 _D Q_56 DD R0_D QS_N2 D DR 1_ DQ_56 D DR 1_DQS_N 2 DD R2_D Q_56 DD R2_D QS_N2
M_CB_ECC_A[7:0]
M_ DATA_A55
M_ DATA_A54
M_ DATA_A53
M_ DATA_A52
T3
R4
N3
M3
DD R0 _D Q_55
DD R0 _D Q_54
DD R0 _D Q_53
D DR 0_ DQS_P3
DD R0_D QS_N3
B39 M_D QS_ A_D P3
B40 M_D QS_ A_D N3
M_D ATA _B55
M_D ATA _B54
M_D ATA _B53
M_D ATA _B52
R7
R8
M6
J4
D DR 1_ DQ_55
D DR 1_ DQ_54
D DR 1_ DQ_53
DD R1 _D QS_ P3
D DR 1_DQS_N 3
L30 M_DQS_B_DP3
L31 M_DQS_B_DN 3
M_D ATA_ C5 5
M_D ATA_ C5 4
M_D ATA_ C5 3
M_D ATA_ C5 2
R9
R 10
N7
N8
DD R2_D Q_55
DD R2_D Q_54
DD R2_D Q_53
D DR 2_DQS_P3
DD R2_D QS_N3
E39 M_D QS_ C_DP3
E40 M_D QS_ C_DN 3
DDR3
7 M_D QS_ A_D P[7 :0 ]
M_DQS_A_DP[ 7: 0] M_ DATA_A51 T2 DD R0 _D Q_52
DD R0 _D Q_51 D DR 0_ DQS_P4
E3 M_D QS_ A_D P4 M_D ATA _B51 T5 D DR 1_ DQ_52
D DR 1_ DQ_51 DD R1 _D QS_ P4
E7 M_DQS_B_DP4 M_D ATA_ C5 1 P10 DD R2_D Q_52
DD R2_D Q_51 D DR 2_DQS_P4
J10 M_D QS_ C_DP4
1/2
M_ DATA_A50 T1 E4 M_D QS_ A_D N4 M_D ATA _B50 R5 D7 M_DQS_B_DN 4 M_D ATA_ C5 0 P9 J9 M_D QS_ C_DN 4
M_ DATA_A49 N2 DD R0 _D Q_50 DD R0_D QS_N4 M_D ATA _B49 K5 D DR 1_ DQ_50 D DR 1_DQS_N 4 M_D ATA_ C4 9 N6 DD R2_D Q_50 DD R2_D QS_N4
DD R0 _D Q_49 D DR 1_ DQ_49 DD R2_D Q_49
7 M_D QS_ A_D N[ 7: 0] M_DQS_A_DN [7:0] M_ DATA_A48 N1 DD R0 _D Q_48 D DR 0_ DQS_P5 K2 M_D QS_ A_D P5 M_D ATA _B48 K4 D DR 1_ DQ_48 DD R1 _D QS_ P5 H6 M_DQS_B_DP5 M_D ATA_ C4 8 P7 DD R2_D Q_48 D DR 2_DQS_P5 L7 M_D QS_ C_DP5
M_ DATA_A47 L2 K3 M_D QS_ A_D N5 M_D ATA _B47 J5 G6 M_DQS_B_DN 5 M_D ATA_ C4 7 M8 K7 M_D QS_ C_DN 5
M_ DATA_A46 L3 DD R0 _D Q_47 DD R0_D QS_N5 M_D ATA _B46 G5 D DR 1_ DQ_47 D DR 1_DQS_N 5 M_D ATA_ C4 6 L8 DD R2_D Q_47 DD R2_D QS_N5
M_ DATA_A45 H3 DD R0 _D Q_46 R2 M_D QS_ A_D P6 M_D ATA _B45 H9 D DR 1_ DQ_46 L6 M_DQS_B_DP6 M_D ATA_ C4 5 M10 DD R2_D Q_46 P6 M_D QS_ C_DP6
M_ DATA_A44 G1 DD R0 _D Q_45 D DR 0_ DQS_P6 R3 M_D QS_ A_D N6 M_D ATA _B44 G9 D DR 1_ DQ_45 DD R1 _D QS_ P6 L5 M_DQS_B_DN 6 M_D ATA_ C4 4 L 11 DD R2_D Q_45 D DR 2_DQS_P6 P5 M_D QS_ C_DN 6
M_ DATA_A43 M1 DD R0 _D Q_44 DD R0_D QS_N6 M_D ATA _B43 H4 D DR 1_ DQ_44 D DR 1_DQS_N 6 M_D ATA_ C4 3 N9 DD R2_D Q_44 DD R2_D QS_N6
M_ DATA_A42 L1 DD R0 _D Q_42 D DR 0_ DQS_P7 W2 M_D QS_ A_D P7 M_D ATA _B42 G4 D DR 1_ DQ_42 DD R1 _D QS_ P7 Y8 M_DQS_B_DP7 M_D ATA_ C4 2 M9 DD R2_D Q_42 D DR 2_DQS_P7 U8 M_D QS_ C_DP7
M_ DATA_A41 H1 W1 M_D QS_ A_D N7 M_D ATA _B41 J6 Y9 M_DQS_B_DN 7 M_D ATA_ C4 1 K10 T8 M_D QS_ C_DN 7
M_ DATA_A40 H2 DD R0 _D Q_41 DD R0_D QS_N7 M_D ATA _B40 H8 D DR 1_ DQ_41 D DR 1_DQS_N 7 M_D ATA_ C4 0 L 10 DD R2_D Q_41 DD R2_D QS_N7
M_ DATA_A39 F2 DD R0 _D Q_40 D34 Z0201 M_D ATA _B39 F6 D DR 1_ DQ_40 G33 Z0221 M_D ATA_ C3 9 L 12 DD R2_D Q_40 G2 9 Z0241
M_ DATA_A38 F3 DD R0 _D Q_39 D DR 0_ DQS_P8 D35 Z0202 M_D ATA _B38 D6 D DR 1_ DQ_39 DD R1 _D QS_ P8 G34 Z0222 M_D ATA_ C3 8 H 12 DD R2_D Q_39 D DR 2_DQS_P8 G3 0 Z0242
DD R0 _D Q_38 DD R0_D QS_N8 D DR 1_ DQ_38 D DR 1_DQS_N 8 DD R2_D Q_38 DD R2_D QS_N8
M_ DATA_A37 C6 DD R0 _D Q_37 M_D ATA _B37 G8 D DR 1_ DQ_37 M_D ATA_ C3 7 G10 DD R2_D Q_37
M_ DATA_A36 B6 DD R0 _D Q_36 D DR 0_ DQS_P9 V43 Z0203 M_D ATA _B36 F10 D DR 1_ DQ_36 DD R1 _D QS_ P9 AA40 Z0223 M_D ATA_ C3 6 G11 DD R2_D Q_36 D DR 2_DQS_P9 U3 5 Z0243
M_ DATA_A35 G3 V42 Z0204 M_D ATA _B35 F5 AA41 Z0224 M_D ATA_ C3 5 L 13 T35 Z0244
ChannelB M_ DATA_A34 F1 DD R0 _D Q_35 DD R0_D QS_N9 M_D ATA _B34 E5 D DR 1_ DQ_35 D DR 1_DQS_N 9 M_D ATA_ C3 4 H 13 DD R2_D Q_35 DD R2_D QS_N9
M_ DATA_A33 C4 DD R0 _D Q_34 N42 Z0205 M_D ATA _B33 E8 D DR 1_ DQ_34 P3 6 Z0225 M_D ATA_ C3 3 J 12 DD R2_D Q_34 U4 0 Z0245
M_DATA_B[ 63:0] M_ DATA_A32 B5 DD R0 _D Q_33 DD R0 _D QS_ P10 M43 Z0206 M_D ATA _B32 E9 D DR 1_ DQ_33 D DR 1_ DQS_P10 P3 7 Z0226 M_D ATA_ C3 2 K12 DD R2_D Q_33 DD R2_D QS_ P10 T40 Z0246
8 M_D ATA_B[6 3: 0] DD R0 _D Q_32 D DR 0_DQS_N 10 D DR 1_ DQ_32 DD R1_D QS_N10 DD R2_D Q_32 D DR 2_DQ S_N 10
M_ DATA_A31 B3 8 DD R0 _D Q_31 M_D ATA _B31 K30 D DR 1_ DQ_31 M_D ATA_ C3 1 E38 DD R2_D Q_31
M_ DATA_A30 C3 8 H42 Z0207 M_D ATA _B30 L32 L37 Z0227 M_D ATA_ C3 0 F38 M3 8 Z0247
M_CB_ECC_B[7:0] M_ DATA_A29 D4 2 DD R0 _D Q_30 DD R0 _D QS_ P11 G43 Z0208 M_D ATA _B29 H34 D DR 1_ DQ_30 D DR 1_ DQS_P11 K3 7 Z0228 M_D ATA_ C2 9 G39 DD R2_D Q_30 DD R2_D QS_ P11 L38 Z0248
M_ DATA_A28 D4 1 DD R0 _D Q_29 D DR 0_DQS_N 11 M_D ATA _B28 J34 D DR 1_ DQ_29 DD R1_D QS_N11 M_D ATA_ C2 8 H 39 DD R2_D Q_29 D DR 2_DQ S_N 11
M_ DATA_A27 D3 7 DD R0 _D Q_28 D39 Z0209 M_D ATA _B27 J32 D DR 1_ DQ_28 K3 4 Z0229 M_D ATA_ C2 7 H 37 DD R2_D Q_28 H3 8 Z0249
M_DQS_B_DP[ 7: 0] M_ DATA_A26 A3 8 DD R0 _D Q_27 DD R0 _D QS_ P12 C39 Z0210 M_D ATA _B26 K32 D DR 1_ DQ_27 D DR 1_ DQS_P12 K3 3 Z0230 M_D ATA_ C2 6 J 37 DD R2_D Q_27 DD R2_D QS_ P12 G3 8 Z0250
8 M_D QS_ B_D P[7 :0 ] DD R0 _D Q_26 D DR 0_DQS_N 12 D DR 1_ DQ_26 DD R1_D QS_N12 DD R2_D Q_26 D DR 2_DQ S_N 12
M_ DATA_A25 C4 1 DD R0 _D Q_25 M_D ATA _B25 L33 D DR 1_ DQ_25 M_D ATA_ C2 5 F40 DD R2_D Q_25
M_ DATA_A24 D4 0 D5 Z0211 M_D ATA _B24 H33 F8 Z0231 M_D ATA_ C2 4 G40 H1 1 Z0251
M_DQS_B_DN [7:0] M_ DATA_A23 F4 2 DD R0 _D Q_24 DD R0 _D QS_ P13 D4 Z0212 M_D ATA _B23 H36 D DR 1_ DQ_24 D DR 1_ DQS_P13 F7 Z0232 M_D ATA_ C2 3 K38 DD R2_D Q_24 DD R2_D QS_ P13 J11 Z0252
8 M_D QS_ B_D N[ 7: 0] M_ DATA_A22 F4 3 DD R0 _D Q_23 D DR 0_DQS_N 13 M_D ATA _B22 J36 D DR 1_ DQ_23 DD R1_D QS_N13 M_D ATA_ C2 2 L 40 DD R2_D Q_23 D DR 2_DQ S_N 13
M_ DATA_A21 J4 1 DD R0 _D Q_22 J2 Z0213 M_D ATA _B21 M36 D DR 1_ DQ_22 H7 Z0233 M_D ATA_ C2 1 N 36 DD R2_D Q_22 K9 Z0253
DD R0 _D Q_21 DD R0 _D QS_ P14 D DR 1_ DQ_21 D DR 1_ DQS_P14 DD R2_D Q_21 DD R2_D QS_ P14
M_ DATA_A20 J4 2 DD R0 _D Q_20 D DR 0_DQS_N 14 J1 Z0214 M_D ATA _B20 N34 D DR 1_ DQ_20 DD R1_D QS_N14 J7 Z0234 M_D ATA_ C2 0 P40 DD R2_D Q_20 D DR 2_DQ S_N 14 K8 Z0254
M_ DATA_A19 E4 3 M_D ATA _B19 J35 M_D ATA_ C1 9 J 39
M_ DATA_A18 E4 2 DD R0 _D Q_19 P2 Z0215 M_D ATA _B18 K35 D DR 1_ DQ_19 M5 Z0235 M_D ATA_ C1 8 J 40 DD R2_D Q_19 N4 Z0255
M_ DATA_A17 H4 3 DD R0 _D Q_18 DD R0 _D QS_ P15 P1 Z0216 M_D ATA _B17 M34 D DR 1_ DQ_18 D DR 1_ DQS_P15 M4 Z0236 M_D ATA_ C1 7 M40 DD R2_D Q_18 DD R2_D QS_ P15 P4 Z0256
M_ DATA_A16 H4 1 DD R0 _D Q_17 D DR 0_DQS_N 15 M_D ATA _B16 M35 D DR 1_ DQ_17 DD R1_D QS_N15 M_D ATA_ C1 6 M39 DD R2_D Q_17 D DR 2_DQ S_N 15
M_ DATA_A15 L4 2 DD R0 _D Q_16 V2 Z0217 M_D ATA _B15 N38 D DR 1_ DQ_16 Y4 Z0237 M_D ATA_ C1 5 R 40 DD R2_D Q_16 V6 Z0257
DD R0 _D Q_15 DD R0 _D QS_ P16 D DR 1_ DQ_15 D DR 1_ DQS_P16 DD R2_D Q_15 DD R2_D QS_ P16
M_ DATA_A14 L4 3 DD R0 _D Q_14 D DR 0_DQS_N 16 V3 Z0218 M_D ATA _B14 N37 D DR 1_ DQ_14 DD R1_D QS_N16 Y5 Z0238 M_D ATA_ C1 4 T41 DD R2_D Q_14 D DR 2_DQ S_N 16 V7 Z0258
M_ DATA_A13 P4 1 M_D ATA _B13 R35 M_D ATA_ C1 3 V39
M_ DATA_A12 P4 2 DD R0 _D Q_13 B36 Z0219 M_D ATA _B12 R34 D DR 1_ DQ_13 F3 5 Z0239 M_D ATA_ C1 2 W 39 DD R2_D Q_13 H3 1 Z0259
M_ DATA_A11 K4 3 DD R0 _D Q_12 DD R0 _D QS_ P17 B35 Z0220 M_D ATA _B11 N39 D DR 1_ DQ_12 D DR 1_ DQS_P17 E3 5 Z0240 M_D ATA_ C1 1 T36 DD R2_D Q_12 DD R2_D QS_ P17 G3 1 Z0260
M_ DATA_A10 K4 2 DD R0 _D Q_11 D DR 0_DQS_N 17 M_D ATA _B10 P39 D DR 1_ DQ_11 DD R1_D QS_N17 M_D ATA_ C1 0 R 39 DD R2_D Q_11 D DR 2_DQ S_N 17
ChannelC M_ DATA_A9 N4 3 DD R0 _D Q_10
DD R0 _D Q_9 M_D ATA _B9 P35 D DR 1_ DQ_10
D DR 1_ DQ_9 M_D ATA_ C9 U 39 DD R2_D Q_10
DD R2_D Q_9
M_ DATA_A8 N4 1 M_D ATA _B8 P34 M_D ATA_ C8 U 38
M_DATA_C [63: 0] M_ DATA_A7 T4 2 DD R0 _D Q_8 M_D ATA _B7 Y39 D DR 1_ DQ_8 M_D ATA_ C7 V38 DD R2_D Q_8
9 M_D ATA_C[ 63:0 ] M_ DATA_A6 U4 1 DD R0 _D Q_7 M_D ATA _B6 Y40 D DR 1_ DQ_7 M_D ATA_ C6 V37 DD R2_D Q_7
M_ DATA_A5 W4 2 DD R0 _D Q_6 M_D ATA _B5 AB36 D DR 1_ DQ_6 M_D ATA_ C5 V34 DD R2_D Q_6
M_CB_ECC_C[7:0] M_ DATA_A4 W4 0 DD R0 _D Q_5 M_D ATA _B4 AA35 D DR 1_ DQ_5 M_D ATA_ C4 U 34 DD R2_D Q_5
M_ DATA_A3 R4 2 DD R0 _D Q_3 M_D ATA _B3 Y34 D DR 1_ DQ_3 M_D ATA_ C3 U 36 DD R2_D Q_3
M_ DATA_A2 R4 3 M_D ATA _B2 Y35 M_D ATA_ C2 V36
M_DQS_C _D P[7:0] M_ DATA_A1 V4 1 DD R0 _D Q_2 M_D ATA _B1 AA36 D DR 1_ DQ_2 M_D ATA_ C1 W 35 DD R2_D Q_2
9 M_D QS_ C_DP[ 7: 0] M_ DATA_A0 W4 1 DD R0 _D Q_1 M_D ATA _B0 AA37 D DR 1_ DQ_1 M_D ATA_ C0 W 34 DD R2_D Q_1
9 M_D QS_ C_DN [7:0 ] M_DQS_C _D N[ 7: 0]
M_ CB_ECC _A7 C3 4 M_C B_E CC _B7 G35 M_C B_EC C_ C7 F30

M_ CB_ECC _A6 B3 4 DD R0 _EC C_ 7 M_C B_E CC _B6 E34 D DR 1_ ECC _7 M_C B_EC C_ C6 F31 DD R2_EC C_ 7
M_ CB_ECC _A5 A3 7 DD R0 _EC C_ 6 M_C B_E CC _B5 F37 D DR 1_ ECC _6 M_C B_EC C_ C5 J 30 DD R2_EC C_ 6
M_ CB_ECC _A4 C3 7 DD R0 _EC C_ 5 M_C B_E CC _B4 E37 D DR 1_ ECC _5 M_C B_EC C_ C4 J 31 DD R2_EC C_ 5
M_ CB_ECC _A3 C3 3 DD R0 _EC C_ 4 M_C B_E CC _B3 G36 D DR 1_ ECC _4 M_C B_EC C_ C3 E30 DD R2_EC C_ 4
DD R0 _EC C_ 3 D DR 1_ ECC _3 DD R2_EC C_ 3
M_ CB_ECC _A2 F3 2 M_C B_E CC _B2 E33 M_C B_EC C_ C2 E29
M_ CB_ECC _A1 A3 6 DD R0 _EC C_ 2 M_C B_E CC _B1 F36 D DR 1_ ECC _2 M_C B_EC C_ C1 F33 DD R2_EC C_ 2
M_ CB_ECC _A0 C3 6 DD R0 _EC C_ 1 L GA1366 M_C B_E CC _B0 D36 D DR 1_ ECC _1 M_C B_EC C_ C0H 32 DD R2_EC C_ 1
DD R0 _EC C_ 0 D DR 1_ ECC _0 LGA1366 DD R2_EC C_ 0 LGA1 36 6
1 OF 12 2 OF 12 3 OF 12
LGA1366 Part A DDR3 1/2 B - 3

Schematic Diagrams
LGA1366 Part B DDR3 2/2

C han nelA J_ C PU 1 D
J_ C PU 1 E
M_MA A_ A[1 5:0 ]
7 M_MAA_ A[ 1 5: 0 ] M_ MA A_ B1 5 F 26 B2 9 M_MAA _A 15
D D R 1_MA_ 1 5 D D R 0_ MA_ 15
M_S BS_ A[ 2 :0 ] M_ MA A_ B1 4 H 26 A2 8 M_MAA _A 14 G25 M_ MA A_ C1 5
7 M_SB S_ A[2 : 0] M_ MA A_ B1 3 B 14 D D R 1_MA_ 1 4 D D R 0_ MA_ 14 A1 0 M_MAA _A 13 D D R 2_MA_ 1 5 H 24 M_ MA A_ C1 4
D D R 1_MA_ 1 3 D D R 0_ MA_ 13 D D R 2_MA_ 1 4
7 M_SC KE _A [1 : 0] M_S C KE_A[ 1: 0 ] M_ MA A_ B1 2 E 24 B2 6 M_MAA _A 12 F1 5 M_ MA A_ C1 3
M_ MA A_ B1 1 E 23 D D R 1_MA_ 1 2 D D R 0_ MA_ 12 A2 6 M_MAA _A 11 D D R 2_MA_ 1 3 G23 M_ MA A_ C1 2
M_OD T_ A[1 : 0] M_ MA A_ B1 0 H 14 D D R 1_MA_ 1 1 D D R 0_ MA_ 11 B1 9 M_MAA _A 10 D D R 2_MA_ 1 2 H 23 M_ MA A_ C1 1
7 M_OD T_ A[ 1 :0] D D R 1_MA_ 1 0 D D R 0_ MA_ 10 D D R 2_MA_ 1 1
M_ MA A_ B9 G 24 C2 6 M_MAA _A 9 H 17 M_ MA A_ C1 0
C K_ M_C H 0 _0_ DP M_ MA A_ B8 E 22 D D R 1_MA_ 9 D DR 0 _ MA _9 B2 5 M_MAA _A 8 D D R 2_MA_ 1 0 H 22 M_ MA A_ C9
7 CK _M_ C H0 _0 _D P D D R 1_MA_ 8 D DR 0 _ MA _8 D D R2_ MA_ 9
C K_ M_C H 0 _0_ DN M_ MA A_ B7 D 22 A2 5 M_MAA _A 7 L25 M_ MA A_ C8
7 CK _M_ C H0 _0 _D N D D R 1_MA_ 7 D DR 0 _ MA _7 D D R2_ MA_ 8
C K_ M_C H 0 _1_ DP M_ MA A_ B6 J 27 C2 4 M_MAA _A 6 J 24 M_ MA A_ C7
7 CK _M_ C H0 _1 _D P D D R 1_MA_ 6 D DR 0 _ MA _6 D D R2_ MA_ 7
C K_ M_C H 0 _1_ DN M_ MA A_ B5 F 22 B2 4 M_MAA _A 5 K2 2 M_ MA A_ C6
7 CK _M_ C H0 _1 _D N D D R 1_MA_ 5 D DR 0 _ MA _5 D D R2_ MA_ 6
M_ MA A_ B4 K 28 B2 3 M_MAA _A 4 K2 3 M_ MA A_ C5
CK_M_CH0_2_DP M_ MA A_ B3 L 28 D D R 1_MA_ 4 D DR 0 _ MA _4 D2 4 M_MAA _A 3 D D R2_ MA_ 5 F2 0 M_ MA A_ C4
CK_M_CH0_2_DN DIMM1 no using D D R 1_MA_ 3 D DR 0 _ MA _3 D D R2_ MA_ 4
M_ MA A_ B2 J 17 C2 3 M_MAA _A 2 J 20 M_ MA A_ C3
CK_M_CH0_3_DP M_ MA A_ B1 J 16 D D R 1_MA_ 2 D DR 0 _ MA _2 B2 1 M_MAA _A 1 D D R2_ MA_ 3 G18 M_ MA A_ C2
CK_M_CH0_3_DN D D R 1_MA_ 1 D DR 0 _ MA _1 D D R2_ MA_ 2
M_ MA A_ B0 J 14 A2 0 M_MAA _A 0 K1 7 M_ MA A_ C1
D D R 1_MA_ 0 D DR 0 _ MA _0 D D R2_ MA_ 1
M_R A S_ A_N A1 8 M_ MA A_ C0
7 M_R AS_ A_ N M_C A S_ A_N D D R2_ MA_ 0
7 M_C AS_ A_ N
M_W E _A _N M_ SBS_ B2 H 27 C2 8 M_S BS_ A2 L26 M_ SBS_ C 2
7 M_W E_A_ N M_ SBS_ B1 K 13 D D R 1_B A_2 D D R 0_ BA _2 A1 6 M_S BS_ A1 DD R 2 _B A_ 2 F1 7 M_ SBS_ C 1
D D R 1_B A_1 D D R 0_ BA _1 DD R 2 _B A_ 1
7 M_SC S_ A_ N 0 M_S C S_ A_N 0 M_ SBS_ B0 C 18 D D R 1_B A_0 D D R 0_ BA _0 B1 6 M_S BS_ A0 DD R 2 _B A_ 0 A1 7 M_ SBS_ C 0
M_S C S_ A_N 1
7 M_SC S_ A_ N 1
D 17 M_ RA S_ C_ N
M_SCS_A_N4 D D R2_ R AS*

M_ RA S_ B_ N G 14 A1 5 M_R AS _A _N F1 6 M_ CA S_ C_ N
M_SCS_A_N5 DIMM1 no using M_ CA S_ B_ N E 14 D D R 1_R AS * D DR 0 _ RA S* C1 2 M_C AS _A _N D D R2_ C AS* C 16 M_ WE _C _N
D D R 1_C AS * D DR 0 _ CA S* D D R 2_ W E*
M_ W E_B _N G 13 B1 3 M_W E_ A_N
D D R 1_W E* D D R0 _ W E*
D D R0_ D RA MR ST G16 M_ SC S_ C_ N 0
7 DD R 0 _D R AMR ST D D R2 _ C S_0*
K1 4 M_ SC S_ C_ N 1
D D R2 _ C S_1* Z033 9
M_ SC S_ B_ N0 D 12 G1 5 M_S CS _A _N 0 D 16
M_ SC S_ B_ N1 A8 D D R 1_C S_ 0 * DD R 0 _C S _0* B1 0 M_S CS _A _N 1 D D R2 _ C S_2* H 16 Z034 0
Ch annelB Z0 301 D D R 1_C S_ 1 * DD R 0 _C S _1* Z 03 2 0 D D R2 _ C S_3*
Sheet 3 of 47 8 M_MAA_ B[ 1 5: 0 ] M_MA A_ B[1 5:0 ]

Z0 302
Z0 303
E 15
E 13
C 17
D D R 1_C S_ 2 *
D D R 1_C S_ 3 *
D D R 1_C S_ 4 *
DD R 0 _C S _2*
DD R 0 _C S _3*
DD R 0 _C S _4*
C1 3
B9
B1 5
Z 03 2 1
Z 03 2 2
D D R2 _ C S_4*
D D R2 _ C S_5*
DD R 2 _C S_6 /OD T_4*
E1 7
D9
L17
Z034 1
Z034 2
Z034 3
Z0 304 E 10 A7 Z 03 2 3 J 15 Z034 4
LGA1366 Part B 8 M_SB S_ B[2 : 0]

M_S BS_ B[ 2 :0 ]
M_S C KE_B[ 1: 0 ]
Z0 305
Z0 306
C 14
E 12
D D R 1_C S_ 5 *
D D R 1_C S_ 6 /O D T_4*
D D R 1_C S_ 7 /O D T_5*
DD R 0 _C S _5*
D D R 0_C S_ 6 /OD T_4*
D D R 0_C S_ 7 /OD T_5*
C1 1
B8
Z 03 2 4
Z 03 2 5
DD R 2 _C S_7 /OD T_5*
D D R 2_ C LK _P 0
J 22
J 21
CK _M_ C H2 _0 _D P
CK _M_ C H2 _0 _D N
8 M_SC KE _B [1 : 0] DD R 2 _C L K_N 0
DDR3 8 M_OD T_ B[ 1 :0]

M_OD T_ B[1 : 0] C K_ M_C H 1 _0 _ D P
C K_ M_C H 1 _0 _ D N
C K_ M_C H 1 _2 _ D P
C 21
D 21
D D R 1_C LK_ P0
D D R 1_C LK_ N 0
D DR 0_ CL K_ P0
D D R 0_ C L K_ N0
J1 9
K1 9
C K_ M_ CH 0_ 0_ D P
C K_ M_ CH 0_ 0_ D N
C K_ M_ CH 0_ 2_ D P
D D R 2_ C LK _P 1
DD R 2 _C L K_N 1
D D R 2_ C LK _P 2
L20
K2 0
H 21
CK _M_ C H2 _2 _D P
CK _M_ C H2 _2 _D N
CK _M_ C H2 _1 _D P
C K_ M_C H 1 _0_ DP G 19 D1 9 G21 CK _M_ C H2 _1 _D N
2/2 8
8
8
CK _M_ C H1 _0 _D P
CK _M_ C H1 _0 _D N
CK _M_ C H1 _1 _D P
C K_ M_C H 1 _0_ DN
C K_ M_C H 1 _1_ DP
C K_ M_C H 1 _1_ DN
C K_ M_C H 1 _2 _ D N
C K_ M_C H 1 _1 _ D P
C K_ M_C H 1 _1 _ D N
G 20
K 18
L 18
D D R 1_C LK_ P1
D D R 1_C LK_ N 1
D D R 1_C LK_ P2
D DR 0_ CL K_ P1
D D R 0_ C L K_ N1
D DR 0_ CL K_ P2
C1 9
F1 8
E1 8
C K_ M_ CH 0_ 2_ D N
C K_ M_ CH 0_ 1_ D P
C K_ M_ CH 0_ 1_ D N
DD R 2 _C L K_N 2
D D R 2_ C LK _P 3
DD R 2 _C L K_N 3
L22
L21
CK _M_ C H2 _3 _D P
CK _M_ C H2 _3 _D N
8 CK _M_ C H1 _1 _D N C K_ M_C H 1 _3 _ D P D D R 1_C LK_ N 2 D D R 0_ C L K_ N2 C K_ M_ CH 0_ 3_ D P

H 18 E2 0 J 26 M_ SC KE_ C 0
CK_M_CH1_2_DP C K_ M_C H 1 _3 _ D N H 19 D D R 1_C LK_ P3 D DR 0_ CL K_ P3 E1 9 C K_ M_ CH 0_ 3_ D N D DR 2 _CK E_ 0 G26 Z034 5
CK_M_CH1_2_DN DIMM1 no using D D R 1_C LK_ N 3 D D R 0_ C L K_ N3 D DR 2 _CK E_ 1 D 26 M_ SC KE_ C 1
CK_M_CH1_3_DP D DR 2 _CK E_ 2 L27 Z034 6
CK_M_CH1_3_DN M_ SC KE_ B0 H 28 C2 9 M_S CK E_A0 D DR 2 _CK E_ 3
M_R A S_ B_N Z0 307 E 27 D D R 1_C KE _0 DD R 0 _C KE _0 A3 0 Z 03 2 6 K2 7 Z034 7
8 M_R AS_ B_ N D D R 1_C KE _1 DD R 0 _C KE _1 R SVD _K2 7 Z034 8
M_C A S_ B_N M_ SC KE_ B1 D 27 B3 0 M_S CK E_A1 D 30
8 M_C AS_ B_ N D D R 1_C KE _2 DD R 0 _C KE _2 R SV D_ D 3 0
M_W E _B _N Z0 308 C 27 B3 1 Z 03 2 7 K2 9 Z034 9
8 M_W E_B_ N D D R 1_C KE _3 DD R 0 _C KE _3 R SVD _K2 9
J 29 Z035 0
M_S C S_ B_N 0 R SV D _J 2 9 D 10 Z035 1
8 M_SC S_ B_ N 0 D DR 2 _OD T_ 3
M_S C S_ B_N 1 Z0 309 G 28 A3 1 Z 03 2 8 D 15 Z035 2
8 M_SC S_ B_ N 1 Z0 310 H 29 R S VD _G 28 RS VD _A 31 C3 2 Z 03 2 9 D DR 2 _OD T_ 2 F1 3 M_ OD T_ C1
M_SCS_B_N4 R S VD _H 29 R SVD _C 32 D DR 2 _OD T_ 1
Z0 311 E 28 C3 1 Z 03 3 0 L16 M_ OD T_ C0
M_SCS_B_N5 DIMM1 no using Z0 312 R S VD _E 28 R SVD _C 31 Z 03 3 1 D DR 2 _OD T_ 0
F 28 D3 1
Z0 313 F 11 R S VD _F 28 R SVD _D 31 B1 8 Z035 3
Z0 314 D D R 1_O D T_3 Z 03 3 2 DD R 2_MA_ PA R
D D R1_ D RA MR ST D 14 C7
8 DD R 1 _D R AMR ST M_ OD T_ B1 C8 D D R 1_O D T_2 DD R 0 _O D T_3 B1 1 Z 03 3 3 F2 1 Z035 4
D D R 1_O D T_1 DD R 0 _O D T_2 D D R 2_PAR _ ER R _0* Z035 5
M_ OD T_ B0 D 11 D D R 1_O D T_0 DD R 0 _O D T_1 C9 M_OD T_A 1 D D R 2_PAR _ ER R _1* J 25
F1 2 M_OD T_A 0 F2 3 Z035 6
Ch annelC DD R 0 _O D T_0 D D R 2_PAR _ ER R _2* K2 5 Z035 7
R SVD _ K25*
M_MA A_ C[ 15: 0 ] Z0 315 D 20 B2 0 Z 03 3 4 AC 1 DD R _ COMP2
9 M_MAA_ C [ 15 : 0] D D R 1_MA_ PA R D D R 0_ MA_ PAR D D R _C OMP_ 2
M_S BS_ C [2 : 0] Z0 316 C 22 D2 5 Z 03 3 5 E3 2 DD R 2 _D R AMR ST
9 M_SB S_ C[ 2 :0] D D R 1_P AR _E RR _ 0* D DR 0 _ PAR _ER R _0* D D R 2_ R ESE T*
Z0 317 E 25 B2 8 Z 03 3 6 LG A1 36 6
Z0 318 D D R 1_P AR _E RR _ 1* D DR 0 _ PAR _ER R _1* Z 03 3 7
M_S C KE_C [1 : 0] F 25 A2 7
9 M_SC KE _C [ 1:0 ] Z0 319 F 27 D D R 1_P AR _E RR _ 2* D DR 0 _ PAR _ER R _2* B3 3 Z 03 3 8 5 OF 12
R S VD _F 27 R S VD _B 33 *
M_OD T_ C[ 1:0]
9 M_OD T_ C [ 1: 0 ] D D R _C OMP1 Y7
D D R _COMP_ 1
9 CK _M_ C H2 _0 _D P C K_ M_C H 2 _0_ DP D D R_ C O MP _0 AA8 D D R _C OMP0
C K_ M_C H 2 _0_ DN D D R 1_D R AMRS T D 29 D3 2 D D R 0_ D R AMR ST
9 CK _M_ C H2 _0 _D N D D R 1_R ES ET* D DR 0_ RE SET*
C K_ M_C H 2 _1_ DP LG A1 3 66
9 CK _M_ C H2 _1 _D P
C K_ M_C H 2 _1_ DN
9 CK _M_ C H2 _1 _D N 4 OF 12
CK_M_CH2_2_DP
CK_M_CH2_2_DN DIMM1 no using
CK_M_CH2_3_DP
CK_M_CH2_3_DN
M_R A S_ C_ N
9 M_R AS_ C _ N
M_C A S_ C_ N
9 M_C AS_ C _ N M_W E _C _ N DD R _ COMP0 R2 42 1 00 _ 1%_04
9 M_W E_C _N
5 m ils Trac e w idt h
M_S C S_ C_ N 0 1 50 0mils max t ra c e len gt h
9 M_SC S_ C _ N0 M_S C S_ C_ N 1 DD R _ COMP1 R2 43 2 4. 9 _ 1% _0 4
9 M_SC S_ C _ N1
M_SCS_C_N5
M_SCS_C_N6 DIMM1 no using DD R _ COMP2 R3 1 1 30 _ 1%_04
D D R2_ D RA MR ST
9 DD R 2 _D R AMR ST
B - 4 LGA1366 Part B DDR3 2/2

Schematic Diagrams
LGA1366 Part C QPI
J_CPU1F J _CPU1G
QPI BUS External Connection J_CPU1H

Z04 001 AF1 AK7 Z04136 CSI 0_DRX_DP19 AP38 AE40 C SI0_ DTX_D P19 Z04048 AM8 AC8 Z04092
RSVD R SVD_AK7 QPI _D RX_DP19 QPI _D TX_DP19 RSVD RSVD
10 CSI 0_ DRX_DP[ 19 :0] CSI0_DR X_D P[19:0 ] Z04 002 AG1 AK8 IMON CSI 0_DRX_DN 19 AR 38 AF40 C SI0_ DTX_D N19 Z04049 AL8 AD8 Z04093
RSVD I SEN SE QPI _D RX_DN19 QPI_DTX_D N19 RSVD RSVD
CK_ 133M_CPU_D N AH35 BCLK_DN CSI 0_DRX_DP18 AN 39
QPI _D RX_DP18 QPI _D TX_DP18
AD 38 C SI0_ DTX_D P18 Z04050 AM6 RSVD RSVD
AD5 Z04094
10 CSI 0_ DRX_DN [19:0] CSI0_DR X_D N[ 19: 0] CK_ 133M_CPU_D P AJ35 BCLK_DP CSI 0_DRX_DN 18 AP39 AE38 C SI0_ DTX_D N18 Z04051 AM7 AE5 Z04095
QPI _D RX_DN18 QPI_DTX_D N18 RSVD RSVD
CK_ H_BC LK_I TP_D N AA4 BCLK_ITP_ DN VTTD_SEN SE
AE36 CPU _VTT_FB CSI 0_DRX_DP17 AP41
AB39 C SI0_ DTX_D P17 Z04052 AN 5
RSVD RSVD
AD6 Z04096
CK_ H_BC LK_I TP_D P AA5 BCLK_ITP_ DP VSS_SENSE_VTTD
AE37 CPU _VTT_FB- CSI 0_DRX_DN 17 AP40
QPI _D RX_DN17 QPI_DTX_D N17
AB38 C SI0_ DTX_D N17 Z04053 AN 6
RSVD RSVD
AD7 Z04097
10 CSI 0_ DTX_DP[ 19:0] CSI0_DTX_D P[19:0 ] CSI 0_DRX_DP16 AM42 AC 39 C SI0_ DTX_D P16 Z04054 AM4 AB6 Z04098
QPI _D RX_DP16 QPI _D TX_DP16 RSVD RSVD
CSI 0_DRX_DN 16 AM41 AC 38 C SI0_ DTX_D N16 Z04055 AN 4 AC6 Z04099
QPI _D RX_DN16 QPI_DTX_D N16 RSVD RSVD
10 CSI 0_ DTX_DN [19:0] CSI0_DTX_D N[ 19: 0] CO MP0 AB41
COMP0 VCC_SEN SE
AR9 VCC _SENSE CSI 0_DRX_DP15 AN 40
AC 41 C SI0_ DTX_D P15 Z04056 AP3
RSVD RSVD
AC4 Z04100
V11 Z04030 CSI 0_DRX_DN 15 AM40 AC 40 C SI0_ DTX_D N15 Z04057 AP4 AD4 Z04101
RSVD QPI _D RX_DN15 QPI_DTX_D N15 RSVD RSVD
H_CATER R_N AC37 CSI 0_DRX_DP14 AN 43 AD 40 C SI0_ DTX_D P14 Z04058 AM2 AE3 Z04102
CAT_ ERR* QPI _D RX_DP14 QPI _D TX_DP14 RSVD RSVD
10 CSI 0_ CLKR X_D P CSI0_CLKRX_DP H_PROC HOT# AG35
PROC HOT* VSS_SEN SE
AR8 VSS_SENSE CSI 0_DRX_DN 14 AM43
QPI _D RX_DN14 QPI_DTX_D N14
AD 39 C SI0_ DTX_D N14 Z04059 AM3
RSVD RSVD
AE4 Z04103
10 CSI 0_ CLKR X_D N CSI0_CLKRX_DN H_CPUR ST# AL39 U 11 Z04031 CSI 0_DRX_DP13 AP42 AC 43 C SI0_ DTX_D P13 Z04060 AN 1 AC3 Z04104
RESET* RSVD QPI _D RX_DP13 QPI _D TX_DP13 RSVD RSVD
10 CSI 0_ CLKTX_D P CSI0_CLKTX_ DP SKTOC C# AG36 CSI 0_DRX_DN 13 AN 42 AB43 C SI0_ DTX_D N13 Z04061 AM1 AB3 Z04105
SKTOC C* QPI _D RX_DN13 QPI_DTX_D N13 RSVD RSVD
10 CSI 0_ CLKTX_D N CSI0_CLKTX_ DN TH ERMTRIP# AG37
TH ER MTRIP* CSI 0_DRX_DP12 AT40
AD 42 C SI0_ DTX_D P12 Z04062 AP2
RSVD RSVD
AD2 Z04106
PECI AH36 AV6 CPU VTT_VID4 CSI 0_DRX_DN 12 AR 40 AC 42 C SI0_ DTX_D N12 Z04063 AN 2 AD3 Z04107
PECI VCC TT_VID _4 QPI _D RX_DN12 QPI_DTX_D N12 RSVD RSVD
Z04 004 AK35
RSVD VCC TT_VID _3
AF7 CPU VTT_VID3 CSI 0_DRX_DP11 AT43
AE42 C SI0_ DTX_D P11 Z04064 AR 4
RSVD RSVD
AE1 Z04108
AV3 CPU VTT_VID2 CSI 0_DRX_DN 11 AR 43 AE41 C SI0_ DTX_D N11 Z04065 AR 5 AD1 Z04109
VCC TT_VID _2 QPI _D RX_DN11 QPI_DTX_D N11 RSVD RSVD
HW RST# AF10 CSI 0_DRX_DP10 AU 42 AF43 C SI0_ DTX_D P10 Z04066 AT1 AF2 Z04110
DBR* QPI _D RX_DP10 QPI _D TX_DP10 RSVD RSVD
19 CK_13 3M_CPU_DN CK_133M_C PU _D N H_MBP_N 0 B3 CSI 0_DRX_DN 10 AT42 AE43 C SI0_ DTX_D N10 Z04067 AR 1 AF3 Z04111
BPM_0* QPI _D RX_DN10 QPI_DTX_D N10 RSVD RSVD
19 CK_13 3M_CPU_DP C K_133M_CPU_DP H_MBP_N 1 A5
BPM_1* VTTPW RGOOD
AB35 VTT_PWR GD CSI 0_DRX_DP9 AU 40 AG 40 C SI0_ DTX_D P9 Z04068 AT3 AH2 Z04112
H_MBP_N 2 C2 AA6 QPI _D RX_DP9 QPI_DTX_D P9 RSVD RSVD
BPM_2* VDD PW RGOOD VDD PW RG OOD CSI 0_DRX_DN 9 AU 41
QPI _D RX_DN9 QPI _D TX_DN9
AG 41 C SI0_ DTX_D N9 Z04069 AT2 RSVD RSVD
AG2 Z04113
H_MBP_N 3 B4 AR7 H_PWRGD CSI 0_DRX_DP8 AW 40 AJ 43 C SI0_ DTX_D P8 Z04070 AU 4 AH3 Z04114
BPM_3* VCC PW RGOOD QPI _D RX_DP8 QPI_DTX_D P8 RSVD RSVD
H_MBP_N 4 D1
BPM_4* CSI 0_DRX_DN 8 AV40
AH 43 C SI0_ DTX_D N8 Z04071 AU 3
RSVD RSVD
AH4 Z04115
T O PO W ER
H_MBP_N 5 C3
BPM_5*
CSI 0_DRX_DP7 AU 39
QPI _D RX_DP7 QPI_DTX_D P7
AK42 C SI0_ DTX_D P7 Z04072 AW 4
RSVD RSVD
AK1 Z04116
44 I MON IMON H_MBP_N 6 D2 AF4 PLT_MN R_ EXTTS_N1 CSI 0_DRX_DN 7 AT39 AJ 42 C SI0_ DTX_D N7 Z04073 AW 3 AJ1 Z04117
BPM_6* RSVD QPI _D RX_DN7 QPI _D TX_DN7 RSVD RSVD
44 H_PSI# H_PSI# H_MBP_N 7 E2
BPM_7* DDR _THERM*
AB5 PLT_MN R_ EXTTS_N0 CSI 0_DRX_DP6 BA38 AH 41 C SI0_ DTX_D P6 Z04074 AU 7 AJ3 Z04118
QPI _D RX_DP6 QPI_DTX_D P6 RSVD RSVD
CSI 0_DRX_DN 6 AY 38
AH 42 C SI0_ DTX_D N6 Z04075 AU 6
RSVD RSVD
AJ2 Z04119
CPU_VTT_FB H_PRDY _N B41 CSI 0_DRX_DP5 AW 37 AK40 C SI0_ DTX_D P5 Z04076 AY 6 AG7 Z04120
39 CPU _VTT_FB PRDY * QPI _D RX_DP5 QPI_DTX_D P5 RSVD RSVD
39 CPU _VTT_FB- CPU_VTT_FB- H_PREQ_ N C42 AP7 H_PSI# CSI 0_DRX_DN 5 AW 38 AK41 C SI0_ DTX_D N5 Z04077 AY 5 AG6 Z04121
CPUVTT_VID 4 PREQ* PSI * CSI 0_DRX_DP4 BA36 QPI _D RX_DN5 QPI _D TX_DN5 AH 40 C SI0_ DTX_D P4 Z04078 BA7 RSVD RSVD AJ4 Z04122
39
39
39
CPU VTT_VID4
CPU VTT_VID3
CPU VTT_VID2
CPUVTT_VID 3
CPUVTT_VID 2
H_TCK
H_TDI
H_TDO
AH10
AJ 9
AJ10
TC K
TD I VID_0/ MSID _0
AL10
AL9
H_VID0
H_VID1
CSI 0_DRX_DN 4
CSI 0_DRX_DP3
CSI 0_DRX_DN 3
BA37
AW 36
AY 36
QPI _D RX_DP4
QPI _D RX_DN4
QPI _D RX_DP3
QPI_DTX_D P4
QPI _D TX_DN4
QPI_DTX_D P3
AJ 40
AJ 38
AJ 39
C SI0_ DTX_D N4
C SI0_ DTX_D P3
C SI0_ DTX_D N3
Z04079 BA6
Z04080 AV5
Z04081 AW 5
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AK4
AK6
AK5
Z04123
Z04124
Z04125
Sheet 4 of 47
TD O VID_1/ MSID _1 QPI _D RX_DN3 QPI _D TX_DN3 RSVD RSVD
44 H_VID [7: 0]
15,44 H_PR OCH OT#

H_VI D[7:0]
H_PRO CH OT#
H_TMS
H_TRST_N
CPU _TAPGOOD
AG10
AH 9
AH 5
TMS
TR ST*
RSVD
VID_2/ MSID _2
VI D_3/CSC _0
VI D_4/CSC _1
AN9
AM10
AN10
H_VID2
H_VID3
H_VID4
CSI 0_DRX_DP2
CSI 0_DRX_DN 2
CSI 0_DRX_DP1
AV36
AV37
AU 38
QPI _D RX_DP2
QPI _D RX_DN2
QPI _D RX_DP1
QPI_DTX_D P2
QPI _D TX_DN2
QPI_DTX_D P1
AK37
AK38
AF39
C SI0_ DTX_D P2
C SI0_ DTX_D N2
C SI0_ DTX_D P1
Z04082 AY 8
Z04083 BA8
Z04084 AV7
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AH6
AJ6
AJ8
Z04126
Z04127
Z04128
LGA1366 Part C
AP9 H_VID5 CSI 0_DRX_DN 1 AV38 AG 39 C SI0_ DTX_D N1 Z04085 AW 7 AJ7 Z04129
44 VCC _SENSE
44 VSS_SENSE
VC C_SEN SE
VSS_SEN SE Z04 005
Z04 006
BA4
AY 4 RSVD
VI D_5/CSC _2
VI D6
VI D7
AP8
AN8
H_VID6
H_VID7
CSI 0_DRX_DP0
CSI 0_DRX_DN 0
AT37
AU 37
QPI _D RX_DN1
QPI _D RX_DP0
QPI _D RX_DN0
QPI _D TX_DN1
QPI_DTX_D P0
QPI _D TX_DN0
AG 38
AH 38
C SI0_ DTX_D P0
C SI0_ DTX_D N0
Z04086 AU 8
Z04087 AV8
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AG8
AH8
Z04130
Z04131 QPI
H_PWR GD Z04 007 AW41 RSVD Z04088 AT6
12,1 6, 18 H_PWRGD RSVD RSVD
Z04 008 AY40 CSI 0_CLKRX_D P AR 41 Z04089 AR 6
VTT_PW RGD Z04 009 BA40 RSVD AG4 Z04032 CSI 0_CLKRX_D N AR 42 QPI _C LKRX_DP Z04090 AF6 RSVD
Z04 010 AV2 RSVD RSVD AG5 Z04033 CSI 0_CLKTX_D P AG 42 QPI _C LKRX_DN Z04091 AE6 RSVD LG A13 66 AL6 Z04132
H_C PU RST# Z04 011 AW 2 RSVD RSVD AK2 Z04034 CSI 0_CLKTX_D N AF42 QPI _C LKTX_DP L GA136 6 AL 43 Z0413 5 RSVD RSVD
12, 18 H_CPUR ST# RSVD RSVD QPI _C LKTX_DN QPI_CMP0 8 OF 12
Z04 012 AY 3
HWR ST# Z04 013 AV1 RSVD AL3 Z04035 7 O F 12 R5
16, 18 HW RST# RSVD RSVD
PEC I Z04 014 AV42 AL38 Z04036
15,28 PEC I RSVD RSVD
15 TH ERMTRI P# THERMTR IP# Z04 015 AV43 AM36 Z04037 21_ 1%_0 4
Z04 016 AW42 RSVD RSVD AM38 Z04038
Z04 017 AY41 RSVD RSVD AN36 Z04039
Z04 018 AU 2 RSVD RSVD AN38 Z04040
In te l X D P D e b u g
H_MBP_N[ 7:0 ] RSVD RSVD AR36 Z04041

18 H_MBP_N [7 :0] RSVD
18 H_PRDY _N H_PRD Y_N AR37 Z04042
H_PREQ_N RSVD AT36 Z04043
18 H_PREQ_N RSVD
18 H_TC K H_TCK
H_TDI Z04 019 A40
18 H_TD I RVSD
H_TDO
18 H_TD O
18 H_TMS H_TMS Z04 020 AL5
H_TRST_N Z04 021 AL4 RVSD AY39 Z04044 R502 51_1%_04 VTT_PWR GD
18 H_TR ST_N RVSD RSVD CPU _VTT
CPU_TAPGOOD Z04 022 AL40 AY35 Z04045
18 CPU _TAPGOOD RVSD RSVD
18 C K_H_BCLK_ITP_DN CK_H_ BCLK_ ITP_DN Z04 023 AL41 AW39 Z04046
CK_H_ BCLK_ ITP_DP RVSD RSVD AV35 Z04047 C C7 75
18 C K_H_BCLK_ITP_DP RSVD
Z04 024 K24 5V R503 10K_ 04 B Q48
RVSD E 04
2N39 .0 1U_10 V_X7R_06
Z04 025 AK36 R504 C
Z04 026 L15 RVSD B Q49
RVSD 1 2, 15, 16,28,4 4 PWRGD_PS
Z04 027 K15 2N3904
E
RVSD 10K_04
CPU _DD R_VR EF L23
R6 49. 9_1%_04 H_CPUR ST# CR B_CPU _GTLREF AJ37 DD R_VR EF
C PU_VTT RVSD
R8 49. 9_1%_04 H_PR OC HOT#
Z04 028 AT5
R 17 49. 9_1%_04 H_CATERR _N Z04 029 AT4 RVSD
RVSD LGA13 66
R 24 5 1K_04 CPU _TAPGO OD
6 O F 12
R 14 49. 9_1%_04 TH ER MTRIP# R34 806_1%_04 VD DPWR GOO D
1.5 V
R 35 51_1%_04 H_TDI Ba ck up, Bloomf ield proces sor is C 50 C48
des igned with an int er nal VREF R 32
R 37 51_1%_04 H_TDO 2K_ 04 .1U _10V_X7R_ 04
R 40 1K_1%_04 CPU _DD R_VR EF
1.5V
R 33 51_1%_04 H_TMS 10U_6.3V_X5R_0 8
C 52 C51
R 38 *1K_04 H_PR DY _N R39
. 1U_10V_ 04 1K_1 %_04 .1U _10V_04
R 50 5 *10K_04 SKTOC C# 17, 24, 30,31,39. .41,43.. 45 5 V

11/ 3 5, 15, 18,39,44 CPU_VTT
R 24 4 51_1%_04 H_TCK
CPU _VTT R 10 *1K_1%_04 CR B_CPU _GTLR EF
5,7.. 9, 40, 43 1.5V
C 12 C11
R 36 51_1%_04 H_TRST_N R9
*. 1U_10V_04 *1K_1 %_04 *. 1U _10V_04
R 18 49. 9_1%_04 COMP0
Bloomf ield now requires boar d lev el termination

f or JTAG signals.
LGA1366 Part C QPI B - 5

Schematic Diagrams
LGA1366 Part C Power

VCORE
VC OR E VCORE 1.5V VCORE

C3 92 C 41 7 C398 C 389 C3 99 C 411 C410 C 409 C4 08
J_CPU 1I J _C PU1J
10U_10V_08 10U _10V_08 10U_ 10V_08 10U _1 0V_08 10U_10 V_08 10U _10V_08 10U_ 10V_08 1 0U _1 0V_08 10 U_10 V_08
AR21 AY13 A24 AK13
VCC P VCC P VD DQ VC CP
AR24 AY15 A29 AK15
AR25 AY16 B7 AK16
AR27 AY18 B12 AK18
AR28 VCC P VCC P AY19 B17 VD DQ VC CP AK19
AR34 AY27 C10 AK27 C3 91 C 39 3 C394 C 395 C3 96 C 40 4 C390 C 421
AT9 AY28 C15 AK28
AT10 AY30 C20 AK30 10U_10V_08 10U _10V_08 10U_ 10V_08 10U _1 0V_08 10U_10 V_08 10U _10V_08 10U_ 10V_08 1 0U _1 0V_08
AT12 AY31 C25 AK31
AT13 AY33 C30 AK33
AT15 AY34 D13 AL12
AT16 VCC P VCC P BA9 D18 VD DQ VC CP AL13
AT21 VCC P VCC P BA13 E11 VD DQ VC CP AL18
AT24 BA15 E16 AL19
AT25 BA16 E21 AL21 C17 C 21 C22 C37 C18 C3 3 C 35 C28
AT27 BA18 E26 AL24

AT28 BA19 E31 AL25 .1U_10V_X7R_04 .1U_10V_X7R_04 .1U_1 0V_X7R_04 . 1U _10V_X7R_04
AT30 BA24 F14 AL27 . 1U _10V_X7R _04 . 1U _10 V_X7R _04 . 1U_ 10V_X7R _04 .1U_10V_X7R_04
AT31 VCC P VCC P BA25 F19 VD DQ VC CP AL28
AT33 BA27 F24 AL30
AT34 VCC P VCC P BA28 G17 VD DQ VC CP AL31
AU 9 VCC P VCC P BA30 G22 VD DQ VC CP AL33
AU10 VCC P VCC P M1 1 C PU_VTT G27 VD DQ VC CP AL34
AU12 VCC P VCC P H15 VD DQ VC CP AM1 2
Sheet 5 of 47 AU13
AU15
AU16
VCC P
VCC P
VCC P VTTA AG34
AF34
H20
H25
J18
VD DQ
VD DQ
VD DQ
VC CP
VC CP
VC CP
AM1 3
AM1 5
AM1 6
C26 C 27 C25 C15 C20 C3 6 C 40 C16
VCC P VTTA VD DQ VC CP
LGA1366 Part C AU18
AU19
AU21
AU24
VCC P
VCC P
VCC P
VTTA
VTTA
VTTA
AF33
AF11
AE33
AE11
C PU_VTT
J23
J28
K16
K21
VD DQ
VD DQ
VD DQ
VC CP
VC CP
VC CP
AM1 8
AM1 9
AM2 1
AM2 4
.1U_10V_X7R_04 .1U_10V_X7R_04
. 1U _10V_X7R _04
.1U_1 0V_X7R_04
. 1U _10 V_X7R _04
. 1U _10V_X7R_04
. 1U_ 10V_X7R _04 .1U_10V_X7R_04
Power AU25
AU27
AU28
VCC P
VCC P
VCC P
VCC P
VTTA
VTTA
VTTA
AE10
AD10
K26
L14
L19
VD DQ
VD DQ
VD DQ
VD DQ
VC CP
VC CP
VC CP
VC CP
AM2 5
AM2 7
AM2 8
CAD NOTE:
PLA C E A LL 0805 CA PS IN SIDE
AU30 AF37 L24 AM3 0 CPU SOC KET CA V ITY
VCC P VTTD VD DQ VC CP
AU31 M17 AM3 1 VCORE
VCC P VD DQ VC CP
AU33 AF36 M27 AM3 3
AU34 AF9 A19 AM3 4
AV9 AE35 A14 AN1 2
1
AV10 AA10 A9 AN1 3 C4 02 C 40 1 C400 C 407
AV12 AA11 AN1 5 + C3 +C4 + C5 C 403
AV13 VCC P VTTD AA33 VC CP AN1 6 10U_10 V_08 10U _10V_08 10U_ 10V_08 10U _10V_08
AV15 VCC P VTTD AB8 VC CP AN1 8 *330U _2.5 V_D3 *33 0U _2 .5V_ D3 10U _10V_08
AV16 VCC P VTTD AB9 VC CP AN1 9 *330 U_2. 5V_D 3
2
VCC P VTTD VC CP
AV18 AB10 AN2 1
VCC P VTTD VC CP
AV19 AB11 AN2 4
VCC P VTTD VC CP
AV21 AB33 AN2 5
VCC P VTTD VC CP
AV24 AB34 AN2 7
VCC P VTTD VC CP
AV25 AN2 8
VCC P VC OR E VC CP
AV27 AC10 AN3 0 CPU_VTT
VCC P VTTD VC CP
AV28 AC11 AN3 1
AV30 VCC P VTTD AC33 VC CP AN3 3
AV31 VCC P VTTD AC34 VC CP AN3 4
AV33 VCC P VTTD AC35 R33 VC CP AP12
AV34 VCC P VTTD AD9 R11 VC CP VC CP AP13 C 39 7 C406 C 422 C4 12 C 413 C4 14 C 423 C32 C 23 C4 24
VCC P VTTD VC CP VC CP
AW 9 AD34 M13 AP15
AW10 AD35 M15 AP16 10U _10V_08 10U_ 10V_08 1 0U _1 0V_08 .1U _10V_ X7R_ 04 .1U _10V_ X7R_ 04 . 1U _10V_X7 R_04
AW12 AD36 M19 AP18 10 U_10 V_08 . 1U_10V_X7R _0 4 .1U_10V_X7R _04 .1U_10V_X7R_04
AW13 AE8 M21 AP19
AW15 AE9 M23 AP21
AW16 AE34 M25 AP24
AW18 VCC P VTTD AF8 M29 VC CP VC CP AP25
AW19 VCC P VTTD M31 VC CP VC CP AP27
AW21 VCC P M33 VC CP VC CP AP28
AW24 VCC P N11 VC CP VC CP AP30
VCC P VC CP VC CP
AW25 N33 AP31 CPU _VTT 1.8VS
VCC P VC CP VC CP
AW27 T11 AP33
VCC P VC CP VC CP
AW28 T33 AP34
VCC P VC CP VC CP
AW30 W11 AR1 0
VCC P VC CP VC CP
1
AW31 AH11 AR1 2
VCC P VC CP VC CP + C49 + C 34
AW33 AH33 AR1 3 C416 C41
VCC P VC CP VC CP
AW34 AJ11 AR1 5
AY 9 VCC P LG A13 66 AJ33 VC CP LG A1 36 6 VC CP AR1 6 33 0U _2 .5V_D3 330U_ 2. 5V_D 3 10U _10V_08
AY10 VCC P AK11 VC CP VC CP AR1 8 .1U_10V_X7R_04
2
AY12 VCC P AK12 VC CP VC CP AR1 9 D 03
VCC P VC CP VC CP
1.8VS 10 O F 12
V33
VCC PLL
U33
VCC PLL
W33
VCC PLL
9 O F 12 1. 5V
4, 15 ,18,3 9, 44 CPU_VTT
44 VCOR E
1 3, 41 1. 8VS
1
+ C4 38 + C 43 9 4 ,7. .9,4 0, 43 1. 5V
C4 19 C 41 8 C420 C 43 3 C4 37 C 432 C434 C 43 5 C4 36
330U _2.5 V_D 3 10 U_10 V_08 10U _10V_08 .1U_1 0V_X7R_04 .1U_1 0V_X7R_04 . 1U _1 0V_X7 R_0 4
*3 30U_ 2. 5V_D 3 10U_ 10V_08 . 1U _10 V_X7R _04 . 1U_ 10V_X7R _04 .1U_ 10V_X7R_04
2
B - 6 LGA1366 Part C Power

Schematic Diagrams
LGA1366 Part E GND, Thermal
J_ CPU1 K J_ CPU1 L
B4 2 AV23 AN7 AB40

VSS VSS VSS VSS
B3 7 VSS VSS AV22 AN3 VSS VSS AB37
B2 AV20 AM39 AB7
A4 1 VSS VSS AV17 AM37 VSS VSS AB4
A3 9 VSS VSS AV14 AM35 VSS VSS AA39
A3 5 VSS VSS AV11 AM32 VSS VSS AA38
A6 VSS VSS AV4 AM29 VSS VSS AA34
A4 VSS VSS AU4 3 AM26 VSS VSS AA9
C5 VSS VSS AU3 6 AM23 VSS VSS AA3
E6 VSS VSS AU3 5 AM22 VSS VSS Y 41
E1 VSS VSS AU3 2 AM20 VSS VSS Y 36
D4 3 VSS VSS AU2 9 AM17 VSS VSS Y 33
D3 8 VSS VSS AU2 6 AM14 VSS VSS Y 11
D3 3 VSS VSS AU2 3 AM11 VSS VSS Y6
D8 VSS VSS AU2 2 AM9 VSS VSS Y1
D3 VSS VSS AU2 0 AM5 VSS VSS W 43
C4 3 VSS VSS AU1 7 AL 42 VSS VSS W 38
C4 0 VSS VSS AU1 4 AL 37 VSS VSS W8
VSS VSS VSS VSS
C3 5 AU1 1 AL 36 W3
VSS VSS VSS VSS
E3 6 AU5 AL 35 V40
E4 1 VSS VSS AU1 AL 32 VSS VSS V35
VSS VSS VSS VSS
F4 AT41 AL 29 V10
F9
F2 9
F3 4
VSS
VSS
VSS
VSS
VSS
VSS
AT38
AT35
AT32
AL 26
AL 23
AL 22
VSS
VSS
VSS
VSS
VSS
VSS
V5
U 42
U 37
Sheet 6 of 47
F3 9 VSS VSS AT29 AL 20 VSS VSS U7
G2
G7
G1 2
VSS
VSS
VSS
VSS
VSS
VSS
AT26
AT23
AT22
AL 17
AL 14
AL 11
VSS
VSS
VSS
VSS
VSS
VSS
U2
T39
T34
LGA1366 Part E
VSS VSS VSS VSS
G3 2
G3 7
G4 2
H5
VSS
VSS
VSS
VSS
VSS
VSS
AT20
AT17
AT14
AT11
AL7
AL2
AL1
AK43
VSS
VSS
VSS
VSS
VSS
VSS
T9
T4
R 41
R 36
GND, Thermal
H1 0 VSS VSS AT8 AK39 VSS VSS R6
VSS VSS VSS VSS
H3 0 AT7 AK34 R1
VSS VSS VSS VSS
H3 5 VSS VSS AR3 9 AK32 VSS VSS P43
BA3 9 AR3 5 AK29 P38
VSS VSS VSS VSS
BA3 5 AR3 2 AK26 P33
BA2 9 VSS VSS AR2 9 AK23 VSS VSS P11
VSS VSS VSS VSS
BA2 6 AR2 6 AK22 P8
VSS VSS VSS VSS
BA2 0
BA1 7
BA1 4
BA1 1
VSS
VSS
VSS
VSS
VSS
VSS
AR2 3
AR2 2
AR2 0
AR1 7
AK20
AK17
AK14
AK10
VSS
VSS
VSS
VSS
VSS
VSS
P3
N 40
N 35
N 10
Place near to the CPU
BA5 VSS VSS AR1 4 AK9 VSS VSS N5
BA3 VSS VSS AR1 1 AK3 VSS VSS M42
AY4 2
AY3 7
AY3 2
AY2 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AR3
AR2
AP43
AP37
AJ 41
AJ 36
AJ 34
AJ5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M37
M32
M30
M28
3V
20M IL Thermal IC
AY2 6 VSS VSS AP36 AH 39 VSS VSS M26
AY2 3 VSS VSS AP35 AH 37 VSS VSS M24 R 25 4 C4 30
AY2 2 VSS VSS AP32 AH 34 VSS VSS M22
AY2 0 VSS VSS AP29 AH7 VSS VSS M20 *100K_ 04 .1U_1 0V_X7R_04
AY1 7 VSS VSS AP26 AH1 VSS VSS M18 R2 55 *10 K_ 04
VSS VSS VSS VSS 3V
AY1 4 AP23 AG 43 M16
AY1 1 VSS VSS AP22 AG 33 VSS VSS M14 U16
VSS VSS VSS VSS THERM_ALERT# 28
AY 7 AP20 AG 11 M12 1 4
AY 2 VSS VSS AP17 AG9 VSS VSS M7 H_THERMDA 2 VDD THERM 6 R2 53 *0_ 04
VSS VSS VSS VSS D+ AL ERT
AW3 5 VSS VSS AP14 AG3 VSS VSS M2
AW3 2 AP11 AF41 L39 C4 31 ALERT
VSS VSS VSS VSS ALERT 28
AW2 9 AP10 AF38 L34 10 00P_ 50V_X7R _04
AW2 6 VSS VSS AP6 AF35 VSS VSS L29 3 7 SMD_C PU _THERM
VSS VSS VSS VSS D- SDATA SMD_ CPU_ THER M 28
AW2 3 AP5 AF5 L9 H_THERMDC 5 8 SMC_C PU _THERM
VSS VSS VSS VSS GN D SCL K SMC_ CPU_ THER M 28
AW2 2 VSS VSS AP1 AE39 VSS VSS L4
AW2 0 AN4 1 AE7 K41 EMC1 402
VSS VSS VSS VSS
AW1 7 AN3 7 AE2 K36
AW1 4 VSS VSS AN3 5 AD 43 VSS VSS K31
VSS VSS VSS VSS
AW1 1 AN3 2 AD 41 K11 Layout Note: Layout Note:
VSS VSS VSS VSS
AW 8 AN2 9 AD 33 K6
AW 6 VSS VSS AN2 6 AD 11 VSS VSS K1
VSS VSS VSS VSS Route H_THERMDA and Close to Thermal IC
AW 1 AN2 3 AD 37 J 43 H_THERMDC on same layer.
VSS VSS VSS VSS
AV4 1 VSS VSS AN2 2 AC 36 VSS VSS J 38 ADM1032 1000p
AV3 9 AN2 0 AC9 J 33 10 mil trace on 10 mil spacing. F75383M 2200p
VSS VSS VSS VSS
AV3 2 AN1 7 AC5 J 13
AV2 9 VSS VSS AN1 4 AC2 VSS VSS J8
VSS VSS VSS VSS
AV2 6 AN1 1 AB42 J3 H_ THERMDA
VSS VSS VSS VSS 12 H _TH ERMD A
LGA136 6 AC7 VSS LGA13 66 VSS H 40 12 H _TH ERMD C H_ THERMDC
11 OF 12
12 OF 1 2
12, 13, 15. .1 7, 20, 24,26 ,2 9.. 32 ,40,4 1,4 3 3V
LGA1366 Part E GND, Thermal B - 7

Schematic Diagrams
DDR3 Channel A SO-DIMM_0
ChannelA JD IMM1A J DI MM1B

ChannelA
M_ MAA_A0 98 A0 DQ0 5 M_D ATA_A0
M_ MAA_A1 97 A1 DQ1 7 M_D ATA_A1
SO-DIMM0 M_ MAA_A2
M_ MAA_A3
M_ MAA_A4
96
95
92
A2
A3
A4
DQ2
DQ3
DQ4
15
17
4
M_D ATA_A2
M_D ATA_A3
M_D ATA_A4
1.5V
75 VDD1 VSS16 44
M_DATA_A[63: 0] M_DATA_ A[63:0] 2
M_ MAA_A5 91 6 M_D ATA_A5 76 48 M _C B_E CC _A[ 7: 0]

M_ MAA_A6 90 A5 DQ5 16 M_D ATA_A6 81 VDD2 VSS17 49
A6 DQ6 VDD3 VSS18
Layout Note: M_ MAA_A8 89 A8 DQ8 21 M_D ATA_A8 87 VDD5 VSS20 55 M_DQS_A_D P[7: 0] M_DQS_A_DP[ 7: 0] 2
CLK0/space/CLK_1 M_ MAA_A10 107 A10/AP DQ1 0 33 M_D ATA_A10 93 VDD7 VSS22 61
M_ MAA_A11 84 35 M_D ATA_A11 3VS VD DSPDA 94 65 M_DQS_A_D N[ 7:0]
M_ MAA_A12 83 A11 DQ1 1 22 M_D ATA_A12 99 VDD8 VSS23 66 M_DQS_A_DN [7:0] 2
MS:8.5 / 5 / 8.5 A12/BC # DQ1 2 NC3 VDD9 VSS24
SL: 4 / 4 / 4 M_ MAA_A13 119 24 M_D ATA_A13 10 0 71
M_ MAA_A14 80 A13 DQ1 3 34 M_D ATA_A14 10 5 VDD1 0 VSS25 72
M_ MAA_A15 78 A14 DQ1 4 36 M_D ATA_A15 10 6 VDD1 1 VSS26 127
A15 DQ1 5 39 M_D ATA_A16 11 1 VDD1 2 VSS27 128 M_MAA_A[ 15:0]
M_ SBS_A0 109 DQ1 6 41 M_D ATA_A17 NC_04 11 2 VDD1 3 VSS28 133 M_MAA_A[15:0] 3
M_ SBS_A1 108 BA0 DQ1 7 51 M_D ATA_A18 11 7 VDD1 4 VSS29 134
M_ SBS_A2 79 BA1 DQ1 8 53 M_D ATA_A19 11 8 VDD1 5 VSS30 138 M_SBS_A[2 :0 ]
D IM0 C HA C HB C HC BA2 DQ1 9 VDD1 6 VSS31 M_SBS_A[ 2:0 ] 3
M_ SCS_A_N0 114 S0# DQ2 0 40 M_D ATA_A20 12 3 VDD1 7 VSS32 139
M_ SCS_A_N1 121 42 M_D ATA_A21 VD DSPDA 12 4 144
DQ2 1
S A0 Low Lo w Hi gh CK_M_C H0_0_ DP 101 S1# 50 M_D ATA_A22 20 mil s tra ce VDD1 8 VSS33 145 M_SCKE_A[ 1: 0]
CK_M_C H0_0_ DN 103 C K0 DQ2 2 52 M_D ATA_A23 19 9 VSS34 150 M_SC KE_A[1: 0] 3
C K0 # DQ2 3 VDDSPD VSS35
CK_M_C H0_1_ DP 102 C K1 DQ2 4 57 M_D ATA_A24 VSS36 151
S A1 Low Hig h L ow CK_M_C H0_1_ DN 104 59 M_D ATA_A25 C449 C 448 Z070 1 77 155 M_OD T_A[ 1: 0]
C K1 # DQ2 5 Z070 2 NC 1 VSS37 M_ODT_A[1:0] 3
M_ SCKE_A0 73 C KE0 DQ2 6 67 M_D ATA_A26 12 2 NC 2 VSS38 156
M_ SCKE_A1 74 69 M_D ATA_A27 Z070 3 12 5 161
C KE1 DQ2 7 .1 U_1 0V_ X7R _04 NC TEST VSS39
M_ CAS_A_N 115 C AS# DQ2 8 56 M_D ATA_A28 2.2U_16V_X5R _06 VSS40 162
M_ RAS_A_N 110 R AS# DQ2 9 58 M_D ATA_A29 PM_EXTTS_DD R# 19 8 EVEN T# VSS41 167
M_ WE_A_N 113 68 M_D ATA_A30 DD R0_DRAMRST 30 168
Sheet 7 of 47 SA0_DIM0
SA1_DIM0
SCLK
197
201
202
W E#
SA0
SA1
DQ3 0
DQ3 1
DQ3 2
70
129
131
M_D ATA_A31
M_D ATA_A32
M_D ATA_A33 1
RESET# VSS42
VSS43
VSS44
172
173
178
C K_M_CH0 _0_DP
C K_M_CH0 _0_DN
CK_M_CH 0_0_D P 3
CK_M_CH 0_0_D N 3
SCL DQ3 3 VREF_D Q VSS45
SDATA 200 141 M_D ATA_A34 D IMM_C A_VREF_A 12 6 179 C K_M_CH0 _1_DP
DDR3 Channel A R46
10K_04
R45
10K_04
M_ OD T_A0
M_ OD T_A1
116
120
SDA
ODT0
DQ3 4
DQ3 5
DQ3 6
143
130
132
M_D ATA_A35
M_D ATA_A36
M_D ATA_A37 2
VREF_C A VSS46
VSS47
VSS48
184
185
189
C K_M_CH0 _1_DN CK_M_CH 0_1_D P 3
CK_M_CH 0_1_D N 3
ODT1 DQ3 7 VSS1 VSS49
SO-DIMM_0 R43
R50
R49
0_04
0_04
0_04
Z0704
Z0705
Z0706
11
28
46
D M0
D M1
DQ3 8
DQ3 9
DQ4 0
140
142
147
149
M_D ATA_A38
M_D ATA_A39
M_D ATA_A40
M_D ATA_A41
3
8
9
13
VSS2
VSS3
VSS4
VSS50
VSS51
VSS52
190
195
196
M_RAS_A_N
M_CAS_A_N
M_WE_ A_N
M_R AS_A_N 3
M_C AS_A_N 3
R48 0_04 Z0707 63 D M2 DQ4 1 157 M_D ATA_A42 14 VSS5 M_W E_A_N 3
R52 0_04 Z0708 136 D M3 DQ4 2 159 M_D ATA_A43 19 VSS6
R44 0_04 Z0709 153 D M4 DQ4 3 146 M_D ATA_A44 20 VSS7 0. 75V
R51 0_04 Z0710 170 D M5 DQ4 4 148 M_D ATA_A45 25 VSS8 M_SCS_A_N0
R47 0_04 Z0711 187 D M6 DQ4 5 158 M_D ATA_A46 26 VSS9 203 M_SCS_A_N1 M_SC S_A_N0 3
D M7 DQ4 6 VSS10 VTT1 M_SC S_A_N1 3
160 M_D ATA_A47 31 204
M_ DQS_ A_DP0 12 DQ4 7 163 M_D ATA_A48 32 VSS11 VTT2
M_ DQS _A _DP 8 M_ DQS_ A_DP1 29 D QS0 DQ4 8 165 M_D ATA_A49 37 VSS12 GND 1
M_ DQS _A _DN 8 M_ DQS_ A_DP2 47 D QS1 DQ4 9 175 M_D ATA_A50 38 VSS13 G1 GND 2
M_ DQS_ A_DP3 64 D QS2 DQ5 0 177 M_D ATA_A51 43 VSS14 G2 D DR0_D RAMR ST
X5 8 ? ? ? ? M_ DQS_ A_DP4 137 D QS3 DQ5 1 164 M_D ATA_A52 VSS15 PM_EXTTS_D DR# DDR 0_D RAMR ST 3
D QS4 DQ5 2 PM_EXTTS_DD R# 8 ,9
? ? ? E CC ? ? , M_ DQS_ A_DP5 154 166 M_D ATA_A53 D DR 3_SODIMM0_204P
? ? DM ? ? ? ? ? O K M_ DQS_ A_DP6 171 D QS5 DQ5 3 174 M_D ATA_A54
M_ DQS_ A_DP7 188 D QS6 DQ5 4 176 M_D ATA_A55
D QS7 DQ5 5 181 M_D ATA_A56 SC LK
M_ DQS_ A_DN 0 10 DQ5 6 183 M_D ATA_A57 SD ATA SC LK 8, 9, 12, 16 ,18,19,3 2
M_ DQS_ A_DN 1 27 D QS0# DQ5 7 191 M_D ATA_A58 SDATA 8,9, 12 ,1 6,18, 19, 32
M_ DQS_ A_DN 2 45 D QS1# DQ5 8 193 M_D ATA_A59
M_ DQS_ A_DN 7 186 D QS6# DQ6 3
D QS7#
DD R3_ SODI MM0 _2 04P
1.5V
R41
15m il s t rac e Fro m pow er 0. 75 V
1 K_1%_0 4 34m il s s pac in g
0 .75V
D IMM_C A_VREF_A
R42 C54
C1 05 C 84 C106 C91
1 K_1%_0 4 . 1U_10V_ X7R_04
4. 7U_6. 3V_0 6 4.7U_6.3V_06 .1U _1 0V_X7R_04
. 1U_ 10V_X7R_04
CLOSE TO SO-DIMM_0
8,9,40 0. 75V
4,5 ,8,9,40,43 1. 5V
8,9,12,13, 15. .30, 32, 39,41,43 3VS
1.5V
+ C475 C71 C 73 C471 C86 C470 C 472 C468 C46 7 C 452 C77 C 88 C7 5
100U _6.3V_B 1 0U_ 10V_08 10U_10V_08 10U_10 V_ 08 10U_10V_08 10U_10V_08 *1 0u_10 V_0 8 . 1U_ 10V_X7R_04.1U_10V_X7R _04. 1U _10V_X7 R_04.1 U_10V_ X7R _0 4 1 U_6 .3 V_04 .01U_16V_X7 R_04
B - 8 DDR3 Channel A SO-DIMM_0

Schematic Diagrams
DDR3 Channel B SO-DIMM_1
ChannelB JD IMM2A JDI MM2B

ChannelB
M_MAA_B0 98 A0 DQ0 5 M_D ATA_B0
M_MAA_B1 97 A1 DQ1 7 M_D ATA_B1
SO-DIMM1 M_MAA_B2
M_MAA_B3
M_MAA_B4
96
95
92
A2
A3
A4
DQ2
DQ3
DQ4
15
17
4
M_D ATA_B2
M_D ATA_B3
M_D ATA_B4
1.5V
75
VDD1 VSS16
44
M_DATA_B[6 3: 0] M_ DATA_B[63 :0] 2
M_MAA_B5 91 6 M_D ATA_B5 76 48 M _C B_E CC _B[ 7: 0]

M_MAA_B6 90 A5 DQ5 16 M_D ATA_B6 81 VDD2 VSS17 49
A7 DQ7 VDD4 VSS19
Layout Note: M_MAA_B8 89 A8 DQ8 21 M_D ATA_B8 87 VDD5 VSS20 55 M_DQS_B_D P[7: 0] M_ DQS_ B_DP[ 7: 0] 2
CLK0/space/CLK_1 M_MAA_B1 0 107 33 M_D ATA_B10 3VS VDDSPD B 93 61
A10/AP DQ10 VDD7 VSS22
M_MAA_B1 1 84 A11 DQ11 35 M_D ATA_B11 94 VDD8 VSS23 65 M_DQS_B_D N[ 7:0] M_ DQS_ B_DN [7:0] 2
MS:8.5 / 5 / 8.5 M_MAA_B1 2 83 22 M_D ATA_B12 NC 1 99 66
M_MAA_B1 3 119 A12/BC # DQ12 24 M_D ATA_B13 100 VDD9 VSS24 71
SL: 4 / 4 / 4 A13 DQ13 VDD10 VSS25
M_MAA_B1 4 80 34 M_D ATA_B14 105 72
M_MAA_ B15 78 A14 DQ14 36 M_D ATA_B15 106 VDD11 VSS26 127
A15 DQ15 VDD12 VSS27
DQ16 39 M_D ATA_B16 NC _04 111 VDD13 VSS28 128 M_MAA_B[ 15 :0] M_MAA_ B[1 5:0 ] 3
M_SBS_ B0 109 BA0 DQ17 41 M_D ATA_B17 112 VDD14 VSS29 133
M_SBS_ B1 108 BA1 DQ18 51 M_D ATA_B18 117 VDD15 VSS30 134
M_SBS_ B2 79 53 M_D ATA_B19 118 138 M_SBS_B[2:0 ]
M_SCS_B_ N0 114 BA2 DQ19 40 M_D ATA_B20 123 VDD16 VSS31 139 M_SBS_B[ 2:0] 3
M_SCS_B_ N1 121 S0# DQ20 42 M_D ATA_B21 VD DSPDB VDD17 VSS32
124 144
CK_ M_C H1_0_DP 101 S1# DQ21 50 M_ DATA_B22 20 mil s tra ce VDD18 VSS33 145 M_SCKE_B[ 1: 0]
D IM0 C HA C HB C HC C K0 DQ22 VSS34 M_SC KE_B[1: 0] 3
CK_ M_C H1_0_DN 103 C K0 # DQ23 52 M_ DATA_B23 199 VDDSPD VSS35 150
CK_ M_C H1_1_DP 102 C K1 DQ24 57 M_ DATA_B24 VSS36 151
S A0 Low Lo w Hi gh CK_ M_C H1_1_DN 104 59 M_ DATA_B25 C473 C4 74 Z0801 77 155 M_OD T_B[ 1: 0]
C K1 # DQ25 NC 1 VSS37 M_ODT_ B[1 :0] 3
M_SCKE_B0 73 C KE0 DQ26 67 M_ DATA_B26 Z0802 122 NC 2 VSS38 156
M_SCKE_B1 74 69 M_ DATA_B27 2. 2U _16 V_X5 R_ 06 . 1U_ 10V_X7R_04 Z0803 125 161
S A1 Low Hig h L ow M_CAS_B_ N 115 C KE1 DQ27 56 M_ DATA_B28 NC TEST VSS39 162
C AS# DQ28 VSS40
M_RAS_B_ N
M_WE_B_ N
SA0_ DIM1
SA1_ DIM1
110
113
197
201
R AS#
W E#
SA0
DQ29
DQ30
DQ31
58
68
70
12 9
M_ DATA_B29
M_ DATA_B30
M_ DATA_B31
M_ DATA_B32
PM_EXTTS_ DD R#
DD R1_DRAMRST
198
30 EVEN T#
RESET#
VSS41
VSS42
VSS43
167
168
172
173
C K_M_ CH1_0 _DP
C K_M_ CH1_0 _DN
CK_M_CH 1_0 _D P 3
Sheet 8 of 47
SA1 DQ32 VSS44 CK_M_CH 1_0 _D N 3
R276 R277
SCL K
SDATA
202
200 SCL
SDA
DQ33
DQ34
DQ35
13 1
14 1
14 3
M_ DATA_B33
M_ DATA_B34
M_ DATA_B35
DIMM_C A_VREF_B
1
126 VREF_D Q
VREF_C A
VSS45
VSS46
VSS47
178
179
184
C K_M_ CH1_1 _DP
C K_M_ CH1_1 _DN CK_M_CH 1_1 _D P 3
CK_M_CH 1_1 _D N 3
DDR3 Channel B
M_OD T_B0 116 13 0 M_ DATA_B36 185
10K_04 10K_04 M_OD T_B1
R 27 2 0 _0 4 Z0804 11
120 O DT0
O DT1
D M0
DQ36
DQ37
DQ38
DQ39
13 2
14 0
14 2
M_ DATA_B37
M_ DATA_B38
M_ DATA_B39
2
3
8
VSS1
VSS2
VSS3
VSS48
VSS49
VSS50
VSS51
189
190
195 M_RAS_B_ N M_R AS_ B_N 3
SO-DIMM_1
R 26 6 0 _0 4 Z0805 28 D M1 DQ40 14 7 M_ DATA_B40 9 VSS4 VSS52 196 M_CAS_B_ N M_C AS_ B_N 3
3VS R 26 7 0 _0 4 Z0806 46 D M2 DQ41 14 9 M_ DATA_B41 13 VSS5 M_WE_ B_N M_W E_ B_N 3
R 27 3 0 _0 4 Z0807 63 15 7 M_ DATA_B42 14
R 26 4 0 _0 4 Z0808 136 D M3 DQ42 15 9 M_ DATA_B43 19 VSS6
R 27 4 0 _0 4 Z0809 153 D M4 DQ43 14 6 M_ DATA_B44 20 VSS7 0. 75 V
R 26 5 0 _0 4 Z0810 170 D M5 DQ44 14 8 M_ DATA_B45 25 VSS8 M_SCS_B_ N0
Z0811 187 D M6 DQ45 VSS9 M_SC S_ B_N0 3
R 27 5 0 _0 4 D M7 DQ46 15 8 M_ DATA_B46 26 VSS10 VTT1 203 M_SCS_B_ N1 M_SC S_ B_N1 3
DQ47 16 0 M_ DATA_B47 31 VSS11 VTT2 204
M _DQ S_ A_D P8 M_DQS_B_DP0 12 16 3 M_ DATA_B48 32
M _DQ S_ A_D N8 D QS0 DQ48 VSS12
M_DQS_B_DP1 29 D QS1 DQ49 16 5 M_ DATA_B49 37 VSS13 G1 GND 1
M_DQS_B_DP2 47 17 5 M_ DATA_B50 38 GND 2
X 58 ? ? ? ? M_DQS_B_DP3 64 D QS2 DQ50 17 7 M_ DATA_B51 43 VSS14 G2 D DR1_D RAMR ST
? ? ? EC C? ? , M_DQS_B_DP4 137 D QS3 DQ51 16 4 M_ DATA_B52 VSS15 PM_EXTTS_D DR# DDR 1_D RAMR ST 3
M_DQS_B_DP5 154 D QS4 DQ52 16 6 M_ DATA_B53 D DR 3_SODIMM1_20 4P PM_EXTTS_DD R# 7,9
? ? D M ? ? ? ? ? OK D QS5 DQ53
M_DQS_B_DP6 171 D QS6 DQ54 17 4 M_ DATA_B54
M_DQS_B_DP7 188 D QS7 DQ55 17 6 M_ DATA_B55
DQ56 18 1 M_ DATA_B56 SC LK SC LK 7, 9, 12, 16 ,18 ,19,32
M_DQS_B_DN 0 10 18 3 M_ DATA_B57 SD ATA
M_DQS_B_DN 1 27 D QS0# DQ57 19 1 M_ DATA_B58 SDATA 7 ,9, 12,1 6,1 8, 19, 32
M_DQS_B_DN 2 45 D QS1# DQ58 19 3 M_ DATA_B59
D QS4# DQ61
M_DQS_B_DN 5 152 19 2 M_ DATA_B62
M_DQS_B_DN 6 169
D QS5#
D QS6#
DQ62
DQ63 19 4 M_ DATA_B63 Layout note:
M_DQS_B_DN 7 186 D QS7#
DD R3_SODI MM1_204P SO-DIMM_1 is placed farther from
the CPU than SO-DIMM_0
1.5V
R2 71
15m il s t rac e Fr om po wer 0 .75 V
1K_ 1%_0 4 34m il s s pac in g
0 .75 V
DI MM_ CA_VR EF_B
R2 70 C 469
C1 38 C 11 3 C1 45 C114
1K_ 1%_0 4 .1U _1 0V_X7R_ 04
4. 7U_ 6. 3V_06 4 .7U_6 .3V_06 .1U _10V_X7R_04
. 1U_10V_X7 R_04
CLOSE TO SO-DIMM_1
4, 5, 7,9 ,40,43 1. 5V
7,9 ,12, 13, 15 ..30, 32 ,39 ,41,43 3VS
1.5 V 7,9,4 0 0. 75 V
+ C1 49 C120 C 136 C117 C1 18 C14 2 C 14 0 C1 37 C141 C 115 C139 C 116 C1 19

100U _6.3V_ B . 1U_10V_X7 R_04 . 1U _10V_X7 R_ 04 1 U_6.3 V_04 .01U_ 16 V_X7R_04
10U_10V_ 08 10U_10V_ 08 10U_ 10V_08 10U_10V_ 08 10 U_10V_0 8 *1 0u_10V_0 8 .1 U_10V_X7R _04 .1 U_ 10V_X7R _0 4
DDR3 Channel B SO-DIMM_1 B - 9

Schematic Diagrams
DDR3 Channel C SO-DIMM_2
ChannelC JD IMM3A J DI MM3B

ChannelC
M_ MAA_C 0 98 A0 D Q0 5 M_ DATA_C0
M_ MAA_C 1 97 7 M_ DATA_C1
A1 D Q1
SO-DIMM2 M_ MAA_C 2
M_ MAA_C 3
M_ MAA_C 4
96
95
92
A2
A3
A4
D Q2
D Q3
D Q4
15
17
4
M_ DATA_C2
M_ DATA_C3
M_ DATA_C4
1. 5V
75 VDD1 VSS1 6 44
M_DATA_C[63: 0] M_D ATA_C [6 3:0] 2
M_ MAA_C 5 91 6 M_ DATA_C5 76 48 M_ CB_ EC C_C [7 :0]

A5 D Q5 VDD2 VSS1 7
M_ MAA_C 6 90 A6 D Q6 16 M_ DATA_C6 81 VDD3 VSS1 8 49
M_ MAA_C 7 86 A7 D Q7 18 M_ DATA_C7 82 VDD4 VSS1 9 54
Layout Note: M_ MAA_C 8 89 A8 D Q8 21 M_ DATA_C8 87 VDD5 VSS2 0 55 M_DQS_C_D P[7: 0] M_D QS_C _D P[ 7: 0] 2
M_ MAA_C 9 85 23 M_ DATA_C9 3VS VD DSPDC 88 60
M_ MAA_C 10 1 07 A9 D Q9 33 M_ DATA_C10 93 VDD6 VSS2 1 61
CLK0/space/CLK_1 A10/ AP DQ10 VDD7 VSS2 2
M_ MAA_C 11 84 35 M_ DATA_C11 NC2 94 65 M_DQS_C_D N[ 7:0 ]
M_ MAA_C 12 83 A11 DQ11 22 M_ DATA_C12 99 VDD8 VSS2 3 66 M_D QS_C _D N[7:0] 2
MS:8.5 / 5 / 8.5 A12/ BC # DQ12 VDD9 VSS2 4
SL: 4 / 4 / 4 M_ MAA_C 13 1 19 A13 DQ13 24 M_ DATA_C13 100 VDD1 0 VSS2 5 71
M_ MAA_C 14 80 A14 DQ14 34 M_ DATA_C14 105 VDD1 1 VSS2 6 72
M_ MAA_C 15 78 A15 DQ15 36 M_ DATA_C15 NC_ 04 106 VDD1 2 VSS2 7 12 7
DQ16 39 M_ DATA_C16 111 VDD1 3 VSS2 8 12 8 M_MAA_C[ 15:0] M_MAA_C [15: 0] 3
M_ SBS_C0 1 09 41 M_ DATA_C17 112 13 3
M_ SBS_C1 1 08 BA0 DQ17 51 M_ DATA_C18 117 VDD1 4 VSS2 9 13 4
M_ SBS_C2 79 BA1 DQ18 53 M_ DATA_C19 118 VDD1 5 VSS3 0 13 8 M_SBS_ C[2:0]
BA2 DQ19 VDD1 6 VSS3 1 M_SBS_C[ 2: 0] 3
M_ SCS_C _N 0 1 14 S0# DQ20 40 M_ DATA_C20 123 VDD1 7 VSS3 2 13 9

M_ SCS_C _N 1 1 21 42 M_ DATA_C21 VDD SPD C 124 14 4
S1# DQ21 2 0m ils t rac e VDD1 8 VSS3 3
D IM 0 C HA CHB CHC 3VS CK_M_ CH2 _0_DP 1 01 C K0 DQ22 50 M_ DATA_C22 VSS3 4 14 5 M_SC KE_C[ 1: 0] M_SCKE_C [1:0] 3
CK_M_ CH2 _0_DN 1 03 C K0# DQ23 52 M_ DATA_C23 199 VDDSPD VSS3 5 15 0
CK_M_ CH2 _1_DP 1 02 C K1 DQ24 57 M_ DATA_C24 VSS3 6 15 1
S A0 Low Lo w H igh CK_M_ CH2 _1_DN 1 04 59 M_ DATA_C25 C 146 C148 Z0 901 77 15 5 M_ODT_C[ 1: 0]
M_ SCKE_C 0 73 C K1# DQ25 67 M_ DATA_C26 Z0 902 122 NC 1 VSS3 7 15 6 M_OD T_C [1:0] 3
R 28 4 R 285 M_ SCKE_C 1 74 C KE0 DQ26 69 M_ DATA_C27 2. 2U _16 V_X5R_06 Z0 903 125 NC 2 VSS3 8 16 1
S A1 Low Hig h Low M_ CAS_C _N 1 15 C KE1 DQ27 56 M_ DATA_C28 .1U _1 0V_X7R _04 NC TEST VSS3 9 16 2
Sheet 9 of 47 10K_0 4 *10K_0 4 M_ RAS_C _N

M_ WE_C_N
SA0_ DI M2
1 10
1 13
1 97
C AS#
R AS#
W E#
DQ28
DQ29
DQ30
58
68
70
M_ DATA_C29
M_ DATA_C30
M_ DATA_C31
PM_EXTTS_DD R#
DDR 2_DRAMRST
198
30 EVENT#
RESET#
VSS4 0
VSS4 1
VSS4 2
16 7
16 8
17 2 CK_M_C H2_0_DP C K_ M_CH2_0_DP 3
SA1_ DI M2 2 01 SA0 DQ31 129 M_ DATA_C32 VSS4 3 17 3 CK_M_C H2_0_DN
DDR3 Channel C R 28 9 R 290
SCLK
SDATA
2 02
2 00
SA1
SC L
SD A
DQ32
DQ33
DQ34
131
141
143
M_ DATA_C33
M_ DATA_C34
M_ DATA_C35
DI MM_CA_VREF_C
1
126 VREF_D Q
VREF_C A
VSS4 4
VSS4 5
VSS4 6
17 8
17 9
18 4
CK_M_C H2_1_DP
CK_M_C H2_1_DN
C K_ M_CH2_0_DN 3
C K_ M_CH2_1_DP 3
C K_ M_CH2_1_DN 3
*10K_04 10K_04 M_ OD T_C 0 1 16 DQ35 130 M_ DATA_C36 VSS4 7 18 5
SO-DIMM_2 M_ OD T_C 1
R 291 0_04
1 20
Z09 04 11
ODT0
ODT1
DQ36
DQ37
DQ38
132
140
142
M_ DATA_C37
M_ DATA_C38
M_ DATA_C39
2
3
8
VSS1
VSS2
VSS4 8
VSS4 9
VSS5 0
18 9
19 0
19 5 M_RAS_C_N
D M0 DQ39 VSS3 VSS5 1 M_RAS_C _N 3
R 279 0_04 Z09 05 28 147 M_ DATA_C40 9 19 6 M_CAS_C_N M_CAS_C _N 3
R 280 0_04 Z09 06 46 D M1 DQ40 149 M_ DATA_C41 13 VSS4 VSS5 2 M_WE_C _N
R 286 0_04 Z09 07 63 D M2 DQ41 157 M_ DATA_C42 14 VSS5 M_WE_C_N 3
R 281 0_04 Z09 08 1 36 D M3 DQ42 159 M_ DATA_C43 19 VSS6
R 287 0_04 Z09 09 1 53 D M4 DQ43 146 M_ DATA_C44 20 VSS7 0.75V
R 282 0_04 Z09 10 1 70 D M5 DQ44 148 M_ DATA_C45 25 VSS8 M_SC S_C_N0
R 288 0_04 Z09 11 1 87 D M6 DQ45 158 M_ DATA_C46 26 VSS9 20 3 M_SC S_C_N1 M_SCS_C _N 0 3
D M7 DQ46 VSS10 VTT1 M_SCS_C _N 1 3
160 M_ DATA_C47 31 20 4
M_ DQS_C_ DP0 12 DQ47 163 M_ DATA_C48 32 VSS11 VTT2
M_ DQS_C_ DP1 29 D QS0 DQ48 165 M_ DATA_C49 37 VSS12 GND 1
M_ DQS_C_ DP2 47 D QS1 DQ49 175 M_ DATA_C50 38 VSS13 G1 GND 2
M_ DQS_C_ DP3 64 D QS2 DQ50 177 M_ DATA_C51 43 VSS14 G2 DD R2_DRAMRST
M_ DQS_C_ DP4 1 37 D QS3 DQ51 164 M_ DATA_C52 VSS15 PM_EXTTS_DD R# D DR2_DR AMRST 3
M_ DQ S_ A_D P8 M_ DQS_C_ DP5 1 54 D QS4 DQ52 166 M_ DATA_C53 D DR 3_SODIMM2_204P PM_EXTTS_DDR # 7, 8
M_ DQ S_ A_D N8 M_ DQS_C_ DP6 1 71 D QS5 DQ53 174 M_ DATA_C54
M_ DQS_C_ DP7 1 88 D QS6 DQ54 176 M_ DATA_C55
X 58 ? ? ? ? D QS7 DQ55 181 M_ DATA_C56 SCLK
M_ DQS_C_ DN0 10 DQ56 183 M_ DATA_C57 SDATA SCL K 7,8 ,1 2,16, 18,19 ,3 2
? ? ? EC C? ? , SDATA 7, 8, 12, 16,18,1 9, 32
? ? D M ? ? ? ? ? OK M_ DQS_C_ DN1 27 D QS0# DQ57 191 M_ DATA_C58
M_ DQS_C_ DN2 45 D QS1# DQ58 193 M_ DATA_C59
M_ DQS_C_ DN3 62 D QS2# DQ59 180 M_ DATA_C60
M_ DQS_C_ DN4 1 35 D QS3# DQ60 182 M_ DATA_C61
M_ DQS_C_ DN5 1 52 D QS4#
D QS5#
DQ61
DQ62
192 M_ DATA_C62 Layout note:
M_ DQS_C_ DN6 1 69 194 M_ DATA_C63
M_ DQS_C_ DN7 1 86 D QS6# DQ63
D QS7# SO-DIMM_2 is placed farther from
DD R3 _SOD IMM2_204P
the CPU than SO-DIMM_1
1.5V
R293
1 5m ils t rac e Fr om po we r 0 .7 5V
1K_ 1%_04 3 4m ils s pac in g
0.75V
DI MM_CA_VR EF_C
R292 C 502
C59 C81 C 60 C8 5
1K_ 1%_04 . 1U _10V_X7R_04
4. 7U _6. 3V_06 4. 7U_ 6. 3V_06 .1U_ 10V_X7R_04
.1U _10V_X7R_ 04
CLOSE TO SO-DIMM_2
7, 8,40 0. 75 V
4, 5,7,8,40,43 1. 5V
7,8,12,13, 15. .3 0, 32, 39,41,43 3VS
1. 5V
+ C 76 C 78 C79 C56 C 55 C74 C58 C 87 C57

C10 7
100U_6. 3V_B 10U _10V_08 10U_ 10V_08 1 0u_10V_ 08 .1U_ 10V_X7R _04 . 1U_10V_X7 R_04 1U_6.3V_04 . 01U _16V_X7R_04
.1U _10V_X7R _04 .1 U_10V_X7R _0 4
B - 10 DDR3 Channel C SO-DIMM_2

Schematic Diagrams
X58 QPI Interface
U 18- 1
TYL ER SBURG U1 8-2 V_ 1P1_CSI
R EV=1 .6 TYLERSBURG
QPI BUS Exter nal Connection CSI0_ CLKRX_ DN AC 1 L5 CSI0 _CLKTX_DN A11 R EV=1 .6 E23
CSI0_ CLKRX_ DP AB1 Q PI 0TNC LK_0 QPI 0RNCL K_ 0 K5 CSI0 _CLKTX_DP A12 RSVD VSS E24
Q PI 0TPCLK_ 0 QPI0RPCL K_ 0 RSVD VCCAQPI 0_2
D11 B23
RSVD RSVD
CSI0 _DRX_ DN[ 19:0 ] CSI0_ DRX_ DN0 AG 6 K8 CSI0 _DTX_DN0 D12 B24
4 CSI0_ DRX_ DN[1 9:0 ] Q PI 0TND AT_0 QPI 0RNDAT_ 0 RSVD RSVD
CSI0_ DRX_ DN1 AG 5 J7 CSI0 _DTX_DN1
CSI0 _DRX_ DP[19 :0] CSI0_ DRX_ DN2 AJ 4 Q PI 0TND AT_1 QPI 0RNDAT_ 1 H6 CSI0 _DTX_DN2 F7 H24
4 CSI0_ DRX_ DP[19: 0] Q PI 0TND AT_2 QPI 0RNDAT_ 2 RSVD VSS
CSI0_ DRX_ DN3 AG 3 G5 CSI0 _DTX_DN3 E7 G25
Q PI 0TND AT_3 QPI 0RNDAT_ 3 RSVD VSS
CSI0_ DRX_ DN4 AJ 1 J4 CSI0 _DTX_DN4 D5 F26
CSI0 _DTX_DN[ 19: 0] CSI0_ DRX_ DN5 AH 2 G4 CSI0 _DTX_DN5 C7 E27
4 CSI0_ DTX_ DN[ 19:0 ] Q PI 0TND AT_5 QPI 0RNDAT_ 5 RSVD VSS
CSI0_ DRX_ DN6 AF4 G1 CSI0 _DTX_DN6 A5 D25
CSI0 _DTX_DP[19 :0] CSI0_ DRX_ DN7 AF1 Q PI 0TND AT_6 QPI 0RNDAT_ 6 H2 CSI0 _DTX_DN7 B6 RSVD VSS D27
4 CSI0_ DTX_ DP[19 :0] Q PI 0TND AT_7 QPI 0RNDAT_ 7 RSVD VSS
CSI0_ DRX_ DN8 AE2 J3 CSI0 _DTX_DN8 D8 A27
CSI0_ DRX_ DN9 AD 3 Q PI 0TND AT_8 QPI 0RNDAT_ 8 K1 CSI0 _DTX_DN9 A8 RSVD VSS B26
CSI 0_C LKRX_D N CSI0_ DRX_ DN10 AA2 N1 CSI0 _DTX_DN1 0 B9 C25
4 CSI0_ CLKRX_ DN Q PI 0TND AT_10 QPI0 RNDAT_1 0 RSVD VSS
CSI 0_C LKRX_D P CSI0_ DRX_ DN11 Y1 L3 CSI0 _DTX_DN1 1 C10 A24
4 CSI0_ CLKRX_ DP CSI0_ DRX_ DN12 W2 Q PI 0TND AT_11 QPI0 RNDAT_1 1 N2 CSI0 _DTX_DN1 2 B13 RSVD VSS A21
CSI 0_C LKTX_D N CSI0_ DRX_ DN13 Y3 Q PI 0TND AT_12 QPI0 RNDAT_1 2 T1 CSI0 _DTX_DN1 3 A14 RSVD VSS C23
4 CSI0_ CLKTX_ DN Q PI 0TND AT_13 QPI0 RNDAT_1 3 RSVD VSS
CSI 0_C LKTX_D P CSI0_ DRX_ DN14 W4 P3 CSI0 _DTX_DN1 4 B15 B21
4 CSI0_ CLKTX_ DP Q PI 0TND AT_14 QPI0 RNDAT_1 4 RSVD VSS
CSI0_ DRX_ DN15 W5 R4 CSI0 _DTX_DN1 5 C14 A18
Q PI 0TND AT_15 QPI0 RNDAT_1 5 RSVD VSS
CSI0_ DRX_ DN16 W8 T5 CSI0 _DTX_DN1 6 D15 C20
19 CK_13 3M_I OH_D N CK_ 133 M_IO H_DN CSI0_ DRX_ DN17 W7 P5 CSI0 _DTX_DN1 7 E15 D19
CK_ 133 M_IO H_DP CSI0_ DRX_ DN18 Y6 Q PI 0TND AT_17 QPI0 RNDAT_1 7 R7 CSI0 _DTX_DN1 8 H15 RSVD VSS E18
19 CK_13 3M_I OH_D P Q PI 0TND AT_18 QPI0 RNDAT_1 8 RSVD VSS
CSI0_ DRX_ DN19 AA5 P6 CSI0 _DTX_DN1 9 G15 E20
F14 G19
RSVD VSS
CSI0_ DRX_ DP0 AF6 L8 CSI0 _DTX_DP0 E13 F20
Q PI 0TPDAT_ 0 QPI0RPDAT_ 0 RSVD VSS
CSI0_ DRX_ DP1 AH 5 K7 CSI0 _DTX_DP1 F8 H23
Form I CH10 CSI0_ DRX_ DP2 AH 4 Q PI 0TPDAT_ 1 QPI0RPDAT_ 1 J6 CSI0 _DTX_DP2 E6 RSVD VCCAQPI 0_2 G24
16
16
IC H_GP12
IC H_GP8
ICH_ GP1 2
ICH_ GP8
CSI0_ DRX_ DP3
CSI0_ DRX_ DP4
CSI0_ DRX_ DP5
AF3
AH 1
AG 2
Q PI 0TPDAT_ 2
Q PI 0TPDAT_ 3
Q PI 0TPDAT_ 4
Q PI 0TPDAT_ 5
QPI0RPDAT_ 2
QPI0RPDAT_ 3
QPI0RPDAT_ 4
QPI0RPDAT_ 5
H5
K4
F4
CSI0 _DTX_DP3
CSI0 _DTX_DP4
CSI0 _DTX_DP5
D6
C8
A6
RSVD
RSVD
RSVD
RSVD
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
F25
E26
D24
C1 08 Sheet 10 of 47
CSI0_ DRX_ DP6 AE4 F1 CSI0 _DTX_DP6 B7 D28 10 U_6. 3V_X5 R_08
16, 28, 32, 43 SU SB#
SUSB# CSI0_ DRX_ DP7
CSI0_ DRX_ DP8
CSI0_ DRX_ DP9
AE1
AD 2
AC 3
Q PI 0TPDAT_ 6
Q PI 0TPDAT_ 7
Q PI 0TPDAT_ 8
Q PI 0TPDAT_ 9
QPI0RPDAT_ 6
QPI0RPDAT_ 7
QPI0RPDAT_ 8
QPI0RPDAT_ 9
G2
H3
J1
CSI0 _DTX_DP7
CSI0 _DTX_DP8
CSI0 _DTX_DP9
D9
A9
B10
RSVD
RSVD
RSVD
RSVD
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
VCCAQPI 0_2
A28
B27
C26
X58 QPI Interface
CSI0_ DRX_ DP10 AB2 M1 CSI0 _DTX_DP10 C11 A25
Q PI 0TPDAT_ 10 Q PI 0RPDAT_1 0 RSVD VCCAQPI 0_2
CSI0_ DRX_ DP11 W1 M3 CSI0 _DTX_DP11 B12 A22
CSI0_ DRX_ DP12 V2 Q PI 0TPDAT_ 11 Q PI 0RPDAT_1 1 P2 CSI0 _DTX_DP12 A15 RSVD VCCAQPI 0_2 C22
CSI0_ DRX_ DP13 AA3 Q PI 0TPDAT_ 12 Q PI 0RPDAT_1 2 R1 CSI0 _DTX_DP13 B16 RSVD VCCAQPI 0_2 B20
CSI0_ DRX_ DP14 Y4 Q PI 0TPDAT_ 13 Q PI 0RPDAT_1 3 R3 CSI0 _DTX_DP14 C13 RSVD VCCAQPI 0_2 A19
CSI0_ DRX_ DP15 V6 T4 CSI0 _DTX_DP15 D14 C19
CSI0_ DRX_ DP16 V8 U5 CSI0 _DTX_DP16 F16 D18
CSI0_ DRX_ DP17 Y7 Q PI 0TPDAT_ 16 Q PI 0RPDAT_1 6 N5 CSI0 _DTX_DP17 H16 RSVD VCCAQPI 0_2 E17
CSI0_ DRX_ DP18 AA6 Q PI 0TPDAT_ 17 Q PI 0RPDAT_1 7 T7 CSI0 _DTX_DP18 G14 RSVD VCCAQPI 0_2 E21
1.1 VS 1 .1VS CSI0_ DRX_ DP19 AB5 Q PI 0TPDAT_ 18 Q PI 0RPDAT_1 8 R6 CSI0 _DTX_DP19 F13 RSVD VCCAQPI 0_2 G18
E12 F19
RSVD VCCAQPI 0_2
CK_13 3M_I OH_D N AC 7 D1 V_ 1P1_CSI BG _RX
Q PI 0REFCLKN VCC AQ PI 0RXBG_ 1
CK_13 3M_I OH_D P AB7 U2 V_ 1P1_CSI BG _TX G11 A30
R94 R310 Q PI 0REFCLKP VCC AQ PI 0TXBG_ 2 G12 RSVD VCCAQPI0R XBG_2 B17
*1K_04 *1 K_ 04 AD 5 L 10 RSVD VCCAQPI0R XBG_2
V_1P1_ CSIPLL VCC AQPI 0PLL_1 QPI0 VR MVR EF0_ 1 V_1P1_ CSIBG_PN1
M11 J14 J23
QPI0 VR MVR EF1_ 1 V_ 1P1_CSI RSVD Q PI 0VRMVREF0_2 V_ 1P1_C SI BG _PN1
CSI_FREQ_ 0 AG3 5 T2 C 483 C485 R28 3 J13 H26
Q PI FR EQ SEL0 QPI0 VR MVR EF2_ 1 RSVD Q PI 0VRMVREF1_2
VRM_ EN _TBG CSISBLC_SEL CSI_FREQ_ 1 AA3 0 U3 *100 K_ 04 B18
Q PI FR EQ SEL1 QPI0 VR MVR EF3_ 1 AB10 *.1U _10 V_ X7R_ 04 E10 Q PI 0VRMVREF2_2 C17
VRM_EN_TBG Y2 9 QPI0 VR MVR EF4_ 1 *.1U_ 10V_X7R_0 4 VCCAQPI0 PL L_2 Q PI 0VRMVREF3_2 K11
VRMEN Q PI 0VRMVREF4_2
R93 R327 L2 G9
RSVD RSVD
10 0_04 100_ 04 CSISBLC_SEL AJ3 5 K2 C10 9 H10 H13
Q PI SBLC SEL RSVD RSVD RSVD
AC4 J11 H12
1: CSI PLL USES ON DIE VR Note :Che cklist CSISBL C_SEL : R53 Y9 RSVD AB4 .1 U_10 V_ X7R_ 04 G8 RSVD RSVD G21
0: inter nal 100 Ohm r es to GND CSI0_ RCOMP AA9 Q PI 0IC OMP RSVD H9 RSVD RSVD G22
Q PI 0RCO MP AA8 J10 RSVD RSVD H21
Z100 1 RSVD RSVD RSVD
21 _1%_04 AA2 9 AB8 J21
TESTL O14 RSVD RSVD
N7
R80 AF7 RSVD M7
100_ 04 AD 8 R SVD RSVD 2 OF 13
AC 9 R SVD M9
R SVD RSVD
AE7 L9
R SVD RSVD
AE8
R SVD
AD 9
R SVD
I CH_G P1 2
IC H_GP12 16
1 OF 13
Two GPIO of I CH10 Co nto rl The QPI FR EQ IC H_GP8 IC H_GP8 16
C
R 100 1 0K_04 Z100 3B Q7
E
2N 3904
L62 *HCB100 5KF- 121 T20 V_1P1_ CSIBG_PN1
C VC CA_1. 1VS
SUSB# Z1004 B Q8
1 6,2 8,32 ,43 SUSB#
R 105 1 0K_04 E2N3 904 L12 HCB16 08KF-12 1T25 _06
Z1 002 1 .1VS V_ 1P1_CSI
1 0mA L6 0
R98 R1 06 H CB1 005 KF-1 21T20_0 4
1.2 K_ 1%_04
V_1P1 _CSIBG_R X VCCA_1. 1VS
1. 2K_1%_0 4
L9
CSI _FREQ_0 CSI_FREQ_1 1 0mA H CB1 005 KF-1 21T20_0 4
V_1P1_ CSIBG_TX
R99 R1 01
1K_04 1K_0 4 C454 C10 2
11 ,13 ,43 VCCA_1 .1VS
1U_ 6.3 V_ 04 11 ..1 3,1 7,1 9,4 1,43 1 .1VS
1U_6 .3V_0 4
GP8 GP12 QPI Fr equen cy Mo de

L6 HCB10 05KF-12 1T2 0_04
VC CA_ 1.1 VS V_1P1_C SI PLL
0 0 4.80 GT/s De fault
C95 C69
0 1 5.90 GT/s
1U_ 6.3 V_ 04 10U _6. 3V_X5R _08
1 0 6.40 GT/s
X58 QPI Interface B - 11

Schematic Diagrams
X58 PCIEX16, PCIEX4, DMI
RX U18-3 TX U 18-4
TY LERSBU RG TYLER SBURG
REV =1 .6 R EV= 1. 6
PEG_RXN 0 AH24 AR28 PEG _TXN0 EXP_B_R X_D N15 AJ6 AN4 EXP_B_TX_D N15
PCIEX16_1 PEG_RXN 1 AJ23 PE7R N_0 PE7TN_0 AN27 PEG _TXN1 EXP_B_R X_D N14 AL4 PE3RN _0 PE3TN_0 AR4 EXP_B_TX_D N14
PEG_TXN[15: 0] N PEG_RXN 2 AL23 PE7R N_1 PE7TN_1 AP25 PEG _TXN2 N EXP_B_R X_D N13 AL5 PE3RN _1 PE3TN_1 AP6 EXP_B_TX_D N13
20 PEG_TXN [15: 0] PEG_RXN 3 AK24 PE7R N_2 PE7TN_2 AP23 PEG _TXN3 EXP_B_R X_D N12 AK7 PE3RN _2 PE3TN_2 AT5 EXP_B_TX_D N12
PEG_TXP[ 15:0] PEG_RXP0 AH23 PE7R N_3 PE7TN_3 AP28 PEG _TXP0 EXP_B_R X_D P15 AK6 PE3RN _3 PE3TN_3 AN5 EXP_B_TX_D P15
20 PEG_TXP[ 15:0] PEG_RXP1 AK23 PE7R P_0 PE7TP_0 AP27 PEG _TXP1 EXP_B_R X_D P14 AL3 PE3RP_0 PE3TP_0 AP4 EXP_B_TX_D P14
P PEG_RXP2 AL24 PE7R P_1 PE7TP_1
AN25 PEG _TXP2 P PE3RP_1 PE3TP_1
PE7R P_2 PE7TP_2 EXP_B_R X_D P13 AK5 PE3RP_2 PE3TP_2 AN6 EXP_B_TX_D P13
19 CK_PE_100M_I OH0_D N CK_PE_100M_I OH0_D N PEG_RXP3 AK25 PE7R P_3 PE7TP_3 AR23 PEG _TXP3 EXP_B_R X_D P12 AL7 PE3RP_3 PE3TP_3 AT4 EXP_B_TX_D P12
19 CK_PE_100M_I OH0_D P CK_PE_100M_I OH0_D P PEG_RXN 4 AM26 PE8R N_0 PE8TN_0 AN23 PEG _TXN4 EXP_B_R X_D N11 AJ7 PE4RN _0 PE4TN_0 AR5 EXP_B_TX_D N11
PEG_RXN 5 AJ26 PE8R N_1 PE8TN_1 AR25 PEG _TXN5 EXP_B_R X_D N10 AM7 PE4RN _1 PE4TN_1 AR7 EXP_B_TX_D N10
CK_PE_100M_I OH1_D N N PEG_RXN 6 AL27 AR26 PEG _TXN6 N EXP_B_R X_D N9 AL8 AP7 EXP_B_TX_D N9
19 C K_PE_100M_I OH 1_D N PEG_RXN 7 AH25 PE8R N_2 PE8TN_2
AT27 PEG _TXN7 EXP_B_R X_D N8 AJ9 PE4RN _2 PE4TN_2
AT9 EXP_B_TX_D N8
PE8R N_3 PE8TN_3 PE4RN _3 PE4TN_3
19 C K_PE_100M_I OH 1_D P CK_PE_100M_I OH1_D P PEG_RXP4 AL26 PE8R P_0 PE8TP_0 AN24 PEG _TXP4 EXP_B_R X_D P11 AJ8 PE4RP_0 PE4TP_0 AR6 EXP_B_TX_D P11
PEG_RXP5 AJ27 AR24 PEG _TXP5 EXP_B_R X_D P10 AM8 AT7 EXP_B_TX_D P10
P PEG_RXP6 AL28 PE8R P_1 PE8TP_1

AP26 PEG _TXP6 P EXP_B_R X_D P9 AL9 PE4RP_1 PE4TP_1
AP8 EXP_B_TX_D P9
PE8R P_2 PE8TP_2 PE4RP_2 PE4TP_2
20 PEG_RXN [15: 0] PEG_RXN[15: 0] PEG_RXP7 AJ25 PE8R P_3 PE8TP_3 AT26 PEG _TXP7 EXP_B_R X_D P8 AK9 PE4RP_3 PE4TP_3 AT8 EXP_B_TX_D P8
20 PEG_RXP[ 15:0] PEG_RXP[ 15:0] PEG_RXN 8 AL29 AN29 PEG _TXN8 EXP_B_R X_D N7 AK10 AR9 EXP_B_TX_D N7
PEG_RXN 9 AK30 PE9R N_0 PE9TN_0 AT29 PEG _TXN9 EXP_B_R X_D N6 AK11 PE5RN _0 PE5TN_0 AT10 EXP_B_TX_D N6
N PEG_RXN 10 AL31 PE9R N_1 PE9TN_1 AR30 PEG _TXN10 N EXP_B_R X_D N5 AM13 PE5RN _1 PE5TN_1 AP11 EXP_B_TX_D N5
PEG_RXN 11 AK28 PE9R N_2 PE9TN_2 AN30 PEG _TXN11 EXP_B_R X_D N4 AL13 PE5RN _2 PE5TN_2 AP13 EXP_B_TX_D N4
PEG_RXP8 AK29 PE9R N_3 PE9TN_3 AN28 PEG _TXP8 EXP_B_R X_D P7 AL10 PE5RN _3 PE5TN_3 AP9 EXP_B_TX_D P7
PEG_RXP9 AK31 PE9R P_0 PE9TP_0 AT28 PEG _TXP9 EXP_B_R X_D P6 AJ 11 PE5RP_0 PE5TP_0 AR10 EXP_B_TX_D P6
PCIEX16_2 D900B none using now
Sheet 11 of 47 EX P_ B_T X_ DN [15 :0 ]
P PEG_RXP10
PEG_RXP11
AL32
AJ28
PE9R P_1
PE9R P_2
PE9R P_3
PE9TP_1
PE9TP_2
PE9TP_3
AR29
AP30
PEG _TXP10
PEG _TXP11
P EXP_B_R X_D P5
EXP_B_R X_D P4
AM12
AL14
PE5RP_1
PE5RP_2
PE5RP_3
PE5TP_1
PE5TP_2
PE5TP_3
AR11
AP12
EXP_B_TX_D P5
EXP_B_TX_D P4
X58 PCIEX16, EX P_ B_T X_ DP [15 :0 ]

N
PEG_RXN 12
PEG_RXN 13
PEG_RXN 14
PEG_RXN 15
AK33
AL34
AK32
AH30
PE10RN _0
PE10RN _1
PE10RN _2
PE10TN_0
PE10TN_1
PE10TN_2
AT32
AR31
AP33
AN32
PEG _TXN12
PEG _TXN13
PEG _TXN14
PEG _TXN15
N
EXP_B_R X_D N3
EXP_B_R X_D N2
EXP_B_R X_D N1
EXP_B_R X_D N0
AK12
AL15
AJ 14
AJ 12
PE6RN _0
PE6RN _1
PE6RN _2
PE6TN_0
PE6TN_1
PE6TN_2
AN15
AT15
AR14
AM16
EXP_B_TX_D N3
EXP_B_TX_D N2
EXP_B_TX_D N1
EXP_B_TX_D N0
PE10RN _3 PE10TN_3 PE6RN _3 PE6TN_3
PCIEX4, DMI CK _P E_1 00 M_ IOH 1_ DN
CK _P E_1 00 M_ IOH 1_ DP
P
PEG_RXP12
PEG_RXP13
PEG_RXP14
AL33
AM34
AJ32
PE10RP_0
PE10RP_1
PE10RP_2
PE10TP_0
PE10TP_1
PE10TP_2
AT31
AP31
AR33
PEG _TXP12
PEG _TXP13
PEG _TXP14
P
EXP_B_R X_D P3
EXP_B_R X_D P2
EXP_B_R X_D P1
AL12
AK15
AK14
PE6RP_0
PE6RP_1
PE6RP_2
PE6TP_0
PE6TP_1
PE6TP_2
AN14
AT14
AP14
EXP_B_TX_D P3
EXP_B_TX_D P2
EXP_B_TX_D P1
PEG_RXP15 AJ30 PE10RP_3 PE10TP_3 AP32 PEG _TXP15 EXP_B_R X_D P0 AJ 13 PE6RP_3 PE6TP_3 AM15 EXP_B_TX_D P0
CK_PE_100M_I OH0_D N AG29 AT22 V_1P1_PEPLLD C K_PE_100M_I OH 1_D N AN 10 AP2 V_1P1_PEPLLD
CK_PE_100M_I OH0_D P AF29 PE1C LKN VCCD PE1PLL AT20 C K_PE_100M_I OH 1_D P AN 11 PE0CLKN VC CD PEPLL AN1
PE1C LKP VCC APE1PLL AT19 V_1P1_PEPLLA PE0CLKP VCC APEPLL AN2 V_1P1_PEPLLA
AP35 VCCAPE1BG V_1P5_PEBG0 AM1 VC CAPEBG V_1P5_PEBG1
EX P_ B_R X_ DN [15 :0 ] R308 AN35 PE1R CO MPO R 268 AP3 PE0RC OMPO
EX P_ B_R X_ DP [15 :0 ] 100_1%_04 PE0_CO MP AN36 PE1I COMPI 100_1%_04 PE1_C OMP AL1 PE0IC OMP1
1. 1VS PE1I COMPO 1. 1VS PE0IC OMPO
D0 3 PE0_RBIAS AN34 D 03 PE1_RBI ASAN 13
PE1R BIAS PE0RBI AS
R307 3 OF 1 3 R278
750_1%_04 750_1%_04 4 O F 13
PCIEX4 D900B none using now
EX P_ C_T X_ DN [3: 0]
EX P_ C_T X_ DP [3: 0]
L13
HC B1005KF-121T20_04 2m A
1. 5VS V_1P5_PEBG0
U18-5 C131 C128
TYLER SBURG
R EV= 1. 6 1U _6. 3V_04 10U_6.3V_X5R_08
EX P_ C_R X_ DN [3: 0] EXP_C_RX_DN 3 AJ 16 AP16 EXP_C _TX_DN3
EX P_ C_R X_ DP [3: 0] EXP_C_RX_DN 2 AJ 18 PE1RN _0 PE1TN_0 AR16 EXP_C _TX_DN2 L4
EXP_C_RX_DP3 AK16 PE1RN _1 PE1TN_1 AN16 EXP_C _TX_DP3 HC B1005KF-121T20_04 2m A
PE1RP_0 PE1TP_0
EXP_C_RX_DP2 AJ 17 PE1RP_1 PE1TP_1 AR15 EXP_C _TX_DP2 V_1P5_PEBG1
EXP_C_RX_DN 1 AL17 PE2RN _0 PE2TN_0 AP18 EXP_C _TX_DN1 C100 C72
EXP_C_RX_DN 0 AM17 PE2RN _1 PE2TN_1 AR17 EXP_C _TX_DN0
EXP_C_RX_DP1 AK17 PE2RP_0 PE2TP_0 AP17 EXP_C _TX_DP1 1U _6. 3V_04 10U_6.3V_X5R_08
EXP_C_RX_DP0 AM18 AT17 EXP_C _TX_DP0
DMI PE2RP_1 PE2TP_1
15 DMI _TXN[ 3: 0] DMI_TXN[3:0] D MI_RXN0 AL18 D MI RN _0 D MITN_0 AR19 DMITXN0 C486 . 1U _10V_X7R _04 DMI_TXN 0
D MI_RXN1 AL20 D MI RN _1 D MITN_1 AN20 DMITXN1 C491 . 1U _10V_X7R _04 DMI_TXN 1 L59
DMI_TXP[3: 0] D MI_RXN2 AK21 AR20 DMITXN2 C496 . 1U _10V_X7R _04 DMI_TXN 2 *HC B1005KF-121T20_04 75 mA
15 DMI _TXP[3:0] D MI RN _2 D MITN_2
D MI_RXN3 AJ 19 AN21 DMITXN3 C498 . 1U _10V_X7R _04 DMI_TXN 3 VC CA_1.1VS V_1P1_PEPLLA
D MI_RXP0 AL19 D MI RN _3 D MITN_3 AP19 DMITXP0 C484 . 1U _10V_X7R _04 DMI_TXP0
DMI_RXN[3:0] D MI_RXP1 AK20 D MI RP_0 DMI TP_0 AN19 DMITXP1 C488 . 1U _10V_X7R _04 DMI_TXP1 C455 C453
15 DMI _R XN[ 3: 0] D MI RP_1 DMI TP_1
D MI_RXP2 AJ 21 AR21 DMITXP2 C497 . 1U _10V_X7R _04 DMI_TXP2
DMI_RXP[ 3: 0] D MI_RXP3 AK19 D MI RP_2 DMI TP_2 AM21 DMITXP3 C499 . 1U _10V_X7R _04 DMI_TXP3 1U _6. 3V_04 10U_6.3V_X5R_08
15 DMI _R XP[3:0] D MI RP_3 DMI TP_3 11/4
1.1VS R 326 *1K_04 Z1101 AK35 AH31 Z1110
PESBLCSEL R SVD AG30 Z1111 L63
R SVD 75 mA
R 325 100_04 R SVD AM30 Z1112 *HC B1005KF- 121T20_04
Z1102 AG8 R SVD R SVD AM29 Z1113 V_1P1_PEPLLD
Z1103 AG9 R SVD R SVD AH26 Z1114
Z1104 AT12 R SVD R SVD AG27 Z1115 C500 C501
Z1105 AT13 R SVD R SVD AG26 Z1116
Z1106 AF10 R SVD R SVD AH28 Z1117 1U _6. 3V_04 10U_6.3V_X5R_08
Z1107 AE10 R SVD
Z1108 AF9
R SVD
Z1109 AD 10 R SVD
5 OF 13
10, 13, 43 VCCA_1. 1VS
13,15,17, 29, 32,41, 43 1.5VS
10,12,13, 17, 19,41, 43 1.1VS
B - 12 X58 PCIEX16, PCIEX4, DMI

Schematic Diagrams
X58 Misc
U18 -6 U18- 7
TYLERSBURG TYLERSBURG
RE V=1.6 R333 2. 7K_ 04 TP_TBG_THERMALERT_N RE V=1.6
F36 K34 3 VS AC31 AH36
RSVD_D RSVD_D 15 H_A20M# A2 0M* XDPCLK1XP
G36 K33 R334 2. 7K_ 04 TP_TBG_THERMTRIP_ N AL 36 AG36
RSVD_D RSVD_D 15 H_FERR# FERR* XDPCLK1XN
J30 15 H_I NIT# AE30 W3 3
F35 RSVD_D F32 R79 51 _1%_04 IOH_JTAG_TMS AB31 INIT* XDPDQ_0 W3 6
RSVD_D RSVD_D 1.1 VS 15 H_I NTR INTR XDPDQ_1
H32 F29 R78 51 _1%_04 IOH_XDP_PRESENT_GTL 15 H_NMI AD32 V33
H31 RSVD_D RSVD_D H28 R77 51 _1%_04 IOH_JTAG_TDO AG32 NMI XDPDQ_2 V36
RSVD_D RSVD_D 15 H_SMI# SMI * XDPDQ_3
E35 R76 51 _1%_04 IOH_JTAG_TDI 16 I CH_ SYNC# AE27 Y34
J29 RSVD_D M27 LTRESET* XDPDQ_4 V35
RSVD_D RSVD_D XDPDQ_5
G31 K30 R309 1K_04 EXT_ TBG_AK3 6 R5 79 *0 _04 CL _CLK U34 W3 4
F33 RSVD_D RSVD_D R330 10 K_04 Z1 218 1 5,29 CL _N_CLK R5 80 *0 _04 CL _DATA T34 CL_CLK XDPDQ_6 U35
RSVD_D 1 5,29 CL _N_DATA CL_DATA XDPDQ_7
G30 J 33 R5 81 *0 _04 CL _RST_ N U32 AD36
H29 RSVD_D RSVD_D K36 R642 *1K_04 SPARE4_TBG 1 5,29 CL _RST CL_VREF_I OH T36 CLRST* XDPDQ_8 AB33
J35 RSVD_D RSVD_D K31 R643 *1K_04 TP_BICLK_TBG VREFCL XDPDQ_9 AA36
RSVD_D RSVD_D TP_ISHIFT_TBG XDPDQ_10
J32 F30 R644 *1K_04 I OH_ CLPWRDET C35 AA33
J36 RSVD_D RSVD_D M35 R645 *1K_04 TP_HVM_MODE_TBG C32 PL LPWRDET XDPDQ_11 AE36
RSVD_D RSVD_D 15 IOH_CLPWROK AUXPWRGOOD XDPDQ_12
M33 PLLDET_3V AC28 AC34
M32 RSVD_D N31 H_PWRGD_IOH D34 COREPLLPWRDET XDPDQ_13 AB36
RSVD_D RSVD_D COREPWRGOOD XDPDQ_14
P35 N30 R64 51 _1%_04 IOH_JTAG_TRST_N PLTRST_DLY# D33 AB34
N34 RSVD_D RSVD_D E32 R65 51 _1%_04 IOH_JTAG_TCK AL2 CORERST* XDPDQ_15 Y35
RSVD_D RSVD_D 4,1 8 H_CPURST# RESETO* XDPDQSN_0
P34 E34 AA35
M36 RSVD_D RSVD_D 1 8 TBG_RSVD_ E29 TBG_ITEST AF34 XDPDQSP_0 AC35
RSVD_D TESTLO9 XDPDQSN_1
N33 L 34 RN11 2 7 TBG_RSVD_ B32 TBG_ISAFE AJ 34 AD35
M30 RSVD_D RSVD L 31 8P4RX1 0K_043 6 TBG_RSVD_ A31 I OH_ ITPMEN R29 TESTLO5 XDPDQSP_1 Y31
P32 RSVD_D RSVD L 35 4 5 TBG_RSVD_ G28 Z1201 B34 TESTHI 3 XDPRDYACK* W3 1
RSVD_D RSVD VSS XDPRDYREQ*
R7 3 *10mil_short L 32 D03 3/2 R60 1 K_04 ISCAN_MODE_TBG W27 AK36EXT_TBG_AK36 EXT_TBG_AK36 1 8
CK_133M_CL_DNG34 RSVD H34 R646 1K_04 SPARE4_TBG TP_ ISHI FT_TBG AE34 TESTLO1 6 EXTSYSTRI G
DDRPLLREFCL KN RSVD TP_BICLK_TBG TESTLO1 1
CK_133M_CL_DPG33 H35 R647 1K_04 TP_ EDM_TBG V32 T33 I OH_JTAG_TCK
R7 1 *10mil_short DDRPLLREFCL KP RSVD R648 1K_04 TP_ISHIFT_TBG R68 1 K_04 DISPULTSO_TBG AF32 TESTLO1 7 TCK V26 I OH_JTAG_TDI
Z1213 L29
Z1214 M29
Z1215 L28
Z1216 K28
RSVD_D
RSVD_D
RSVD_D
R649
R67
R63
1K_04
10 0_04
1K_04
TP_HVM_MODE_TBG
TBG_BMCINIT
TP_PLLBYP_TBG
R59 1 K_04 Z1217
TP_ BICLK_TBG
Y28
AC32
TP_ HVM_MODE_TBGAF35
TP_ PLLBYP_ TBG AB30
TESTLO1 0
TESTLO1 5
TESTLO1 2
TESTLO8
TDI
TDO
TMS
TRST*
V30
U31
R30
I OH_JTAG_TDO
I OH_JTAG_TMS
I OH_JTAG_TRST_ N
Sheet 12 of 47
RSVD_D TESTLO1 3
N36
VCCADDRPLL
6 OF 13
R70
R582
R583
0_ 04
1K_04
1K_04
TBG_I TEST
CL_CLK
CL_DATA
IOH_XDP_PRESENT_ GTL
IOH_DFX_1
IOH_DFX_2
U28
T27
U29
TESTHI 2
TESTLO1 8
PEWIDTH_0
PEWIDTH_1
PEWIDTH_2
R33
T30
R36
N28
TBG_TESTPOINT_ 0
TBG_TESTPOINT_ 1
TBG_TESTPOINT_ 2
TBG_TESTPOINT_ 3
X58 Misc
IOH_DFX_3 T31 RSVD_D PEWIDTH_3 T28 TBG_TESTPOINT_ 4
RSVD_D PEWIDTH_4
PLTRST_DLY# P28 TBG_TESTPOINT_ 5
TPEV_ERR_0_ TBG AD27 PEWIDTH_5 P29 TBG_TESTPOINT_ 6
ERR_ N_0 TESTHI1
R584 30.1 K_04 CL_RST_N TPEV_ERR_1_ TBG AF28 R32 TBG_TESTPOINT_ 7
TPEV_ERR_2_ TBG AE28 ERR_ N_1 LEGACYI OH R35 TBG_TESTPOINT_ 8
ERR_ N_2 TESTLO19
R585 15K_04
NODEID_ 2_TBG AH34 AC29SPARE0_TBG
5VS TESTLO6 TESTLO23
NODEID_ 3_TBG AG33 AA26SPARE1_TBG
NODEID_ 4_TBG AH33 RSVD TESTLO24 AD33SPARE2_TBG
PWROKI CH R300 *0_04 PLLDET_3V TESTLO7 TESTLO21 AE33SPARE3_TBG
TESTLO25
1.1VS 3VS R95 *1 0K_0 4 AB28 P31 SPARE4_TBG
C177 R332 *1 0K_0 4 AD30 PEHPSCL SI NGL E_I OH N27 SPARE5_TBG
PEHPSDA CL_CLK_SRC
R103 7.. 9,16, 18,19, 32 SCLK SCLK R5 6 *0 _04 AB27 C33 SPARE6_TBG
8.2K_04 *1U_10V_06 SDATA R5 7 *0 _04 AD29 SMBSCL TESTLO22 D36 SPARE7_TBG
3 VS 7 ..9,1 6,18, 19,32 SDATA SMBSDA TESTLO26
R313 R3 31 *1 K_04 Z1218 AE31
1K_1%_0 4 SMBUSID W2 8 Z120 6
3VS RSVD
Vref Voltage: 0.33V R2 69 2.49K_1%_04 Z1219 AJ3
PLLDET_3V R5 06 1K_ 04 AR12 TSIREF AF31TBG_BMCINIT
CL_VREF_ IOH R5 07 1K_ 04 AN9 TESTLO1 RSVD G28 TBG_RSVD_G2 8
R90 R102 R5 08 1K_ 04 AN8 TESTLO2 RMI ICLK J26 Z120 7
1K_04 100K_04 C519 R5 09 1K_ 04 AM6 TESTLO3 RMII CLKREFOUT A31 TBG_RSVD_A31
TESTLO4 RMIICRSDV
R89 Ch ange t o 0.3 5V R314 Z1202 AM3 D30 Z120 8
*10 K_04 C
Q11 475_ 1%_04 .1U_10 V_X7 R_ 04 Z1203 AM5 RSVD RMII MDC D31 Z120 9
RSVD RMIIMDI O
Z122 4B 2N3 904 6 H_ THERMDA H_ THERMDA AM2 B32 TBG_RSVD_B32 GP56
E H_ THERMDC AK3 TSDA RMII RXD[0] E29 TBG_RSVD_E29
6 H_ THERMDC TSDC RMII RXD[1]
TP_ TBG_THERMAL ERT_N AD26 E31 Z121 0
C TP_ TBG_THERMTRIP_N AC26 THERMALERT* RMII TXD[0] J27 Z121 1
THERMTRIP* RMII TXD[1]
ICH_ VRM_PWRGD
R88 10K_0 4Z1225
B Q10 G27 Z121 2
E
2N3904 A2 RMII TXEN
C167 A36 TEST_0
R298 *0_04 IOH_CLPWRDET B1 TEST_1
15,16 ,22.. 24 PWROKICH TEST_2
1U_10V_06 AT1
TEST_3
4,15 ,16,2 8,44 PWRGD_PS PWRGD_PS R302 0_04 AT36
TEST_4
7 O F 13
C DESIGN NOTE:
3VS R510 10K_ 04 B Q50
2N3904
E DDR f requenc y s ele c tion : IO H_DFX[3 :2]
DESIGN NOTE: 2 X 16/1 X 4 (PCI- E):111011
R511 C
16, 18 ICH_ VRM_PWRGD
R294 0_ 04 I OH_CLPWROK "00" = 133MHz input, 200MHzc or e
B Q51 1.1VS
15,16 ,20,2 8,29 PLTRST#
2N3 904
E IOH_CLPWRDET R295 *2.2K_04 C503 1.1VS
"01" = 100 MHz input
10K_04 1.1VS
*.1U_10 V_04 R9 1 1 K_04 IOH_ DFX_1 R92 *0_04 1 8 RN16
R512 1K_04 TBG_TESTPOINT_ 1 2 7 8P4RX1K_04
GP56 R7 5 *0_0 4 IOH_ DFX_2 R74 100_ 04 TBG_TESTPOINT_ 7 3 6
1 6 GP5 6
IOH_I TPMEN R61 *1K_04 TBG_TESTPOINT_ 0 4 5
R3 36 *0_0 4 IOH_ DFX_3 R335 100_ 04
R320 2. 2K_ 04 TPM
PLLDET_3V H_PWRGD_I OH R3 12 *0_0 4 TBG_ISAFE R311 1K_04 Low ena ble 1 8 RN17
High TBG_TESTPOINT_ 3 2 7 8P4RX1K_04
C520 R321 TBG_TESTPOINT_ 6 3 6
100K_04 disable TBG_TESTPOINT_ 4 4 5
1U_10V_06 TP_EDM_TBG R571 1K_ 04
3VS SPARE3_TBG R572 1K_ 04
R57 3 1K_04 SPARE5_TBG R5 64 *1 K_04
SPARE2_TBG R574 10K_1%_04
H_PWRGD_I OH
R32 8 SPARE6_TBG R575 10K_1%_04 R31 5 *1K_0 4 TBG_TESTPOINT_2 R3 16 1K_ 04
1K_04 SPARE7_TBG R576 10K_1%_04 R31 8 1K_04 TBG_TESTPOINT_5 R3 19 *1 K_04
SPARE0_TBG R577 10K_1%_04 R31 7 1K_04 TBG_TESTPOINT_8
C 3V SPARE1_TBG R578 10K_1%_04
Z1223 B Q38
2N39 04
E NODEID_3_ TBG R5 13 100_ 04
C 5 U3 5 NODEID_2_ TBG R5 14 100_ 04
4,1 6,18 H_ PWRGD R33 8 10K_04Z122 6B Q39 R3 03 4.99K_04 2 NODEID_4_ TBG R5 15 100_ 04
15, 16,20, 28,29 PLTRST#
2N3 904
E 4 PLTRST_DLY#
C521 1
1U_ 10V_0 6 3
7 4AHC1G08 GW 6, 13,15 ..17, 20,24, 26,29. .32, 40,41, 43 3V
1 0,11, 13,17, 19,41, 43 1. 1VS
7 ..9, 13,15. .30,3 2,39, 41,43 3VS
17,18 ,20.. 23,27, 29.. 31,43 5VS
X58 Misc B - 13
Schematic Diagrams
X58 PWR
3VS U1 8- 9 11/ 7
1. 1VS 1. 1VS TY LER SBURG L10
U 18-8 RE V= 1. 6 *HC B1005KF- 12 1T20
TYLERSBU RG 3VS AB2 4 N4 L8
R EV =1 .6 AB2 5 VCC MI SC3 3 VC CQ PI0VRMR XO P0_1 M6 V_1P1_CSI VRMBY P_R X H CB1 00 5KF-121 T20_04 48 0m A
AA16 AA12 3V *HC B16 08KF- 12 1T25_06 VCC MI SC3 3 VC CQ PI0VRMR XO P1_1 AD6
AA18 VC C VCC AQPI 0 AA13 L14 K2 0 VC CQ PI0VRMR XO P2_1 V3 1. 8VS V_1P8_CSI VRM_RX
AA24 VC C VCC AQPI 0 AA14 K2 1 VCC MI SC3 3_CL VC CQ PI0VRMR XO P3_1 AC1 0
VC C VCC AQPI 0 VCC MI SC3 3_CL VC CQ PI0 VRMTXO P0_1 V_ 1P1_CSI VRMBYP_TX
AB15 VC C VCC AQPI 0 AA15 L15 M2 1 VCC MI SC3 3_CL VC CQ PI0VRMR XO P0_2 D21 C97 C82 C 83
AB17 VC C VCC AQPI 0 N1 2 HC B1608KF- 121T25_ 06 VC CQ PI0VRMR XO P1_2 F22
AB19 VC C VCC AQPI 0 P12 V_1P8_ CL L2 5 VCC DD R_CL_18 VC CQ PI0VRMR XO P2_2 F10 1U _6.3V_X5R_ 04 1U _6. 3V_X5R_04
P15 VC C VCC AQPI 0 P13 M2 3 VCC DD R_CL_18 VC CQ PI0VRMR XO P3_2 C16 10U _6.3V_X5R_ 08
P17 VC C VCC AQPI 0 R1 2 M2 4 VCC DD R_CL_18 VC CQ PI0 VRMTXO P0_2 K10 L7
P19 R1 3 M2 6 H CB1 00 5KF-121 T20_04 60 mA
VC C VCC AQPI 0 VCC DD R_CL_18
R 16 VC C VCC AQPI 0 R1 4 N2 4 VCC DD R_CL_18 VCC QPI 0VRMRX0_ 1 D2 V_ 1P8_CSI VRM_R X V_ 1P8_C SIVRM_TX
R 18 T14 N2 5 E3
R 20 VC C VCC AQPI 0 T15 P2 3 VCC DD R_CL_18 VCC QPI 0VRMRX1_ 1 F3 C93 C70
T17 VC C VCC AQPI 0 U1 1 P2 5 VCC DD R_CL_18 VCC QPI 0VRMRX2_ 1 E2
T19 VC C VCC AQPI 0 U1 2 P2 6 VCC DD R_CL_18 VCC QPI 0VRMRX3_ 1 AE5 1U _6 .3V_X5R_04 10 U_6. 3V_X5R_08
VC C VCC AQPI 0 VCC DD R_CL_18 VC CQ PI0VR MTX_1 V_ 1P8_CSI VRM_TX
U 16 U1 3 V_0P9_CL R2 4 B30
VC C VCC AQPI 0 VTTDD R VCC QPI 0VRMRX0_ 2
U 18 VC C VCC AQPI 0 U1 4 VCC QPI 0VRMRX1_ 2 C29
U 20 U1 5 V_1P8_PLL T2 5 C28
U 22 VC C VCC AQPI 0 V14 U2 6 VCC XD P18 VCC QPI 0VRMRX2_ 2 B29 L 61
V17 VC C VCC AQPI 0 V15 U2 5 VCC XD P18 VCC QPI 0VRMRX3_ 2 E9 HCB100 5KF- 121T2 0_04 2 00m A
VC C VCC AQPI 0 V_0P9_CL VTTXD P VC CQ PI0VR MTX_2 V_ 1P8_PLL
V19 W11 V_ 1P5_PEVRM

V21 VC C VCC AQPI 0 W12 K2 2 AR3 4 1. 5VS
V23 VC C VCC AQPI 0 W13 V_1P1_CL K2 3 VCC _C L VCC PE1VR M AT18 V_ 1P5_PEVRM C481 C482
V24 VC C VCC AQPI 0 W14 L2 2 VCC _C L VCCPEVR M
W 16 VC C VCC AQPI 0 W15 N2 2 VCC _C L 1U _6.3V_X5R_ 04 10 U_6. 3V_X5R_08
W 18 VC C VCC AQPI 0 Y1 4 P2 1 VCC _C L
W 20 VC C VCC AQPI 0 Y1 5 R2 2 VCC _C L
W 22 VC C VCC AQPI 0 K15 R2 6 VCC _C L
W 24 VC C VCC AQPI 0 K17 T2 1 VCC _C L L 11
VC C VCC AQPI 0 VCC _C L
Sheet 13 of 47 Y 17
Y 19
Y 21
VC C
VC C
VC C
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
K19
L13
L15 V_1P1_CL
T2 3
T2 4
V2 9
VCC _C L
VCC _C L
VCC FHVC OR E
VC CA_1.1VS
*H CB100 5KF-121 T20_04 48 0m A
V_ 1P1_C SIVRMBYP_RX
Y 23 L17 V_1P1_CL R2 7 C110
X58 PWR Y 25
Y 26
AA20
VC C
VC C
VC C
VCC AQPI 0
VCC AQPI 0
VCC AQPI 0
L19
L20
M1 2 1. 5VS
AK2
VCC _C L
VCC TS
*1U _6 .3V_X5R_ 04
1
AA22 VC C VCC AQPI 0 M1 3 C 104 9 OF 1 3 L5
AB21 VC C VCC AQPI 0 M1 4 *H CB100 5KF-121 T20_04 60 mA
AB23 VC C VCC AQPI 0 M1 5 . 1U_ 10V_X7R _04
VC C VCC AQPI 0 V_ 1P1_C SIVRMBYP_TX
AC 20 M1 6
2
VC C VCC AQPI 0
1.1VS AC 22 VC C VCC AQPI 0 M1 7 C94 C68
VCC AQPI 0 M1 8 11/3
AC 12 VC CAPE VCC AQPI 0 M1 9 *1U _6.3V_X5R_ 04 *10 U_6. 3V_X5R _08
AC 13 VC CAPE VCC AQPI 0 M2 0
AC 15 VC CAPE VCC AQPI 0 N1 3
AC 17 VC CAPE VCC AQPI 0 N1 4
AC 19 VC CAPE VCC AQPI 0 N1 5 1. 1VS
AD 12 N1 6
AD 13 VC CAPE VCC AQPI 0 N1 7 C99 C 62 C1 35 C 123 C124 C 101 L 16 HC B16 08KF- 12 1T25_06
VC CAPE VCC AQPI 0 1. 1VS V_1P1_C L
AD 14 N1 8
AD 15 VC CAPE VCC AQPI 0 N1 9 1.1VS 10U _6.3V_ X5R_ 08 . 1U _10 V_X7R _0 4 . 1U_ 10V_X7R _04
AD 16 VC CAPE VCC AQPI 0 10 U_6.3V_X5R _08 .1 U_10V_X7R_04 . 1U _10V_ X7R _04 L 17 *HC B16 08KF- 12 1T25_06
VC CAPE 1. 8VS V_1P8 _C L
AD 17 AD23
AD 18 VC CAPE VCC APE1 AD24
AD 19 VC CAPE VCC APE1 AD25
AE12 VC CAPE VCC APE1 AE20 L 18 HC B16 08KF- 12 1T25_06
AE13 VC CAPE VCC APE1 AE21 V_1P8_PL L
AE14 VC CAPE VCC APE1 AE22
AE15 VC CAPE VCC APE1 AE23
AE16 VC CAPE VCC APE1 AE24 1. 1VS 1.1 VS R62 R54
AE17 VC CAPE VCC APE1 AE25 *0_ 04 0_ 04
AE18 VC CAPE VCC APE1 AF20 C65 C 111 C1 25 C89 C 127 C4 66 C 464
AE19 VC CAPE VCC APE1 AF21
AF12 VC CAPE VCC APE1 AF22 *.1U_ 10V_ X7 R_ 04 *1U_6.3 V_X5R _0 4 *1U _6 .3 V_X5R_04 *1 0U _6. 3V_ X5R_08
VC CAPE VCC APE1
AF13 VC CAPE VCC APE1 AF23 *10U_ 6. 3V_X5 R_08 *. 1U_ 10V_X7R _04 *1U_ 6. 3V_X5 R_0 4
AF15 VC CAPE
AF17 VC CAPE
AF19 VC CAPE
AD 20 VC CAPE1 1 .8 VS
AD 21 VC CAPE1
AD 22 VC CAPE1
8 OF 1 3 1. 1VS R 55
*1K_04
C96 C 64 C8 0 C 63 C465 C 460 C4 61 C 67 C66
V_ 0P9_C L
10 U_6.3V_X5R _08 10U_6 .3 V_X5R _08 10U _6.3V_X5R_ 08 1 0U _6 .3 V_X5R_08
*1 0U _6. 3V_X5R_08 10U _6. 3V_X5 R_ 08 1 0U_6. 3V_X5R_08 10U_ 6. 3V_X5 R_08 10U_6. 3V_ X5R _08
R 58
0 _0 4
1. 1VS
C61 C 129 C1 30 C 112 C122 C 147 C1 03 C 126
1 0U _6 .3V_X5R_08 10U _6. 3V_X5 R_ 08 . 1U_ 10V_X7R _04 1U _6 .3 V_X5R_04 10 ,11, 43 VCCA_1. 1VS
10 U_6.3V_X5R _08 .1 U_10V_X7R_04 .1U _1 0V_ X7 R_0 4 1U_ 6. 3V_X5R _04
5,4 1 1.8VS
10.. 12 ,1 7, 19,4 1,4 3 1.1VS
11, 15, 17,2 9, 32,4 1,4 3 1.5VS
7 .. 9, 12,15.. 30,3 2, 39,4 1,4 3 3VS
6, 12 ,15 .. 17,20, 24,26,29. .3 2, 40,41 ,4 3 3V
V_1P1_C L
1. 1VS
C90 C 121 C9 2 C 133 C98 C1 32 C 134
1U_6. 3V_X5R _0 4 1U_6.3 V_X5R _0 4 .1U_ 10V_ X7 R_ 04 1 0U _6. 3V_X5R_08

1U _6.3V_ X5R_ 04 1U _6. 3V_X5R_04 10U_ 6. 3V_X5 R_08
B - 14 X58 PWR
Schematic Diagrams
X58 GND
U 18- 10 U 18- 1 1 U 18-12 U 18-13

TY LER SBU R G TYLER SB UR G TYLER SB UR G TYLER SB UR G
REV=1.6 REV=1.6 R2 REV=1.6 REV=1.6
V SS
A 10 AM14 R 21 AM1 9 AA 27 F 17
VSS V SS V SS VSS RS VD R SVD
AM23 J2 R 23 AM2 8 AA 32 F 23
V SS VSS V SS VSS RS VD R SVD
A 29 AM32 J 20 R 25 AM3 3 AC 25 H 17
VSS V SS VSS V SS VSS RS VD R SVD
A 32 AM36 J 22 R 28 A2 6 AM4 A C6 H 18
VSS V SS VSS V SS VS S VSS RS VD R SVD
A 34 AM9 J 25 R 31 A3 AN 1 2 AF 26 H 20
A7 AN 17 J 28 R 34 A3 3 AN 2 2 AH 10 J 16
AA 10 AN 26 J 31 R5 A3 5 AN 3 AH 11 J 24
AA 17 VSS V SS AN 31 J 34 VSS V SS R8 A4 VS S VSS AN 7 AH 13 RS VD R SVD K 12
AA 21 AP1 J5 T11 AA1 AP10 AH 14 K 13
AA 25 VSS V SS AP15 J8 VSS V SS T12 AA1 1 VS S VSS AP20 AH 15 RS VD R SVD K 24
AA 31 VSS V SS AP22 J9 VSS V SS T13 AA1 9 VS S VSS AP24 AH 16 RS VD R SVD K 25
AA4 AP29 K1 4 T16 AA2 3 AP34 AH 19 K 27
AB 11 VSS V SS AP36 K1 6 VSS V SS T18 AA2 8 VS S VSS AP5 AH 20 RS VD R SVD L26
AB 13 AR 1 K1 8 T20 AA3 4 AR 1 3 AH 21 L6
AB 16 VSS V SS AR 18 K2 6 VSS V SS T22 AA7 VS S VSS AR 2 AH 29 RS VD R SVD M4
AB 20 AR 22 K2 9 T26 AB1 2 AR 2 7 A H8 N 11
AB 26 AR 3 K3 T29 AB1 4 AR 3 2 A H9 N8
AB3 AR 35 K3 2 T3 AB1 8 AR 3 6 AM10 P 10
AB 35 VSS V SS AR 8 K3 5 VSS V SS T32 AB2 2 VS S VSS AT16 AM11 RS VD R SVD P8
AB9 AT11 K6 T35 AB2 9 AT21 AM20 P9
AC 14
AC 18
AC 21
VSS
VSS
VSS
V SS
V SS
V SS
AT2
AT25
AT30
K9
L1
L1 1
VSS
VSS
VSS
V SS
V SS
V SS
T6
T9
U1
AB3 2
AB6
A C1 1
VS S
VS S
VS S
VSS
VSS
VSS
AT3
AT33
AT35
AM22
AM24
AM25
RS VD
RS VD
RS VD
R SVD
R SVD
R SVD
R9
T10
T8
Sheet 14 of 47
AC 24
AC 30
AC 36
VSS
VSS
V SS
AT34
B2
L1 2
L1 4
L1 6
VSS
VSS
V SS
V SS
U 17
U 19
U 21
A C1 6
AC 2
A C2 3
VS S
VS S
VSS
VSS
AT6
B11
B19
AM27
AM31
AM35
RS VD
RS VD
R SVD
R SVD
U 10
U6
U8
X58 GND
A C8 VSS V SS B25 L1 8 VSS V SS U 23 A C2 7 VS S VSS B22 AN 18 RS VD R SVD U9
AD 11 B3 L2 1 U 24 A C3 3 B28 AN 33 V 27
AD 31 VSS V SS B33 L2 3 VSS V SS U 27 AC 5 VS S VSS B31 AP 21 RS VD R SVD V5
A D4 B36 L2 4 U 30 AD 1 B35 AT23 W 10
AE 11 VSS V SS B8 L2 7 VSS V SS U 33 A D2 8 VS S VSS B5 AT24 RS VD R SVD W 30
AE 29 VSS V SS L3 0 VSS V SS U 36 A D3 4 VS S VSS C1 B4 RS VD R SVD Y 10
AE 32 VSS C21 L3 3 VSS V SS U4 AD 7 VS S VSS C4 RS VD R SVD Y 32
VSS V SS VSS V SS VS S RS VD R SVD
AE6 C27 L3 6 U7 AE2 6 C2 C5 J 19
AF 11 VSS V SS C30 L4 VSS V SS V1 AE3 VS S VSS C 24 D 22 RS VD R SVD V9
AF 16 C34 L7 V 10 AE3 5 C3 E 16 A H1 8
AF2 C6 M10 V 11 AE9 C 31 F 11
VSS V SS VSS V SS VS S VSS RS VD
AF 25 D10 M2 V 12 AF1 4 C 36 A 16
VSS V SS VSS V SS VS S VSS RS VD _S P
AF 30 M22 V 13 AF1 8 C9 A 13 A 23
VSS VSS V SS VS S VSS RS VD _SP RS VD _S P
AF 36 D20 M25 V 16 AF2 4 A 17 B 14
VSS V SS VSS V SS VS S RS VD _SP RS VD _S P
AF8 D26 M28 V 18 AF2 7 D 23 A 20 C 12
VSS V SS VSS V SS VS S VSS RS VD _SP RS VD _S P
AG10 D3 M31 V 20 AF3 3 D 29 C 15 C 18
AG12 D35 M34 V 22 AF5 D 32 D 13 D 16
AG14 D7 M5 V 25 AG 1 D4 D 17 F 12
AG16 E11 M8 V 28 A G1 1 E1 E 14 G13
AG18 E19 N 10 V 31 A G1 3 F 15 G17
VSS V SS VSS V SS VS S RS VD _SP RS VD _S P
AG20 E25 N 20 V 34 A G1 5 E22 G16 H 14
AG22 E30 N 21 V4 A G1 7 E28 J 12 J 15
AG24 VSS V SS E36 N 23 VSS V SS V7 A G1 9 VS S VSS E33 J 17 RS VD _SP RS VD _S P J 18
AG28 E5 N 26 W 17 A G2 1 E4
AG34 VSS V SS N 29 VSS V SS W 19 A G2 3 VS S VSS E8
VSS VSS V SS VS S VSS 13 OF 13
A G7 VSS V SS F18 N3 VSS V SS W 21 A G2 5 VS S
AH 17 F21 N 32 W 23 A G3 1 F2
AH 27 VSS V SS F27 N 35 VSS V SS W 25 AG 4 VS S VSS F24
VSS V SS VSS V SS VS S VSS
AH 32 F31 N6 W 26 A H1 2 F28
A H6 VSS V SS F5 N9 VSS V SS W 29 A H2 2 VS S VSS F34
AJ 10 F9 P1 W3 AH 3 F6
A J2 P1 1 W 32 A H3 5 G10
VSS VSS V SS VS S VSS
AJ 22 G23 P1 4 W 35 AH 7
VSS V SS VSS V SS VS S
AJ 29 G29 P1 6 W6 A J1 5 G20
AJ 33 G32 P1 8 W9 A J2 0 G26
A J5 VSS V SS G6 P2 0 VSS V SS Y 11 A J2 4 VS S VSS G3
AK 13 H1 P2 2 Y 12 A J3 1 G35
AK 22 VSS V SS P2 4 VSS V SS Y 13 A J3 6 VS S VSS G7
AK 27 H22 P2 7 Y 16 AK1 H 11
AK4 VSS V SS H27 P3 0 VSS V SS Y 18 AK1 8 VS S VSS H 19
AL11 H33 P3 3 Y2 AK2 6 H 25
AL21 VSS V SS H4 P3 6 VSS V SS Y 20 AK3 4 VS S VSS H 30
AL25 H8 P4 Y 22 AK8 H 36
AL35 VSS V SS P7 VSS V SS Y 24 A L1 6 VS S VSS H7
R 10 Y 27 A L2 2
10 OF 13 R 11 VSS V SS Y 30 A L3 0 VS S
R 15 VSS V SS Y 33 AL 6 VS S Y8
R 17 VSS V SS Y 36 VS S VSS
VSS V SS 12 OF 13
R 19 Y5
VSS V SS
11 OF 13
X58 GND B - 15
Schematic Diagrams
ICH10 DMI/PCIE/USB/SATA
11 DMI _TXN[ 3:0] DMI _TXN[ 3:0 ]

11 DMI _TXP[3 :0] DMI _TXP[3: 0]
ICH10 ICH10
U 20B U 1LB 1.5 VS U20C U1 LB
DM I
DMI _RXN[ 3:0 ] REV = 0. 72
1 1 DMI _RXN[ 3:0 ] DMI _RXP[3: 0] DMI_TXN0 W 28 AD6 USB_P0- R29 7 24 .9_ 1%_04 Z15 01
A29 R EV = 0.7 2SATA0R XN AK1 7 SATA_ RX#0
1 1 DMI _RXP[3: 0] DMI_TXP0 W 26 DMI0R XN USBP0N AD5 USB_P0+ U SB_ P0- 30 B29 GLAN_COMPO AJ17 SATA_ RX0 S ATA _RX#0 31
DMI_R XN0 C505 . 1U_ 10 V_X7R _04 DMIRXN0 V30 DMI0R XP POR T0 U SBP0P AE3 USB_P1- U SB_ P0+ 30 CL_N_CLK R58 6 *0_ 04 C L_C LK0 G22 GLAN_COMPI SATA0 RXP AK1 9 SATA_ TX#0 S ATA _RX0 31 H DD0
CK_PE_100M_IC H_L DMI_R XP0 C506 . 1U_ 10 V_X7R _04 DMIRXP0 V29 DMI0TXN USBP1N AE2 USB_P1+ U SB_ P1- 30 C18 CL_CLK0 SATA0TXN AJ19 SATA_ TX0 S ATA _TX#0 31
1 9 CK_PE_1 00M_IC H_L DMI0TXP POR T1 U SBP1P U SB_ P1+ 30 TP5 SATA0 TXP S ATA _TX0 31
1 9 CK_PE_1 00M_IC H_H CK_PE_100M_IC H_H DMI_TXN1 AA26 AD1 USB_P2- U SB_ P2- 30 CL_N_DATAR58 7 *0_ 04 C L_D ATA0H21 AJ15 SATA_ RX#1 S ATA _RX#1 31
DMI_TXP1 AA28 DMI1R XN USBP2N AD2 USB_P2+ E19 CL_DATA0 SATA1R XN AK1 5 SATA_ RX1
DMI_R XN1 C507 . 1U_ 10 V_X7R _04 DMIRXN1 Y 30 DMI1R XP POR T2 U SBP2P AB6 USB_P3- U SB_ P2+ 30 CL_N_ VREF_IC H C27 TP4 SATA1 RXP AH16 SATA_ TX#1 S ATA _RX1 31 H DD1
SAT A
DM I
DMI1TXN USBP3N U SB_ P3- 30 CL_VREF0 SATA1TXN S ATA _TX#1 31
C L T o IO H S A T A
DMI_R XP1 C508 . 1U_ 10 V_X7R _04 DMIRXP1 Y 29 DMI1TXP AB5 USB_P3+ A16 AF1 6 SATA_ TX1
CK_1 00M_SATA_L DMI_TXN2 AC 26 POR T3 U SBP3P AC3 USB_P4- U SB_ P3+ 30 I OH_C LPWROK T6 TP6 SATA1 TXP AJ13 SATA_ RX#2 S ATA _TX1 31
19 C K_100M_ SATA_L CK_1 00M_SATA_H DMI_TXP2 AC 28 DMI2R XN USBP4N AC2 USB_P4+ U SB_ P4- 31 B16 CLPWR OK SATA2R XN AK1 3 SATA_ RX2 S ATA _RX#2 31
19 C K_100M_ SATA_H DMI2R XP U SB_ P4+ 31 S ATA _RX2 31
SATALED DMI_R XN2 C509 . 1U_ 10 V_X7R _04 DMIRXN2 AB30 C CD U SBP4P AB1 USB_P5- U SB_ P5- 31 CL_RST R5 88 *0 _04 CL_ RST_ 0B G20
TP7 SATA2 RXP
AH14 SATA_ TX#2 S ATA _TX#2 31 H DD2
3 0 SATALED DMI2TXN USBP5N CL_RST0B SATA2TXN
DMI_R XP2 C510 . 1U_ 10 V_X7R _04 DMIRXP2 AB29 DMI2TXP AB2 USB_P5+ U SB_ P5+ 31 AF1 4 SATA_ TX2 S ATA _TX2 31
DMI_TXN3 AF26 B T U SBP5P Y6 Z1514 SATA2 TXP AJ11 Z1510
DMI3R XN USBP6N SATA3R XN
US B
DMI_TXP3 AE26 DMI3R XP U SBP6P Y5 Z1515 SATA3 RXP AK1 1 Z1511
CL_N_C LK DMI_R XN3 C512 . 1U_ 10 V_X7R _04 DMIRXN3 AD 29 AA3 U SB_P7- AJ21 AF1 2 Z1512
12,2 9 CL_N_C LK CL_N_D ATA DMI_R XP3 C511 . 1U_ 10 V_X7R _04 DMIRXP3 AD 30 DMI3TXN USBP7N AA2 U SB_P7+ U SB_ P7- 2 9 WL AN AJ22 PWM0 SATA3TXN AH12 Z1513
12,2 9 CL_N_D ATA CL_RST DMI3TXP U SBP7P Y1 Z1516 U SB_ P7+ 2 9 AK22 PWM1 SATA3 TXP
12,2 9 CL_RST USBP8N PWM2
Y2 Z1517 AJ9 SATA_ RX#4 S ATA _RX#4 21
U SBP8P V6 U SB_P9- I CH_GP17 AH21 SATA4R XN AK9 SATA_ RX4
D 29 USBP9N V5 U SB_P9+ U SB_ P9- 3 2 TV TU NR I CH_GP1 AK21 TACH0/GP17 SATA4 RXP AF1 0 SATA_ TX#4 S ATA _RX4 21 O DD
32 PE6_ RX_TV# PERN6 /GLAN_R XN U SBP9P U SB_ P9+ 3 2 TACH1/GP1 SATA4TXN S ATA _TX#4 2 1
28 SB_KBCRST# SB_KBC RST# 32 PE6_ RX_TV D 30 PERP6/ GLAN_ RXP U SBP10N W2 U SB_P10- U SB_ P10 - 32 NE W C AR D BID 0 AH22 TACH2/GP6 SATA4 TXP AH9 SATA_ TX4 S ATA _TX4 21
GA20 # C1 59 .1U_10V_X7R_ 04 E26 W3 U SB_P10+ BID 1 AK23
28 GA20 # 32 PE6_TX_TV# PETN6 /GLAN_TXN USBP10P U SB_ P10 + 32 TACH3/GP7
28,2 9 LPC_ SI RQ LPC_ SI RQ 32 PE6_TX_TV C1 58 .1U_10V_X7R_ 04 E28 PETP6/ GLAN_TXP U SBP11N V1 U SB_P11- U SB_ P11 - 32 SATA5R XN AJ7 SATA_ RX#5 S ATA _RX#5 22
32 PE1_ RX_NEW# P30 PERN1 USBP11P V2 U SB_P11+ U SB_ P11 + 32 Ro bso n Car d C19 SST SATA5 RXP AK7 SATA_ RX5 S ATA _RX5 22
H_FERR # P29 AF8 SATA_ TX#5 S ATA _TX#5 2 2 e -S TAT
HO S T
12 H_ FERR # H_A2 0M# 32 PE1_ RX_NEW R 26 PERP1 P5 OC#0 SATA5TXN AH7 SATA_ TX5
12 H_A2 0M# 32 PE1_TX_NEW# PETN1 O C0B/GP59 SATA5 TXP S ATA _TX5 22
12 H_I NI T# H_I NI T# 32 PE1_TX_NEW R 28 PETP1 O C1B/GP40 N3 OC#1 SATA_C LKN AF1 8 C K_ 10 0M_SATA_L
H_I NTR M30 P7 OC#2 R32 9 10K_04 Z15 03 AJ24 AF1 9 C K_ 10 0M_SATA_H
12 H_I NTR H_N MI 26 PE2_ RX_GLAN# M29 PERN2 O C2B/GP41 R7 OC#3 3VS R33 7 10K_04 Z15 04 AK24 SCLOC K/GP22 SATA_CLKP
12 H_N MI H_SMI# 26 PE2_ RX_GLAN C1 51 .1U_10V_X7R_ 04 N 26 PERP2 O C3B/GP42 N2 OC#4 R34 1 *10 K_04 Z15 05 AH23 SLOAD/ GP38 AE7 SATAL ED
12 H_SMI# 26 PE2_TX_GLAN# PETN2 O C4B/GP43 SDATAOUT0/ GP39 SATALEDB
P C I -E
26 PE2_TX_GLAN C1 50 .1U_10V_X7R_ 04 N 28 N1 OC#5 R11 3 *10 K_04 Z15 06 AD20 AK6 SATABIAS R360 24. 9_1%_04
Sheet 15 of 47 4, 28 PECI
4 TH ER MTR IP#
12 IOH_C LPWROK
PEC I
THER MTR IP#
IO H_CL PWROK
29
29
29
PE3_ RX_WAN#
PE3_ RX_WAN
PE3_TX_WAN# C1 53 .1U_10V_X7R_ 04
K30
K29
L26
PETP2
PERN3
PERP3
PETN3
O C5B/GP29
O C6B/GP30
O C7B/GP31
O C8B/GP44
N5
M1
P3
OC#6
OC#7
OC#8
26 ICH _GPIO 49
AJ25 SDATAOUT1/ GP48
GP49
SATARBI ASB
SATARBI AS
SATA0 GP/G P2 1
AJ6
AK2 5 I CH_GP21
C1 52 .1U_10V_X7R_ 04 L28 R6 OC#9 R 622 AE2 0 I CH_GP19
29 PE3_TX_WAN PETP3 O C9B/GP45 SATA1 GP/G P1 9
ICH10 DMI/PCIE/ H 30 T7 2 .2K_04 AE2 1 SATA2 GP
US B
25 PE4_ RX_JMB# PERN4 OC10B/GP46 OC#10 32 SATA2 GP/G P3 6
25 PE4_ RX_JMB H 29 PERP4 OC11B/GP47 P1 OC#11 SATA3 GP/G P3 7 AE2 2 SATA3 GP
19 C K_USB_48M_ ICH C K_USB_4 8M_ICH 25 PE4_TX_JMB# C1 55 .1U_10V_X7R_ 04 J 26 PETN4 SATA4GP AF2 2 SATA4 GP
C1 54 .1U_10V_X7R_ 04 J 28 AG1 USBRBIAS_L R371 21_1%_04 AD21 SATA5 GP
USB/SATA 25
32
PE4_TX_JMB
PE5_ RX_ROBSON# F30
F29
PETP4
PERN5
U SBR BI ASB
USBRBI AS AG2
D0 3
SATA5GP
P8 G A2 0#
H OS T
MXM_PRESNT# 32 PE5_ RX_ROBSON C1 57 .1U_10V_X7R_ 04 G26 PERP5 AG3 C K_USB_4 8M_ICH A20GATE AJ28 H _A20 M#
20,28 MXM_PRESNT# 32 PE5_TX_ROBSON# C1 56 .1U_10V_X7R_ 04 G28 PETN5 CLK48 A2 0MB
32 PE5_TX_ROBSON PETP5
4,12,16,28,44 PWRGD_PS PWRGD _PS AC22
AF28 I GNN EB M3 I CH_INI T_33V
G P IO
Z1502 AF30 DMI_I RCOMP IN IT3_3VB AE2 3 H _IN IT#

3V 1.5VS DMI_ZC OMP IN ITB
R299 24.9 _1%_ 04 IN TR AH27 H _IN TR
CK_PE_100M_ ICH _L U 26 AJ27 H _FERR# R306 *6 2_0 4
OC# 0 1 8 CK_PE_100M_ ICH _H U 25 DMI_C LKN 3VS FERRB AF2 4 H _NMI CPU _VTT
DMI_C LKP NMI
OC# 1 2 7 RN6 2OF6 RC INB L3 SB_KBCR ST#
OC# 2 3 6 8P4R X10K_04 SERI RQ N6 L PC_SIR Q
OC# 3 4 5 I CH1 0R IC AH26 Z1507 R322 100_04 H _SMI#
R 304 SMIB AJ29
OC# 4 1 8 *3 .24K_1%_0 4 STPCLKB AD24 THERMTRIP#
THRMTRI PB
OC# 5
OC# 6
2
3
7 RN1 9
6 8P4R X10K_04 3 VS
VREF=0.33V AC23 I CH_PEC I R618 *0 _04 PECI
OC# 7 4 5 C L_N _VREF_I CH PEC I
OC# 8 R149 10 K_04 3O F6

OC# 9 R147 10 K_04 C191 R 305 C 518
OC# 11 R369 10 K_04 1 K_04 I CH10R IC
. 1U_16V_04 *. 1U_10V_X7R _04
12/ 15 3VS
5 U4
GA20# R589 *10K_04 2 J_I CH_ SPI 1
12, 16 ,20 ,2 8,2 9 PLTR ST# 4 BU F_ PLT_ RST# 2 1 SPI_VCC
BU F_ PLT_RST# 25,2 6,3 2
1 8 1 SPI _C LK 4 3 SPI_CS
SB_KBC RST# 2 7 RN7 3 SPI _MOSI 6 5 SPI_MI SO
LPC_SI RQ 3 6 8P4R X10K_04 74AHC1G08 GW 8 7
SATALED 4 5
SPNZ- 08S3- B-C-0-P
3VS
ICH _GP17 1 8 3VS R516 0_0 4 3V
ICH _GP1 2 7 RN3
ICH _GP19 3 6 8P4R X10K_04
MXM_PRESNT# 4 5
R 517 POWER OK R351
*10K_04
C730 . 1U_16V_04
U 36
ICH _GP21 1 8 RN1 *0 _04 U 21 SPI _VCC 8 VDD SI 5 R518 33_04 SPI _MO SI SPI _MOSI 16
THERM# 2 7 R5 20 2 PM_PWR OK PM_PWROK 16 2 R519 33_04 SPI _MI SO SPI _MI SO 16
SATA4GP 3 6 8P4R X10K_04 PWRGD_PS 3 RST# SO 1 R521 33_04 SPI _CS
SATA5GP 4 5 VC C 1 C E# 6 R522 33_04 SPI _CL K SPI _CS 16
GND SCK SPI _CLK 1 6
*0_04 C 529 R354 R 523 1K_04 3
SATA2GP R107 10 K_04 *G690L29 3T7 3 WP# C73 1 *33P_ 04
SATA3GP R104 10 K_04 *0 .1u _04 (I MP80 9) *100 K_04 C73 2 *33P_ 04
C73 3 *33P_ 04
R 524 1K_04 7 4 C73 4 *33P_ 04
3VS HOL D# VSS
25VF01 6B
3VS
R345 R339
R87 TH ERM# 6, 12, 13 ,16 ,1 7,2 0,2 4, 26, 29. .3 2,4 0,4 1, 43 3V
TH ERM# 1 6 11 ,13 ,17 ,2 9,3 2,4 1, 43 1. 5VS
*1 0K_04 *10K_04 4, 5,1 8,3 9, 44 CPU_VTT
8.2K_04
BID 0 CQ37 7.. 9,1 2,1 3, 16. .30 ,3 2,3 9,4 1, 43 3VS
BID 1 Z1519 B
E2N 3904
CQ9
R346 R340 R 85 8. 2K_04 Z1518 B D7
4,4 4 H_PR OCHOT#
E2N3 904 A C PW RO KICH PW RO KIC H 12 , 16, 2 2. .24
10K_04 10K_ 04
*R B751 V
B - 16 ICH10 DMI/PCIE/USB/SATA
Schematic Diagrams
ICH10 PCI/SPI/Other
P C I In te r fa c
3 VS U20 D ICH10 U1L B
PCIR ST# U 20A ICH10 U1 LB
3 2 PCI RST#
CK_P_3 3M_I CH PC I_I RDY# 1 8 RN8 R1 54 10 K_ 04 J3 REV = 0.7 2 N7 Z160 3 R525 1 0K_04
1 9 C K_ P_ 33M_ ICH 3VS LDRQ1 B/ GP23 GP0/ BMBU SY B 3 VS
PC I_I NT#E 2 7 8P4RX8.2K_0 4 PCI_PAR E3 REV = 0 .72 C10 PC I_AD0 L PC _AD0 K3
PAR AD0 FWH 0/L AD0
LP C
PC I_I NT#F 3 6 PCI_D EVSEL# C6 C8 PC I_AD1 L PC _AD1 H1
DEVSELB AD1 FWH 1/L AD1
PC I_SERR# 4 5 CK_P_33 M_IC H B3 E9 PC I_AD2 L PC _AD2 M7 A2 0 ICH_ GP8
PCIRST# R2 PCIC LK AD2 C9 PC I_AD3 L PC _AD3 J1 FWH 2/L AD2 DRAMPWROK/GP8 A1 8 ICH_ GP9
LPC_ AD[ 3:0 ] PC I_PERR# 1 8 RN9 PCI_I RDY# J8 PCIR STB AD3 A5 PC I_AD4 R1 35 10 K_ 04Z1 616 L6 FWH 3/L AD3 GP9/ WOL_EN C17 SWI #
2 8,2 9 L PC_ AD [3: 0] IR DYB AD4 3VS LDRQ0 B G P1 0/CPU_ MISSING/ JTAGTMS
PC I_PLOC K# 2 7 8P4RX8.2K_0 4 PCI_PME# R3 E1 2 PC I_AD5 L PC _FRAME# L5 A8 ICH_ GP12
PMEB AD5 FWH 4/L FRAMEB GP12
L PC
LPC_ FRAME# PC I_FRAME# 3 6 PCI_SERR# K5 E1 0 PC I_AD6 A1 9 SMI#

28, 29 LPC_FRAME# SERRB AD6 GP13
28 LPCPME# LPCPME# PC I_I NT#A 4 5 PCI_STO P# F10 B7 PC I_AD7 H DA_BIT_C LK AH3 A9 SC I#
PCI_PLO CK# H8 STOPB AD7 B6 PC I_AD8 H DA_RSTB AJ1 HDA_BIT_ CLK GP14/ JTAGTD I/Q ST_BMBU SY B C15 ICH_ PC I_STP
A UDI O
PC I_I NT#D 1 8 RN10 PCI_TRDY# E6 PLOCKB AD8 B4 PC I_AD9 SDATI 0 AK3 HDA_RSTB STP_PCI B/ GP15 M2 Z160 5
TR DYB PCI AD9 HDA_SDIN0 DPRSLPVR/ GP16
PC I_DEVSEL # 2 7 8P4RX8.2K_0 4 PCI_PERR# F5 E7 PC I_AD10 SDATI 1 AH4 K1 Z160 6
PERRB AD10 HDA_SDIN1 GP18
HD Au di o
PC I_TRDY# 3 6 PCI_FRAME# G12 A4 PC I_AD11 SDATI 2 AH1 AF5 Z160 7 R526 1 0K_04
Fo r MXM
FRAMEB AD11 HDA_SDIN2 GP20 3 VS

MXM_BIT_ CLK PC I_STOP# 4 5 H12 PC I_AD12 AJ3 A1 4 Z160 8 R527 1 0K_04
2 0 MXM_BIT_CLK AD12 HDA_SDIN3 GP24/ MEM_LED 3V
MXM_AC_RESET# F8 PC I_AD13 H DA_SDOUT AJ2 B1 8 ICH_ CPU_STP
2 0 MXM_AC_R ESET# AD13 HDA_SDOUT STP_ CPUB/ GP25
MXM_SDATO PC I_REQ# 1 1 8 RN5 C5 PC I_AD14 H DA_SYNC AK1 C11 Z161 0
2 0 MXM_SDATO AD14 HDA_SYNC S4 _STATEB/ GP26
MXM_SYNC PC I_REQ# 2 2 7 8P4RX8.2K_0 4 PCI_G NT#0 H5 D2 PC I_AD15 C K_ 14M_ ICH M5 A1 1 LPCPME#
2 0 MXM_SYNC GNT0B AD15 CLK14 GP27
20 SDATI2 SDATI2 PC I_REQ# 0 3 6 PCI_G NT#1 A7 E5 PC I_AD16 G18 SB_MUTE#
PC I_REQ# 3 4 5 PCI_G NT#2 C7 GNT1B/GP51 AD16 G7 PC I_AD17 GP28 K2 PC IE_RST#
PCI_G NT#3 F7 GNT2B/GP53 AD17 E1 1 PC I_AD18 GP32 AF6 ODD_D ETEC T#
GNT3B/GP55 AD18 GP33
PC I_I NT#H 1 8 RN20 G10 PC I_AD19 AH 5 SB_BLO N
AD19 GP34
SDATI1 PC I_I NT#C 2 7 8P4RX8.2K_0 4 G6 PC I_AD20 L1 ICH_ GP35
32 SDATI1 AD20 SATAC LKREQB/ GP35
HD A udio
SDATI0 PC I_I NT#G 3 6 D3 PC I_AD21 F25 F1 6 GP56

27 SDATI0 AD21 GLAN_CL K GP56
PC I_I NT#B 4 5 PCI_R EQ #0 K7 H6 PC I_AD22 E14 C12 SBTPM_ PP
BIT_CLK PCI_R EQ #1 G13 REQ0B AD22 G5 PC I_AD23 L AN _RST# C 21 LAN_RSTSYNC GP5 7/TPM_PP/ JTAGTC K AD 23 H_PWRGD
27,3 2 BI T_CL K REQ1B/ GP5 0 AD23 LAN_RSTB CPUPWRGD
AC_R ESET# ICH_ GP35 R376 *10 K_ 04 PCI_R EQ #2 F13 C1 PC I_AD24 G 15 E2 1 LAN100 _SLP
LA N
27,3 2 AC_ RESET# REQ2B/ GP5 2 AD24 LAN_RXD0 L AN1 00_ SL P
SDATO ICH_ SY NC# R324 1 K_ 04 PCI_R EQ #3 G8 C2 PC I_AD25 H 14 AK26 THERM#
27,3 2 SDATO SYNC ICHSPK R150 2 .2K_04 REQ3B/ GP5 4 AD25 C3 PC I_AD26 E13 LAN_RXD1 THRMB C22 ICH_ VR M_PWRGD
27,3 2 SYN C AD26 LAN_RXD2 VRMPWRGD
PC I_PME# R529 *8. 2K_04 D1 PC I_AD27 F15 AH 25 ICH_ SY NC#
AD27 LAN_TXD0 MCH_SYNC B
J7 PC I_AD28 F14 T3 PWR _BTN#
AD28 LAN_TXD1 PWRBTN B
CK_1 4M_I CH SU S_ ST# R616 8 .2K_04 PCI_I NT# A J5 F3 PC I_AD29 G 14 G19 RI#
19 CK_14 M_I CH PIRQ AB AD29 LAN_TXD2 RI B
PCI_I NT# B E1 G1 PC I_AD30 R1 SU S_ ST#
ICH_ GP35 R530 1 0K_04 PCI_I NT# C F1 PIRQ BB AD30 H3 PC I_AD31 R TCX1 A21 SUS_STATB/L PC PD/ GP61 R5 Z160 2
R TC
ICH_ GP9 R350 8 .2K_04 PCI_I NT# D A3 PIRQ CB AD31 R TCX2 B21 RTCX1 SU SCL K/ GP62 F1 9 HWRST#
PIRQ DB RTCX2 SYS_RESETB
PCI_I NT# E K6 R TCRST# A25 C14 PL TRST#
PIRQ EB/G P2 RTCRSTB PLTR STB
ICH_ GP8 R565 1 .1K_04 PCI_I NT# F L7 H 20 E2 0 ICH_ WAKE#
Sheet 16 of 47
PWR GD_PS_BUF ICH_ GP12 R566 1 .1K_04 PCI_I NT# G F2 PIRQ FB/G P3 F1 1 PC I_C/ BE# 0 I CH_G P1 1 C 16 SR TCRSTB WAKEB G21 INTR UDER#
19 PWRGD_ PS_BUF PIRQ GB/ GP4 C/ BE0 B SMBALERTB/G P1 1/J TAGTDO I NTRUD ER B
PCI_I NT# H G2 G9 PC I_C/ BE# 1 SMBCL K H 16 C25 PWR OKICH
MI SC
PWRGD _PS PIRQ HB/ GP5 C/ BE1 B C4 PC I_C/ BE# 2 SMBDATA E16 SMBCL K PWRO K F2 2 RSMRST#
4,12 ,15 ,28 ,44 PWRGD_ PS C/ BE2 B SMBDATA RSMR STB
PWRGD _3V E8 PC I_C/ BE# 3 ALERT# F18 E2 3 INTVRMEN
ICH10 PCI/SPI/
19 PWRGD_3 V 3V C/ BE3 B LINKALERTB/G P6 0/JTAG RST I NTVRMEN
SM B
SML INK0 A15 N8 ICHSPK
H_ PWR GD SML INK1 B15 SMLINK0 SPKR
4 ,12, 18 H_PWRGD D03
I CH_VRM_ PWR GD 1O F6 SMLINK1 A1 3 ICH_ SU SB#
12, 18 ICH _VRM_PWRGD SL P_ S3 B
ICH_ GP72 R61 9 8.2 K_ 04 SPI_ MOSI C 26 B1 3 SU SC#
SPI
15 SPI_MO SI SPI_ MOSI SL P_ S4 B
19
31
10 ,28 ,32, 43
CK_PWRGD
ICH SPK
SUSB#
CK_PWRGD
IC HSPK
SUSB#
SUSC#
SWI#
SCI#
SMI#
R11 5
R35 7
R34 7
4.7 K_ 04
8.2 K_ 04
4.7 K_ 04
I CH10 R IC
15 SPI_MI SO
15 SPI_ CS
1 5 SPI_C LK
SPI_ MISO
SPI_ CS
SPI_ CLK
B26
E25
G 23
Z1 601 F23
SPI_ MISO
SPI_ CS0B
SPI_ CLK
SLP_S5B/GPI O63
SLP_MB
CK_PWRGD
G17
F1 7
T8
C13
CK_PWRGD
ICH_ GP72
Other
28 SUSC # 3V SPI_ CS1B GP72
SUS_ST# R83 *1K_04 AK28
29 SUS_ ST# DPRSTPB
M IS C
1 8 RN 18 AE24
PWROKIC H SMLI NK0 2 7 8P4R X10K_0 4 VR M_PWRG D? VR _Ready (VRM_ PWRGD) ? CHANGE TO 10K FOR QUALI FI ED CHI PSETS DPSLPB F2 0 R531 1 0K_04
12, 15, 22. .24 PWROKICH TP3 3V
RSMRST# SMLI NK1 3 6 4 OF6
28 RSMRST#
I CH_GP11 4 5
HWR ST# 3V R66 1K_04 ICH _VRM_PWRGD 3VS R53 2 100K_0 4 PW RGD_PS_BUF ICH 10R IC
4 ,18 HWRST#
12 ,15 ,20 ,28, 29 PLTRST# PLTR ST# HWR ST# R56 7 10K_04
PE_WAKE# ALERT# R56 8 10K_04 C 169 RTCVCC
26 ,29 ,32 PE_ WAKE#
TH ERM# C R5 33 C7 35
15 THERM#
VRM_PWRG D PE_WAKE# R53 4 1K_04 R69 10 K_ 04 Z1612 B 1U_ 10V_06 C
44 VRM_PWRGD
IC H_SYNC# RI # R53 5 10K_04
3V
Q5 E 3V R53 6 10 K_ 04 B 1U _10V_0 6
Zo= 55O? 5%
12 IC H_SYNC# PWR_BTN # 2N3 904 10 0K_04 Q 52 E R3 23 C52 7 15P_50 V_ 04 RTCX1
28 PWR_BTN#
SUS_ST# R37 0 *8 .2K_0 4 SUSB# R81 *10K_0 4 2N3 904
PWR_BTN # R14 8 8.2 K_ 04 C C 27 K_ 1%_04
1
GP56 R11 6 8.2 K_ 04 VRM_PWRGD Z1 611 B Q6 PWRG D_PS B Q5 3 2
R82 10K_0 4 2 N390
E 4 R537 20K_0 4 C73 7 2 N390
E 4 R TCRST# X2 R344
ODD _DETECT# SMBCLK R12 3 2.2 K_ 04 C7 36 32. 768KHz
3
21 ODD _DETECT#
SB_BLON SMBDATA R11 9 2.2 K_ 04 *. 1U_1 0V_X7 R_04 1U_ 10V_0 6 C5 23 10M_ 04
24 SB_ BL ON
J OPEN 1
4
IC H_GP12 LPCPME# R52 8 8.2 K_ 04 1U _6.3 V_ 04 *OPEN_3 5mil
10 ICH _GP12 3V
10 ICH _GP8 IC H_GP8 SB_MUTE# R11 4 10K_04 C52 8 15P_50 V_ 04 RTCX2
GP IO
Cle ar CMO S
14
U19 D
SCI# RTCVCC 74 LVC08PW
2 8 SCI #
SMI# VRM_ PWR GD R7 2 *0_04 I CH_VRM_ PWR GD PM_ PW ROK 12
2 8 SMI # SWI# LAN1 00_SLP R96 390K_0 6 15 PM_PWRO K 11 R30 1 *0_0 4
2 8 SWI #
GP56 ICH _VRM_PWRGD 13 O DD_DETECT# R569 4 .7K_0 4
1 2 G P5 6 3V 3 VS
PLTR ST# C53 6 *1 U_6. 3V_04
IC H_PCI_ STP PWROKIC H C16 4 *1 U_6. 3V_04 SB_BLON R570 1 K_ 04
19 ICH _PCI_STP PE_WAKE# ICH_ WAKE#
IC H_CPU_STP H_ PWR GD C17 2 *1 U_6. 3V_04
7
19 ICH _CPU_STP
C5 16 R 650 *0_0 4
SBTPM_PP R35 6 10K_04 3V 3V
. 1U_1 0V_X7R _04
40 1. 5V_PWRGD
14
TPM_ PP n eed pull down,d isable TPM U19 A U19C D03 3/ 3
14
PCI _GNT#2 R3 59 *1K_0 4 74 LVC08PW U1 9B 74LVC0 8PW
14
RSMRST# 1 74 LVC08PW 9
PCI _GNT#3 R1 37 *1K_0 4 MXM_BIT_ CLK R 378 0_ 04 3 SUSB# 4 8 PWRGD_3 V R29 6 0_0 4
PWROKIC H 1 2,15 ,22 ..2 4
MXM_AC_RESET# R 379 0_ 04 IC H_SUSB# 2 6 R54 2 10 0K_04 10
PWRGD_ PS_BUF 3V
PCI _GNT#1 R3 58 1 K_ 04 MXM_SDATO R 380 0_ 04 5
5
MXM_SYNC R 381 0_ 04 C7 38 U42
PCI _GNT#0 R1 53 1 K_ 04 1U _10V_X7R_0 4 1 RTCVCC
7
7
BIT_ CLK R 372 0_ 04 HDA_BIT_CLK 4 ICH_ WAKE# 3 5mi l
7
L AN _RST# R9 7 1 K_ 04 AC_RESET# R 373 0_ 04 HDA_R STB PE_W AKE#2

SDATO R 374 0_ 04 HDA_SDOU T
SYNC R 375 0_ 04 HDA_SYNC 74 AHC 1G32 GW D2 2 C17 0
ASD7 51V 2 5mil
3
A C 1U_ 6.3 V_ 04 5mi l
3V VDD3
SMBD ATA
HW Str ap 20mils D2 1
JC BAT1 JCBAT1 ASD7 51V R 86 1M_ 04
D
C18 7 C182 R348 Z1613 R177 1K_04 Z1614 A C INTRUDER#

2
H LP C RO M *0_04
1
P CI_ GN T #0 . 1U_1 0V_X7 R_04 .1U _10V_X7R_0 4
3VS
R 343 10K_04 Z1615 G R34 2 4.7 K_ 04
3 VS 1 2 R 84 39 0K_1%_06
L SP I RO M 852 05-0 200 1 INTVRMEN
S
PQ61
SDATA 7. .9, 12, 18, 19, 32
3 VS 2N7 002W
H N O Re b o ot SMBC LK
S PKR
D
21 ,24, 28, 31, 40, 42,4 3,4 5 VDD 3

L N O T N O re boo t 6,1 2,1 3,1 5,17 ,20 ,24 ,26, 29. .32 ,40 ,41, 43 3V
C55 0 C5 57 C 230 C175 R110
7. .9, 12, 13,1 5,1 7.. 30, 32,3 9,4 1,4 3 3 VS
R 109 10K_04 G *0_04
3VS
L AN _R ST# i f no t u se P U LL L O W .1U_ 10V_X7 R_04 *.1 U_10 V_ X7R_ 04 R10 8 4.7 K_ 04
3 VS
. 1U_1 0V_X7 R_04 *.1U_ 10V_X7R_0 4 PQ25
S
2N7 002W
SCLK 7 ..9 ,12 ,18 ,19, 32
ICH10 PCI/SPI/Other B - 17
Schematic Diagrams
ICH10 Power/GND
U 1L B
ICH10
U 1L B U 20 F
U2 0E ICH10 VSS_100 R EV = 0.7 2 VSS_099
R EV = 0 .7 2 3V 5V H 13 G3 0
V_R EF5V A6 H 19 VSS_100 VSS_0 99 G2 9
V5 REF H2 VSS_101 VSS_0 98 G2 5
V_1 P5_ CL_I NT V_R EF5V_ SUS AF1 H 22 VSS_102 VSS_0 97 G1 6
V5 REF_ SUS R377 H 25 VSS_103 VSS_0 96 F9
C5 22 H1 0 NC f o r IC H1 0 po wer p in/ N o LAN CQ4 1 H 26 VSS_104 VSS_0 95 F6
1. 5VS VC C1 _5 _A_ 23 VSS_105 VSS_0 94
H1 1 VC C1 _5 _A_ 24 B 2N 39 04 10 0_ 06 H 28 VSS_106 VSS_0 93 F28
.1 U_10 V_X7R _0 4 AC1 1 VC C1 _5 _A_ 19 C 53 8 *. 1U _1 0V_ X7 R_ 04 E H9 VSS_107 VSS_0 92 F26
AB2 3 A10 V_ 1P0 5_ VCC AUX J 29 F21
AC1 8 VC C1 _5 _A_ 22 VC CL AN1_1_1 B10 V_REF5V_SU S J 30 VSS_108 VSS_0 91 F12
AC2 0 VC C1 _5 _A_ 20 VC CL AN1_1_2 AA7 J6 VSS_109 VSS_0 90 E30
VC C1 _5 _A_ 21 VC C1 _5 _A_28 1 .5 VS VSS_110 VSS_0 89
VCCHDA V_1P5_ CL_I NT A2 6
AC 9 VC CC L1 _5 VC C1 _5 _A_29 AA8
AB7
C558 K26
K28 VSS_111 VSS_0 88 E29
E22
3V AC1 0 VC CSU SHD A VC C1 _5 _A_30 AB8 1U _10V_ X7 R_04 L2 VSS_112 VSS_0 87 E2
3VS VC CH DA VC C1 _5 _A_31 VSS_113 VSS_0 86
AD1 0 T1 L 23 E18
C5 42 AC1 9 VC C3 _3 _0 3 VC C1 _5 _A_32 L 29 VSS_114 VSS_0 85 E15
AC2 1 VC C3 _3 _0 4 AC1 4 L 30 VSS_115 VSS_0 84 D2 8
.1U_ 10 V_X7R _0 4 AF2 1 VC C3 _3 _0 5 VC C1 _5 _A_25 AC1 5 3 VS 5VS M14 VSS_116 VSS_0 83 B8
VC C3 _3 _0 6 VC C1 _5 _A_26 VSS_117 VSS_0 82
AH2 4 VC C3 _3 _0 7 VC C1 _5 _A_27 AC1 6 M16 VSS_118 VSS_0 81 B5
1. 5VS AK5 M26 B28
VC CU SBPLL A24 M28 VSS_119 VSS_0 80 B25
VCC SATA_ PLL_I CH AK2 0 VCC 1_1_ 01 B24 I CH _1 .1VS R361 M6 VSS_120 VSS_0 79 B22
VC CSATAPLL VCC 1_1_ 02 VSS_121 VSS_0 78
VCC 1_1_ 03 C2 4 CQ4 0 M8 VSS_122 VSS_0 77 B2
VCC DMI_ PLL _I CH T3 0 E24 B 2N 39 04 10 _0 6 N 13 B19
VC CD MI PLL VCC 1_1_ 04 F24 E N 14 VSS_123 VSS_0 76 B17
GLCI _PL L A2 8 VCC 1_1_ 05 G2 4 N 15 VSS_124 VSS_0 75 B14
VC CG LAN PLL VCC 1_1_ 06 H2 3 V_R EF5V N 16 VSS_125 VSS_0 74 B11

AF2 VCC 1_1_ 07 H2 4 N 17 VSS_126 VSS_0 73 AK8
3V L8 6 VC CSU S3_ 3_ 01 VCC 1_1_ 08 J23 C5 41 N 18 VSS_127 VSS_0 72 AK30
VCC CL _3 V_I CH C2 3 VCC 1_1_ 09 VSS_128 VSS_0 71
3VS VC CC L3 _3 _2 VCC 1_1_ 10 M1 2 N 23 VSS_129 VSS_0 70 AK29
B2 3 M1 3 .1U_ 10 V_X7R _0 4 N 29 AK2
C2 36 HC B10 05 KF-1 21 T2 0_ 04 VC CC L3 _3 _1 VCC 1_1_ 11 M1 5 N 30 VSS_130 VSS_0 69 AK16
C3 0 VCC 1_1_ 12 M1 7 P12 VSS_131 VSS_0 68 AK14
1. 5VS VC CG LAN 1_ 5_ 4 VCC 1_1_ 13 VSS_132 VSS_0 67
.1 U_ 10V_X7R _04 C2 9 VC CG LAN 1_ 5_ 3 VCC 1_1_ 14 M1 8 P13 VSS_133 VSS_0 66 AK12
C2 8 M1 9 P14 AJ8
Sheet 17 of 47 B3 0
AA2 3
VC CG LAN 1_ 5_ 2
VC CG LAN 1_ 5_ 1
VC C1 _5 _B_ 01
VCC 1_1_ 15
VCC 1_1_ 16
VCC 1_1_ 17
VCC 1_1_ 18
N1 2
N1 9
R1 2
1 .5 VS
L6 6 VCC SATA_ PLL _I CH

P15
P16
P17
VSS_134
VSS_135
VSS_136
VSS_137
VSS_0 65
VSS_0 64
VSS_0 63
VSS_0 62
AJ5
AJ2 6
AJ2 3
AA2 4 R1 9 HC B16 08 KF-1 21 T25_06 P18 AJ2 0
ICH10 Power/GND AA2 5

AB2 4
AB2 5
AC2 5
VC C1 _5 _B_ 02
VC C1 _5 _B_ 03
VC C1 _5 _B_ 04
VC C1 _5 _B_ 05
VCC 1_1_ 19
VCC 1_1_ 20
VCC 1_1_ 21
VCC 1_1_ 22
U1 2
U1 9
V12
V19
C532
10 U_6. 3V_X5 R_ 08
P19
P2
P26
P28
VSS_138
VSS_139
VSS_140
VSS_141
VSS_0 61
VSS_0 60
VSS_0 59
VSS_0 58
AJ1 6
AJ1 4
AJ1 2
AH8
AD2 5 VC C1 _5 _B_ 06 VCC 1_1_ 23 W1 2 P6 VSS_142 VSS_0 57 AH6
VC C1 _5 _B_ 07 VCC 1_1_ 24 VSS_143 VSS_0 56
AD2 6 VC C1 _5 _B_ 08 VCC 1_1_ 25 W1 3 R 13 VSS_144 VSS_0 55 AH20
AD2 8 W1 5 1 .5 VS R 14 AH2
AE2 8 VC C1 _5 _B_ 09 VCC 1_1_ 26 W1 7 R 15 VSS_145 VSS_0 54 AH19
AE2 9 VC C1 _5 _B_ 10 VCC 1_1_ 27 W1 8 L6 4 VCC DMI_PLL _I CH R 16 VSS_146 VSS_0 53 AH15
AE3 0 VC C1 _5 _B_ 11 VCC 1_1_ 28 W1 9 HC B16 08 KF-1 21 T25_06 R 17 VSS_147 VSS_0 52 AH13
J2 4 VC C1 _5 _B_ 12 VCC 1_1_ 29 L 87 C5 04 C5 13 R 18 VSS_148 VSS_0 51 AG28
J2 5 VC C1 _5 _B_ 13 AH2 8 R 23 VSS_149 VSS_0 50 AF9
VC C1 _5 _B_ 14 V_C PU_IO_1 1 .1 VS VSS_150 VSS_0 49
K2 3 VC C1 _5 _B_ 15 V_C PU_IO_2 AJ3 0 .1 U_10 V_X7R _0 4 4. 7U _6 .3 V_0 6 R 29 VSS_151 VSS_0 48 AF7
K2 4 H CB1 00 5KF-121T20 _0 4 R 30 AF29
K2 5 VC C1 _5 _B_ 16 AH3 0 R8 VSS_152 VSS_0 47 AF25
L2 4 VC C1 _5 _B_ 17 VCC 3_3_ 01 AK4 C 74 4 C 74 5 1 .5 VS R TC VCC T12 VSS_153 VSS_0 46 AF23
VC C1 _5 _B_ 18 VCC 3_3_ 02 VSS_154 VSS_0 45
L2 5 VC C1 _5 _B_ 19 VCC GL AN3 _3 A27 T13 VSS_155 VSS_0 44 AF20
M2 3 1 U_ 6. 3V_ X5 R_04 L6 5 GLCI _PL L T14 AF15
M2 4 VC C1 _5 _B_ 20 A2 . 1U _1 0V_ X7R_ 04 HC B16 08 KF-1 21 T25_06 T15 VSS_156 VSS_0 43 AF13
M2 5 VC C1 _5 _B_ 21 VCC 3_3_ 08 B1 C5 26 C525 T16 VSS_157 VSS_0 42 AE9
N2 4 VC C1 _5 _B_ 22 VCC 3_3_ 09 B9 C514 T17 VSS_158 VSS_0 41 AE8
N2 5 VC C1 _5 _B_ 23 VCC 3_3_ 10 G1 1 1U _6 .3V_0 4 .1U_ 10 V_X7 R_ 04 T18 VSS_159 VSS_0 40 AE6
P2 3 VC C1 _5 _B_ 24 VCC 3_3_ 11 G3 10 U_6. 3V_X5 R_ 08 T19 VSS_160 VSS_0 39 AE5
VC C1 _5 _B_ 25 VCC 3_3_ 12 VSS_161 VSS_0 38
P2 4 VC C1 _5 _B_ 26 VCC 3_3_ 13 H7 T2 VSS_162 VSS_0 37 AE25
P2 5 J2 T29 AE19
R2 4 VC C1 _5 _B_ 27 VCC 3_3_ 14 K8 T5 VSS_163 VSS_0 36 AE18
R2 5 VC C1 _5 _B_ 28 VCC 3_3_ 15 L8 U 13 VSS_164 VSS_0 35 AE16
VC C1 _5 _B_ 29 VCC 3_3_ 16 3VS 3VS VSS_165 VSS_0 34
T2 3 VC C1 _5 _B_ 30 U 14 VSS_166 VSS_0 33 AE15
T2 4 3VS U 15 AE14
T2 5 VC C1 _5 _B_ 31 U 16 VSS_167 VSS_0 32 AE13
T2 6 VC C1 _5 _B_ 32 A12 V_ 3P3 _C L_ R R 35 5 0 _0 4 U 17 VSS_168 VSS_0 31 AE12
T2 8 VC C1 _5 _B_ 33 VC CL AN3_3_1 B12 C2 00 C2 16 C209 C1 71 C2 04 C176 U 18 VSS_169 VSS_0 30 AE10
U2 4 VC C1 _5 _B_ 34 VC CL AN3_3_2 U 23 VSS_170 VSS_0 29 AE1
U2 8 VC C1 _5 _B_ 35 .1U_ 10 V_X7R _0 4 1U _6 .3V_X5R _0 4 10 U_6. 3V_X5R _08 V13 VSS_171 VSS_0 28 AD9
U2 9 VC C1 _5 _B_ 36 U1 . 1 U_ 10V_X7R _04 1U _6 .3 V_X5R _0 4 10 U_6. 3V_X5 R_ 08 V14 VSS_172 VSS_0 27 AD7
VC C1 _5 _B_ 37 VC CSU S3_3_07 3V VSS_173 VSS_0 26
U3 0 U2 V15 AD3
V2 3 VC C1 _5 _B_ 38 VC CSU S3_3_08 U3 V16 VSS_174 VSS_0 25 AD22
VC C1 _5 _B_ 40 VC CSU S3_3_10 VSS_176 VSS_0 23
W2 4 U7 1 .5 VS V_ 1P5 _I CH V26 AD16
W2 5 VC C1 _5 _B_ 42 VC CSU S3_3_12 U8 V28 VSS_178 VSS_0 21 AD15
Y2 3 VC C1 _5 _B_ 43 VC CSU S3_3_13 V8 V3 VSS_179 VSS_0 20 AD14
Y2 4 VC C1 _5 _B_ 44 VC CSU S3_3_14 W7 V7 VSS_180 VSS_0 19 AC8
Y2 5 VC C1 _5 _B_ 45 VC CSU S3_3_15 W8 C2 15 C1 81 C205 C1 79 C5 15 C517 W1 VSS_181 VSS_0 18 AC6
VC C1 _5 _B_ 46 VC CSU S3_3_16 Y8 W 14 VSS_182 VSS_0 17 AC5
VC CSU S3_3_17 .1 U_ 10V_X7R _04 *1U _6 .3V_X5R _04 .1U_ 10 V_X7R _ 04 W 16 VSS_183 VSS_0 16 AC30
VSS_184 VSS_0 15
.1 U_10 V_X7R _0 4 .1U_ 10 V_X7R _0 4 4. 7U _6.3 V_0 6 W 23 AC29
A17 W 29 VSS_185 VSS_0 14 AC24
L8 5 VC CSU S3_3_02 B20 W 30 VSS_186 VSS_0 13 AC12
VC CSU S3_3_03 VSS_187 VSS_0 12
1. 5VS V_1P5_ IC H AG2 9 VC CD MI _1 VC CSU S3_3_04 C2 0 W5 VSS_188 VSS_0 11 AC1
AG3 0 E17 3V W6 AB3
HC B1005 KF-1 21 T2 0_ 04 VC CD MI _2 VC CSU S3_3_05 H1 5 Y 26 VSS_189 VSS_0 10 AB28
AC1 3 VC CSU S3_3_06 Y 28 VSS_190 VSS_0 09 AB26
1. 5VS AD1 1 VC C1 _5 _A_ 09 A22 Y3 VSS_191 VSS_0 08 AA6
VC C1 _5 _A_ 10 VC CR TC RTCVC C VSS_192 VSS_0 07
AD1 2 AC7 Z1701 C2 25 C2 20 C196 C2 23 C2 02 C203 Y7 AA5
AD1 3 VC C1 _5 _A_ 11 VCC SUS1_1_1 H1 7 Z1702 C 22 1 *. 1U _1 0V_ X7R_ 04 VSS_193 VSS_0 06 AA30
AE1 1 VC C1 _5 _A_ 12 VCC SUS1_1_2 C 18 8 *. 1U _1 0V_ X7R_ 04 .1 U_ 10V_X7R _04 1U _6 .3 V_X5R _0 4 10 U_6. 3V_X5R _08 VSS_0 05 AA29
VC C1 _5 _A_ 13 VSS_0 04
AF1 1 A23 V_1P1 EP_I NT .1 U_10 V_X7R _0 4 1U _6.3 V_X5R _0 4 10 U_ 6. 3V_ X5 R_08 AA1
AH1 0 VC C1 _5 _A_ 14 VC CC L1_1 AK27 VSS_0 03 A30
AH1 1 VC C1 _5 _A_ 15 AH 29 VSS_194 VSS_0 02 A1
VC C1 _5 _A_ 16 I CH _1 .1 VS VSS_195 VSS_0 01
AJ1 0 VC C1 _5 _A_ 17 VCC SUS1_5_1 H1 8 V_1P1 _STBY_ IN T AJ4 VSS_196
AK1 0 VC C1 _5 _A_ 18 VCC SUS1_5_2 AD8 AF3 VSS_197
AC1 7 B27
AD1 7 VC C1 _5 _A_ 01 VSS_198
AE1 7 VC C1 _5 _A_ 02 C 180 C 524 C1 66 C1 93 C161 C1 68 C1 83 C189 6 OF6
AF1 7 VC C1 _5 _A_ 03
AH1 7 VC C1 _5 _A_ 04 . 1U _10V_ X7 R_04 . 1U _1 0V_X7R_ 04 *.1U_ 10 V_X7R _0 4 1U _6 .3 V_X5R _0 4 10 U_6. 3V_X5R _08 I CH 10 R IC
AH1 8 VC C1 _5 _A_ 05 .1 U_10 V_X7R _0 4 *1U _6 .3 V_X5R _0 4 10 U_ 6. 3V_ X5 R_08
VC C1 _5 _A_ 06
AJ1 8
AK1 8 VC C1 _5 _A_ 07
VC C1 _5 _A_ 08 1 .5 VS
5OF6
IC H1 0R MATER IAL = I C
C1 63 C1 62 C165 C1 60 C1 97 C174
43 IC H_ 1. 1VS
4, 24 ,3 0, 31 ,39. .4 1, 43 .. 45 5V
.1 U_ 10V_X7R _04 1U _6 .3 V_X5R _0 4 10 U_6. 3V_X5R _08
1 0. .1 3, 19 ,4 1, 43 1. 1VS 6,1 2, 13 ,1 5, 16,2 0, 24 ,2 6, 29.. 32 ,40, 41,4 3 3 V .1 U_10 V_X7R _0 4 1U _6.3 V_X5R _0 4 10 U_ 6. 3V_ X5 R_08
11 ,1 3, 15 ,29, 32 ,4 1, 43 1. 5VS 7. .9 ,1 2, 13,1 5, 16 ,1 8. .3 0, 32 ,39, 41,4 3 3 VS
4 ,5 ,1 5, 18,3 9, 44 CPU _VTT 12 ,18, 20 .. 23 ,27, 29 .. 31,4 3 5VS
B - 18 ICH10 Power/GND
Schematic Diagrams
Intel Debug Card & Fan Control
Intel Debug Card CPU FAN CONTROL

5VS_CFAN 5 VS U 12 C PU _FON#
C PU_FON # 1 8
2 FON GND 7 R2 33
? ? ? ? ? ? ? ? , ? ? QPI? ? ? Intel ? ? ? ? 3 VI N GND 6
VOUT GND *0 _04
4 5
External Connection 28 CPU_FAN VSET GND
CPU_VTT XDP1 APE887 2

4 H_MBP_ N[7 :0] H_MBP_ N[7 :0]
4 H_PRD Y_N H_PRD Y_N 43 55
H_PREQ_N 44 VC C_OBS_ AB TCK1 57 H_ TCK 5VS 5 VS_ CFAN
4 H_PREQ_N VC C_OBS_ CD TCK0
4 H_TCK H_TCK 52 H_ TDO J_ CPUFAN1
H_TDI H_PREQ_N 3 TDO 54 H_ TRST_ N J _C PUF AN1
4 H_TDI H_TDO H_PRD Y_N 5 OBSFN _A0 TRSTN 56 H_ TDI C38 5 1
4 H_TDO OBSFN _A1 TDI 2 3
4 H_TMS H_TMS H_MBP_ N0 9 OBSD ATA_A_0 TMS 58 H_ TMS C38 3 3
4 H_TRST_N H_TRST_N H_MBP_ N1 11 OBSD ATA_A_1 .1U _16 V_ 04 1
4 CPU_TAPGOOD CPU_TAPGOOD H_MBP_ N2 15 OBSD ATA_A_2 H OOK0 39 PRI_ PW RGD_ XDP 10U _10 V_08 8 520 5-0 300 1
H_MBP_ N3 17 41 CPU_H OOK1_ XDP
CK_H_ BCLK_I TP_D N OBSD ATA_A_3 H OOK1 45 CPU_TAPGOOD
4 CK_H _BCL K_ ITP_ DN H OOK2
4 CK_H _BCL K_ ITP_ DP CK_H_ BCLK_I TP_D P 21 OBSFN _B0 H OOK3 47
23 40 CK_H_ BCLK_I TP_D P
H_MBP_ N4 27 OBSFN _B1 ITPC LK/H OOK4 42 CK_H_ BCLK_I TP_D N 28 C PU _FANSEN
SDATA H_MBP_ N5 29 OBSD ATA_B_0 ITPCLK*/H OOK5 46 FPGA_ H_C PU RST_ N R1 4 .7K_ 04
7 ..9 ,1 2,1 6,1 9,3 2 SDATA OBSD ATA_B_1 RESET*/H OOK6 3VS
7. .9, 12, 16 ,19 ,32 SC LK SCLK H_MBP_ N6 33 48 HWRST#
H_MBP_ N7 35 OBSD ATA_B_2 DBR*/H OOK7 C A
EXT_ TBG_AK36 OBSD ATA_B_3 1 D2 SC S355 V
1 2 EXT_ TBG_AK36 GND
SDATA 51 SD A GND 7
SCLK 53 13
4 ,1 2,1 6 H_PWR GD
1 2,1 6 ICH _VRM_ PWRGD
H_PWR GD
ICH _VRM_ PWRGD EXT_ TBG_AK36 4
6
SC L
OBSFN _C0
GND
GND
GND
19
25
31
Sheet 18 of 47
10 OBSFN _C1
OBSD ATA_C_ 0
GND
GND
37
SYS FAN CONTROL
4,1 2 H_C PU RST#
4,1 6 HWRST#
H_C PU RST#
HWR ST#
12
16
18
OBSD ATA_C_ 1
OBSD ATA_C_ 2
OBSD ATA_C_ 3
GND
GND
GND
49
59
2
8
5VS_SFAN 5 VS
SY S_ FON# 1
U 13
8 SYS_ FON#
Intel Debug Card &
GND FON GND
22
24
28
30
OBSFN _D0
OBSFN _D1
OBSD ATA_D_ 0
GND
GND
GND
14
20
26
32 28 SY S_ FAN
2
3
4
VI N
VOUT
VSET
GND
GND
GND
7
6
5
R2 34
*0 _04
Fan Control
34 OBSD ATA_D_ 1 GND 38
H_ PWRGD R 251 1K_0 4 PRI_ PW RGD _XDP 36 OBSD ATA_D_ 2 GND 50 APE887 2
OBSD ATA_D_ 3 GND 60
I CH_VR M_PWRGD R 249 0_0 4 CPU_ HOOK1 _XDP GND_ XDP_PRESENT*
H_ CPURST# R 250 1K_0 4 FPGA_H_C PURST_ N *XDP 5VS 5 VS_ SFAN

J _SYSFAN 1
C38 6 1
2
C3 84 3
.1 U_16 V_04
10 U_1 0V_08 8 52 05- 030 01
J _SY SFA N1
SYS_FANSEN 3
3VS R2 *4 .7K_ 04 1
C A
D1 *SCS3 55V
VGA FAN CONTROL
RAM FAN CONTROL
5VS_VFAN 5VS U1 0 5VS_RFAN 5 VS U 25
VGA_ FON# 1 8 R AM_FON # 1 8 R AM_FON#
2 FON
VI N
GND
GND 7 2 FON
VI N
GND
GND 7
3 VOUT GND 6 3 VOUT GND 6 R4 11
4 5 4 5
28 VGA_ FAN VSET GND 28 R AM_FAN VSET GND *0 _04
APE887 2 APE887 2
VGA_FON #
5VS 5 VS_ RFAN
R2 30 J _DDR FAN 1
*0_ 04 C58 5 1
5 VS 5VS_VFAN C1 78 2
J_VGAFAN1 .1 U_16 V_04 3
10 U_1 0V_08 8 52 05- 030 01
C3 81 1
C 382 2
. 1U_ 16V_0 4 3 J _DD RFA N1
1 0U_ 10V_0 8 85 205 -03 001 28 RAM_FANSEN
3
R34 9 4.7 K_ 04 1
J_V GAF AN1 3VS
28 VGA_FANSEN 3 C A
D 23 SCS355 V
3 VS R2 32 4. 7K_04 1
C A
D11 SCS35 5V
1 2 ,1 7 ,2 0 ..2 3 , 27 , 29 . .3 1 ,4 3 5 V S
4 ,5 , 15 , 39 , 44 CPU_ V TT
7 .. 9 ,1 2 ,1 3 ,1 5 ..1 7 ,1 9 .. 3 0 ,3 2 ,3 9 ,4 1 ,4 3 3 V S
Intel Debug Card & Fan Control B - 19

Schematic Diagrams
Clock Generator CV193
3 VS C LKVDD
L3 2
1 2
HC B20 12 KF-121T30_08
C251 C 243 C 24 2 C244 C 21 2 C2 11
.1 U_ 16 V_04 10U_ 6. 3V_X5R_08 .1 U_16V_04 .1 U_ 16V_ 04 U5

. 1U _1 6V_04 . 1U _16V_04 16 54
Vdd_PL L3 C PUT0 CK_133M_C PU_D P 4
9 53 C PU
2 Vdd_48 C PUC 0 CK_133M_C PU_D N 4
Vdd_PC I
3 VS CL KVDD_ IO 61 51
Vdd_R EF C PUT1 CK_133M_I OH_DP 1 0
L1 9 39 50 IO H
Vdd_SR C C PUC 1 CK_133M_I OH_DN 10
1 2 55 Vdd_C PU
HC B20 12 KF-121T30_08 47
SR CT8 /CPU _ ITPT PCI E_C LK_ ROBSO N 3 2
C208 C2 07 C 21 3 C246 C 21 4 C2 45 12 46 PC I E1 X NEW C A RD
Vdd_I O SR CC 8 /C PU _ ITPC PCI E_C LK_ ROBSO N# 32
20
.1 U_ 16 V_04 10U _6.3V_X5R_08 .1 U_16V_04 .1 U_ 16V_ 04 26 Vdd_PL L3 _I O 14
Vdd_SR C_IO SR CC 0 / D OT96C PCI E_C LK_ NEWC ARD # 32
. 1U _1 6V_04 . 1U _16V_04 45 13 ROBSON
36 Vdd_SR C_IO SR CT0 / D OT96 T PCI E_C LK_ NEWC ARD 32
Vdd_SR C_IO
17
SRC T1/ 25 MH z0 PCI E_C LK_ WAN 29
49 18 PC I E1 X W LA N
R 12 0 Vdd_C PU_IO SRCC 1/ 25MH z1/ 24. 57 6MHz PCI E_C LK_ WAN# 29
3VS Se l_SRC 1_ 25 _2 4. 576 ** 48 21

Sel_SRC 1_25_24.5 76 ** SRCT2/ SATA CK_100M_SATA_ H 1 5
22 SA T A
SRCC 2/ SATA CK_100M_SATA_ L 1 5
1 00 K_04
R121 24 NEW CAR D_C LKR EQ# 32 NEW C A RD _ C LK REQ
SRC T3 / CR #_C 25 W LA N _ CL KR EQ
*100K_0 4 WAN _C LKR EQ # 2 9
3VS SRC C3 / CR #_D
27
SR CT4 CK_PE_1 00 M_I OH 0_DP 11
28 IO H PC IE1 6 X C L K
SR CC 4 CK_PE_1 00 M_I OH 0_DN 11
R165 1 0K_04 PCI 2R R 543 *10 K_0 4 XTAL I 60
Xtal_ In
Sheet 19 of 47 R168
R545
*1 0K_ 04 PCI 4R
*1 0K_ 04 CK_ PCI F1

R 544
R 160
10 K_04
10 K_04
2
X1
1
14 .3 1MHz
XTAL O 59
Xtal_ Ou t
PC I_Sto p#/ SR CT5
C PU_ Stop#/ SR CC 5
38
37
41
PC I_St op#
C PU_St op #
R562
R563
0_04
0_04
IC H_ PCI _STP
IC H_ CPU _STP
IC H_ PCI _STP 1 6
IC H_ CPU _STP 16
CK_PE_MXM_DP 20
Clock Generator C2 29 C 233
27 P_50V_ 04 27P_ 50 V_04

SR CT6
SR CC 6
SRC T7/ C R# _F
40
44
43
CK_PE_MXM_DN 20
CK_PE_1 00 M_I OH 1_DP 11

PC I E1 6 X M X M 3 .0
IO H PC IE1 6 X C L K
CV193 SRC C7/ C R# _E
SR CT9
SR CC 9
30
31
CK_PE_1 00 M_I OH 1_DN 11
CK_PE_1 00 M_I CH _H 15
CK_PE_1 00 M_I CH _L 15 IC H
1. 1VS R 54 6 1K_04 CK_PW RG D_R 56
16 C K_PW RGD C KPW RG D/ PD#
FSB 57 34
R 16 9 *1 K_ 04 FSA R 12 2 *10K_0 4 FS_B / Te st Mo de SRC T1 0 35 PCI E_C LK_ JMB 2 5
3VS SRC C1 0 PCI E_C LK_ JMB# 25 PC I E1 X JM B
R 12 9 1 K_04 FSB 33
SRC T1 1/ CR #_H PCI E_C LK_ GLAN 26
32 G LA N
R 12 8 *1 K_ 04 FSC 64 SR CC 11/ CR #_G PCI E_C LK_ GLAN # 2 6
7.. 9, 12, 16 ,1 8, 32 SCLK SCL
7. .9 ,1 2, 16, 18 ,32 SD ATA 63 SDA PC I0/ C R# _A 1
3
FSA ,F SC ? ? ? , SW C on tr ol PCI1 /C R# _B
15 4 PC I2R R157 33_0 4
VSS_I O *PCI 2/ SR_EN ABLE PCLK_TPM 29 T PM
19 5 PC I3R R158 33_0 4
11 Vss _PL L3 **PC I3/SATA_SEL 6 PC I4R R159 33_0 4 CK_P_3 3M_I CH 1 6
Vss _48 PCI 4/ SRC 5_ EN CK_P_3 3M_SI O 28 EC
52
Vss _C PU
8
58 VSS_PC I 7 C K_PCI F1
23 Vss _R EF PC IF5/ I TP_ EN
29 Vss _SR C 10 FSA R161 33_04
Vss _SR C USB 48 / FS_A CK_USB_ 48 M_I CH 15
1. 1VS 42
Vss _SR C
62 FSC R127 33_04
REF / FS_C / Te st Sel CK_14M_ IC H 16
3VS
R170 I DTC V193 R 547 *47 K_04 3VS
1K_ 04 R 548 47K_0 4
R14 4 R 549 *33 K_04

4.7 K_04 Z19 06 R 550 33K_0 4
R16 6 10 K_0 4 PC I3 R
3VS
C
Z1903 B Q19
E2N 3904 R 167
R142
*10K_04 C *10K_04
PW RG D_PS_ BUF Z1 90 4 B Q18 R 14 3
1 6 PW RGD_PS_BUF
E2N3 90 4 1K_0 4
H_FSBSEL0 FSA For SLG8XP549T
PW RG D_3 V R6 14 10K_ 04
16 PW RGD _3V
1. 1VS
R133
*1K_04 FSC FSB FSA CPU SRC[7..0] PCI USB DOT REF CK_P_33M_SIO C253 *1 0P_50V_04
3VS R 13 2
100_04 CK_P_33M_IC H C252 *1 0P_50V_04
Z19 02 1 0 1 100 100 33.3 48 96 14.318
CK_1 4M_I CH C199 *1 0P_50V_04
R13 1
4.7 K_04 0 0 1 133 100 33.3 48 96 14.318 CK_U SB_4 8M_IC H C254 *1 0P_50V_04
C
Z1901 B Q15
0 1 1 166 100 33.3 48 96 14.318
E2N 3904
R130
*10K_04 C 0 1 0 200 100 33.3 48 96 14.318
PW RG D_PS_ BUF Z1 90 5 B Q14 R 12 4
1 6 PW RGD_PS_BUF
E2N3 90 4 1K_0 4
H_FSBSEL2 FSC 0 0 0 266 100 33.3 48 96 14.318
PW RG D_3 V R6 15 10K_ 04
16 PW RGD _3V
1 0 0 333 100 33.3 48 96 14.318
1 1 0 400 100 33.3 48 96 14.318
6, 12, 13 ,15. .1 7, 20 ,24 ,2 6, 29.. 32 ,40,4 1, 43 3V
7 ..9 ,1 2, 13 ,15. .18,20. .3 0, 32,39,41, 43 3VS
10 .. 13 ,17, 41, 43 1. 1VS
B - 20 Clock Generator CV193

Schematic Diagrams
MXM3.0 PCI-E
VIN VIN
4A
MXM 3.0 E1 -1
E1 -2
J_ MXM1A
PWR_SRC PWR _SRC
E2 -1
E2 -2
5VS
3V
3V
E1 -3 PWR_SRC PWR _SRC E2 -3 R197

PWR_SRC PWR _SRC
E1 -4 E2 -4 C3 51 *. 1u_1 6V_ 04
E1 -5 PWR_SRC PWR _SRC E2 -5 Q55 10K_04
5
E1 -6 PWR_SRC PWR _SRC E2 -6 G 2N70 02W
PWR_SRC PWR _SRC
E1 -7 E2 -7 R62 0 *0_0 4 1
E1 -8 PWR_SRC PWR _SRC E2 -8 MXM1 _SMD S D 12, 15,16 ,28, 29 PLTRST# 4 MXM_RST#
PWR_SRC PWR _SRC SMD_VGA_ THERM 28
E1 -9 E2 -9 2
PWR_SRC PWR _SRC 28 EC _PCI E_ RST#
E1- 10 E2 -10
E3 -1 PWR_SRC PWR _SRC E4 -1 Q56 U7
EX_ DVI _HPD R2 18 *1 00K_04 E3 -2 GND GND E4 -2 G 2N70 02W 74 AHC1 G08GW
3
GND GND
E3 -3 E4 -3
E3 -4 GND GND E4 -4 MXM1 _SMC S D R 189 1 0K_ 04
GND GND SMC_VGA_ THERM 28 3VS
MX M 3 .0 M OD U L E B O AR D C O N N E CT OR
E3 -5 E4 -5
GND GND J_ MXM1B
E3 -6 E4 -6
E3 -7 GND GND E4 -7 15 3 154 MXM_CLKREQ #
GND GND 19 CK_ PE_MXM_ DN
E3 -8 E4 -8 15 5 PEX_ REFCLK# CLK_REQ# 156 MXM_RST#
GND GND 19 CK_ PE_MXM_ DP PEX_ REFCLK PEX_RST#
5VRUN E3 -9 E4 -9 15 7 158
E3- 10 GND GND E4 -10 15 9 GND VGA_DDC_DAT 160 CRT_D DC_DAT 23
GND GND CRT_D DC_CLK 23
1 2 PRSNT_ R# R139 0 _04 16 1 RSVD VGA_DDC_CL K 162
5V PRSNT_R# MXM_PRESNT# 15, 28 RSVD VGA_VSYNC EX_DAC_VSYNC 23
3 4 LVDS_UCLKN 16 3 164
PWR_SRC(10A)--7-20V 5 5V WAKE# 6 MXM_PWRGD
2 4 LVDS_UCLKN
2 4 LVDS_UCLKP
LVDS_UCLKP 16 5 RSVD VGA_HSYNC 166
EX_DAC_HSYNC 2 3
7 5V PWR_GOOD 8 Z2001 R141 0 _04 16 7 RSVD GND 168

5VRUN(2.5A)--5V 9
5V PWR_EN
10 R140 *0_ 04
MXM_PWR_EN 2 8
MXM_PWROK 21 2 4 LVDS_UN[ 3:0] 16 9
RSVD VGA_R ED
170
EX_DAC_R 2 3
EX_DAC_G 2 3
11 5V RSVD 12 17 1 LVDS_UCLK# VGA_GREEN 172
3VRUN(1A)--3.3V 13 GND RSVD 14 R145 1 0K_ 04
2 4 LVDS_UP[3: 0]
17 3 LVDS_UCLK VGA_ BL UE 174
EX_DAC_B 23
GND RSVD 3VS GND GND
15 16 R151 *2. 2K_ 04 LVDS_UN3 17 5 176 L VDS_LCL KN L VDS_LC LKN 24
M X M 3 .0 M O D U L E B O A R D CO N NE C TO R
17 GND RSVD 18 AC/ BATL D S LVDS_UP3 17 7 LVDS_UTX3# LVDS_LCLK# 178 L VDS_LCL KP
GND PWR_LEVEL L VDS_LC LKP 24
R138 0_04 PEX_STD_ SW# 19 20 PWR_ LEVEL D03 17 9 LVDS_UTX3 L VDS_LCL K 180
Sheet 20 of 47
PEX_STD_SW# TH_ OVERT# GND GND
21 22 TH_ALERT# GQ57 LVDS_UN2 18 1 182 LVDS_LN3
23 VGA_DISABLE# TH_ ALERT# 24 2N7 002W LVDS_UP2 18 3 LVDS_UTX2# L VDS_LTX3# 184 LVDS_LP3
24 ENAVDD PNL_PWR_EN TH_PWM AC/BATL # 28 ,42
25 26 R152 0 _04 18 5 LVDS_UTX2 LVDS_L TX3 186
24 ENABKL PNL_BL_EN GPIO0 VGATHERM_ALERT# 2 8 GND GND
27 28 R146 2.2 K_ 04 LVDS_UN1 18 7 188 LVDS_LN2
MXM3.0 PCI-E
R134 4.3K_04 29 PNL_BL_PWM GPIO1 30 3VS LVDS_UP1 18 9 LVDS_UTX1# L VDS_LTX2# 190 LVDS_LP2
3VS HDMI_CEC GPIO2
R136 4.3K_04 31 32 MXM1_ SMD R155 4.7 K_ 04 19 1 LVDS_UTX1 LVDS_L TX2 192
DVI_ HPD SMB_ DAT 3VS GND GND
33 34 MXM1_ SMC R163 4.7 K_ 04 D03 LVDS_UN0 19 3 194 LVDS_LN1
24 DDCC_DAT 35 L VDS_DDC_ DAT SMB_ CLK 36 LVDS_UP0 19 5 LVDS_UTX0# L VDS_LTX1# 196 LVDS_LP1
24 DDCC_CLK L VDS_DDC_ CLK GND
37 38 19 7 LVDS_UTX0 LVDS_L TX1 198
GND OEM MXM_ BI T_CLK 1 6 GND GND
39 40 MXM_ SDATO 16 19 9 200 LVDS_LN0
1 6 MXM_AC _RESET# 41 OEM OEM 42 22 HDMI_C #2 20 1 DP_C_L0 # L VDS_LTX0# 202 LVDS_LP0
16 SDATI2 OEM OEM MXM_ SYNC 16 22 H DMI_C2 L VDS_LN [3:0 ] 24
R17 4 0_04 MXMSPDI F- OUT 43 44 20 3 DP_C_L0 LVDS_L TX0 204
2 7,30 SPDI F- OUT OEM OEM HDMI_S1 22 GND GND L VDS_LP[3 :0] 24
45 46 PEG_TXN[15: 0] 11 20 5 206
47 OEM GND 48 PEG_ TXN15C C2 56 .1U _10V_X7R_ 04PEG_TXN15 22 HDMI_C #1 20 7 DP_C_L1 # D P_D_ L0# 208 HDMI_ D#2 22
11 PEG_ RXN[15 :0] GND PEX_ TX15# PEG_ TXP[15: 0] 11 22 H DMI_C1 HDMI_ D2 2 2
PEG_RXN15. 1U_10 V_X7R_04 C273PEG_RXN15 C49 50 PEG_ TXP15C C2 59 .1U _10V_X7R_ 04PEG_TXP1 5 20 9 DP_C_L1 DP_ D_L0 210
11 PEG_ RXP[ 15: 0] PEX_RX15 # PEX_TX15 GND GND
PEG_RXP15. 1U_10 V_X7R_04 C276PEG_RXP15C 51 52 21 1 212
53 PEX_RX15 GND 54 PEG_ TXN14C C2 64 .1U _10V_X7R_ 04PEG_TXN14 22 HDMI_C #0 21 3 DP_C_L2 # D P_D_ L1# 214 HDMI_ D#1 22
GND PEX_ TX14# 22 H DMI_C0 HDMI_ D1 2 2
PEX_RX14 # PEX_TX14 GND GND
59 PEX_RX14 GND 60 PEG_ TXN13C C2 71 .1U _10V_X7R_ 04PEG_TXN13 22 HDMI_CCL K# 21 9 DP_C_L3 # D P_D_ L2# 220 HDMI_ D#0 22
GND PEX_ TX13# 2 2 HDMI _CCLK HDMI_ D0 2 2
PEX_RX13 # PEX_TX13 GND GND
65 PEX_RX13 GND 66 PEG_ TXN12C C2 74 .1U _10V_X7R_ 04PEG_TXN12 22 HDMI_C_ SDA 22 5 DP_C_AUX# D P_D_ L3# 226 HDMI_ DCLK# 22
GND PEX_ TX12# 22 HDMI_C_ SCL HDMI_ DCLK 22
PEG_RXN12. 1U_10 V_X7R_04 C286PEG_RXN12 C67 68 PEG_ TXP12C C2 77 .1U _10V_X7R_ 04PEG_TXP1 2 22 7 DP_C_AUX DP_ D_L3 228
PEX_RX12 # PEX_TX12 RSVD GND
71 PEX_RX12 GND 72 PEG_ TXN11C C2 78 .1U _10V_X7R_ 04PEG_TXN11 23 1 RSVD DP_D_AUX# 232 HDMI_ D_SDA 22
GND PEX_ TX11# HDMI_ D_SCL 22
PEG_RXN11. 1U_10 V_X7R_04 C290PEG_RXN11 C73 74 PEG_ TXP11C C2 82 .1U _10V_X7R_ 04PEG_TXP1 1 23 3 RSVD DP_D_AUX 234
PEX_RX11 # PEX_TX11 RSVD DP_C_H PD HDMI_ CHPD 22
77 PEX_RX11 GND 78 PEG_ TXN10C C2 83 .1U _10V_X7R_ 04PEG_TXN10 23 7 RSVD DP_D_H PD 238 HDMI_ DHPD 22
PEG_RXN10. 1U_10 V_X7R_04 C295PEG_RXN10 C79 GND PEX_ TX10# 80 PEG_ TXP10C C2 87 .1U _10V_X7R_ 04PEG_TXP1 0 23 9 RSVD RSVD 240
PEX_RX10 # PEX_TX10 RSVD RSVD
83 PEX_RX10 GND 84 PEG_ TXN9C C2 88 .1U _10V_X7R_ 04PEG_TXN9 24 3 RSVD RSVD 244
PEG_RXN9 . 1U_10 V_X7R_04 C300PEG_RXN9C85 GND PEX_TX9# 86 PEG_ TXP9C C2 92 .1U _10V_X7R_ 04PEG_TXP9 24 5 RSVD GND 246 EX_D VI _DATAN5
PEX_RX9# PEX_TX9 RSVD DP_B_ L0#
PEG_RXP9 . 1U_10 V_X7R_04 C303PEG_RXP9C87 88 2 3 EX_DVI_ DATAN[ 5:0] 24 7 248 EX_D VI _DATAP5
89 PEX_RX9 GND 90 PEG_ TXN8C C2 93 .1U _10V_X7R_ 04PEG_TXN8 24 9 RSVD DP_B_L0 250
GND PEX_TX8# 2 3 EX_DVI_ DATAP[5: 0]
PEG_RXN8 . 1U_10 V_X7R_04 C306PEG_RXN8C91 92 PEG_ TXP8C C2 96 .1U _10V_X7R_ 04PEG_TXP8 25 1 RSVD GND 252 EX_D VI _DATAN4
PEX_RX8# PEX_TX8 GND DP_B_ L1#
PEG_RXP8 . 1U_10 V_X7R_04 C310PEG_RXP8C93 94 EX_DVI_DATAN2 25 3 254 EX_D VI _DATAP4
95 PEX_RX8 GND 96 PEG_ TXN7C C2 97 .1U _10V_X7R_ 04PEG_TXN7 EX_DVI_DATAP2 25 5 DP_A_L0# DP_B_L1 256
PEG_RXN7 . 1U_10 V_X7R_04 C312PEG_RXN7C97 GND PEX_TX7# 98 PEG_ TXP7C C3 01 .1U _10V_X7R_ 04PEG_TXP7 25 7 DP_A_L0 GND 258 EX_D VI _DATAN3
PEG_RXP7 . 1U_10 V_X7R_04 C316PEG_RXP7C99 100 EX_DVI_DATAN1 25 9 260 EX_D VI _DATAP3
1 01 PEX_RX7 GND 102 PEG_ TXN6C C3 02 .1U _10V_X7R_ 04PEG_TXN6 EX_DVI_DATAP1 26 1 DP_A_L1# DP_B_L2 262
PEG_RXN6 . 1U_10 V_X7R_04 C317PEG_RXN6C
1 03 GND PEX_TX6# 104 PEG_ TXP6C C3 04 .1U _10V_X7R_ 04PEG_TXP6 26 3 DP_A_L1 GND 264
PEG_RXP6 . 1U_10 V_X7R_04 C320PEG_RXP6C
1 05 106 EX_DVI_DATAN0 26 5 266 EX_DVI_DATAN[5 :0] 23
1 07 PEX_RX6 GND 108 PEG_ TXN5C C3 05 .1U _10V_X7R_ 04PEG_TXN5 EX_DVI_DATAP0 26 7 DP_A_L2# DP_B_L3 268
GND PEX_TX5# EX_DVI_DATAP[5:0 ] 23
1 09 110 PEG_ TXP5C C3 08 .1U _10V_X7R_ 04PEG_TXP5 26 9 DP_A_L2 GND 270
PEX_RX5# PEX_TX5 GND DP_B_AUX#
1 11 112 23 EX_DVI_CLK# 27 1 272
1 13 PEX_RX5 GND 114 PEG_ TXN4C C3 09 .1U _10V_X7R_ 04PEG_TXN4 27 3 DP_A_L3# DP_B_AUX 274
GND PEX_TX4# 23 EX_DVI_CLK
1 15 116 PEG_ TXP4C C3 13 .1U _10V_X7R_ 04PEG_TXP4 27 5 DP_A_L3 DP_ B_H PD 276
PEX_RX4# PEX_TX4 GND DP_ A_H PD EX_ DVI _HPD 23
1 17 118 27 7 278
1 19 PEX_RX4 GND 120 PEG_ TXN3C C3 14 .1U _10V_X7R_ 04PEG_TXN3 23 DVI_DDC_ DAT 27 9 DP_A_AUX# 3V3 280
GND PEX_TX3# 23 DVI_DDC_ CLK
1 21 122 PEG_ TXP3C C3 19 .1U _10V_X7R_ 04PEG_TXP3 28 1 DP_A_AUX 3V3
PEX_RX3# PEX_TX3 15,2 8 MXM_PR ESNT# PRSNT_L#
1 23 124 R2 21 *0_ 04
1 25 PEX_RX3 GND 134
GND GND 9 1782- 3140M
1 33 136 PEG_ TXN2C C3 27 .1U _10V_X7R_ 04PEG_TXN2
GND PEX_TX2#
1 35 138 PEG_ TXP2C C3 30 .1U _10V_X7R_ 04PEG_TXP2 3VRUN
1 37 PEX_RX2# PEX_TX2 140
1 39 PEX_RX2 GND 142 PEG_ TXN1C C3 32 .1U _10V_X7R_ 04PEG_TXN1
GND PEX_TX1#
1 41 144 PEG_ TXP1C C3 35 .1U _10V_X7R_ 04PEG_TXP1
1 45 PEX_RX1 GND 148 PEG_ TXN0C C3 37 .1U _10V_X7R_ 04PEG_TXN0
GND PEX_TX0#
1 47 150 PEG_ TXP0C C3 39 .1U _10V_X7R_ 04PEG_TXP0
1 51 PEX_RX0 GND
GND
91 782-3 140M 6,12 ,13, 15.. 17,2 4,26, 29. .32, 40,41 ,43 3V
7 ..9 ,12, 13,1 5..1 9,21. .30 ,32, 39,41 ,43 3VS
12,1 7,18, 21.. 23, 27,29 ..31 ,43 5VS
24, 30, 39.. 42,44 ,45 VI N
21 3VRU N
VIN VIN 5VRUN 3VRUN
21 5VRU N
C 198 C2 01 C54 0 C539 C210 C206 C2 19 C21 7 C195 C533 C194 C5 37 C2 38 C376
4 .7U_2 5V_08 4. 7U_2 5V_ 08 .1 U_50V_06 .1U _50V_06 .1U_ 50V_06 .1U_5 0V_ 06 .01 U_50V_X7 R_04 10U_ 25V_12 *10U_25 V_1 2 10U_25 V_1 2 *10 U_25V_12 4 .7U_2 5V_ 08 4.7 U_25V_08
.0 1U_50 V_X7R_04
CLO SE TO M XM PIN E1 C LOSE TO M XM P IN E2 C LOSE TO M X M C ONN. C LO SE TO M XM CO NN.
MXM3.0 PCI-E B - 21
Schematic Diagrams
MXM PWR, SATA ODD
MXM PWR
VDD3 3VS
R2 06 R208
*1M_04 22K_04
MXM_SY S_PWR GD# MXM_PWR OK 20
D
5VR UN
R 205 Q31 Q 32
*1K_04 Z2101 G *2N7 002W G *2 N7 002W R 207
*10 K_04
C 368
S
*0 .1u_1 6V_ 04
Z2103
3VRU N
R 213 C
*1K_04 Z2102 B
EQ3 3
C 369 *2N 3904
*0 .1u_1 6V_ 04
Sheet 21 of 47
MXM PWR,
SATA ODD
3VS 3VR UN
2A L 51 HC B2012KF-121 T30 _08
2A
C 360 C3 67 C36 4 C 359
10U _10V_08 .1 U_ 16V_04 .01 U_ 25V_ 04 10U_10V_08
SATA ODD
5VS 5VRU N
3A L 48 HC B2012KF-121 T30 _08
3A
C 358 C3 48 C34 9 C 350 C7 39
10U _10V_08 *.1 u_16V_ 04 .1U _1 6V_0 4 . 01U_25V_0 4 10U_10V_08
J _OD D1
S1
S2 SATA_TX4_R C 495 .1U_10V_X7R _04
S3 SATA_TX#4_R C 494 .1U_10V_X7R _04 SATA_ TX4 15
S4 SATA_ TX#4 1 5
S5 SATA_R X#4 _R C 493 .1U_10V_X7R _04
S6 SATA_R X4_ R C 492 .1U_10V_X7R _04 SATA_R X#4 15
S7 SATA_R X4 1 5
P1 OD D_DETECT# 16 5VS
P2
P3
P4 Z2104
P5
P6 C 144 C1 43 C489 C 490 + C 487
C 18595 -1 00A . 1U _16V_0 4 . 1U_ 16V_ 04 1U _10V_06 10U _10 V_08 1 00U _6 .3V_B2
PI N G N D1 ~4 =GN D
16, 24, 28,31,40, 42, 43,45 VDD3

6,1 2, 13, 15 .. 17, 20 ,2 4,26, 29. .32, 40, 41,43 3V
7. .9, 12,1 3,1 5. .2 0,22. .30,32, 39, 41,43 3VS
20 3VRU N
12, 17, 18 ,2 0,22, 23, 27 ,29.. 31,43 5VS
20 5VRU N
B - 22 MXM PWR, SATA ODD

Schematic Diagrams
HDMI & e-SATA
3VS D 03
HDMI HDMI_C CLK#_C C715 . 1U _10V_X7R_04
A
H DMI _C CLK# 20
D33 HDMI_C CLK_C C714 . 1U _10V_X7R_04 H DMI _C CLK 20
*BAV99
HDMI_C #1_C C711 . 1U _10V_X7R_04
AC
J_HDMI 1 L84 H DMI _C #1 20
5VS D3 4 5VS_HD MI_ PWR C 12807- 119A5- L . Z2211 HDMI_H PD HDMI_C 1_C C710 . 1U _10V_X7R_04 H DMI _C 1 20
SCS751V-4 0 L81 R490 1K_04
A C . HCB1608KF- 121T25_06 FCM1608K-121T06 HDMI_C #0_C C713 . 1U _10V_X7R_04 H DMI _C #0 20
C707 C722 C 719 C 723 D0 3 HDMI_C 0_C C712 . 1U _10V_X7R_04
D03 *220P_50V_04 H DMI _C 0 20
*22U_6.3V_08 .1U_16V_04 . 1U _16V_04 HOT PLU G DETECT 19 HD MI_HPD_R HDMI_C #2_C C709 . 1U _10V_X7R_04 H DMI _C #2 20
18 +5V
D DC/ CEC GND 17 HDMI_C 2_C C708 . 1U _10V_X7R_04 H DMI _C 2 20
HDMI_SD A 16
SDA 15 HDMI_SC L
14 SCL R491 499_1%_04
RESERVED 13 Z2210 R492 499_1%_04
HDMI _C LK# 12 CEC D35 R B551 V-30 R495 499_1%_04
TMDS C LOC K- 11 A C R496 499_1%_04
CLK SH IELD 3VS 3.3VS_HDMI
HDMI _C LK 10
TMDS C LOC K+ 9 HDMI_D ATAN0 D36 R B551 V-30 R 493 499_1%_04
8 TMDS D ATA0- A C R 494 499_1%_04
SHI ELD0 7 HDMI_D ATAP0 R 497 499_1%_04
HDMI _D ATAN1 6 TMDS D ATA0+ R 498 499_1%_04
TMDS D ATA1- 5
HDMI _D ATAP1 4 SHI ELD1 D37 RB751V- 40 Q 47
D
TMDS D ATA1+ 3 HDMI_D ATAN2 A C 2N7002W R551 *2.2K_04
2 TMDS D ATA2- 5VS 5VS_HDMI 3.3VS_H DMI
SHI ELD2
TMDS D ATA2+ 1 HDMI_D ATAP2
D03 3/ 2
G PWRO KI CH 12,15, 16, 23, 24 R552 4.7K_04 HDMI_EQ
TMD S input equalizat ion select or

Sheet 22 of 47
S
2 D1
GND 2
G ND3
GN D4
EQ =Low: HDMI 1 .3 Comp liant c able
HDMI & e-SATA

GND GN
EQ =High: 10m 28AW G H DMI c able
GN D1
G ND4
GND3
3.3VS_HDMI U37
6 VC C
12 48 HD MI_ CCLK_C
19 VC C (P)A14 47 HD MI_ CCLK#_C
25 VC C (N )B14
40 VC C 45 HD MI_ C0_C
46 VC C (P)A13 44 HD MI_ C#0_C
55 VC C (N )B13
61 VC C HDM I 42 HD MI_ C1_C
VC C (P)A12
(N )B12 41 HD MI_ C#1_C
H DMI _S1 32
20 HDMI _S1 H DMI _S2 33 S1 POR T1 39 HD MI_ C2_C
H DMI _EQ 34 S2 (P)A11 38 HD MI_ C#2_C
EQ (N )B11
H DMI _CLK 17 37 HD MI_ C_SC L
H DMI _CLK# 18 Y 4(P) SCL1 36 HD MI_ C_SD A HD MI _C_SC L 20
Z4(N) SD A1 35 HD MI_ CHPD HD MI _C_SD A 20
H DMI _DATAP0 20 HPD1 HD MI _CH PD 20
H DMI _DATAN 0 21 Y 3(P)
Z3(N)
H DMI _DATAP1 23 63 HD MI_ DCLK HD MI _DC LK 20
H DMI _DATAN 1 24 Y 2(P) (P)A24 62 HD MI_ DCLK#
Z2(N) (N )B24 HD MI _DC LK# 20
H DMI _DATAP2 26 60 HD MI_ D0 HD MI _D0 20
H DMI _DATAN 2 27 Y 1(P) (P)A23 59 HD MI_ D#0
Z1(N) HDM I (N )B23 HD MI _D#0 20
H DMI _SCL 29 SC L_SI NK (P)A22 57 HD MI_ D1 HD MI _D1 20
H DMI _SDA 30 56 HD MI_ D#1
H DMI _HPD 31 SD A_SINK POR T2 (N )B22 HD MI _D#1 20
H PD_SIN K 54 HD MI_ D2
(P)A21 53 HD MI_ D#2 HD MI _D2 20
49 (N )B21 HD MI _D#2 20
5VS_HDMI VD D 52 HD MI_ D_SC L
16 SCL2 51 HD MI_ D_SD A HD MI _D_SC L 20
VSADJ SD A2 HD MI _D_SD A 20
GN D
GN D
G ND
GN D
GND
GND
GND
50 HD MI_ DHPD
NC
NC
NC
NC
HPD2 HD MI _DH PD 20
NC
NC
NC
NC
NC
NC
NC
C740 R553
TMDS251
10
14
28
11
13
64
15
22
43
58
0.1U_16V_04 4.02K_04_1%
1
2
4
5
7
8
3
9
e-SATA
R483
L8 2
0_04
1
J _ESATA1 HDMI SWITCH
*WC M2012F2S-16 1T03 GND1 R554 4.7K_ 04 HD MI_S1
C700 .0 1U_16V_X7R _04 4 3 SATA_TX3_R 2 3. 3VS_HD MI 3.3VS_HDMI R555 4.7K_ 04 HD MI_S2
15 SA TA_TX5 TXP C741 C742 C743
15 SA TA_TX#5 C701 .0 1U_16V_X7R _04 1 2 SATA_TX#3_R 3 R556 2.2K_ 04 HD MI_D_SC L
R484 0_04 TXN 0.1U_16V_04 0. 1U_16V_04 0. 1U_16V_04 R557 2.2K_ 04 HD MI_D_SD A
R485 0_04 4 R558 2.2K_ 04 HD MI_C_SC L
GND2 R559 2.2K_ 04 HD MI_C_SD A
15 SA TA _RX#5 C702 .0 1U_16V_X7R _04 4 3 SATA_RX#3_R 5
RXN
1 5 S ATA _RX5 C703 .0 1U_16V_X7R _04 1 2 SATA_RX3_R 6
L83 RXP
*W CM2012F2S-161T03 7 GND3
R 486 0_04
PSABT5-07MNBS1NN 2N0
PI N GN D1~4=GN D
7.. 9,12,1 3, 15. .21,23. .30,32,39,41, 43 3VS
12, 17,18,20,21, 23, 27, 29..31, 43 5VS
6,12,13,15.. 17,20 ,24,26, 29. .32,40,41, 43 3V
HDMI & e-SATA B - 23

Schematic Diagrams
DVI-I
3VS
3VS
C
A
A
C 74 7 *0. 1U _16 V_0 4
U 38
C RT_DD C_ DAT 2 12
2 0 C RT_DD C_ DAT 0B0 VC C
D VI_DDC _D AT 11 D1 6 D 12 D3 BAV9 9
AC
AC
AC
2 0 D VI_ DDC _D AT 1B0 VGA_ DD C_ DATA
1 BAV99 BAV9 9
A0
10 3 EX_D AC_R L57 FCM16 08 K-121 T06 FRED
S0 GN D 2 0 EX_D AC _R .
C RT_DD C_ CL K 5 9 EX_D AC_G L56 FCM16 08 K-121 T06 FGR N
2 0 C RT_DD C_ CL K 0B1 VC C 2 0 EX_D AC _G .
D VI_DDC _C LK 8
2 0 D VI_ DDC _C LK 1B1
4 VGA_ DD C_ CL K EX_D AC_B L3 FCM16 08 K-121 T06 FBLU E
A1 2 0 EX_D AC _B .
C RT_DET# 7 6
S1 GN D C 405 C3 87 C6
*PI 5A3 15 8 R 23 7 R2 36 R4 C4 15 C 38 8 C7
H: DVI Plug-In D 03 1 50 _1 %_0 4 15 0_ 1%_ 04 1 50 _1 %_04 22 P_5 0V_0 4 2 2P_ 50 V_ 04 22 P_50 V_0 4
2 2P_ 50 V_ 04 22 P_5 0V_0 4 2 2P_50V_ 04
L: CRT Plug-In
PLEASE CLOSE TO CONNECTOR
C RT_D DC_ DAT R5 90 *0_04 VGA_ DDC _D ATA 5 VS_D VIPWR

5VS_D VIPW R
C RT_D DC_ CL K R5 91 *0_04 VGA_ DDC _C LK R 19 3 4. 7K_ 04
3 VS
R 19 0 4. 7K_ 04
R 22 R2 5
D VI_ DD C_D AT R5 92 0 _04 VGA_ DDC _D ATA R1 2 R1 1
Sheet 23 of 47 D VI_ DD C_C LK R5 93 0 _04 VGA_ DDC _C LK G

Q4
2N 70 02 W
Q3
5 VS
4 .7 K_0 4 4. 7K_ 04
4. 7K_0 4
4 .7K_ 04
D0 3 VGA_D DC _CL K S D G 2 N7 002 W DD C_ CLK_ R D DC LK C1 9 2 20 P_5 0V_0 4

DVI-I VGA_D DC _DATA S D DD C_ DATA_ R 1
2
LP1
8
7
D DC DATA C1 4 2 20 P_5 0V_0 4
EX_D AC_VSY NC S D VSYN C_R 3 6 VSY NC C1 0 2 20 P_5 0V_0 4

20 EX_D AC_ VSYNC
Q2 4 5
EX_D AC_HSYN C S D G 2 N7 002 W HSY NC_ R H SYNC C8 2 20 P_5 0V_0 4
20 EX_D AC_ HSYN C
Q1 FCA3 21 6KF4 -12 1T03
AC
AC
AC
AC
G 2N 70 02 W D5 D4 D1 4 D 15
BAV99 BAV99 *BAV9 9 *BAV99
5 VS
C
A
A
5 VS 5VS 5 VS 5VS
3VS D 03
5 VS_D VIPWR 5 VS
C
A
J_D VI1
D 18
D1 7
BAV99
TX2 N 1
DVI +5V POW ER
14 C A
AC
TMDS DATA 2-
R 23 8 L58 TX2 P 2 SCS7 51V-40
Z23 03 . FC M1 60 8K-1 21 T0 6 3 TMDS DATA 2+
20 EX_D VI_ HPD TX4 N 4 TMDS 2/ 4 Shield C 429
1 K_0 4 TX4 P 5 TMDS DATA 4- . 1U_ 16 V_0 4
C 42 5 TX1 N 9 TMDS DATA 4+
2 0 EX_D VI _D ATAN [5 :0] TMDS DATA 1-
TX1 P 10
TMDS DATA 1+
D 03 3/ 3 *220 P_5 0V_ 04 11
TMDS DATA 1/ 3 Shie ld
TX3 N 12
2 0 EX_D VI _D ATAP[ 5: 0] TX0 N TMDS DATA 3-
EX_D VI_ DATAN 0 C4 5 . 1U _1 0V_ X7R _0 4 TX3 P 13 TMDS DATA 3+
EX_D VI_ DATAP0 C4 4 . 1U _1 0V_ X7R _0 4 TX0 P
15
GN D (AN ALOG )
Z2 30 4 16
HOT PLU G DETEC T
TX0 N 17
EX_D VI_ DATAN 1 C4 7 . 1U _1 0V_ X7R _0 4 TX1 N TX2N R3 0 499 _1 %_0 4 TX0 P 18 TMDS DATA 0-
EX_D VI_ DATAP1 C4 6 . 1U _1 0V_ X7R _0 4 TX1 P TX2P R2 4 499 _1 %_0 4 19 TMDS DATA 0+
TX4N R1 9 499 _1 %_0 4 TX5 N 20 TMDS DATA 0/ 5 Shie ld
TX4P R1 5 499 _1 %_0 4 TX5 P 21 TMDS DATA 5-
TMDS DATA5+
TX1N R2 9 499 _1 %_0 4 22
TX2 N TMDS CL K Shie ld
EX_D VI_ DATAN 2 C4 3 . 1U _1 0V_ X7R _0 4 TX1P R2 8 499 _1 %_0 4 TXC P 23
TX2 P TMDS CL K +
EX_D VI_ DATAP2 C4 2 . 1U _1 0V_ X7R _0 4 TX3N R2 3 499 _1 %_0 4 TXC N 24 TMDS Clk -
TX3P R2 1 499 _1 %_0 4
TX0N R2 7 499 _1 %_0 4 FR ED C1
RED
TX0P R2 6 499 _1 %_0 4 FGRN C2
EX_D VI_ DATAN 3
EX_D VI_ DATAP3
C3 9
C3 8
. 1U _1 0V_ X7R _0 4
. 1U _1 0V_ X7R _0 4
TX3 N
TX3 P
TX5N
TX5P
R2 0
R1 6
499 _1 %_0 4
499 _1 %_0 4
FBL UE
H SYN C
C3
C4
GR EEN
BLU E
D SUB M1
TXCP R1 3 499 _1 %_0 4 VSY NC 8 H SYN C CASE M2
TXCN R7 499 _1 %_0 4 Z23 20 D DC DATA 7 V SY NC CASE C5
D DC LK 6 DD C Da ta GN D C6
EX_D VI_ DATAN 4 C3 0 . 1U _1 0V_ X7R _0 4 TX4 N Q3 5 DD C Clk GN D
D
EX_D VI_ DATAP4 C2 4 . 1U _1 0V_ X7R _0 4 TX4 P *2N 700 2W K-QH 11 2X-D JTX
R2 48
G
1 2,1 5, 16 ,2 2, 24 PW RO KIC H CRT_D ET#
0_ 06 R59 4 10 0K_ 04 R5 95 1 K_0 4
TX5 N 3VS
EX_D VI_ DATAN 5 C3 1 . 1U _1 0V_ X7R _0 4
S
EX_D VI_ DATAP5 C2 9 . 1U _1 0V_ X7R _0 4 TX5 P R5 96 *0 _0 6
C1 3 . 1U _1 0V_ X7R _0 4 TXC P

2 0 EX_ DVI _C LK
C9 . 1U _1 0V_ X7R _0 4 TXC N
2 0 EX_ DVI _C LK#
7. .9 ,1 2,1 3, 15 .. 22 ,2 4.. 30 ,3 2, 39 ,4 1,4 3 3 VS

1 2, 17 ,1 8, 20 ..2 2, 27 ,2 9. .3 1,4 3 5 VS
6 ,1 2, 13 ,15 .. 17 ,2 0, 24 ,26 ,2 9. .3 2, 40 ,41 ,4 3 3 V
B - 24 DVI-I
Schematic Diagrams
LCD, INT
L4 1 L CD VCC -R L CD VCC -R
LC DVC C HC B20 12 KF-1 21 T30 _0 8
C 27 9 C 28 4
JL CD 1 3VS
3V . 1U _1 6V_ 04 1 2 . 1U _1 6V_ 04
SY S15 V SY S15 V 3 1 2 4 V_EDID R 164 2 20 _0 8
T XOUT-L N0 5 3 4 6 T XOUT -UN0
T XOUT-L P0 7 5 6 8 T XOUT -UP 0
Q24 C346 9 7 8 10
R 19 2 R 19 1 1 6 T XOUT-L N1 11 9 10 12 T XOUT -UN1
D D .1 U_ 16 V_0 4 T XOUT-L P1 13 11 12 14 T XOUT -UP 1
1 M_ 04 1 M_ 04 2 5 15 13 14 16
D D T XOUT-L N2 17 15 16 18 T XOUT -UN2
Z2 40 3 Z2 40 4 3 4
2A T XOUT-L P2 19 17 18 20 T XOUT -UP 2
Q 25 G S LC DVC C 21 19 20 22
D TC 11 4EU A C Q22 SI 34 56 BDV- T1-E3 T XOUT-L N3 23 21 22 24 T XOUT -UN3
D
B 2 N7 00 2W R1 86 R1 88 T XOUT-L P3 25 23 24 26 T XOUT -UP 3 D 03
20 EN A V DD C 33 4 R1 85 27 25 26 28
E G 10 0_ 1%_ 06 *20 0_1%_ 06 T XCL K-L N 29 27 28 30 T XC LK-UN
. 01 U_ 25 V_0 4 *10 0K_ 04 T XCL K-L P 31 29 30 32 T XC LK-UP C 22 8 *. 1U _1 6V_ X7 R_ 06
Z24 02 31 32
S
33 33 34 34
20 DD CC _DA T 35 36 INT MIC INT MIC 27
D
37 35 36 38
Q2 1 20 DD CC _CLK 39 37 38 40
G 2N 70 02 W 39 40
7/13 8 72 16 -4 00 0
S
M odify C4 from 0.1uF change to
0.01uF for LV DS power time.
VI N
5V 5V
C 17 3 . 1U _5 0V_ Y5V_0 6
B RIGHT NESS
30 mil
1
J LED 1 Sheet 24 of 47
28 B RIGHT NESS P ANEL _EN
VD D5
2
3
4
5
LCD, INT
14
R 17 8 1 00 K_0 4 C 299 L ED_B AT _CHG 6

14
U 6A L ED_B AT _FULL
1 U 6B *. 1U_10 V_X7R _0 4 B T _EN 7
1 6 SB_ BLON 3 Z240 7 4 28,31 B T_EN 8
28,29 W LA N _EN W LAN_E N 9
2 6 L ED_P WR
2 8 BKL _EN 5 L ED_AC IN 10
7 4L VC0 8PW 11
12
14
7 4L VC0 8PW
7
U 6C 8 52 05 -1 20 0
7
Z2 40 5 9
8 PANEL _EN
2 0 EN ABKL 5V Z2 40 6 10
T XOUT -LN0 L 40 0 _0 6L VDS_LN0 L VDS_L N0 20
14
7 4L VC 08 PW
U 6D R1 84 C3 18 T XOUT -LP 0 L 38 0 _0 6L VDS_LP 0
7
12 L VDS_L P0 20
28 ,3 0 L ID _SW # 11 *1M_0 4 *10 0P_ 50 V_0 4 L 36 0 _0 6L VDS_LN1
T XOUT -LN1 L VDS_L N1 20
1 2, 15 ,1 6, 22,2 3 PW RO KIC H 13
T XOUT -LP 1 L 34 0 _0 6L VDS_LP 1 L VDS_L P1 20
7 4L VC0 8PW
T XOUT -LN2 L 31 0 _0 6L VDS_LN2
7
L VDS_L N2 20
T XOUT -LP 2 L 30 0 _0 6L VDS_LP 2
L VDS_L P2 20
T XOUT -LN3 L 29 0 _0 6L VDS_LN3 L VDS_L N3 20
T XOUT -LP 3 L 27 0 _0 6L VDS_LP 3
VDD 3 VD D3 L VDS_L P3 20
T XCL K-LN L 25 0 _0 6L VDS_LC LKN
L VDS_L CL KN 20
T XCL K-LP L 23 0 _0 6L VDS_LC LKP L VDS_L CL KP 20
R 11 8 R1 26
T XOUT -UN0 L 39 0 _0 6L VDS_UN0
1 0K_ 04 10 K_0 4 L VDS_UN0 20
T XOUT -UP0 L 37 0 _0 6L VDS_UP0
L VDS_UP 0 20
L ED_ BAT_ CH G LED _BAT_FU LL T XOUT -UN1 L 35 0 _0 6L VDS_UN1 L VDS_UN1 20
D
L VDS_UP 1 20
Q 13 Q1 7 T XOUT -UN2 L 28 0 _0 6L VDS_UN2
G 2 N7 00 2W G 2N 70 02 W L VDS_UN2 20
28 LED _BA T_C HG# 28 LED _BA T_FULL# T XOUT -UP2 L 26 0 _0 6L VDS_UP2 L VDS_UP 2 20
S
T XOUT -UN3 L 24 0 _0 6L VDS_UN3

L VDS_UN3 20
L VDS_UP 3 20
T XCL K-UN L 21 0 _0 6LVDS_ UC LKN LVDS_UCLKN 2 0
T XCL K-UP L 20 0 _0 6L VDS_UCL KP L VDS_UC LKP 20
VDD 3 VD D3
C2 18 C2 24 C2 32 C2 48 C 25 7 C 22 6 C 23 4 C 23 9 C 24 9 C 25 8
10 P_5 0V_ 04 10 P_5 0V_ 04 1 0P_ 50 V_0 4 1 0P_ 50 V_0 4 1 0P_ 50 V_0 4
R 12 5 R1 17 10 P_5 0V_ 04 10 P_5 0V_04 1 0P_ 50 V_04 1 0P_ 50 V_0 4 1 0P_ 50 V_0 4
C2 22 C2 27 C2 35 C 25 0 C 26 5 C 231 C 23 7 C 24 1 C 25 5 C 26 6
1 0K_ 04 10 K_0 4
10 P_5 0V_ 04 10 P_5 0V_ 04 1 0P_ 50 V_0 4 1 0P_ 50 V_0 4 1 0P_ 50 V_0 4
10 P_5 0V_ 04 10 P_50 V_0 4 1 0P_ 50 V_0 4 10P_ 50 V_0 4 1 0P_ 50 V_04
L ED_ ACI N LED _PW R
D
VDD 5 3 0, 31 ,4 3, 45
Q 16 Q1 2 SY S1 5 V 4 3 ,4 5
3V 6 ,1 2, 13 ,1 5. .1 7, 20 ,2 6, 29 .. 32 ,4 0, 41, 43
G 2 N7 00 2W G 2N 70 02 W 3 VS 7 .. 9 ,1 2 , 1 3 ,1 5 . .2 3 , 2 5 .. 3 0 ,3 2 ,3 9 , 4 1 ,4 3
28 LED _A CIN # 28 LED _PW R#
VDD 3 1 6, 21 ,2 8, 31 ,4 0, 42 ,4 3, 45
S
5VS 1 2, 17 ,1 8, 20 .. 23 ,27, 29 .. 31 ,4 3
VI N 2 0 , 3 0 ,3 9 . .4 2 , 4 4 ,4 5
5V 4 ,1 7, 30 ,3 1, 39 .. 41 ,4 3. .4 5
LCD, INT B - 25
Schematic Diagrams
Card Reader/1394
IEEE1394
G ND 2
S H 2 G ND 1
D 03 3 /3 1 39 4_TPBI AS0 C 680 .3 3U _1 6V_ Y5 V_0 6 SD Card MS Card
L P6 R 46 6 56 _0 4
SH 1
MDIO0 SD-DATA0 MS-DATA0
J _1 *1 60 OHM # 944C M- 00 51 R 46 7 56 _0 4
4 TPA 4 Z2 50 1 5 4 13 94 _TPA0+
3 3 Z2 50 2 6 3 13 94 _TPA0- MDIO1 SD-DATA1 MS-DATA1
2 1 TPA#
TPB 2 Z2 50 3 7 2 1 39 4_ TPB0 +
TPB# 1 Z2 50 4 8 1 13 94 _TPB0-
MDIO2 SD-DATA2 MS-DATA2
J _1 Note: R 46 9 56 _0 4
AF4MS0 04 K0 Z251 0
Close to R 46 8 56 _0 4 MDIO3 SD-DATA3 MS-DATA3
CON
R 45 6 4. 99 K_1 %_0 4 Note:
Close to MDIO4 SD-CMD MS-BS
EM I Z2 50 1 R 229 0 _04 1 394_ TPA0 + C 67 8 22 0P_ 50V_0 4
Z2 50 2 R 228 0 _04 1 394_ TPA0 - JMB380
Z2 50 3 R 227 0 _04 1 394_ TPB0 + MDIO5 SD-CLK MS-SCLK
Z2 50 4 R 226 0 _04 1 394_ TPB0 -
D 03 3 /3
C R_ TAV33 L8 0 3VS
1 39 4_ XI C 69 8 2 0P_ 50 V_0 4
1
R 47 7
.
30 mil 30 mil
X4 C6 84 C6 86 HC B20 12KF-1 21 T3 0_ 08 C6 75 C6 74
2 4. 57 6MHz S1
1 39 4_ T P B IA S 0
1 M_ 04 .1 U_ 16 V_0 4 .1 U_ 16V_0 4 .1 U_ 16 V_0 4 .1 U_16 V_0 4 C ARD _PW REN # 1 2 VC C_ CAR D
Sheet 25 of 47
1 39 4_ T P A 0+
1 39 4_ T P B 0+
1 39 4_ XO C 69 9 2 0P_ 50 V_0 4
1 39 4_ T P A 0-
1 39 4_ T PB 0 -
2
R 46 5 1 2K_ 04 SH OR T_ 1MM P VT
M DI O1 0
M DI O1 1
M DI O1 2
Note:
T R EXT
M DI O8
M DI O9
Card Reader/1394 Close
to
C R_ APVDD
JMB380
36
35
34
33
32
31
30
29
28
27
26
25
U 34
T P B I A S _1
T PA1 N
T PB1 N
T PA1 P
T PB1 P
T R EXT
M DI O8
M DI O9
M DI O1 0
M DI O1 1
M DI O1 2
T A V 33
C 69 7
D0 3 3/ 2
. 1U _1 6V_ 04 37 24 TC PS R4 74 10 K_0 4
1 39 4_ XI 38 DV18 TCPS 23 MD IO13
1 39 4_ XO 39 TXIN MDI O1 3 22 MD IO14 CR _TAV33
MDI O7 40 TXOU T MDI O1 4 21 CR 1_ LED N
SD WP 41 MD IO7 C R_LED N 20
D 03 3 /2
C R_ TAV3 3 MDI O5 42 MD IO6 DV3 3 19
MD IO5 REG_C TR L
MDI O4 43
44 MD IO4 JM B3 80 DV1 8
18
17 CAR D_ PWR EN#
CR _APVD D
C7 04
MDI O3 45 DV33 C R1 _PC TL N 16 SD_ CD # C7 05 VC C_ CAR D
C 71 7 MDI O2 46 MD IO3 C R1 _C D0 N 15 MS_ IN S# .1 U_16 V_0 4
MDI O1 47 MD IO2 C R1 _C D1 N 14 .1 U_ 16 V_0 4
. 1U _1 6V_ 04 MDI O0 48 MD IO1 SEEC LK 13
A P C LK N
A P C LK P
A P RE X T
XR ST N
APVD D
A P G ND
MD IO0 SEED AT
A P RX N
APT XN
A P RX P
APT XP
XT EST
J _C R1
A P V 18
1 2
3 4
JMB38 0- QGAZ0B CAR D_ PWR EN# SD _C D# 5 6 MDI O0
CAR D_PWR EN# 30 7 8
C R_ T E S2T
10
11
12
R 48 8 22_ 04 SD WP MDI O1
3
4
5
6
A P R EX T7
8
9
MDI O5 SD /MS_C LK 9 10 MDI O2
QFN-48 MDI O4 11
13
12
14
MDI O3
15, 26 ,3 2 BU F_PL T_RST# MS_I NS# 15 16 C ARD _PW REN #
Z25 05 C7 18 .1 U_ 10V_X7R _0 4 17 18
Z25 06 C7 20 .1 U_ 10V_X7R _0 4 PE4_ RX_J MB# 15 19 20
1 9 PC IE_ CL K_J MB# PE4_ RX_J MB 1 5 8 80 25 -2 00 L
1 9 PC IE_ CL K_J MB
CR _APVD D
C R_APVDD
25mil
C 72 7 C 72 4 C 72 6 C7 29 C728 C7 25
1 00 0P _ 50V _ 04
. 1U _16V_ 04 10U _10V_ 08 .0 1U _2 5V_ 04 .1U_ 16V_0 4 10 U_ 10 V_0 8
PE4 _TX_ JMB# 1 5
PE4 _TX_ JMB 15
R5 01 MD IO 14 R4 76 200 K_0 4
AP REX T:12mil
8. 2K_ 1%_ 04 VCC _C ARD
MD IO 12 R4 70 200 K_0 4
VCC _C ARD CR _TEST R5 00 0_0 4 C 72 1
. 1U _1 6V_ 04
R 48 2 10K_ 04 SD WP
R 47 5 10K_ 04 MDI O1 3 Near Cardreader CONN

H: CR 1_LEDN high ac tiv e,
MOID14 L:C R1_LED N low ac t iv e
D 03 3 /2
C R_ TAV3 3 H: CR 1_PCTLN high ac tiv e,
MOID12
R 48 7 4.7K_0 4 SD _C D# L:C R1_PC TLN low ac t iv e
(MDIO12 is no us e in MP
R 48 9 4.7K_0 4 MS_I NS#
v ers ion IC )
R 48 1 10K_ 04 MDI O7 H i: on-board

Low : on
A dd-in c ard
3VS 3VS 7. .9 ,1 2, 13 ,1 5. .2 4, 26 .. 30 ,3 2, 39,4 1, 43
3V 3V 6, 12 ,1 3, 15 .. 17,2 0, 24 ,2 6, 29 .. 32 ,4 0, 41,4 3
B - 26 Card Reader/1394
Schematic Diagrams
RTL8111C
GLAN (RTL8111C) must be within must be within

40 mil
LANVD D18
0.5cm (to pin 0.5cm

FB12 + C 652 C 644 C 656
1) L79
CTRL 18 . *1 00U _6. 3V_B2 *22U _6. 3V_08 .1 U_ 16V_0 4
3V
SWF25 20CF-4R 7M- M
L7 8 LAN_ VD D3 L ANVDD15
HCB1608KF- 121 T2 5_06 40 mil ? ? ? INDUCTOR C66 0 C667
.
(600mA) 2 2U_ 6.3 V_08
C6 54 C 653
.1 U_1 6V_04 R4 44 FOR RT L8102E
C 662 C 679 C66 6 C6 63 C 651 C69 1 C673 C6 90
0_ 06 R163? ? ?
10 0MH z/10 0 1A *22U _6. 3V_08 .1U _16 V_04 .1 U_1 6V_0 4 . 1U_ 16V_ 04 *. 1U_16 V_ 04 .1 U_1 6V_04 .1U_ 16V_04 . 1U_16 V_04 . 1U_ 16 V_04 . 1U_ 16 V_04
RTL8111B RTL8111C 60 mil L AN VDD15
LANVDD18 1.8V 1.2V
LAN_VD D3 LANVDD15 + C6 39 C655 C63 6
40 mil 60 mil 1.5V 1.2V
*10 0U_ 6.3V_B2 *2 2U_ 6.3V_08 . 1U_ 16 V_04
C6 93 C6 81
C69 2 C689 C670 C668 C6 47 C6 46
.1U_16V_0 4 .1U_ 16V_0 4
.1U_16V_0 4 .1U_16V_04 .1U_16V_04 .1U_1 6V_04 .1 U_1 6V_04 .1 U_1 6V_04 Sheet 26 of 47
LANVDD 18
MDI O0+
MDI O0-
R4 57
R4 54
*4 9.9_1%_ 04 Z2 61 2 C676
*4 9.9_1%_ 04
*. 01U _16V_04 RTL8111C
40 mil LAN _VDD1 5
MDI O1+ R4 53 *4 9.9_1%_ 04 Z2 61 3 C669 *. 01U _16V_04
C66 4 C66 1 C66 5 C6 59 LAN _CL KR EQ# R44 8 *0_04 MDI O1- R4 52 *4 9.9_1%_ 04
*10U _10 V_08 .1U_16V_04 . 1U_ 16V_ 04 . 1U_16V_0 4 ? ? ? RTL8101E

IC? ?
? ? ? (? ? ? ? ? RTL8101E)
.1U _16 _04 cap aci tanc e a s c lose U3 2 Pad? ?
46 GND L AN_VDD 3
V DD 15 4 3
33
A V DD3 3 59
V DD 33 53
V DD3 3 37
V DD3 3 16
58
V DD1 5 52
VD D15 49
V DD1 5 41
V D D15 38
V DD 15 32
V DD1 5 21
VD D15 15
as pos sibl e t o R TL81 11C
2
FOR RTL8102E C67 2 PI N 65 , GND1 ~9=GN D

A V DD3 3
V D D33
V DD 15
V DD1
R 455 3. 6K_06
L16? ? ? REALTEK COLAY? ? ? ? ? ? .1U _16 V_04 C N1
DATASHEET? 1.2V(? ? ? ) U 33 L55 FC M16 08K- 121 T06 R ING
LANVDD 18 44 EEC S 1 8 1 L54 FC M16 08K- 121 T06 T IP
EECS 48 MA2/ EESK 2 CS VCC 7 2
L77 LAN_EVDD 18 FB12 5 EESK 47 MA1/ EED I 3 SK NC 6 C 706 *.1 U_1 6V_04 882 66- 020 0 JLAN 1
HCB1608KF-1 21 T25_06 8 AVDD1 8 EEDI 45 MA0/ EED O 4 DI ORG 5
. 40 mil 11 AVDD1 8 EEDO DO GND
14 AVDD1 8 R 458 10K_04 AT93C 465 666 10
C6 50 AVDD1 8 L5 2 RI NG
D03B C6 38 C6 45 9 TIP
22 EVDD1 8 LP3
111 2 *1 0U_ 10V_ 08 .1U _16 V_ 04 .1U _16 V_04 28 1 24 *# 944 CM- 0051=P3
EVDD1 8 TCT1 MCT1
25 EGND MD IP0 3 MDI O0+ 2 TD1+ MX1+ 23 LMX1+ 1 8 DLMX1+ 1 DA+
31 EGND MDI N0 4 MDI O0- 3 TD1- MX1- 22 LMX1- 2 7 DLMX1-
PCI-E LAN 4 TCT2 MCT2 21 LMX2+ 3 6 DLMX2+ 2 DA-
MD IP1 6 MDI O1+ 5 TD2+ MX2+ 20 LMX2- 4 5 DLMX2-
15 PE2_TX_ GLAN 23 HSI P MDI N1 7 MDI O1- 6 TD2- MX2- 19 LP2 3 DB+
24 RTL8111C-VB 7 18 *# 944 CM- 0051=P3
15 PE2_TX_ GLAN # HSI N 9 MDI O2+ 8 TCT3 MCT3 17 LMX3+ 1 8 DLMX3+ 4
C649 . 1U_ 10V_ X7R _04 PCI E_ RXP2 _GL AN _C 29 MD IP2 10 MDI O2- 9 TD3+ MX3+ 16 LMX3- 2 7 DLMX3- DC +
15 PE2_RX_ GLAN C648 . 1U_ 10V_ X7R _04 PCI E_ RXN 2_GLAN_ C 30 HSOP MDI N2 10 TD3- MX3- 15 LMX4+ 3 6 DLMX4+ 5
15 PE2_ RX_ GLAN # HSON 12 MDI O3+ 11 TCT4 MCT4 14 LMX4- 4 5 DLMX4- DC -
26 MD IP3 13 MDI O3- 12 TD4+ MX4+ 13 6
19 PCI E_CLK_ GLAN 27 REFCL K_P MDI N3 TD4- MX4- DB-
19 PCI E_CL K_ GLAN # REFCL K_N 57 LAN_VD D15 7 GND 1
19 LED0 56
FOR RTL8102E GS5 019 PLF DD + GND
16,2 9, 32 PE_WAKE# LANW AKEB LED1 >4 0MI LS
55 R479 *0_0 6 8 GND 2
LED2 54 DD - GND
20 LED3 POWE R P LAN FOR PI N1 LAN_VD D3
15,2 5, 32 BUF_PLT_RST# PERSTB 1 CTRL 18 LANVDD 18
>4 0MI LS
R 471 2 .49K_1%_04 Z2 604 64 VC TRL 18 63 CTRL 15 /VDD33 R478 0_06 >4 0MI LS C10 0B9
RSET VC TRL 15
R4 49 1K_ 04 Z2 605 36 61 Z2602
3VS ISO LATEB C KTAL2 60 C68 5 C6 96
NC
NC
NC
C KTAL1
NC
NC
NC
NC
NC
NC
15 IC H_GPI O4 9 R4 51 *1K_04 R4 50 15 K_04 62 R19 8 Z260 6 R225 75_1 %_ 04 Z2 61 1

GVDD X5 Z260 7 R224 75_1 %_ 04
.1U _16 V_04 22U _6. 3V_08
Z2601 2 1 *0_0 4 Z260 8 R223 75_1 %_ 04
34
42
17
18
35
39
40
50
51
40 mil Z260 9 R222 75_1 %_ 04

Z26 10
R48 0 0_0 4 Z260 3 Z2 614 25MH z C 379
3V LAN _VDD 3
R TL 8 11 1C - VB - GR
Enable Switching C3 54 C35 5 C 353 C 352 1 000P_ 2KV_X7R_ 12
C69 4 C695
regulator .0 1U_ 25V_ 04 .01 U_2 5V_0 4 . 01U _2 5V_04 . 01U _2 5V_04
Hi: Enable R4 73
C67 7 C 671 2 2P_50 V_04 22P_50V_0 4
Low: Disable *0_ 04
*. 1U_ 16 V_ 04 *. 1U_16V_0 4
FOR RTL8102E
R175? ? ?
LP5 LP4
8P4R X0_ 06 8P4RX0_06 6,1 2,13, 15. .17,2 0,2 4,29. .32,40,4 1,43 3V
LMX1+ 1 8 D LMX1+ LMX3+ 1 8 DLMX3+ 7.. 9,12, 13, 15. .2 5,2 7.. 30 ,32,39,4 1,43 3VS
LMX1- 2 7 D LMX1- LMX3- 2 7 DLMX3-
LMX2+ 3 6 D LMX2+ LMX4+ 3 6 DLMX4+
LMX2- 4 5 D LMX2- LMX4- 4 5 DLMX4-
RTL8111C B - 27
Schematic Diagrams
ALC662 / AMP TP6047A-4

L91 *HCB100 5KF-1 21T20 _04
5V_REGOUT
L70 HCB1 005KF- 121T20_04
3VS 3VS_AUD 5VS_AUD 5VS
U24
L 69 HCB1005KF-121 T20_0 4 4 5 MIC1 -VREFO-L MI C1-VREFO- R
OUT VIN
C57 0 C5 66 C56 3 C567 C559 C5 71 C5 73 C556 1
SHDN# R385 R390
.1 U_16V_04 1 0U_10V_08 .1 U_16V_04 .1U_1 6V_04 .1U_ 16V_04 . 1U_16 V_0 4 10 U_10V_08 *10U_1 0V_ 08 Z272 5 3 2 C57 8
BYP GND 2.2K_04 2.2K_04
*G924 1U_ 10V_06
C572 MIC1 _L MI C1_R
25
D03 AUDG
38
4
DVS S1 7
1
9
U2 2 *.1U _16V_04 C564 C569
DV SS 2
DV DD 1
D VDD 2
A V DD 2
A VDD 1
For AL C 6 62 ? ?
EAPD_ MODE R636 0_04 2 AUDG AUDG *68 0P_ 50V_04 *680P_50V_04
Z2701 3 G PI O0 27 Z2711 C5 60 10U _10V_08
C56 5 *22P_50V_04
G PI O1 VREF L ay out No te :
Ver y close to Au dio Codec AUDG AUDG
R388 3 3_04 AZ_SD OUT_R 5 28 MIC1- VREFO-L AU DG
16, 32 SDATO SDATA-OUT MIC1- VREFO-L
16, 32 BIT_CLK R387 0 _04 AZ_BI TCLK_R 6 32 MIC1- VREFO-R
R386 2 2_04 AZ_SD IN0_R 8 BIT-CLK MIC1 -VREFO-R
16 SDATI0 SDATA-IN
R383 3 3_04 AZ_SY NC_R 10 29 Z2712 MIC 2-VREFO
16,32
16, 32
SYNC
AC_RESET# R382 3 3_04 AZ_RST#_R 11
SYNC DIG IT AL LI NE1- VREFO-L
37 Z2713
R ESET# LI NE1 -VREFO-R
F o r AL C 88 8 ? ? E APD_MODE R63 7 *0_0 4 Z270 2 47 30 MIC2- VREFO R38 9
SPDIFI/EAPD MI C2-VREFO
31 Z2714
SPDIF-OUT 48 LINE2-VREFO 2. 2K_04
20, 30 SPDIF-OUT SPDIFO
35 FRONT-L
Z2710 FRONT-O UT-L FRONT-R FRONT- L 29
3 1 BEEP R368 10K_04 Z270 3 12 36 FRONT- R 29 24 I NTMIC I NTMIC
PCBEEP FRONT- OUT-R
R367 1K_04
C5 43 *100 P_5 0V_ 04 C5 51 1U_10V_06 39 Z2715 C56 8
AUDG SURR-O UT-L 41 Z2716
13 SURR- OUT-R *330 P_5 0V_ X7R_04
30 J D_SENSE JD_SENSE Sen se A(JD1 )
30 HP_SEN SE HP_SENSE 34 43 Z2717
Sen se B(JD2 ) CEN-OUT 44 Z2718
L _HP_ OUT_A 14 LFE-OUT AUDG D03
L INE2-L
R_ HP_ OUT_A 15 45 SI DE-L
L INE2-R ANALOG SI DESURR-O UT-L
SI DESURR- OUT-R
46 SI DE-R SIDE-L 2 9
SIDE-R 2 9
C549 . 1U_25V_X7 R_06 Z270 6 16
Sheet 27 of 47
MIC2-L
INTMI C R3 66 0_04 INT_MIC_R C548 . 1U_25V_X7 R_06 Z270 7 17 33 Z2721
MIC2-R DCVOL D03 3/4
D03 18 40 Z2722 R3 92 20K_1%_04
C D-L JDREF
D03 19 AU DG
ALC662 / AMP 20 C D-GND 23 Z2723 C5 45 4. 7U_6. 3V_06 R638 0_ 04

C D-R L INE1-L LINE-L 30
A VS S 1
A V SS 2
24 Z2724 C5 44 4. 7U_6. 3V_06 R639 0_ 04
LINE1-R LINE-R 30
3 0 MI C1_L R 365 75 _04 Z270 8 C547 10 U_6.3 V_X7R_06 Z270 4 21
R 364 75 _04 Z270 9 C546 10 U_6.3 V_X7R_06 Z270 5 22 MIC1-L
3 0 MI C1_R MIC1-R
TPA6047A4 ALC66 2-GR D 03

R362 R363
26
42
*4.7K_04 *4.7K_04
3VS
Z27 04 C55 3 *.1U _10V_X7R_ 04
Z27 05 C55 2 *.1U _10V_X7R_ 04
Defau lt( L = Mute ) AUDG AUDG
Z27 06 C55 5 .0 1U_16 V_X7R_04 AUDG 3VS R 624
Z27 07 C55 4 .0 1U_16 V_X7R_04 3 VS
KBC_MUTE# U39D *10 K_0 4
14
L -> H La yo ut No te:
14
D03 74L VC08 PW U39A
AUDG Codec p in 1 ~ pin 11 and pin 47 an d pin 48 AC_ RESET# 12 74LVC08PW
AZ_RST# L -> H are Dig ital signals. 11 R626 0_04 1
EAPD _MODE 13 3
La yo ut No te: The oth ers are Analo g signals.
28 KBC_ MUTE#
2
EAPD_MODE Very cl ose to Audio Codec 3VS 3VS
L -> H
7
D03
7
3VS R 597 U39C
14
74L VC08 PW
1 00K_04 9
L88 U3 9B 8 R625 0_04 SPK_EN
14
HCB1 005KF-121T20 R 598 100K_04 7 4LVC08PW 10
3VS
4 D03 C776
D
FRONT CHANNEL 2W 5VS L89 5VS_AMP 5
6
*1 U_10V_06
7
30 AMP_MU TE
HCB1 005KF-121T20 30mils HP_EN G
? ? : 2 000H z? ? (? ? ? ? ) Q 54
2 N7002 W
S
7
C748 C7 49
5VS_AMP C7 50 C 751 C752 C753
0.1 U_16V_04 1U _10V_06
C754 10 U_10V_08 *0. 1U_16V_04 0 .1U_1 6V_ 04 0.1U_ 16V_04 0.1U _16V_04
500Hz High Pass Filter
Fcut(-3db)=520Hz
AUDG
17
30
18
AUD G
8
U40 AUDG J_SPK 1
H PV D D
CP VD D
S PV D D
S P VD D
FRON T-R R5 99 22K_1%_04 C755 0.1U _25V_X7R_ 06 Z2 304 1 J_RSPK1
VD D
SPKR_RIN - SPKOU TR+
R6 00 *7 3.2K_1%_04 20 SPKOUTR+ L1 FCM1005KF-121 T03 Z2 742 2 1
C756 0.1U _25V_X7R_ 06 2 OUTR+ L2 FCM1005KF-121 T03 Z2 743 1
SPKR_RIN + 19 SPKOUTR- SPKOUTR- 2
AUDG OUTR-
C757 0.1U _25V_X7R_ 06 3 8 5204- 02001
R6 01 *7 3.2K_1%_04 SPKR_LI N+ C2 C1 PCB Foot print = 8 5204- 2P_ L
FRON T-L R6 02 22K_1%_04 C758 0.1U _25V_X7R_ 06 Z2 305 4 TPA6047A4 6 SPKOUTL+ SPKOU TL+
SPKR_LI N- LOUT+
180 P_5 0V_04 180P_50 V_0 4
R_HP_OUT_ A R6 40 47K_04 C759 4.7U _10V_X5R_ 08 Z2 306 26 7 SPKOUTL- SPKOU TL-
HP_INR LOUT-
L_HP_OUT_A R6 41 47K_04 C760 4.7U _10V_X5R_ 08 Z2 307 27

HP_INL FOR EMI
15 HEADPHO NE- R
HP_OUTR HEAD PHONE-R 30
D03 2/ 28
16 HEADPHO NE- L HEAD PHONE-L 30
HP_OUTL
Th ermal J_SPK 1
SPK_EN 23 25 R603 10 0K_04 J_LSPK1
29 SPK_EN SPKR_EN Pad REG_EN 5VS
HP_ EN 22 29 L50 FCM1005KF-121 T03 Z2 744 2 1
HP_EN REG_OUT 5V_REGOUT 1
L49 FCM1005KF-121 T03 Z2 745
R604 1 00K_04 2
Near CP+ and CP-
B YP A SS
S P GND
C PGN D
S PGND
H PV SS
C P VS S
31 R605 *10 0K_ 04 8 5204- 02001

GAIN0 5 VS
G ND
Z2308
GND
10 32 R606 *10 0K_ 04 C36 2 C363 PCB Foot print = 8 5204- 2P_ L
C7 61 12 C1P GAIN1
C1N R607 1 00K_04 180 P_5 0V_04 180P_50 V_0 4
1 U_16V_X5R _06 Z2309 TPA6047A4RHBR L6 7 HCB1005KF-121 T20
33
24
28
21
11
14
13
5
FOR EMI
C76 2 AUDG
C763 SPE C=0.47U,
1U_ 16V_X5R_ 06 EVM =1U
1U_16V_X5 R_06
AU DG AUDG
4, 17, 24,30 ,31, 39.. 41,4 3..4 5 5V

12 ,17, 18,2 0..2 3,29. .31, 43 5VS
7 ..9, 12,1 3,15 ..26 ,28. .30, 32,3 9,41, 43 3VS
B - 28 ALC662 / AMP TP6047A-4

Schematic Diagrams
KBC-ITE IT8512E
KBC _AVDD L71 R 434 10K_04 W DT_EN
HC B1005KF-1 21T20 _04 VD D3 WDT_EN 29
VD D3
C600 C 598 C630 C617 VD D3 R4 39 R 436 VDD3 PJ16
C 584 C582 WD _D ISABLE 1 2
10U _1 0V_0 8 . 1U_ 16V_04 .1U _1 6V_0 4 .1U_ 16V_ 04 10 K_04 100K_04
. 1U_16 V_04 .1U _16V_04 20mil
R 438 10K_04 W D_DISABLE R437
C 629
U 30 G 10 0K_0 4
. 1U _16V_04 KBC_AGND Z281 1 3 MR #
3VS RESET# 1 S D KBC_W RESET#
7/13 5
VCC 4 Q45 C628
1 14
1 21
12 7
ITE8512E pin4 and pin16 sw ap W DI
74
J _KB1 C 634 2 2N7 002W
11
26
50
92
VBAT 3
U27 85201-24051 GN D 3 IN1 1U _10V_06
for LED driver circuit.
VST BY
VST BY
VST BY
V S T BY
V ST B Y
VS T B Y
. 1U _16 V_04 AAT3510IGV-2. 93-C-C-T1
V CC
A V CC
1 6, 29 LPC _AD 0 10 58 KB-SI 0 4
9 LAD 0 KSI 0/ STB# 59 KB-SI 1 5
1 6, 29 LPC _AD 1 8 LAD 1 KSI 1/ AFD# 60 KB-SI 2 6 H 8_R ST#
1 6, 29 LPC _AD 2 7 LAD 2 KSI2/I NIT# 61 KB-SI 3 8 H8_ RS T# 31
1 6, 29 LPC _AD 3 13 LAD 3 KSI 3/ SLI N# 62 KB-SI 4 11
19 CK_P_33M_SIO 6 LPC CLK KSI 4 63 KB-SI 5 12
24
16,29 LPC _FRAME# 5 LFR AME# KSI 5 64 KB-SI 6 14 VD D3
15, 29 LPC_SI RQ SERI RQ
LPC K/B MATRIX KSI 6
12, 15,16,20, 29 PLTRST# 22 65 KB-SI 7 15
LPC RST# /W UI4/GPD 2( PU ) KSI 7 C VDD 3
KBC _W RESET# 14 36 KB-SO0 1 SMC_BAT AC
WR ST# KSO0/ PD0 37 KB-SO1 2 42 SMC _BAT D 29 A R393 *10K_ 04
GA20# 126 KSO1/ PD1 38 KB-SO2 3 BAV99 MODEL_ID
15 GA2 0# AC/BATL# 4 GA2 0/ GPB5 KSO2/ PD2 39 KB-SO3 7 C R395 10K_04
2 0, 42 AC/ BATL # 16 KBRST#/GPB6 ( PU ) KSO3/ PD3 40 KB-SO4 9 SMD_BAT AC
24 L ED_AC IN # THER M_ALERT# 20 PWU REQ#/GPC 7( PU ) KSO4/ PD4 41 KB-SO5 10 42 SMD _BAT D 31 A
6 THER M_ALERT# L80L LAT/ GPE7( PU ) KSO5/ PD5 42 KB-SO6 13 BAV99
WEB_AP# 23 KSO6/ PD6 43 KB-SO7 16 C
30 W EB_AP# WEB_EMAI L# 15 ECSC I#/ GPD3 ( PU ) KSO7/ PD7 44 KB-SO8 17 BAT_DET AC
30 W EB_EMAI L# ECSMI#/ GPD4 ( PU ) KSO8/ ACK# 4 2 BAT_DET
1
KSO9/ BUSY 45 KB-SO9 18 D 30 A
DAC 46 KB-SO10 19 J_K B BAV99
KSO1 0/ PE
CPU_FAN _R
RAM_FAN _R
VGA_FAN_R
76
77
78
DAC 0/ GPJ0
DAC 1/ GPJ1
DAC 2/ GPJ2
KSO11/ER R#
KSO12/SLCT
KSO13
51
52
53
KB-SO11
KB-SO12
KB-SO13
20
21
22 42 BAT1_VOLT
BAT1_VOLT AC
D 28
C
A
Sheet 28 of 47
WLAN _EN 79 54 KB-SO14 23 BAV99
24, 29 W LAN_EN
27 KBC _MU TE#
SYS_FAN_R
KBC _MUTE#
80
81
DAC 3/ GPJ3
DAC 4/ GPJ4
DAC 5/ GPJ5
IT8 512E
KSO14
KSO15 55 KB-SO15 24
42 C HG_CU RSEN
C HG_CU RSEN AC
D 27
C
A
VDD 3
KBC-ITE IT8512E
ADC FLASH *BAV99 6 ALERT ALER T R2 52 *10K_ 04
BAT_D ET 66 100 C
ADC 0/ GPI0 FLFRAME#/G PG2
BAT_VOL T_R 67 101 KBC_ SPI _C E# TOTAL_C UR AC SMC_C PU_THER M R2 46 4. 7K_0 4
CHG _C URSEN_R 68 ADC 1/ GPI1 FLAD0/ SCE# 102 KBC_ SPI _SI 42 TOTAL_CU R D 24 A
TOTAL_CUR _R 69 ADC 2/ GPI2 FLAD1/SI 103 KBC_ SPI _SO *BAV99 SMD_C PU_THER M R2 47 4. 7K_0 4
MXM_PRESN T# 70 ADC 3/ GPI3 FLAD2 /SO 104 Z2809
15,20 MXM_PRESN T# ROBSON_D ET# 71 ADC 4/ GPI4 FLAD3/G PG6 105 KBC_ SPI _SCLK R OBSON _DET# R396 10K_04
32 ROBSON_D ET# CCD _D ET# 72 ADC 5/ GPI5 FLCLK/SCK 106 CC D_EN CPU_ FAN_R
31 C CD_DET# MOD EL_I D 73 ADC 6/ GPI6 ( PD )FLR ST#/WU I7 /TM/G PG0 CC D_EN 31 18 CPU_FAN R400 120K_04 SMC_BAT R414 4. 7K_0 4
ADC 7/ GPI7 C577 . 1U_ 16V_04
GPIO
SMBUS ( PD )KSO16/G PC3 56 SUSB# 10,16, 32,43
SMD_BAT R419 4. 7K_0 4
SMC_BAT 110 57
SMD_BAT 111 SMC LK0/ GPB3 ( PD )KSO17/G PC5 SUSC# 16 BAT_DET R412 10K_04
SMC_VGA_THERM 115 SMD AT0/ GPB4 93 VTTPWR_ON RAM_ FAN_R
20 SMC _VGA_THER M SMD_VGA_THERM 116 SMC LK1/ GPC1 ( PD ) ID0/G PH0 94 HOTKEY1# VTTPWR_ON 3 9 18 RAM_FAN R399 120K_04
20 SMD _VGA_THER M R62 3 *0_04 117 SMD AT1/ GPC2 ( PD ) ID1/G PH1 95 HOTKEY2# HOTKEY1# 30 C576 . 1U_ 16V_04
6 SMC _CPU _TH ERM 118 SMC LK2/ GPF6( PU ) ( PD ) ID2/G PH2 96 WD T_EN HOTKEY2# 30
D 03 3/ 3 6 SMD _CPU _TH ERM SMD AT2/ GPF7( PU ) ( PD ) ID3/G PH3 97 WLAN_D ET#
WLAN_D ET# 2 9
PECI R6 21 0 _04 PWM ( PD ) ID4/G PH4 98 BT_DET#
4,15 PECI BRIG HTN ESS_R 24 ( PD ) ID5/G PH5 99 BT_DET# 31 VGA_FAN_ R
KBC _BEEP 25 PWM0/G PA0( PU ) ( PD ) ID6/G PH6 DD _ON 40, 43 18 VGA_FAN R398 120K_04
31 KBC_ BEEP 28 PWM1/G PA1( PU ) 107 EC_PCIE_RST# C575 . 1U_ 16V_04
30 LED_SCROLL# 29 PWM2/G PA2( PU ) ( PD ) ID7/G PG1 EC_PC IE_RST# 20
30 L ED_N UM# 30 PWM3/G PA3( PU ) BAT1 _VOL T BAT_VOLT_ R
30 LED_C AP# PWM4/G PA4( PU )
EXT GPIO
LOW ACTIVE 24 LED_BAT_C HG# 31 82 SMI #
SMI # 16 18 SYS_FAN SYS_FAN_ R R409 100_04 C 587 1U_10V_06
32 PWM5/G PA5( PU ) ( PD )EGAD/ GPE1 83 SCI # R397 120K_04 C HG_CUR SEN C HG_CU RSEN_ R
2 4 LED_BAT_FU LL# 34 PWM6/G PA6( PU ) ( PD )EGCS#/ GPE2 84 PWR _BTN # SCI # 16 C574 . 1U_ 16V_04 R407 *10 0_04 C 583 *1 U_10V_06
2 4 LED_PWR# PWM7/G PA7( PU ) ( PD )EGCLK/ GPE3 PWR _BTN # 16 TOTAL_CU R TOTAL_C UR_R
PS/2 WAKE UP R406 *10 0_04 C 581 *1 U_10V_06
80C LK 85 35 RSMRST#
29 8 0C LK 3IN 1 86 PS2C LK0/ GPF0( PU ) ( PD )WUI 5/ GPE5 17 SB_KBCR ST# RSMR ST# 16 R427 10K_04
29 3 IN 1 80PO RT_ DET# 87 PS2D AT0/ GPF1( PU ) ( PD )LPC PD #/ WUI 6/ GPE6 SB_KBCRST# 15 VDD3
29 80PORT_ DET# LPCPME# 88 PS2C LK1/ GPF2( PU ) C A CI R_I N
16 LPCPME# PS2D AT1/ GPF3( PU )
PWM/COUNTER 30 CIR _R X
3 0 TP_CL K 89 47 CPU _FANSEN 18 D32 1SS35 5
90 PS2C LK2/ GPF4( PU ) ( PD )TACH0/G PD6 48
30 TP_ DATA PS2D AT2/ GPF5( PU ) ( PD )TACH1/G PD7 RAM_FANSEN 18
WAKE UP ( PD )TMRI0/W UI2/G PC4 120 PWR GD_PS
PWR GD_PS 4,12,15, 16, 44
VGATH ERM_ ALERT# 125 124
20 VGATHERM_ALER T# PWR SW/GPE4 ( PU ) ( PD )TMRI1/W UI3/G PC6 VGA_FAN SEN 18
PWR_SW#
CIR
40 PWR _SW # 18 RI 1# /WU I0/GPD 0( PU ) ( PD )CRX/G PC0 119 CI R_I N R560 0_04 VDD 3
LID _SW# 21 123 MXM_ PW R_ EN
24, 30 LID_ SW# RI 2# /WU I1/GPD 1( PU ) ( PD )CTX/ GPB2 MXM_PW R_EN 20
GP INTERRUPT LPC/WAKE UP C61 5 .1 U_16V_04 D0 3
WEB_WW W# 33 19 SW I#
30 WEB_WW W# GI NT/GPD 5( PU ) ( PD )L80H LAT/ GPE0 SWI # 16 U 29
( PD )RI NG#/PW RFAIL#/ LPCR ST#/ GPB7 112 CH G_EN 42 SPI _VDD 8 VDD SI 5 KBC_SPI _SI_R R 430 47_04 KBC _SPI_SI
UART SO 2 KBC_SPI _SO_R R 446 15_1%_04 KBC _SPI_SO
BT_EN 108 CLOCK 1 KBC_SPI _CE#_R R 445 15_1%_04 KBC _SPI_CE#
AVSS
24, 31 BT_EN BKL _EN 109 RXD/ GPB0( PU ) 2 Z28 07 CE# 6 KBC_SPI _SCLK_RR 429 47_04 KBC _SPI_SC LK
VSS
VSS
VSS
VSS
VSS
V SS
VS S
24 BKL_ EN TXD/ GPB1( PU ) C K32KE 128 Z28 08 R447 1K_ 04 Z2803 3 SC K

C K32K R 43 3 *10M_ 04 WP# C6 08 C 658 C657 C607
11 3
12 2
IT851 2E-N X-L

12
49
91
27
75
*33 P_04 *33P_ 04

1
X3 32. 768KHz-200 R428 4. 7K_04 Z2802 7 HOLD# VSS 4 *33P_04 *33P_ 04

D03 3/ 3 4 1
C 746 3 2 D 03 EN 25P05-50GCP
. 1U_16 V_04 C 62 2 C 627
15P_ 50V_ 04 15P_ 50V_ 04 J _SPI 1
NC 4 NC _04 2 1 SPI _VDD
KBC _SPI_SCLK_R 4 3 KBC _SPI_CE#_R
KBC_AGND KBC _SPI_SI_R 6 5 KBC _SPI_SO_R
8 7
24 BRI GH TNESS R4 35 1 20K_ 04 BR IGHTN ESS_R
SPNZ- 08S3 -B-C -0 -P
C6 31 0 .1U _1 6V_0 4 VDD 3 16,21, 24, 31,40,42, 43, 45
3V 6,12,13, 15. .17, 20, 24,26,2 9. .32 ,40, 41, 43
3VS 7 ..9,12, 13, 15 .. 27, 29,30 ,32, 39, 41,43
KBC-ITE IT8512E B - 29
Schematic Diagrams
Mini WLAN/ TMP/ TPA6017A2
TPM 1.2 U3 1
26 10
16 ,28 LPC_ AD0 L AD0 VDD1 3VS
23 19
MINI CARD for WAN& DEBUG CARD 16 ,28

16 ,28
16 ,28
LPC_ AD1
LPC_ AD2
LPC_ AD3
20
17
L AD1
L AD2
L AD3
VDD2
VDD3
24 C 643 C6 83 C64 1 C64 0
*. 1U_ 16V_0 4 *. 1U_1 6V_0 4 *.1 U_1 6V_04 *1U_ 6.3 V_ 04

21
19 PC LK _TPM R4 42 *1 0K_04 L CLK
3 VS
JMI NI1 22 5 Z29 21 R4 59 *0_ 04
16, 28 LPC_ FR AME# L FRAME# VSB 3V
1 2 16
16, 26, 32 PE_WAKE# WAKE# 3. 3V_0 3V 1 2,1 5,1 6,2 0,2 8 PLTRST# L RESET#
3 6 27 C6 82
BT_ DATA 1. 5V_0 1. 5VSWLAN 15 ,28 LPC_ SIRQ SERI RQ
R15 6 1 0K_04 5 8 Z2 924 C37 2 C 374 R4 43 *0 _04 15
3 VS BT_ CHCL K UI M_PWR C LKRUN#
10 Z2 925 C37 3 C37 5 *.1 U_1 6V_04
7 UI M_DATA 12 Z2 926 .1U_ 16V_0 4 R44 0 *0_04 TPM_PD# 2 8 6 TZ25 04
19 WAN_C LKREQ# SUS _S T#
11 CL KR EQ# UIM_CL K 14 Z2 927 .1U _16 V_ 04 10U _10V_ 08 1 6 SU S_ST# L PCPD# GPIO 2 TZ25 05 T
1 9 PCIE_CL K_WA N# 13 REFCL K- UI M_R ESET 16 Z2 928 10 U_1 0V_08 TPM_BADD 9 G PI O2 T
1 9 PCIE_ CL K_ WA N REFCL K+ UIM_VPP asserted before entering S3 TESTBI /BADD
9 13 Z2915 R4 63 *0 _04 Z291 6 C687 *1 2P_04
GN D0 XTALI
15 4 LPC reset timing: TPM_PP 7
GN D1 G ND5 PP
1
LPCPD# inactive to LRST# inactive 32~96us 14 Z2914 2
TZ2 501 1 XTALO X6
KEY T TZ2 502 3 N C_1 4 R 464 3
21 18 T TZ2 503 12 N C_2 GND _1 11 *32. 768 KHz-20 0
GN D2 G ND6 T N C_3 GND _2
27 26 18 *0 _04
4
GN D3 G ND7 GND _3
29 34 R 461 *1 00_ 04
8 25 Z291 3 C688 *1 2P_04
GN D4 G ND8 TESTI GND _4
40
G ND9
WLA N_DET# 35 50
Sheet 29 of 47 2 8 W L AN _D ET#
15 PE3_ RX_W AN #
1 5 PE3 _ RX_ W AN
PE3 _ RX_ W AN #
PE3 _ RX_ W AN
PE3 _ TX_ WA N#
C35 7 .1U _10V_ X7R_ 04
C36 1 .1U _10V_ X7R_ 04
23
25
31
GN D11
PETn0
PETp0
PERn0
GND 10
W _DI SABLE#
PERSET#
20
22
WL AN _EN 24, 28
PLTR ST# 12, 15, 16, 20, 28 T PM _P P
HI : AC CESS
*SLB963 5TT
1 5 PE3_ TX_WA N# PE3 _ TX_ WA N 33 30 LOW : NO RMAL( In tern al P D )
Mini WLAN / TPM/ 15 PE3 _ TX _W A N

28 80 PO RT_D ET#
28 3 IN1
17
19
PERp0
NC 3
NC(SMB_ CLK)
NC( SMB_DATA)
N C(USB_D -)
32
36
38
R21 4
R21 5
0_04 USB_P7-
0_04 USB_P7+
WDT_EN 28
USB_P7- 1 5
USB_P7+ 1 5
D03 HI
T PM _B AD D LO W
:
:
4 E/4F h
2 E/2F h
Z29 23 37 NC 4 N C(U SB_D +)
TPA6017A2 3V
39
41
43
NC 6
NC 7
NC 8
3 .3VAUX
1. 5V_1
24
28
48
R65 1 *0 _04
1.5 VSWL AN
3V D03 3 /4
PC LK_TPM R44 1 *33 _04 Z291 7 C 642 *10P_5 0V_04
NC 9 1. 5V_2 1 .5VS
R204 *0 _04 MI NI_ CLK1 45 52 R21 6 0_ 06
1 2,1 5 CL_N _CL K NC 10 3. 3V_1 3V
R210 *0 _04 MI NI_ DATA1 47 42 TPM_PP R46 0 *10 K_04
1 2,1 5 CL_N _DATA NC 11 NC( LED_WW AN #) 3VS
1 2,1 5 CL_R ST R212 *0 _04 MI NI_ RST#1 49 44
51 NC 12 LED_ WLAN# 46 R61 7 *10 K_04 ADD R617
VDD3 NC 13 NC (LED_ WPAN #) 80C LK 28 3V
D03 889 10- 520 4 TPM_BADD R46 2 *10 K_04

For WLAN Device 3VS
R47 2 *10 K_04

Disable TPM function
REAR CHANNEL 2W
? ? : 500~1000Hz (? ? ? ? ? ) 5 VS
Fcut(-3db)=1965Hz L 90
2000Hz High Pass Filter 5VS_ REAR HCB10 05KF-1 21T2 0
D03
C764 C76 5 C 766 C76 7
C7 73 22 00P_5 0V_X7 R_0 6 U4 1
27 FRONT-L
27 SI DE-L C7 68 *22 00P_5 0V_X7 R_06 Z231 2 5 6 0.1 U_16 V_ 04 *1U_ 10V_0 6 1 0U_1 0V_08 *10U_ 10V_0 8
C76 9 220 0P_50 V_ X7R _06 9 LIN- PVD D 15
AUDG LIN+ PVD D
C7 74 22 00P_5 0V_X7 R_0 6 16
27 FRONT-R VD D
C7 70 *22 00P_5 0V_X7 R_06 Z231 3 17
2 7 SI DE-R RIN-
T h er m a l P ad
C77 1 220 0P_50 V_ X7R _06 7 4 SI DE_LO + AU DG

AUDG RIN+ L OUT+
J_SPK1
8 SI DE_LO - SIDE_R O+ L46 FCM1608 K-12 1T0 6 Z2 929
L OUT- 1
27 SPK_ EN SPK_EN 19 SIDE_R O- L45 FCM1608 K-12 1T0 6 Z2 930
SD # 2
R6 09 10 0K_04 GAI N0 2 18 SI DE_RO + SIDE_L O+ L44 FCM1608 K-12 1T0 6 Z2 931 3
5VS GAIN0 R OUT+ 4
R6 08 *100 K_04 GAI N1 3 SIDE_L O- L43 FCM1608 K-12 1T0 6 Z2 932
AUD G GAIN1
14 SI DE_RO - CON4
R OUT-
1
GND
R6 10 10 0K_04 11
R6 11 *100 K_04 13 GND 10 Z2 317
AUD G GND BY PASS
20
D03 21 GND 12 C772
EXPO SED PAD NC
TPA60 17A2PWPR 0.4 7U_1 0V_04
AUD G VDD3
12 ,17 ,18 ,20 ..2 3,2 7,3 0,3 1,4 3 5VS
AUD G
6,1 2,1 3,1 5.. 17, 20, 24, 26, 30. .32 ,40 ,41 ,43 3 V
7. .9, 12 ,13 ,15 ..2 8,3 0,3 2,3 9,4 1,4 3 3VS
11, 13, 15, 17, 32, 41, 43 1. 5VS
B - 30 Mini WLAN/ TMP/ TPA6017A2

Schematic Diagrams
Daughter CONN
VIN V IN 2 0 ,2 4 , 3 9. .4 2 , 44 , 4 5
PHONE JACK BOARD SWITCH BOARD VDD 5 V DD 5 24 , 3 1 ,4 3 ,4 5
5VS 5V S 1 2 ,1 7 , 18 , 2 0 ..2 3 , 2 7, 29 ,3 1 ,4 3
VI N
J ADJ 1
3V 3 V 6 ,1 2,1 3, 15 ..1 7, 20, 24 ,2 6,29, 31, 32 ,4 0,4 1, 43
J_ SW 1
16
1 3VS 3 VS 7 .. 9,1 2, 13, 15 .. 29, 32 ,39,4 1, 43
PWRS#
1
J_AU DIO1 4 0 PW R S# 2
LID_ SW#
1 2 4, 2 8 L ID _ SW # W EB_AP# 3 5V 5V 4 ,1 7 ,2 4 , 31 , 3 9 ..4 1 , 4 3. .4 5
VDD5 2 8 W EB _ AP# 4
2 W EB_EMAI L#
CIR _ RX 2 8 W EB _ EMA IL # 5
28 CIR _ RX 3 2 8 W EB _ WW W # W EB_WW W# 6
4
L IN E- R 3V 7
5
27 L INE- R L IN E- L 6 3 VS LED_SCR OLL# 8
27 L INE- L 2 8 L ED_ SC ROL L # 9
7 LED_CAP#
SPDIF- OUT 2 8 L ED _ CA P# 10
2 0, 2 7 S PDIF- OUT 8 2 8 L ED_ NU M# LED_NUM# 11
9 SATALED
MIC 1 _ R 1 5 SA TA L ED 12
10 C ARD_ PWREN #
27 MIC1 _ R MIC 1 _ L 2 5 CA R D_ PWR EN# 13
27 MIC1 _ L 11 Z3 00
T 2 0M IL1 14
12
JD_ S ENSE 15
13
2 7 JD_ S EN SE AMP_ MUTE 14 85 20 1-1 505
2 7 AMP_ MUTE HP_ SENS E 15
2 7 HP_ SENS E HEA DPHON E- R
2 7 HEA DPH ON E- R 16
HEA DPHON E- L
17
2 7 HEA DPH ON E- L
18
871 51 -18 07
AU DG
Sheet 30 of 47
CLICK BOARD 5 VS Daughter CONN
R 112 R 11 1
J_ TP1 1 0K_0 4 1 0K_ 04
1
1 2 TP_ DA TA
2 3 TP_ DA TA 28
TP _ CL K TP_ CL K 2 8
3 4
4
8 520 1- 040 5 C18 6 C1 85 C1 84
H 44 H 40 H3 7 H3 0 H2 7 H29 H33 H3 2 H3 8 H3 1 H42
.1U _1 6V_0 4 4 7P_0 4 H 7_ 0D3 _7 H 7_0 D3 _7 H7 _0 D3_ 7 H7 _0 D3_ 7 H7 _0D 3_ 7 H7_ 0D 3_7 H7_ 0D 3_7 H7 _0D 3_7 H7 _0D 3_ 7 H7 _0D 3_ 7 H8_ 0D 3_7
47 P_0 4
HOTKEY BOARD 5VS

GND GN D GN D GND GND GND GND GND GND GND GND
H 43 H 48 H3 9 H 22 H 34 H 35 H3 6
H 7_ 0D2 _7 H 7_0 D2 _7 SU -27 AS SU- 27 AS SU- 27 AS SU- 27 AS SU- 27 AS D03
R2 03 R2 02
(? ? ? )
*10 K_ 04 *10 K_04 H2 H1 H3 H4
J _KEY1
GND GN D GN D GN D GN D GN D GN D C15 8D 158 N C 15 8D1 58 N C 158 D1 58N C 158 D1 58N
HOT KEY1 # 1
28 HOTKEY 1 # HOT KEY2 # 2
28 HOTKEY 2 # 3 H 24 H 26 H 21 H 16 H 18 H 19 H 25 H13 H5 H 45 H46 H2 3 H9
4 H 7_0 D3 _7 H 7_0 D3 _7 H 7_0 D3 _7 H 7_0D3 _7 H 7_ 0D3 _7 H 8_ 0D3 _7 C 31 5D1 11 C31 5D1 11 C31 5D1 11 SQ-3 1G SQ- 31G SU- 27 AS H1 0_ 0D4 _0
8 520 1- 040 5
H51 H 52 H 53 H 54
C15 8D 158 N C 15 8D1 58 N C 158 D1 58N C 158 D1 58N
USB BOARD GN D GN D
D03
GN D GND GND GND GND GND GND GND GND GND GN D
M1
C-MARK1
M2
C -MARK1
M3
C -MAR K1
M4
C -MAR K1
H6 H 11 H 17 H 41 H 47 H 49 H7 H 50 H 28 H 15 H 14 H 10
5V C 315 D1 11 C 315 D1 11 C 315 D1 11 C 315D1 11 C 31 5D1 11 C 31 5D1 11 C 315 D1 11 C 315 D1 11 C 31 5D1 11 H 10 _0D 4_ 0H 10 _0D 4_ 0H 10 _0D 4_ 0
M5 M6 M7 M8
FJ_ USB4 C-MARK1 C -MARK1 C -MAR K1 C -MAR K1
1 2
3 4
5 6 GN D GN D GN D GND GND GND GN D GN D GND GND GND GND
7 8
U SB_ P0 - 9 10 USB _ P1 - H8 H20 H12
15 US B_ P0 - 11 12 US B_ P1 - 1 5
U SB_ P0 + USB _ P1 +
15 US B_ P0 + 13 14 US B_ P1 + 1 5
C13 0D1 30 C13 0D 130 HOLE3_4
U SB_ P2 - 15 16 USB _ P3 -
15 US B_ P2 - 17 18 US B_ P3 - 1 5
U SB_ P2 + USB _ P3 +
15 US B_ P2 + 19 20 US B_ P3 + 1 5
88 107 -200 0
Daughter CONN B - 31
Schematic Diagrams
SATA HDD/ CCD/ BT/ PC BEEP
CCD Bluetooth
L 47 1 8
H CB2012KF-121T30_0 8 Q2 3 48 mil 5V_CC D
Z3118 S D
5V 3 V_ BT
G
AO340 9 J_ CCD 1
R 194 330K_04 85 205 -05 00 JBT1
Z312 1 1
C 344 1U_ 6. 3V_04 USB_P4- 1 2 +3 .3v
15 USB_P4- 2 GN D
C 347 15 USB_P4+ USB_P4+ 3 15 USB_P5- USB_P5- 3 USB-
R195 U SB_P5+ 4
28 C CD_ DET# 4 15 USB_P5+ USB+
10U _10 V_ 08 R18 7 C 291 28 BT_D ET# BT_DET# 5
68K_1%_04 C3 29 5 R18 2 10K_04 DETECT#
. 1U_1 6V_04 R183 10K_0 4 VDD3 BT_EN# 6
VDD3 J_C CD1 BT_ON#
1 0U_ 10V_08 7
D
1 N. C
100 K_04 8
Q27 N. C
28 CCD_EN G 2N7002 W 5 882 66- 0800
S
From H8 default HI L42
HC B2012KF-12 1T30_0 8
3V 3 V_BT
R180 C31 5 C30 7
VDD5 C31 1
. 1U_ 16V_04 10U _10 V_08
Sheet 31 of 47 R 256 C 441 R25 8

R2 59 470 K_04
.1U _16 V_04
100 K_04
B T _E N#
design value ---> D03
SATA HDD/ CCD/ depends on the 1.37 K 1%_06 100K_04 U17A R 260 R263
8
.1 U_16 V_04 GM3 58S8R Normal : 0
temperature Z3101 3 Z3103 1 0K_04 10 0K_04
+
BT/ PC BEEP Z3102 2 -
1 Active : 1
D
VD D3 R18 1 *10 0K_04
JRT1 D 19 Shutdo wn_st b_ power 45 Q 20
R25 7 C44 0 BT_EN G 2 N7002W
4
1 F01 J2E Z310 4 24,28 BT_ EN
Thermistor---> NTC
D
2 100K_04 .1U _16 V_04
S
ACES-852 04- 2P Q36 C4 43 R26 2
A
R2 61 0 _04 G
Z3105 2N7002 W 100K_04
S
.1U _16V_ 04
A
D 20
*F01 J2E
C
H8 _RST#
H8 _RST# 28
PC BEEP
SATA HDD CON
J_ SATA1
1
2 1 6 ICH SPK I CHSPK BEEP BEEP 2 7
3 Z3106 C48 0 . 1U _10V_ X7R _04 SA TA _RX #2 C240 1U _6. 3V_04
4 Z3107 C47 9 . 1U _10V_ X7R _04 SA TA _RX 2 SA TA _RX# 2 15
SA TA _RX2 15
5
6 KBC _BEEP
7 Z3108 C47 8 . 1U _10V_ X7R _04 SA TA _TX# 2 2 8 K BC_ BEEP C247 1U _6. 3V_04
SA TA _TX2 SA TA _TX #2 15
8 Z3109 C47 6 . 1U _10V_ X7R _04 SA TA _TX 2 1 5
9
10
11 60MIL
12
13
14 5VS
15 C46 2 C463 +
C4 77
16
17 4. 7U_ 10 V_08 10 0U_ 6.3 V_ B2
18 .1U _16 V_04
J_SATA2
20 19
SA TA_RX 1 C 451 . 1U_ 10V_X7R_04 18 20 19 17 C459 . 1U_ 10V_ X7R _04 SA TA_ TX0
15 SA TA_ RX 1 SA TA_RX #1 C 450 . 1U_ 10V_X7R_04 16 18 17 15 C458 . 1U_ 10V_ X7R _04 SA TA_ TX#0 SA TA _ TX0 15 VDD3 VDD 3 16, 21, 24, 28,40,42 ,43 ,4 5
15 SA TA _R X# 1 16 15 SA TA _ TX# 0 1 5 3V 3V 6, 12, 13,15 ..17, 20, 24, 26, 29, 30,32 ,40 ,41 ,4 3
14 14 13 13 3VS 3VS 7. .9, 12, 13, 15 ..30,3 2, 39, 41, 43
SA TA_TX# 1 C 447 . 1U_ 10V_X7R_04 12 11 C457 . 1U_ 10V_ X7R _04 SA TA_ R X# 0
15 SA TA_ TX# 1 SA TA_TX1 C 446 . 1U_ 10V_X7R_04 10 12 11 9 C456 . 1U_ 10V_ X7R _04 SA TA_ R X0 SA TA _ RX #0 15
1 5 SA TA_TX1 10 9 SA TA _ RX 0 1 5 VDD5 VDD 5 24, 30, 43, 45
8 8 7 7 5V 5V 4, 17, 24,30 ,39 .. 41, 43. .45
6 5
5VS 4 6 5 3 5VS 5VS 12, 17 ,18 ,20.. 23, 27, 29, 30 ,43
C444 C 445 C4 42 C53 2 4 3 1
+ 2 1
.1 U_16 V_04 100 U_6 .3V_ B2 SQPOFZ-20S2
10U_10V_0 8 10U_ 10V_ 08
B - 32 SATA HDD/ CCD/ BT/ PC BEEP

Schematic Diagrams
New Card/ MDC/ TV/ Robson
3V
NEW CARD C371 .1U_16V_04
3V
5
U8
1 74AHC 1G0 8GW
1 .5VS 3VS 3V 16 PCI RST#
4
2 R1 73 R171 C26 1 C 263 C2 62
1. 5VS 3VS 3V
*10 0K_04 *100 K_04 .1U _16 V_ 04 . 1U_ 16V_ 04 . 1U_ 16V_0 4
C3 78 C370 C37 7
3
U9 36mils J_ NEW1
.1U_16V_0 4 .1 U_1 6V_04 .1U _16 V_ 04 17 15 NC_ 3. 3VAUX 12
AUXIN AUXOUT +3.3 VAU X
2 3 NC_ 3. 3V
48mils 14
3 .3VI N 3.3 VOUT +3.3 V
15
+3.3 V
12 11 NC_ 1. 5V
48mils 10
1 .5VI N 1.5 VOUT +1.5 V
9 +1.5 V
16 PCI RST# 6 8 Z320 6 NC_ RST# 13
Z3 229 20 SYSR ST# PERST# PERST#
1 SHD N# 10 Z3207 17
10, 16, 28 ,43 SUSB# STBY # C PPE# C PPE#
3V 9 NC_ CPUSB# 4
19 CPU SB# 11 C PU SB#
15 O C#1 0 O C# 1 6,2 6, 29 PE_ WAKE# W AKE#
C 18 Z3 210 NEWCARD _CL KR EQ# 16
RCL KEN 19 NEWC AR D_C LKREQ# C LKREQ#
SCLK AC R 217 *10 K_04 R1 72 10K_ 04
3VS
D9 A R 219 10 K_04 4 7 19
3V NC GND 19 PCI E_CL K_ NEWCARD R EFCL K+
*BAV99 5 21 R2 20 18
NC EGND 19 PC IE_CL K_NEWCAR D# R EFCL K-
13
14 NC 16 *10K_ 04
SDATA AC
D10
C
A
NC
P223 1NF E2
ENE P2231NF E2 pin1,8,9,10,20 has
NC
15 PE1_RX_ NEW
15 PE1_RX_ NEW#
15 PE1_ TX_ NEW
C 268 . 1U_10V_ X7R _04
22
21
25
PETp 0
PETn 0
PERp 0 RESER VED
5 Z320 8
Sheet 32 of 47
*BAV99 3V C 267 . 1U_10V_ X7R _04 24 6 Z320 9
internally pulled high (110~330K
Ohm)
15 PE1_ TX_ NEW#
1 5 USB_P10+
1 5 USB_P10-
3
2
PERn 0 RESER VED
U SB_ D+
U SB_ D-
New Card/ mDC/
1
J_MDC1
DE L
D0 3 J_M DC1
GND
GND
20
23 TV/ Robson
16,2 7 SDATO SD ATO
1
3
5
GN D
Azalia_ SD O
GN D
R ESERVED
R ESERVED
3.3 V Ma in/a ux
2
4
6
MDC_ VCC R61 3
Z3 203
Z3 20 1
L 68
0 _04
3V
3V
12 11 MDC 7. .9, 12, 16 ,18 ,19 SDATA
7. .9, 12, 16 ,18 ,19 SCLK
R63 5
R63 4
0_ 04
0_ 04
8
7 SMB_ DATA
SMB_ CLK
GND
GND
26
SY NC 7 8 FCM1 608K-12 1T0 6 2 1

16 ,27 SY NC Azalia_ SY NC GND
SD ATI1 R3 91 22 _04
Z32 04 9 10 D 03 3 /4 13 080 1-1
16 SD ATI1 Azalia_ SD I GND
AC _RESET# 11 12 Z320 5 R38 4 0 _04 BIT_CL K
16,27 AC_ RESET# Azalia_ RST# Azalia _BCLK BIT_CLK 16 ,27
PIN GND 1~4 =G ND
8 80 1 8 -1 2 0 0 C56 2 C56 1
.1U _16 V_04
*22P_04
JTC1
1
C ABL E_TV
J RCA1
1
L5 3 HCB4 532 KF- 800 T60 TV TUNER ROBSON CARD
2 2 C 380 .1 U_1 6V_04
3 3
R F_HRS_ UFL-R -SMT 4 JMI NI -ROBSON 1
FR -00 5D TV-GND 1 2
16,26 ,29 PE_W AKE# WAKE# 3 .3 V_ 0 3VS
TV-GND TV- GND 3 6
BT_ DATA 1 .5 V_ 0 1 .5VS
R 162 1 0K_04 5 8 Z3 219 C32 1 C32 4
3VS BT_ CHCL K U IM_PWR
UIM_ DATA 10 Z3 220 C 323 C 325
RO BSON _C LK REQ# 7 12 Z3 221 . 1U_ 16V_ 04
CLKREQ# U IM_ CLK
19 PC IE_ CL K _R OB SON# 11 14 Z3 222 .1 U_1 6V_04 10 U_1 0V_08
TV CARD TV_ 3V
D0 3 3 /3 1 9 PCIE_ CLK_ ROBS ON 13
9
15
REFCL K-
REFCL K+
GN D0
UIM_RESET
U IM_ VPP
16
4
Z3 223 10U _10 V_ 08
L 92 GN D1 GND 5
JMI NI- TV1
5A POWER PLAN FCM1 608 K-12 1T0 6
3V
1 2 L 93 KEY
16 ,2 6,29 PE_ WAKE# WAKE# 3 .3V_ 0 3VS
3 6 *FCM1608 K-121T0 6
BT_D ATA 1 .5V_ 0 1. 5VS
5 8 Z32 24 C53 0 C 534 21 18
BT_C HCL K U IM_ PW R GN D2 GND 6
10 Z32 25 C5 31 C5 35 27 26
U IM_ DATA GN D3 GND 7
3 VS R17 9 1 0K_0 4 7 CL KR EQ# UI M_C LK 12 Z32 26 . 1U_16V_0 4 29 GN D4 GND 8 34
3V R63 3 *1 0K_0 4 11 14 Z32 27 .1U _16 V_04 10U _10 V_08 40
13 REFCL K- UIM_RESET 16 Z32 28 1 0U_ 10V_ 08 RO BSON_ DET# 35 GND 9 50
D03 REFCL K+ UI M_VPP 28 RO BS ON _D ET# GN D11 GND1 0
9 PE5_ RX _R OB SON#C1 90 .1 U_1 0V_X7R_0 4 23
GN D0 1 5 PE5 _R X_ ROBSO N# PE5_ RX _R OB SON C1 92 .1 U_1 0V_X7R_0 4 PETn0
15 4 25 20 ROBSON _EN
GN D1 GND 5 1 5 PE5_R X_ ROBSON PE5_ TX_ ROBSON# PETp0 W_D ISABLE#
31 22
15 PE5_ TX_ ROBS ON # PE5_ TX_ ROBSON PERn0 PER SET# BU F_ PL T_ RST# 15 ,25 ,26
1 5 PE5 _TX_ R OB SON 33 PERp0 NC (SMB_C LK) 30 SC LK 7 .. 9,1 2,1 6,1 8, 19
KEY 32 SD ATA 7 ..9 ,12 ,16,1 8,1 9
NC (SMB_D ATA)
17 36 R35 2 0_ 04 USB_P11 - U SB_ P1 1- 1 5
NC 3 NC(USB_D-)
21 18 19 38 R35 3 0_ 04 USB_P11 + U SB_ P1 1+ 15
GN D2 GND 6 NC 4 NC(USB_D+)
27 26 Z323 0 37
GN D3 GND 7 NC 6
29 34 39 24 3 VS
GN D4 GND 8 40 3 VS 41 NC 7 3.3 VAU X 28
35 GND 9 50 43 NC 8 1 .5 V_ 1 48
PE6 _ RX_ TV#C 269 . 1U_10V_ X7R _04 GN D11 G ND1 0 NC 9 1 .5 V_ 2 1 .5VS
23 Z323 1 45 52
15 PE6_ RX_TV# PE6 _ RX_ TV C 260 . 1U_10V_ X7R _04 PETn0 NC 10 3 .3 V_ 1 3 VS
25 20 Z323 2 47 42
15 PE6_ RX_TV PE6 _ TX _TV # PETp0 W_D ISABL E# NC 11 NC (LED_WWAN# )
31 22 49 44
15 PE6_ TX_TV# PE6 _ TX _TV PERn0 PER SET# BU F_ PLT_ RST# 15 ,2 5,2 6 NC 12 L ED _WL AN #
33 30 51 46
15 PE6_ TX_TV PERp0 NC(SMB_CL K) TV_EN NC 13 N C(L ED_WPAN# )
NC (SMB_D ATA) 32
17 36 R17 6 0_0 4 USB_P9- USB_ P9- 15 889 10 -52 04
NC 3 NC(USB_ D-)
19 38 R17 5 0_0 4 USB_P9+ USB_ P9+ 15
NC 4 NC( USB_D+)
37
39 NC 6 24
NC 7 3.3 VAU X TV_ 3V D03
41 28
NC 8 1 .5V_ 1 1 .5 V 1.5 V 4 ,5, 7.. 9, 40, 43
43 48 1. 5VS
45 NC 9 1 .5V_ 2 52
NC 10 3 .3V_ 1 1 .5 VS 1.5 VS 11 ,13 ,1 5,1 7,2 9, 41, 43
47 42
NC 11 NC(LED_ WWAN# ) TV_ 3V D03
49 44
NC 12 LED _WLAN # 5 VS 5VS 12,1 7,1 8, 20. .23 ,2 7,2 9.. 31, 43
51 46
NC 13 N C(L ED _WPAN# )
3 VS 3VS 7..9 ,1 2,1 3,15.. 30 ,39,41 ,4 3
889 10- 520 4
3V 3V 6,1 2,1 3,1 5. .17 ,20,24 ,2 6,29.. 31, 40 ,41 ,43
New Card/ MDC/ TV/ Robson B - 33

Schematic Diagrams
Audio Board
AJ AUDIO4
J AD J1
5
LINE_SENSE_A 4
LINE IN
18
LINE-R_A AL7 HCB2012KF-121T30_08 Z3306 3
1
AJADJ1 LINE-L_A AL6 HCB2012KF-121T30_08 Z3307
Z3312 6
2
(SURR)
1 1
VDD5_A
2 AC7 AC8 2SJ -S870-010
CIR_RX_A 3
4 BLUE
4 330P_50V_X7R_04 330P_50V_X7R_04
LINE-R_A 5
LINE-L_A 6
7 A_AGND AJ AUDIO3
SPDIF-OUT_A 8 5
9 Z3309 4
MIC1_R_A 10 Z3310 3
MIC1_L_A 11 Z3311 6 SPDIF
12 SPDIF- OUT_A AL5 FCM1608K- 121T06 Z3305 2 OUT
J D_SENSE_A 13 1
AMP_MUTE_A 14 AC6 2SJ-S870-010
HP_SENSE_R 15
3 BLACK
MSPKR_A 16 680P_04
MSPKL_A 17
18
GND_A
AJ AUDIO2
A_AGND GND_A 5
MIC_SENSE_A 4
MIC IN
Sheet 33 of 47 MIC1_R_A
MIC1_L_A
AL4
AL3
FCM1608K- 121T06
FCM1608K- 121T06
Z3304
Z3303
Z3313
3
6
2
(CENTER)
Audio Board AC5 AC4
1
2SJ-S870-010
680P_04 680P_04
2 PINK
A_AGND
AJ AUDIO1
HP_SENSE_A 5
AMP_MUTE_A 4
MSPKR_A AL2 HCB2012KF- 121T30_08 Z3301 3
6 SPEAKER OUT
MSPKL_A AL1 HCB2012KF- 121T30_08 Z3302 2
1
(FRONT)
2SJ-S870-010
AR4 AR5 AC3 AC1 AC2
1 GREEN
680P_04 680P_04 .1U_16V_04
LI NE_SENSE_A AR3 10K_04 JD_SENSE_A
1K_04 1K_04
MIC_SENSE_A AR2 20K_04
HP_SENSE_A AR1 39.2K_1%_04 HP_SENSE_R

5
4 1
A_AGND 3
2
6
SOLDER SIDE VIEW
(Audio Board)
AU1
CIR_ RX_ A O
AH1 AH3 AH2 AH4 G
H6_0D2_3 H6_0D2_3 BR3 100_08 Z3308 V
VDD5_A
C48D48N C48D48N
GND_A
C.IR
IRM-V038/TR1
AC9 AC10
.1U_16V_04 4.7U_10V_08
GND_A GND_A
GND_A
B - 34 Audio Board
Schematic Diagrams
Card Reader Board
VC C_C ARD _B
BJ_CR 1
P1 SD _CD #_B
CD _SD P11 SD _WP_B
P6 WP_SD P7
VDD _SD CLK_SD P14 C LK_SD _B
P13 CLK_MS P4 MS_BS/ SD _CMD_B
VCC _MS C MD _SD
P20
BS_MS
P9 MS/SD_D 0_B
P5 DAT0_SD P18 MS/SD_D 1_B
P8 VSS_SD DAT0_MS P10 MS/SD_D 2_B
VSS_SD DAT1_SD MS/SD_D 3_B
P19
DAT1_MS P2
P12 DAT2_SD P17
P21 VSS_MS DAT2_MS P3 MS_CD #_B
VSS_MS DAT3_SD P15
DAT3_MS
P22
P23 GN D
GN D I NS_MS
P16 Sheet 34 of 47
MD R 019H -05- A
Card Reader Board
GND _B
VC C_C ARD _B
BJ1
1 2
3 4
SD_C D#_B 5 6 MS/ SD_D 0_B
SD_WP_B 7 8 MS/ SD_D 1_B
C LK_SD_B 9 10 MS/ SD_D 2_B
MS_BS/SD_C MD _B 11 12 MS/ SD_D 3_B
MS_C D#_B 13 14 C AR D _PWR EN#_B
15 16
17 18
19 20
88028-2010
BH 1 BH4 BH 2 BH 3
H 6_0D2_3 H 6_0D2_3 H7_0D 2_8 GND _B GND _B
H OLE3_4
GN D_B GND _B GN D_B
Card Reader Board B - 35

Schematic Diagrams
Click Board
V C C 5_C
V R3 V R2
VC C 5_C
V CN2 10K _04 10K _04
V CN1 12
10MIL 12
1 11
TP A D D A TA_C 2 1 11 10 TP A D D A TA_C
2 10 10MIL
TP A D C LK _C 3 9
4 3 9 8
4 8 7 TP A D C LK _C
VC 4 85201-0405 7 6
6 5
5 10MIL
.1U _16V_X7R _06 4 SW _L
4 3
3 2 V R4 *0_04 V C2 V C1 VC 3
2 1 SW _R
1 120P _06 120P _06 120P_06
8 71 52 -1 2 07
Sheet 35 of 47 GND_C plan
GND_C
Click Board
V C C 5_C V C C 5_C
V R1 V R5
10K _04 10K _04
V S W E B1 V SW E B 2
1 3 SW _R 1 3 S W _L
2 4 2 4
H C H STS -05-A H C H STS -05-A

GND_C GND_C
(? )
C H2 CH4 CH1 CH3

H 6_0D 2_3 H 6_0D 2_3
C 48D 48N C 48D 48N
G N D _C GN D _C
B - 36 Click Board
Schematic Diagrams
Hotkey Board
DWEB1
1 3 H OT KEY1 # _D
2 4
H CH STS-05-A
GND_D
DJ_KEY1
HO T KEY1 # _D 1
HO T KEY2 # _D 2
3
4
DSWEB1 85202-0405
1 3 H OT KEY2 # _D GND_D
2 4
H CH STS-05-A
GND_D
Sheet 36 of 47
Hotkey Board
SPI_TOOL1
Z3601
2 1 Z3602
4 3 Z3603
6 5 Z3604
8 7 Z3605
10 9
SXUAZ- 10S2-B
PL ACE T OP SID E
SPI_TOOL2
(Hotkey Board) Z3606
2 1
Z3607 4 3
Z3608
Z3609 6 5
Z3610 8 7
DH 1 D H2 D H3 10 9
H6_0D2_3 H 6_0D 2_3 SBH Z- 10S1-B
C 48D48N PL ACE B OTT OM SI DE
GND _D GN D_D
SPI FLASH TOOL
Hotkey Board B - 37
Schematic Diagrams
Switch Board
3VS_E
VIN _E
ED 5
GND_E
EJSW1 ER 7 220_08 Z 3707 A C
1 HT- 150NB-D T
PWR S _1 2
LID_S W #_1 ED 1
W EB 0#_1 3 ER 1 220_08 Z 3701 A C SC RO LL OC K# _ 1
4
W EB 1#_1 5
W EB 2#_1 BW-150U YG-C T
6 ED 2
3V_E 7 Z 3702 CA P SL OC K# _ 1
3VS _E ER 2 220_08 A C
8
SC R OLLOC K#_1 9
CAP SLOCK#_1 BW-150U YG-C T
10
NUMLOC K#_1 ED 3
HDD_LED#_1 11 ER 3 220_08 Z 3703 A C N UM L OC K# _1
12
CR _LED#_1 13
Z3706 BW-150U YG-C T
20MIL 14 ED 10
15 ER 5 Z 3705 A C H DD_ L ED # _1
2 2 0_ 0 8
85201-1505
GND_E BW-150U YG-C T
ED 4
Z 3704
C R_LED #_1 ER4 22 0 _ 0 8 A C
BW- 150UY G- CT
GND_E
Sheet 37 of 47
Switch Board 3V_E
ER 6 2 . 7K _ 04
VIN _E ESW1
EU 1
EC1 1 3 LID _SW # _ 1 1 3 P W R S_1
6 VS Q 4
1000P_50V_04 2 PR G GN D 5 2 4 EC 2
GN D GN D
TLE 4917DS H CH STS-05-A .1U _50V_Y 5V_06
GND_E
GND_E GND_E
ESWEB1 E SW E B2
1 3 W E B0 # _ 1 1 3 W E B 1# _ 1
2 4 2 4
HC H STS-05-A H CH STS-05-A
GND_E GND_E
E SW E B3
1 3 W E B 2# _ 1
2 4
H CH STS-05-A
GND_E
(Switch Board)
EH1 EH 3 EH 5 EH 7
H6_0D 2_3 H6_0D 2_3 H 6_0D 2_3 H 6_0D2_3
GN D_E GN D_E GN D_E GND _E
EH2 EH 4 EH 6
C48D 48N C48D 48N C 48D 48N
B - 38 Switch Board
Schematic Diagrams
USB Board
60 mil 60 mil
EMI sol ution,when placement EMI so lution,whe n placement
near to USB Port? near t o USB Port ?
FJ _U SB2 FJ _USB3
FL 1 H CB2 012 KF-1 21 T3 0_08 Z3 80 7 1 FL2 H CB201 2 KF-1 21T30 _0 8 Z3 80 1 1
USBVC C 1 VC C 0 USBVC C 2 VC C 0
60 mil Z3 80 8 GND 1 6 0 mil Z3 80 2 G N D1
GN D GN D
2 2
D ATA 0- D ATA0-
Z3 80 9 3 Z3 80 3 3
D ATA 0+ D ATA0+
GN D GND 2 GN D G N D2
FL 5 FC 7 4 FL6 FC 13 4
USBP0 _ F 4 5 GND 0 U SBN 4_F 4 5 GN D0
. 1U _1 6V_ 0 4 Z3 81 0 5 . 1U _16V_ 0 4 Z3 80 4 5
. .
. .
VC C 1 VC C 1
USBN 0 _F 3 6 GN D GND 3 U SBP4 _F 3 6 GN D G N D3
Z3 81 1 6 Z3 80 5 6
USBP2 _ F 2 7 D ATA 1- U SBN 6_F 2 7 D ATA1-
Z3 81 2 7 Z3 806 7
. .
. .
D ATA 1+ D ATA1+
USBN 2 _F 1 8 GN D GND 4 U SBP6 _F 1 8 GN D G N D4
CM-4M3216 -18 1J T 8 C M-4 M321 6-1 81 JT 8
GND 1 GND_F GN D1
60 mil C 10 792-1 0803-00D 60 mil C 107 92 -1 08 0 3-00 D
U SBVC C1
FL3 HC B2012 KF-12 1T3 0_ 08
U SBVCC 2
FL4 H C B20 12 KF- 121T30 _ 08 Sheet 38 of 47
USB Board
FC 10 FC 14
+ FC12 . 1U _1 6V_ 0 4 + FC 11 . 1U _16V_ 0 4

10 0U _6.3 V_ B 100U_ 6. 3 V_B
GND_F GND_F
FU 2
FU 1 5VS_ F 4 VI N VO UT 1 USB VCC 2
4 1
5 VS_F VI N VOUT USBVC C 1
FC 8 3 5 FC 3 FC4 FC 5
VI N VO UT
FC9 3 5 FC 2 FC1 FC 6
VI N VOUT
10 U_ 1 0V_08 2 . 1U _1 6V_0 4 10U _1 0V_0 8
10 U_ 10V_ 08 2 . 1U _1 6V _04 1 0U _1 0V_ 08 GND .1 U_ 16 V_04
G ND
. 1 U_16V_0 4 RT97 01- CPL
RT97 01 -C PL GND_F
GND_F GND_F
GND_F
5 VS_ F
(? ) FJ _U SB1
1 2
3 4
5 6
FH 2 FH 3 FH1 FH4 FH 5
7 8
H 6 _0 D2 _3 H 6_ 0D 2_ 3 H8 _0 D 2_ 8 9 10
C5 9D 59 N C 59 D5 9 N U SBN0 _F USBN 4_F
U SBP0_ F 11 12 USBP 4_ F
13 14
15 16
USBN 2_F 17 18 USBN 6_F
U SBP2_ F USBP 6_ F
19 20
8721 6-20 00
GN D_ F GND _F GN D _F
GND_F GND_F
USB Board B - 39
Schematic Diagrams
Power CPU_VTT
ISL6314CR POWER CKT

5V
5V 5V
V6 314 PR 207
PR4 8 PR20 8
2 .2_06
1K_ 04
VIN
1
PC151 2. 2_0 6 R3
PC43 PC 42 + PC157
PC 14 3 1U_1 6V_06 U15 Z3905 *10K
PC1 55 ISL6314C RZ PC1 52 . 1U _50V_06 15U_25V_6X4.5
5
6
7
8
9 *4. 7U _25V_X5R_08
2
18
*. 1U _16V_04 .1 U_16V_ 04 6X 6 QFN 1 U_16V_ 06 PQ44
PR206 1 _0 6 Z3919 4
VC C
1 19 BSC 059N0 3S
4 4 VTT_PWR OK PGO OD PVCC
1. 1V EN 17
1
2
3
EN
C PUVTT_VI D7 32 22 Z3903
PR 205 2. 2_ 06 Z3 907
PC153. 1U _2 5V_X7R_06 V1 .1
VID 7 BOOT
C PUVTT_VI D6 25 VID 6 PJ11
C PUVTT_VI D5 26 23 Z39 01
4 CPU VTT_ VID 4
C PUVTT_VI D4 27
VID 5
VID 4
UG ATE
PHASE
24 PL8 0. 82U 1 3*13 *6. 7 25A1 2
C PU_VTT
C PUVTT_VI D3 28 21 Z39 02
4 CPU VTT_ VID 3 VID 3 LG ATE
C PUVTT_VI D2 29 PR1 03 20 mm
C
4 CPU VTT_ VID 2 C PUVTT_VI D1 30 VID 2 PD 22
VID 1
5
6
7
8
5
6
7
8
C PUVTT_VI D0 31 16 ISEN 9 9 2. 2_ 08 PC1 59 PC 162 PC17 1 PC168 PC1 69
VID 0 ISEN+
15 Z3904 PC 14 9 PC1 50 + + +
ISEN-
Sheet 39 of 47
F M 58 22
PHASE PR1 98 20K_1%_04 . 1U_ 16 V_04 4 4 PC5 0 . 1U _16V_04 . 01U _5 0V_X7R _04
. 1U _2 5V_X7R_06 5 60U 5 60 U *330U
PQ45 PQ46 1000P_50 V_04
A
1
2
3
1
2
3
Power CPU_VTT I SENNO
14 Z39 10 PR 74
PC 35
75K_ 1%_0 4
10N F_5 0V_0 4
BSC 04 2N03S BSC042N0 3S
PHASE
13 Z3911
OC SET PR 194 2K_1 %_04
ISEN
V1. 1
20
NC
PR66
5V
100_04 10 Z39 17 PR57 249_ 04 Z3 90 6 PC28 8 20 P_50 V_04
VDI FF
4 CPU_VTT_FB 12 VSEN PR5 6 PR 78 PR77 PR7 5 PR 72 PR67 PR6 4 PR 60
PC145
8 Z3912
PR 181 22K_ 04Z3913 PC14 0 PR 18 5 2K_ 04 *2. 2K_04 2 .2 K_04 *2. 2K_04 *2. 2K_ 04 *2.2K_04 *2. 2K_04 2 .2K_04 *2 .2K_04
DVC
*0. 01 U_5 0V_ 04 1 1 820 P_5 0V_04 CPUVTT_VI D7
4 CPU_VTT_FB- RG ND
CPUVTT_VI D6
PR61 PC1 47 PC144 CPUVTT_VI D5
9 Z3918 CPUVTT_VI D4
FB
100_04 *0. 1U _16V_0 4*0. 1U _16 V_0 4 CPUVTT_VI D3
CPUVTT_VI D2
CPUVTT_VI D1
Z39 08 5 7 Z3914 PC 139 22 P_50V_04 CPUVTT_VI D0
OFS COMP
Z3909 4
V6314 REF PC 141 10 00 P_50 V_04 PR179 20K_04Z3916 PR1 87 PR 20 4 PR203 PR1 99 PR 19 6 PR19 3 PR1 91 PR 18 9
PC 13 81000P_50V_0 4
FS_VCC 3 2K_04 *2K_0 4 2K_ 04 *2K_ 04 *2K_0 4 *2K_0 4 *2K_ 04 2K_0 4
FS
6 Z3915 PR 52 3K_04
APA
SS_VCC 2 SS
PR 51
1 00 K_04
GND
SY S3V
33
D 03
PR 18 2
R235 PR183
2 2K_ 04 PC142
82K_ 04 100K_ 04 PR1 22 PR12 0
0. 01U _50V_04
BOTTOM PAD 10 0K_ 04 100 K_04
CONNECT TO GND 3VS 1.1V EN
D
Through 8 VIAs
PQ13 PC 154
Z39 21 G 2N7 00 2W
0.1U_16V_X7R_0 4
S
PR 248
10K_04
D
V6314 PJ3
V6314
PR129 *0_04 Z3 920 G *O PEN _4 0mil
28 VTTPW R_ON
S
PR126 *0_04 PQ14 D0 3
41 1. 1VPWG D
PR5 0 *12K_04 FS_VC C PR 49 *82K_04 SS_VC C 2N 70 02W
1.L/DCR=R9*C16
2.Vdroop=Io*DCR*R9/R8 20,2 4,30, 40 ..4 2, 44 ,45 VIN
4, 17, 24,3 0,3 1, 40 ,41 ,4 3. .45 5V
3.100uA*R10=Ioc*DCR*R9/R8
44,45 SYS3V
4.Vapa=100uA*R11 7.. 9, 12, 13 ,15.. 30,32, 41, 43 3VS
4, 5,1 5, 18,44 CPU_ VTT
B - 40 Power CPU_VTT
Schematic Diagrams
Power 1.5V, 0.75VS, 12V
1.5V,0.75VSM
VIN 5V
3V
A
PR 232 PR217 PR224
PD25
1M_04 10_06 FM05 40 -N 100K_ 04
V1 .5
PU6
Z401 8 1. 5V_PW RGD
C
PR226 10_ 06 3 7
VDD QS PGD 1.5V_ PW RGD 16
Ra
PR216 PC190 PC18 9 PR 236 Z4009
D03 Z401 3 2 0 _0 6
200_1 %_04 1U _10 V_06 1U _10V_06 TO N 2 4 Z4007
BST . 1U_25 V_ X7 R_0 6
VIN
1
Z401 6 6
Z401 5 8 FB PC1 96 PC77 PC 78 + PC200
PR 222 10 _06 REF
Z401 4 9 . 1U_ 50 V_06 1 5U_ 25V_ 6X4 .5
5
6
7
8
Rb CO MP PR 235 9 *4.7 U_2 5V_X5R _08
2
PC18 5 0 _0 6 PQ59
PR223 PR225 2 3 Z4008 Z40 03 4
*0.1U_16V_04 DH BSC 059 N03S
10_06 10K_1%_04 Z401 9 10 PR 234 D0 3
1
2
3
VTTS
Z40 17
PC183 PC182 PR21 5 PC 192
Z40 12
PC186
5
VCC A IL IM
2 1 Z4011
22
4 .9 9K_1%_04
Z4001
3/ 3
PL11 0.6UH
V1.5
25 A1
PJ1 5
2
Sheet 40 of 47
LX 1.5V
1U_ 10V_06 *0.0 68 U_10V_0 4 0_0 6 100 0P_5 0V_X7R_ 04 1U _10V_06 19 Z4002 20mm
Power 1.5V,
C
DL
5
6
7
8
5
6
7
8
VSSA 4 9 9 PD26 PC2 03 PC2 05 PC2 04 PC 201 PC2 02
VSSA
0 .75V
2
PJ1 4
1 1A Z40 10
14
15
VTT
VTT
VDDP1
20
5V
4 4 FM5822
+
4 70U
+
4 70U
+
.1 U_1 6V_0 4
*330U
. 01U _50V_X7R_ 04
0.75VS, 12V
A
PC 195 PQ6 0 PQ58
1
2
3
1
2
3
*O PEN _3mm 12
V1.5 VDD P2
PR231 PC191 PC 193 13 1 U_ 10V_ 06 BSC042N 03S BSC 042N0 3S PR 134
PC1 87 PC188 VDD P2 0 _0 6
20K_ 1%_0 4 4. 7U_ 6. 3V_X5R_06 10U _10 V_08 1 18 VSSA
EN/ PSV PGN D1
10U_10V_ 08 1U_10V_06 PGN D1 16
11 17
VTTEN PGN D2
SC486
PR 237 2 20K_1%_04 1. 5VEN

5V
VI N2
D
PC1 97
G PQ56 . 1U_16V_ 04 PC1 74
4 3 DD _ON #
2N 7002W
1 0U_25 V_ 12
S
PR213 1 2V
PR 219 2 20K_1%_04 VTTEN
5V
100K_04
8
VA VIN1 PU 5 0.5A
PD9 FM0540 -N 1
V IN
Vo ut
P R2 1293 1K _1 % _04 P R2 1110 0K _1 % _04

A C Error output 5
D
Erro r
PC18 4
VI N 2
PR 218 *0_04 G PQ 52 .1 U_16V_0 4 PQ17 PD8 DD _ON # 3 SN S
GND
41, 43 SU SB SD
FB
2N7002W AO34 09 FM0540 -N 6 PC17 7
Vo T
S
PR 214 0_ 04 S D A C
43 DD_ON# VDD 3 LP2951CDR 2G D03 10 U_25V_1 2
G
7
VI N2 Z4006
PR13 2
PR221 10 0K_04
10K_04
Z4004 PR 133 2 0K_1 %_ 04 Z4 005
28 PW R_SW # D0 3 PQ18
D
PQ2 0 2N 70 02W
D
D
2 N70 02 W PJ5
PQ19 *OPEN_40mil G DD _ON 28, 43
G G 2N7002W
S
S
S
PC 181 PR22 0
. 1U_10 V_ X7 R_0 4100K_04
30 PWRS#
20, 24, 30 ,39 ,41,42, 44, 45 VI N 7 .. 9 0. 75V

45 VI N1 44 12 V
4 ,17 ,24,30, 31, 39 ,41 ,43.. 45 5V 6,1 2, 13, 15..1 7, 20, 24,26,29.. 32 ,41 ,43 3V
4 ,5, 7. .9, 43 1.5 V 16,21,24,28, 31, 42,43,45 VDD3
Power 1.5V, 0.75VS, 12V B - 41

Schematic Diagrams
Power 1.8VS, 1.1VS
5V <N AME>
1.8VS
A
PC66 PC 67
PD 6
4.7U_25V_X5R_08
FM0540-N . 1U_50V_06
1
2
5V PR91 680K_04 EN_1.8VS PR105 15K_1%_04
PQ48A
D
PC45 Z4105 Z4101 8
PQ 5 AO 4932
SU SB PR89 *0_04 G 2N7002W 0. 22U_16V_X7R _04
PC 55 PC52
7
PR90 100K_04 PU1
S
5V
13
15
SC412A *330P_50V_04
14
D H 16
D
0. 1U_50V_06 PL9 V1. 8 PJ12
N. C
PQ6 PJ1 2.5UH_6.8*7.3*3.5
I LIM
N.C
3VS G 2N7002W *OPEN_40mil 12 EN LX 1 Z4102 1 2 3A 1 2 1.8VS
D 03 PR95 10K_0 4 1.8V_PWR GD 11 2 Z4104 10mm
S
3V
5
6
PGD BST PQ48B

Z4107 10 3 PC 172 PC 173
VOU T VC C
Z4106 9 4 Z410 3 3 150U_4V_B2 0.1U_16V_04
FB DL
G ND
RT N
N .C
N.C
17 AO4932
PAD PC58
4
1U _10V_06
7
6
5
Sheet 41 of 47
Power 1.8VS, 1.1VS PR92
0_04
PR93 PC47
37. 4.K_1%_04 2 0P_50V_04
PC46 PR94
0. 1U_16V_X7R _04 24.9K_1%_06
5V
A
1.1VS
1
D0 3 PD 24 VIN
PR127 470K_04 EN_1.1VS 3/ 3 PR128 5. 36K_1%_04 PC70 PC 59 + PC 170
5V
5
6
7
8
9
FM0540-N
D0 3 0.1U_50V_06 15U_25V_6X4.5
D
Z4108
C
PC75 Z4111 4 PQ49 *4. 7U_25V_X5R _08
2
PQ 15 BSC 059N03S
PJ 4 *OPEN_40mil G 2N7002W 0. 1U_16V_X7R_04
1
2
3
PU3 PC 76
S
13
15
PR131 *0_04 SC412A V1.10
14
D H 16
40,43 SUSB 0.1U_50V_06 PJ13
5V PR130 100K_04
I LIM
N. C
25A
N.C
3V PR 125 10K_04 12 EN LX 1 Z4109 PL10 0.82U 13*13*6.7 1 2 1.1VS
C 11 2 Z4112 20mm
C
PR244 10K_04 B PQ16 39 1.1VPW GD PGD BST
1. 5VS
5
6
7
8
5
6
7
8
E2N3904 Z4110 10 VOU T VC C 3 9 9 PD23 PC 178 PC179 PC 180 PC175 PC 176
+ + +
Z4114 9 4 Z411 3 4 4 FM5822 0.01U_50V_X7R_04
FB DL
G ND
560U 560U 0.1U _16V_04
RT N
N .C
N.C
D 03 17 PQ51 PQ 50 330U _2. 5V_D 3
A
1
2
3
1
2
3
PAD
PC73
PR124 PR123 PC 72 BSC 042N03S BSC042N03S
1U _10V_06
7
6
5
5V 21.5K_1%_04 13K_1%_04 20P_50V_04
PR249 90 .9K_1%_04
PC74 PR121
0. 1U_16V_X7R_04 24.9K_1%_06
PWM frequency 200KHZ at 4A
load; 260KHZ at 20A load
11,13,15,17, 29, 32, 43 1. 5VS

20, 24,30,39,40,42,44,45 VIN
4,1 7,24, 30, 31, 39, 40,43..45 5V
6, 12, 13, 15..1 7,20, 24, 26, 29. .32,40,43 3V
7.. 9,12, 13, 15. .30,32,39,43 3VS
5,13 1. 8VS
10. .13,17,19,43 1. 1VS
43 1. 8V_PWRG D
B - 42 Power 1.8VS, 1.1VS

Schematic Diagrams
Power AC_In, Charge
PQ12
AC IN & CHARGER 8
7
6
3
2
ME48 25 8
3
2
7
6
5 1 1 5
PQ29 4 4 C harg e Cu rre nt 3 .2A
ME48 25 VA PR20 9 0_ 04 Z421 3 PQ4 7
VI N
Z 42 06
8 4 ME4 825 C harg e Vo lta ge 1 6.8V
7 3 1 5
6 2 2 6 T otal Pow er 210W
5 1 3 7
VA PQ1 4 D03 8
J AC1 ME48 25 PR1 1 0m_32 16 3/3 PQ10A D 03
Z420 8 PL2 H CB4532KF-80 0T60 8 SP8K1 0SFD5TB PL1 3 /3 PR11 6 BAT V_ BAT
1
7 3 2 4 .7 UH 5 .5 A 6. 8*7.3 *3.5 20 m_ 32 16
2 PL3 H CB4532KF-80 0T60 6 2 PR3 1 0m_32 16 1 7 Z4211 1 2 Z421 2
3
P C1 60 * 4 .7U _25 V_ X 5R_0 8
P C1 61 4 .7U _25 V _X 5R_ 08
P C5 4
PR11 5 5 1
4
PC 164 *4 .7 U_2 5V _X 5R_ 08
P C1 65 4 .7U _25 V_ X 5R_ 08

PQ30 4
Z4 215
5
6
P C6 5
AC IN_ CON PR 2 13 0K_1%_ 04 ME48 25
1
P IN GN D1 ~5 =GN D PC12 4 PC 120 PC 1 PR2 10 PC1 63
8
4 .7U _25 V _X 5R_ 08
10K_08 0 _04 +
.1U_5 0V_06 .1U _50V_06 . 1U_ 50V_06 PR117 Z42039 . 1U_ 50V_0 6
1 5UF M 25V
PR11 4 PR5 0 _04 PQ1 0B
2
Z 42 10
SP8K10 SFD5TB
4
10 K_1%_0 4 200 K_1%_0 4
Z4 235
BAT PC6 8
.1U _25 V_X7 R_0 6
PC63 PC62 PC 60
PR16 7
PD7
Z4218
PC69
Sheet 42 of 47
100 K_1%_0 4 FM0 540 -N 1U _25 V_08
.1U_50 V_06 . 1U_50V_06 .1U_5 0V_06 C AZ423 4
Power AC_In,
Z420 4
PC64 Charge
.1 U_1 6V_04
VA
PC16 6 PC16 7
30
29
26
32
31
28
27
25
VI N PU2 VA SGND5 .1U _50V_06
O UT -1
O UT -2
.1U_50V_0 6
CT L2
P GND
CB
LX
CE LLS
VB
1 24 PC61 . 1U_5 0V_06
VC C VI N
2 23 C TL1
-IN C1 CTL 1
PC4 PC 11 PC8 Z4205 3 22
+INC 1 GN D
Z4226 4 21
AC IN T RER MAL PA D VREF
.1U _50 V_06 .1U _50V_ 06 . 1U_ 50V_0 6 Z4207 5 20 Z42 33 PR109
AC OK RT
CO MP 2
Z4201 6 19 Z42 32 0_ 04
O UT C 2
COM P 3
-IN E3 CS
OUT C1
Z4216 7 18 Z42 14 SG ND5
+I NC2
A DJ 2
-I NE 1
-IN C2
Z4217 8 AD J 1 ADJ 3 17
SGN D5 PR11 2 C OMP1 BATT 33
SGN D
P C 57
P R1 10 3 9.2 K_ 1% _0 4
3. 9K_1 %_04 PR106 MB39A1 32 PR1 07
11
12
5
Z 42138
10
13
14
16
9
4 5.3 K_ 1% _0 4
1K_1 %_04 1 K_1%_0 4
Z 423 7
TOTAL
Z4239
. 1U_ 16 V_ 04
POWER CHARGE
PR 98
PR11 3 PC56 PR1 02 CURRENT
PR1 04 0 _06 ADJ PC5 3
Z 420 2
10 .2K_ 1%_04 22 00P_5 0V_X7R_ 04 10K_1%_0 4 ADJ
1 00P_ 50V_04
SG ND5
Z 42 03
SG ND5
SY S5 V SGND5 SGN D5
PC5 1 *22P_50 V_04
Z42 31
Z423PR1
6 01 22K_1%_0 4
PR1 11 D03
3/3 PC 48 2 200 P_ 50V_ X7R _04 PC 49 PR9 6 PR 97
10 0K_04 22K_1 %_04 93 1_1%_ 04
1000P_50 V_X7 R_04 Z424 0
CTL1
0.125V/1A PR 100 0_04
D
Z4220 SGN D5 SGN D5

28 TOTAL_C UR
PR1 08 100K_04 Z4 229 G PQ9 0.5V/1A PR 99 0_04
SYS5V
2N 700 2W 28 CH G_C URSEN Z421 9
D
PQ 7 4 0mi l JBATT1
2 8 CHG_ EN G PJ2
2N7002W *OPEN_4 0mil 1
R239 1 00_ 04 Z4221 2
S
D03 40m il 28 SMC_ BA T 3

R240 1 00_ 04 Z4222
28 SMD_ BA T 4
8 mil R241 1 00_ 04 Z4223 G ND1
2 8 BA T_DET 5 GND
6
G ND2
7 GND
8
VDD3 C 427 C4 28 C4 26
CO N8_BATT
PQ11 PR11 9 3 0P_0 4 30 P_04 3 0P_04
PR88 DTA114 EU A 30 K_ 1%_04
BAT E C Z42 25 BAT1 _VOLT 28
10 K_04
AC /BATL# 2 0,2 8
PD5
B
C
C A Z423 0 B PQ4 Z4 224 PR11 8 PC71
VA
D
UD Z16B EDTD11 4EK 6. 04K_1%_04 .1 U_16 V_04

PC44
G PQ8 16 ,21,24 ,2 8,3 1,4 0,4 3, 45 VDD3
SYS5V 2 0, 24, 30, 39. .41 ,4 4,4 5 VI N
*0. 1U_ 16V_0 4 2N700 2W
S
Power AC_In, Charge B - 43

Schematic Diagrams
Power Switch, ICH_1.1VS
PQ64 SYS5V
SYS15V PQ 65 SYS15 V AO4468
VDD5 AO 4468 VDD 5 8 5V
8 5VS 7 3
PR240 7 3 PJ17 4A 6 2 4A
1M_04 3A 6 2 3A Power Plane 40, 41 SU SB
SU SB PR164 5 1 Power Plane
PR 158
5 1 1M_04 4 1 0K_04
4 *OPEN_40mil
D D_ON#
D 03 Z4305 D D_ON# 4 0
D
PC 110 PC109 PR163 PQ27
D
PC 207 100K_04 2N7002W PQ22 PC 100
PQ66 10U_10V_08 PC111 DD _ON G 2 N7002W
SU SB G 2N7002W .1U _10V_X7R _04 G D D_ ON# 28,4 0 DD _ON . 1U_10V_X7R_04
1000P_50V_X7R_0 4 10 00P_50V_X7R_04
S
PR 150
S
PJ8 1 00K_04
*OPEN_40mil
D0 3
VDD 5
SYS15V PQ 71
VDD3 AO 4468 PR2 28 PQ69
8 3VS 100K_04 SYS15 V AO4468
PR243 7 3 VDD 3 8 3V
1M_04 3A 6 2 3A Power Plane 7 3
5 1 SUSB 3A 6 2 3A
D
Sheet 43 of 47 Z4308
4
PC 211 PC210
PR242 10 ,16, 28, 32 SU SB# G
PQ5 3
2N 7002W
PR241
1M_04
5 1
4
Power Plane
100K_04
D
Power Switch,
S
PC 212
PQ72 10U_10V_08 PR227 EN_15V
SU SB G 2N7002W .1U _10V_X7R _04 100K_04
2200P_50V_X7R_0 4 PQ70
D
ICH_1.1VS PC209 2N7002W
S
22 00P_50V_X7R_04 G D D_ ON#
S
VD D5
SYS15V PQ 26
1.5V AO 4468 1. 5VS
8
PR159 7 3 PR2 30
1M_04 3A 6 2 3A Power Plane
5 1 *100K_04
4
EN_VC CA_1.1VS
Z4310 PR160
D
PC 103 PC102 100K_04
D
PC 101 PQ5 4
PQ24 10U_10V_08 G
SU SB G 2N7002W .1U _10V_X7R _04 41 1. 8V_PW RGD *2N 7002W
.01U_50V_X7R_04
S
S
V1.5 D03
PJ18
0 .5A
*OPEN_40mil 5V
PR 238 *0 _08 1.5V PC213
SY S15V PQ57 PU7 1U _10V_06
1.1VS AO4468
2.5A 5 6 IC H_1.1V PJ 19 IC H_1.1VS
VI N VCN TL
8 VC CA_1.1VS 9 VI N 2.5A *OPEN_3mm
PR 233 7 3 7 4 1 2
1M_04 2.5A 6 2 2.5A PO K VOUT
5 1 Power Plane 3 PC214 D03
VOUT
4 5V PR245 100K_04 8 82P_50V_04 PC215 PC216 PC217
D
EN
Z4309 PR239 PQ73 1 GND VFB 2 PR 246 8.2K_1 %_04 10U_10V_08 10U_10V_ 08 0. 1U _16 V_04
PC 198 PC199 100K_04 SUSB G PC 218
D
PC 194 2N7002W PC2 19 PC220 APE8953

PQ5 5 10U_10V_08 0.1U_16V_X7R_04 PR247
S
SU SB PR229 0_04 G 2N7 002W .1U _10V_X7R _04 0.1U _16V_04 10U_10V_08
*.03 3U _16V_X7R_ 04 19.6K_1%_06
EN_VCCA_ 1. 1VS
S
17 I CH_1. 1VS
24, 30,31,45 VDD 5

16, 21, 24,28, 31, 40,42,45 VDD 3
39,44,45 SYS3V
6,12, 13,15 .. 17,20,24, 26 ,29.. 32,40,41 3V
7. .9,12,13, 15. .30, 32, 39,41 3VS
4, 17,24,30, 31 ,39.. 41,44,45 5V
12, 17, 18,20.. 23,27,29. .31 5VS
24,45 SYS15V
11, 13,15,17, 29,32,41 1. 5VS
4,5,7. .9,40 1. 5V
1 0,11, 13 VC CA_1.1VS
10. .13, 17, 19,41 1. 1VS
B - 44 Power Switch, ICH_1.1VS

Schematic Diagrams
Power VCORE
5V
NCP5392 Intel VRD11.1 POWE R CKT
A
12 V PC1 18 PD 18 VIN
2 .2U_ 16V_06 FM0540 -N *4 .7U_ 25V_X5 R_08 . 1U_ 50V_Y5 V_ 06
1
PR16 8 2 .2_ 06 Z442 9
5V VIN PC 5 PC6 + PC 117
C
CPU _VTT C PU _VTT PC 121
PR17 0 15 U_25 V_ 6X4. 5
5
6
7
8
PR81 2 .2_0 6 0.2 2U_1 6V_06 9
2
1
PD 27 U1 PQ31
1 8K_04 Z4 437 4 8 Z442PR4
5 1 _06 Z4 421 4
B ST
PR76 FM0540 -N VCC DRVH BSC05 9N03 S 0.8V~1.55V/125A
PR83 Z441 5 Z44 16 PR8 1 0k_ 06 PQ 36
1
2
3
OS-CON
C
1K_0 4 PC3 6 PR82 7 Z440 1 BSC0 42N0 3S PL5 0. 82U 13*13 *6 .7
P GND
SWN VC ORE
*680 _04 PC14 8 2
5
6
7
8
9
5
6
7
8
9
2 K_ 04 PR9 2. 2_06
Z444 2 3 IN 5
C
PC39 PC40 4. 7U_1 0V_08 OD DRVL PR 15
. 1U_ 16V_04 NC P5 359D R2G Z44 17 4 4 PD2 4.7 _08 PC1 31 PC13 2 PC20
34
*0.1 U_16 V_ 04 .1 U_16 V_ 04 PC 123 PR2 7 PR28 + + +
35
6
U3 NC P5 392MNR2G PQ3 3 PC 13
1
2
3
1
2
3
1U_1 6V_06 5V
F M5 822
12 VM ON
39 6X 6 QFN 5 60U 56 0U 330 U_2 .5V_D3
V CC
16 VRM_PWRG D VR _RDY
EN 1 29 Z4407 BSC04 2N03 S 47 00P_50 V_ 040 _04 0_ 04
A
EN ABLE DRVON
H_VID0 2 30 Z4406
4 H_VID0 VI D0 G1 CS1N
H_VID1 3 21
A
4 H_VID1 H_VID2 4 VI D1 CS1N 22 Z4405 PC126 CS1
4 H_VID2 VI D2 CS1
H_VID3 5 12 V PD 19 VIN CS1N
4 H_VID3 VI D3
H_VID4 6 PR471 K_ 1%_04 PC27 .47 U_16 V_ 06 2.2 U_16 V_ 06
4 H_VID4 VI D4
H_VID5 7 CS1 FM0540 -N *4 .7U_ 25V_X5 R_08 . 1U_ 50V_Y5 V_ 06
4 H_VID5 VI D5
1
H_VID6 8 PR18 2 .2_ 06 Z443 0
4 H_VID6 H_VID7 9 VI D6 31 Z4409 PC34 PC3 3 + PC14 6
C
4 H_VID7 VI D7 G2
H_ PSI # PR25 0 0_ 04 PSI 37 23 CS2N PC 15
4 H_PSI# PSI CS2N
Z444 5 15 24 Z4408 PR17 1 15 U_25 V_ 6X4 .5
DIFFOUT CS2
5
6
7
8
9
PC26 2 .2_0 6 0.2 2U_1 6V_06
2
1
PR 38 1 0_0 4 Z446
PC116 1 200P_5 0V_04 PR293 .3K_04 VR_CO MP16 PR541 K_ 1%_04 PC29 .47 U_16 V_ 06 U2 PQ43
150 0P_50 V_ 04 COMP CS2 Z4 438 4 8 Z442PR32
6 1 _06 Z4 422 4
B ST
PR30 1K_1 %_ 04 VCC DRVH BSC05 9N03 S 0. 82U 13*13 *6.7
PC25 4 7P_50 V_ 04 PR25 1 0k_ 06 PQ 41
1
2
3
Sheet 44 of 47
32 Z4411 7 Z440 2 BSC0 42N0 3S PL7
P GND
G3 CS3N SWN
5V PR21 *1 00K_04 VR_VFB 17 25 2
C
VFB CS3N IN
5
6
7
8
9
5
6
7
8
9
26 Z4410 PR176 2. 2_06
Z444 1 3 5
PR 33 PR24 6.1 9K_1%_0 4 Z444 718 CS3 OD DRVL PD2 1 PR70
VD RP
PR591 K_ 1%_04 PC31 .47 U_16 V_ 06 PC 14 NC P5 359D R2G Z44 18 4 4 4. 7_0 8 PC1 56 PC15 8 PC17
*10 0K_04 Z445 0 PR 23 6 20_0 4 CS3 PR8 0 PR79
6
Power VCORE
+ + +
F M5 822
PR36 1U_1 6V_06 PQ4 0 PC30
1
2
3
1
2
3
PC23 5V 5 60U 56 0U 330 U_2 .5V_D3
A
RTH 2 1K_0 4 33 Z4413 BSC04 2N03 S 4700 P_ 50V_04 0 _04 0_ 04
G4
10 K_ 06 22 P_ 50V_04 27 CS4N
CS4N
Place close PR 22 6 20_0 4 Z4 451 19 28 Z4412
A
Z44 49 VD FB CS4
to inductor CS2
VC ORE PR34 PR35 620_ 04 20 PR631 K_ 1%_04 PC32 .47 U_16 V_ 06 PC7 PD1 CS2N
CSSU M CS4 12 V VIN
1K_1 %_ 04 2 .2U_ 16V_06 FM0540 -N
PR 31 *4.7 U_25 V_ X5R_ 08 . 1U_ 50V_Y5 V_ 06
1
Z445 3 PC37
C
100 _04 Z4 454 36 PR7 2 .2_ 06 Z443 1
4 .7NF_X7R_5 0V_04 DAC PC3 PC2 + PC11 6
PR40 0_04 Z44 48 13 40 VR_HO T 5V PC 119
4 VC C_SENSE VSP VR_ HOT
R OS C
PR11 15 U_25 V_ 6X4 .5
AGN D
IM ON
5
6
7
8
9
PR85 2 .2_0 6 0.2 2U_1 6V_06
I LIM
2
1
14 38 U 11 PQ28
4 VSS_SENSE VSN NTC 7. 5K_04 Z4 439 4 8 Z442PR16
7 9 1 _06 Z4 423 4
B ST
PR 39 VCC DRVH BSC05 9N03 S
12
11
10
41
Z4 446
100 _04 Z4414 PR6 1 0k_ 06 PQ32
1
2
3
PR84 7 Z440 3 BSC042 N03S PL4 0. 82U 13*13 *6 .7
P GN D
PC38 2 SWN
C
5
6
7
8
9
5
6
7
8
9
PR42 0_ 04 PR10 2. 2_06
Z444 3 3 IN 5
PR 41 3 30_ 04 Z4 452 OD DRVL PD3 PR12
4 I MON
PC2 1 7 .5K_1 %_ 04 PC 10 NC P5 359D R2G Z44 19 4 4 4. 7_0 8 PC1 30 PC12 9 PC18
* 0.1 U_16 V_ 04
PR1 7 PR16 + + +
F M5 822
1U_1 6V_06 PR37 BOTTOM PAD 1U_1 6V_06 PQ35
1
2
3
1
2
3
PR45 RTH 1 5V PC12 5 60U 56 0U 330 U_2 .5V_D3
A
>300us FILTER CONNECT TO 10 0K_06 BSC 042N 03S 0 _04 0_ 04
IMON 12K_04 2 7K_1%_0 4 GND Through 4700 P_ 50V_04
4 VIAs
A
PC2 2 CS3
PD4 CS3N
CPU_ VTT
12 V 2 .2U_ 16V_06 VIN
FM054 0-N
V1. 1 PJ20 OCP ~ 100A
PR 197 PR195 PR19 2 PR1 90 PR 188 PR186 PR18 4 PR18 0 *4 .7U_ 25V_X5R_0 8 .1U_ 50V_Y5 V_ 06
1
*OPEN_4 0mil Work F=210Khz Place PR19 2 .2_ 06 Z443 2
C
D0 3 *680_ 04 68 0_04 68 0_0 4 6 80_ 04 680_ 04 680 _04 *680 _04 *68 0_04 PC9 PC1 22 + PC12 5
H _VID0 close to PC 128
H _VID1 hottest PR44 1 5U_2 5V_6X4 .5
5
6
7
8
9
H _VID2 2 .2_0 6 0.2 2U_1 6V_06
2
MOSFET
1
H _VID3 U 14 PQ34
H _VID4 Z4 440 4 8 Z442PR17
8 3 1 _06 Z4 424 4
B ST
VCC DRVH
H _VID5 BSC05 9N03 S
H _VID6 PR20 1 0k_ 06 PQ39
1
2
3
H _VID7 7 Z440 4 BSC042 N03S PL6 0. 82U 13*13 *6 .7
P GND
PR26 *0 _04 2 SWN
5
6
7
8
9
5
6
7
8
9
PR43 Z444 4
2. 2_06 3 IN 5
C
OD DRVL
PR 73 PR71 PR65 PR6 2 PR 58 PR55 PR53 PR46 PJ21 3 phase PR17 4
option PC 24 NC P5 359D R2G Z44 20 4 4 PD20 4. 7_0 8
2K_04 *2K_04 *2K_0 4 *2 K_ 04 *2 K_ 04 *2K_04 2K_0 4 2 K_ 04 *O PEN_ 40mil PR1 4 PR13 PC1 33 PC13 4 PC19
6
1U_1 6V_06 PQ3 8 + + +
1
2
3
1
2
3
F M 582 2
D 03 PC13 5
A
BSC04 2N03 S 0 _04 0_ 04 5 60U 56 0U 330 U_2 .5V_D3
4700 P_ 50V_04
5V
POC/MSID USE
CS4
CS4N
PR6 9
H_ PROCHOT# 4,15
2K_04
C
VR_HO T B
PR68 1 30_0 4 PQ2
E
2N 3904
SYS3V
PR8 7 PR 86
1 00K_04 100 K_ 04
5V
EN
D
PC41
PR175 Z4 456 PR172 49.9 K_ 1%_04 VR_VFB Z44 58 G PQ 3
2N 700 2W *0. 1u_0 4
S
9. 1K_1%_04
C PC127
Z4 459 B PQ4 2
D
PQ
E37 150 P_ 50V_0 4 2 N700 2W PJ1 0
4 ,5, 15, 18, 39 CPU_VTT
PC 137 2N39 04
2 0,24 ,30 ,39 ..4 2,45 VIN
PR1 78 PR2 02 0_0 4 Z4457 G *OPEN _40mil
4 ,1 2 ,1 5, 16 , 28 PW RGD_ PS 4,1 7,2 4,30 ,31 ,39 ..4 1,43 ,45 5 V
.1U_ 16V_0 4 Z445 5 VR_C OMP
1 K_ 1%_04 PC1 36 33 NF_X7R _50V_0 4 PR2 01 *0 _04 D03 5 VCORE
S
39 VTT_ PW ROK 40 12 V
PR17 7 39 ,45 SYS3V
33K_1%_0 4
Power VCORE B - 45
Schematic Diagrams
Power VDD3, VDD5
VI N
VDD3,VDD5 PC93
PR14 6 1 0_0 4
VIN 1
6-0 6-00 540 -02 1 . 1U _25 V_X7 R_0 6
L DO5 V
A
1
1
PC208 PD1 4 PC9 8 PD 15 PC95 PR154
+ PC 112 PC104 + PC2 06
FM0 540 -N 4. 7U _6. 3V_X5R_ 06 FM054 0- N .1 U_1 0V_X7R_ 04 *1M_04
1 5U_ 25V_ 6X4 .5 . 1U_ 50 V_ Y5V_ 06 .1 U_5 0V_Y 5V_0 6 15 U_2 5V_6 X4. 5
C
2
2
Z4 510 Z451 8
15
21
18
19
PC8 5 PC97
BO OS T 1
B OOS T 2
INT V CC
PC 105 PR1 61 PR16 5 PC1 13
V IN
*1 000 P_ 50 V_X7 R_0 4 *1 0_06 .1 U_1 0V_X7R_ 04 .1 U_1 0V_X7R_ 04 *10_06 *10 00 P_ 50V_ X7R _04
7
6
5
5
6
7
Z4 529 8 8 Z4528
PQ 62 4 Z4 508 22 14 Z450 2 4 PQ6 7

Sheet 45 of 47 AO44 68
TG 1 TG2
AO4 468
3
2
1
1
2
3
VD D5 PJ7 SYS5V PR16 2 PL12 PL13 PR1 66 SYS3V VDD3
*OPEN_ 5mm 8m_2 5 4. 7UH _6. 8*7. 3*3. 5 2.5 UH_ 6. 8*7. 3*3. 5 8 m_ 25 PJ 9
Power VDD3, VDD5 7A 7A Z4 523 Z4 509 23
SW1 SW2
13 Z450 1 7A 7A
C
PQ 63 *OPEN_5mm
7
6
5
5
6
7
Z 45 24
1
PD1 6 8 AO 44 68 8 PD 17
PC10 8 PC107 + PC1 06 + PC11 4 PC115
FM582 2 4 LGATE1 20 17 LGATE2 4 PQ6 8 FM582 2
.1 U_1 0V_X7R_ 04 .1 U_10V_X7R_04 150U_6 .3 V_V BG1 BG2 AO4 468 150 U_6.3 V_ V . 1U_10V_ X7R _04
25m ohm_ NEC 25m ohm _NEC
A
2
3
2
1
1
2
3
2
PR13 9 1 0_0 4 Z4 515 27 8 Z450 3 PR 152 10 _04
SENSE1+ SENSE2+
PC 84 PC96
1 00 0P_50 V_X7R_0 4 10 00P_50V_ X7R _04
PR13 8 1 0_0 4 Z45 16 28 7 Z450 4 PR 151 10 _04
SENSE1- SEN SE2 -
PC8 6 PR14 3 PR 14 1 47K_0 4 PC83 22 0P_50 V_04 PR 157 0 _06
SG ND4 Z4 525 Z45 14 2 11 Z450 5
ITH1 EXTVCC 5V
*22 P_50 V_ 04 11 0K_1%_ 06
PC80 22 0P_5 0V_0 4 PC9 0 22 0P_5 0V_0 4 PR147 47 K_04 PR 145 PC8 8
Z45 13 3 5 Z4 506 Z4517
VFB1 ITH2 63. 4K_1 %_06 *100P_5 0V_0 4
12 PC9 2 1 00P_50V_ 04
PR14 2 PGO OD
SGND 4
L DO5 V PR13 7 0_ 04 Z4 511 24 MO DE/PLL IN
20 K_ 1%_0 6 PR13 5 10K_ 04 4 Z45 07
Z4 512 25 VFB2
L DO5 V FREQ/ PLLFL TR
T K / SS 2
T K /S S 1
RU N1
RUN2
PR14 0 16 PR 144
I LI M
PR136 PG ND
SGND4
*0_04 20K_1 %_04
3 .32K_1%_ 06 PU 4
26
10
LTC3 85 0
6
1
P IN 29 = SGN D4
SGND 4
SGN D4 SGND 4
PC99 1000 P_50 V_X7 R_0 4 EN _3V
PC79 1000 P_50 V_X7 R_0 4 EN _5V
Z4 521 PR153 0_0 4 LDO5 V
PR1 49 *0_0 4 TK/SS2 Z452 2
SY S5V
EN _3V EN_ 5V SGND 4
4 0mi l
PR14 8 PC91 PC8 1 PR156 PC 82 Z45 C
20 A
SYS5V
. 01 U_5 0V_X7R_ 04
*0_04 .0 22U_1 6V_X7R_ 04 .0 1U _50V_ X7 R_04 *1 0K_04 LGATE1 PD 10 FM054 0- N
D
40 mi l
PQ 23 PQ2 1
2 N70 02W 2 N70 02W 8mi l A C SYS10 V
G G
SG ND4 SGND 4 SGND4 PD 11 FM054 0- N PC 87
S
2 20 0P_50 V_X7 R_0 4

PC 89 Z45 C
19 A
SGN D4 SGN D4 . 01 U_5 0V_X7R_ 04
Shu td own_ stb _po wer 31 PD 12 FM054 0- N
A C
SYS15 V
PR15 5 PJ6 PD 13 FM054 0- N PC 94
*10 0K_04 *OPEN_4 0mil 2 20 0P_50 V_X7 R_0 4

D0 3 3 9, 44 SYS3V
2 0,2 4, 30, 39. .4 2,4 4 VIN
1 6, 21, 24, 28,31 ,4 0,4 2,4 3 VDD3
24 ,3 0,3 1,4 3 VDD5
2 4,4 3 SYS15 V
4 ,17,24 ,3 0,3 1, 39. .41 ,43,4 4 5V
PN C1 *NC _04
40 VI N1
SGN D4
B - 46 Power VDD3, VDD5

Schematic Diagrams
Power Delivery Chart
LP2 95 1CDR2 G
V
C
O
R
E
Int el 13 66 CPU TDP: 13 0W
NCP53 9 2M NR2G
VC ORE 14 5 A
C
P
U
_
V
T
T
LTC3 85 0
CPU_VTTD 23 A
ISL6 3 14 CR
VIN
CPU_VTTA 5A
1
.
5
V
=
V
_
D
I
M
M
(
T
o
t
a
l
2
8
A
)
VDD5 VDD3 12 V V_DIMM 1.5V 6A
19 V + /-5 % + /- 5% +/- 5%
+/- 5%
V_1P8 _ PLL 1.8V 2A
D DR3 D IM M s
1
.
5
V
DDR _VTT 0.75 V 1A
SC4 8 6
V_DIMM 1.5V 25 A
1
.
8
V
1
.
8
V
S
=
V
_
1
P
8
_
P
L
L
(
T
o
t
a
l
2
.
2
A
)
M a x I dle P ow er: 15 .1 W
I nte l I OH 3 6S/ 24 S TDP: 30 .5 W
1
.
1
V
S
=
V
C
C
A
_
1
P
1
SC4 1 2A SI48 00 BDY
VC CA_1 P1 1.1V 75 0mA
V
_
1
P
8
_
P
L
L
V_1P8 _ PLL 1.8V 75 0mA
V
_
1
P
8
_
C
L
V_1P8 _ CL 1.8V 50 0mA
Sheet 46 of 47
V
_
0
P
9
_
C
L
*08 0 5 0 Ohm
e mpt y V_0P9 _ CL 0.9V 25 0mA
1
.
5
V
S
=
V
C
C
A
_
1
P
5
/2 , em pt y
VC CA_1 P5 1.5V 75 0mA
Power Delivery
1
.
1
V
S
V_1P1 1.1V 20 A
08 05 0 Ohm
V_1P1 _ QPI 1.1V 3A Chart
V_1P1 _ PE 1.1V 3A
0 80 5 0 O hm
I nt e l IC H10
CPU_VTTD 1 .2V 1.2V 14 mA
1
.
5
V
S
V
C
C
1
_
5
VCC1_5 1.5V 1.5V 0.9 7A
V
_
1
P
5
_
F
I
L
T
E
R
SI4 80 0BDY
V_1P5_ FILTER 1.5 V 1.5V 0.7 4A
13
.V
1S
V
S
V3 V 5 V
_V D V D
1S D S D
P
0
5
_
I
C
H
V_1P05 _ICH 1.0 5V 1.05 V 1.3 1A
3
V
SC412A
VCC3 3.3V 3.3V 0.5 8A
3
SI4800BDY
SI48 00BDY
VCCSUS3_3 3.3V 3.3V 0.7 A
5
V
5
V
S
5VREF 5V 5V 6mA
5
SI4800BDY SI4800 BDY
R
T
C
V
C
C
5V_REF_SUS 5V 5V 10 mA
VCCRTC 3 .3V 3.3V 6uA BAT T ERY
3
V
S
EC I TE85 12
3VS 3.3V
V
D
D
3
KBC_AVDD 3.3V
3
V
S
AZALIA
DVDD 3.3V 0 .3A
5
V
S
AVDD 4.8V 0 .1A
AME8 804AEEY
X 16 P CIE M XM 3 .0
3. 3V S(3 VRU N) 1.0A

5V S(5 VRU N) 2.5A
VIN (PW R _SR C) 10A
Power Delivery Chart B - 47

Schematic Diagrams
Power Sequence Diagram
11 IOH_CLPWROK D900F V0.0 BOOT BLOCK DIAGRAM

13-1
PLLDET_3V(COREPLLPWRDET) 7a MXM_PWR_EN
1 7b M XM3. 0
PWR_SW# Power Bottom 13-3 H_PWRGD_IOH(COREPWRGOOD) NORTH BRIDGE MXM_PRESNT#
VDD3/VDD5
VR
3V 3 Tylersberg
5V 3 16 H_CPURST#
LTC3850
12V 3 17 15
LP2951CDR2G PLTRST_DLY#(CORERST#)
IOH_CSI_RST 14 PLTRST#(VCCPWRGD) Other
P latf orm
EC DD_ON 2
1.5V 3
Sheet 47 of 47 ITE8512E
DRAM VR Devices
0.75VS 6
SC486
Power Sequence 4a
SOUTH BRIDGE
PWR_BTN# MXM_PRESNT# 7b
Diagram
DELAY 4b
RSMRST#
DD_ON
75 ms 13-2 H_PWRGD
Processor
SUSC# 5a
5b
Bloomfield
SUSB#
MXM_PWR_EN 7a
MXM_PRESNT# 7b
11 IOH_CLPWROK
ICH10R 14 PCIRST#
Oth er P CI
Devi ces
(NEW Car d)
VCORE_ON 9 11 VRM_PWRGD
VTT_PWRGD 9 VCORE VR Clock Generator
12-1 CK_PWRGD
NCP5392MNR2G 12 PWROKICH
VCORE 10 CV193
11
VRM_PWRGD->ICH_VRM_PWRGD
PM_PWROK 14 15
6 3VS PLTRST# PLTRST_DLY#(CORERST#)
G690L293T73 Delay 2ms
5b SUSB# 11 13-1
6 ICH_VRM_PWRGD PLLDET_3V(COREPLLPWRDET)
1.1VS 2N3904
6 1.5VS
SC412A
6 Delay H_PWRGD_IOH(COREPWRGOOD)
1.8VS
MOSFET 13-3
6 3.3VS Follow Design Guide
8
CPU_VTT 1.1V EN 6 5VS
ISL6314CR
8
VTT_PWRGD
B - 48 Power Sequence Diagram

D900F Esm

Uploaded by

Copyright:

Available Formats

D900F Esm

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

D900F Esm

Uploaded by

Copyright:

Available Formats

Preface

About this Manual

The following information is included:

Appendix A, Part Lists

IMPORTANT SAFETY INSTRUCTIONS

This Computer’s Optical Device is a Laser Class 1 Product

Instructions for Care and Operation

Use only approved brands of Unplug the power cord before

The computer has specific power requirements:

MXM3.0 PCI-E ............................................................................ B-21

Card Reader Board ....................................................................... B-35

17.1” WUXGA (1920 * 1200) TFT LCD Audio

Memory High Definition Audio Compliant Interface

Video Adapter One ExpressCard/34/54 Slot

Communication Operating System

1 - 4 External Locator - Top View with LCD Panel Open

External Locator - Front & Right side Views Figure 2

External Locator - Front & Right side Views 1 - 5

External Locator - Left Side & Rear View

1 - 6 External Locator - Left Side & Rear View

External Locator - Bottom View

To prevent your com-

External Locator - Bottom View 1 - 7

Figure 7 Mainboard Overview - Top (Key Parts)

1 - 8 Mainboard Overview - Top (Key Parts)

Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Overview - Bottom (Key Parts) 1 - 9

Figure 9 Mainboard Overview - Top (Connectors)

1 - 10 Mainboard Overview - Top (Connectors)

Mainboard Overview - Bottom (Connectors) Figure 10

1. CPU Fan Cable

Mainboard Overview - Bottom (Connectors) 1 - 11

An example of these types of boxes are shown in the sidebar.

To remove the Battery: To remove the Wireless LAN Module:

2. Remove the Keyboard page 2 - 9

Removing the Battery Figure 1

Removing the Battery 2 - 5

Figure 2 Removing the Optical (CD/DVD) Device

2 - 6 Removing the Optical (CD/DVD) Device

Removing the Hard Disk Drive Figure 3

Removing the Hard Disk Drive 2 - 7

Removing the Hard Disk(s) in the Secondary HDD Bay

2 - 8 Removing the Hard Disk Drive

Removing the Keyboard

When re-inserting the

Removing the Keyboard 2 - 9

Figure 6 Removing the System Memory (RAM)

2 - 10 Removing the System Memory (RAM)

g. h. Be careful not to touch

10. Pull the latches to release the second module if necessary.

Removing the System Memory (RAM) 2 - 11

Figure 8 Upgrading a Third System Memory (RAM) Module

RAM Module Speeds

Use either 1066MHz

2 - 12 Removing the System Memory (RAM)

Removing the System Memory (RAM) 2 - 13

Figure 10 Removing the Processor

The heat sink, and CPU

2 - 14 Removing the Processor