CD4000-Series Ratings and Classifications

Absolute Maximum Ratings

-O.5V to +20V -0.5V to VDD +0.5V ±1 OmA -550C to + 1250C -650C to +1500C

Reliability

Information
9jc . . TBDoC/W TBDOC/W

DC Supply Voltage Range, (VDD) (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs DC Input Current, Any One Input. Operating Temperature Range (TA) Package Types 0, F, K, H Storage Temperature Range (TSTG)

Thermal Resistance Ceramic DIP Package Flatpack Package

Maximum Package Power Dissipation (PO) at +125OC For TA = -55°C to +1000C (Package Types 0, F, K) 500W ForTA = +1000C to +1250C (Package Types D, F, K) Derate linearity at 12mW/oC to 200mW Device Dissipation Per Output Transistor . . . . . . . . . . . . . .. 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature +1750C

Lead Temperature (During Soldering) +2650C At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for lOs Maximum

Recommended
For maximum reliability,

Operating
nominal operating

Conditions
conditions should be selected so that operation is always within the folJowing ranges:

Supply Voltage Range ....•................... (For TA = Full Package Temperature Range)

3V Min, 18V Max

Device Classification

for Leakage Current which apply to a specific device type, consult the standard DC electrical characteristics chart.

The table below classifies the levels of device leakage as SSI, MSI-1 and MSI-2. In order to determine the limits
CLASSIFICATION

ACCORDING TO CIRCUIT COMPLEXITY

GATES/ INVERTERS (SSI) CD4000B CD4001B CD4002B CD4007UB CD4011B CD4012B CD4016B' CD4023B CD4025B CD4048B CD4066B* CD4068B CD4069UB CD4071B CD4072B CD4073B CD4075B CD4078B CD4081B CD4082B

BUFFERS/FLIP-FLOPS/ LATCHES/MULTILEVEL GATES (MSI-l) CD4009UB* CD4010B CD4013B CD4019B CD4027B CD4030B CD4041UB* CD4042B CD4043B CD4044B CD4047B CD4049UB* CD4050B CD4070B CD4077B CD4085B CD4086B CD4093B* CD4095B CD4096B CD4098B CD4502B* CD4503B* CD40106B* CD40107B* CD40109B* CD40147B CD401748 CD40175B CD40257B CD4006B CD4008B CD4014B CD4015B CD4017B CD4018B CD4020B CD4021B CD4022B CD4024B CD4026B CD4028B CD4029B CD4031B* CD4033B CD4034B CD4035B CD4040B CD4046B* CD4051 B* CD4052B* CD4053B*

COMPLEX LOGIC (MSI-2) CD4060B CD4063B CD4067B* CD4076B CD4089B CD4094B CD4097B* CD4099B CD4508B CD4510B CD4511 B* CD4512B CD4514B CD4515B CD4516B CD4517B CD4518B CD4520B CD4527B CD4532B CD4536B CD4555B
differ from the standardized data.

CD4556B CD4585B CD4724B CD14538B CD40100B CD40101B CD40102B CD40103B CD40104B CD40105B CD40108B CD40110B* CD40160B CD40161B CD40162B CD40163B CD40181B CD40182B CD40192B CD40193B CD40194B CD40208B

Indicates type for which. because of deSign requirements, one or more static characteristics These differences are defined in separate DC Electrk::a1 Characteristics charts.

12-218

Radiation Hardened High Reliability ICs Radiation Resistant CD4000-Series

Harris radiation hardened C04000-series CMOS integrated circuits tested to withstand total ionizing radiation dosages of 1 x 105 rads (Si) - R-suffix types, and 1 x 106 rads (Si) - H-suffix types. These radiation tolerances are achieved by special process controls imposed during wafer fabrication. Harris radiation hardened types may be screened to Mil-M-38510 Class S and to level/MS. The specified levels of radiation resistance are verified per Table V group E subgroup 2 of Method 5005 and tested according to Method 1019 of Mil-Std-883. Four electrically good packaged samples from each wafer, one from each quadrant, are exposed in a Cobalt 60 source for a time period corresponding to the specified total dose. The samples are then electrically tested within one hour after exposure for threshold voltage, threshold voltage delta, 100 leakage current, and functionality. Propagation delay is also measured for 38510 tested product. Post Radiation Test Criteria TYPE CD4000 CD4001 CD4002 CD4006 CD4007 CD4008 CD4009 CD4010 CD4011 CD4012 CD4013 CD4014 CD4015 CD4016 CD4017 CD4018 CD4019 CD4020 CD4021 CD4022 CD4023 CD4024 CD4025 CD4026 CD4027 CD4028 CD4029 CD4030 CD4031 CD4033 CD4034 CD4035 IDD(MAX) ~A 2.5 2.5 2.5 25 2.5 25 7.5 7.5 2.5 2.5 7.5 25 25 2.5 25 25 7.5 25 25 25 2.5 25 2.5 25 7.5 25 25 7.5 25 25 25 25

>
w

n THRESHOLD I

o >
...J

'" ':J

«
0

" o
i:i
ur

-I

a: ~ -2

...___

~l"0LO

0.5 TOTAL DOSE -

1.0

--,------1.5

2.0

106RAOS I s; I
92CS-31443

TYPICAL THRESHOLD VOLTAGE VARIATIONS OF HARRIS MEGARAD CD4000-SERIES CMOS INTEGRATED CIRCUITS AS A FUNCTION OF TOTAL DOSE GAMMA RADIATION

RADIATION RESISTANT CD4000-SERIES CMOS ICs

Maximum Limits for IDD, (VDD = 18V for B-Series Types or 15V for A-Series Types)
TYPE CD4040 CD4041 CD4042 CD4043 CD4044 CD4046 CD4047 CD4048 CD4049 CD4050 CD4051 CD4052 CD4053 CD4060 CD4063 CD4066 CD4067 CD4068 CD4069 CD4070 CD4071 CD4072 CD4073 CD4075 CD4076 CD4077 IDD(MAX) ~A 25 7.5 7.5 7.5 7.5 25 25 7.5 7.5 7.5 25 25 25 25 25 2.5 25 7.5 2.5 2.5 2.5 2.5 2.5 2.5 25 2.5 TYPE CD4078 CD4081 CD4082 CD4085 CD4086 CD4089 CD4093 CD4094 CD4095 CD4096 CD4097 CD4098 CD4099 CD4502 CD4503 CD4504 CD4508 CD4510 CD4511 CD4512 CD4514 CD4515 CD4516 CD4517 CD4518 CD4520 CD4527 CD4532 CD4536 IDD(MAX) ~A 2.5 2.5 2.5 2.5 2.5 25 7.5 25 7.5 7.5 25 7.5 25 7.5 7.5 7.5 25 25 25 25 25 25 25 25 25 25 25 25 25 TYPE CD4555 CD4556 CD4585 CD4724 CD40100 CD40101 CD40102 CD40103 CD40104 CD40105 CD40106 CD40107 CD40108 CD40109* CD40147 CD40160 CD40161 CD40162 CD40163 CD40174 CD40175 CD40181 CD40182 CD40192 CD40193 CD40194 CD40208 CD40257 IDD(MAX) ~A 25 25 25 25 25 25 25 25 25 25 7.5 7.5 25 7.5 25 25 25 25 25 7.5 7.5 25 25 25 25 25 25 7.5

Post Radiation Threshold Voltage Test Cntena (VOO = 10V; I Constant 1O~) N Threshold 0.2V min 'P Threshold 3.5V max CD401 09 and 40106 P Threshold = 2.8V max

t.P Threshold = 1.0V max t.N Threshold = 1 .OV max

12-219

Radiation Hardened High Reliability ICs Radiation Hardness Assurance Testing

CD4000-Series Total Dose Testing Procedures • Class B Inspection of Wafer ~ L T PD = 20, 11/0 18/1 Lot Sampling • Class S Wafer Sampling ~ Test Four Samples (High-Rei Visual Rejects) ~ One From Each Quadrant ~ Reject If Any One Sample Fails

CD4000-SERIES SYMBOL VTN VTP ~VT ISS CHARACTERISTIC N Threshold Voltage P Threshold Voltage Delta Threshold Voltage Quiescent Current CD4000B-Series TpLH, TpHL * Worst case test condition Propagation Delay

POST RADIATION JANUMIT 0.3VMin 2.8VMax 1.4VMax 100 x Max

TESTS NONJAN LIMIT 0.2VMin 2.8VMax 1.0VMax 100xMax Pre-Rad Value 5V' VOLTAGE 10V 10V 10V 18V

Pre-Rad Value 1.35 x Max Pre-Rad Value

Radiation Resistant
SCREENING

CD4000 Series
RADIATION APPLICATION RESISTANT CD4000-SERIES CMOS ICs

LEVELS FOR HARRIS HIGH RELIABILITY LEVELS

SCREENING

DESCRIPTION

PACKAGED DEVICES (D, F, K OR J SUFFIX) Class S with SEM Inspection and Condition A Precap Visual Inspection + Radiation Hardened to 105 Rads (Si) +Radiation Hardened to 106 Rads (Si) Aerospace and Missiles For devices intended for use where maintenance and replacement are difficult and reliability is imperative

/MSR /MSH

CHIPS (H SUFRX) SEM Inspection and Condition A Visual Inspection + Radiation Hardened to to 105 Rads (Si) + Radiation Hardened to to 106 Rads (Si) Aerospace and Missiles For hybrid applications where maintenance and replacement are extremely difficult and reliability is imperative

ISR ISH

12-220

Radiation Hardened High Reliability ICs CD4000-Series CMOS ICs Transient Radiation Resistance
Samples of CD4000-series devices representing all levels of circuit complexity have been characterized for transient radiation effects. The data indicate the ranges of occurence of upset, latchup and survivability as a function of radiation dose rate.
SURVIVABIUTY Ul..TCH UP UPSET 108

109

RADIATION DOSE RATE - RAD{Si} I SEC EFFECTS OF TRANSIENT RADIATION {106 RADS (Si) ON CD4000-SERIES INTEGRATED CIRCUITS (ALUMINUM GATE CMOS ON BULK SILICON)

1-

1010

1011

1012

1013

Latchup Protection Latchup protection in bulk CMOS devices can be achieved by taking advantage of the effects of neutron irradiation. Neutron irradiation will reduce minority-carrier lifetime, which, in turn attenuates the current gains, or betas, of bipolar transistors. To turn on the SCR structure of CMOS devices, it is necessary for the beta product of its bipolar transistors are majority- carrier devices, normal CMOS performance is generally unaffected by neutron irradiation. Therefore, neutron irradiation is a suitable method for precluding latchup in CMOS devices. In addition, neutron-irradiated CMOS devices are less susceptible to logic upset due to transient radiation. Neutron-Irradiated CMOS Harris offers custom CD4000-series devices which are made from wafers that are exposed to a neutron fluence of approximately 1 x 1014n/cm2. After neutron irradiation, wafers can be assembled and screened to all requirements of the Harris level product. Survivability Survivability level is the maximum transient-radiation level at which damage does not occur. Above this level photocurrents are created to the extent that excessive dissipation is caused, resulting in permanent damage to the device.

Latchup Latchup occurs because of the presence of inherent bipolar SCR structures in bulk CMOS devices. In normal operation, the parasitic bipolar SCR remains inactive. The device is said to be in thelatchup state when the parasitic SCR structures become activated, thereby creating a low impedance path from VDD to VSS. In the "ON" condition, the SCR can conduct heavily at low voltages. Latchup may be induced by the resultant photocurrents of high intensity transient ionizing radiation or by applying excessive voltage. Once turned on, the SCR can be rendered dormant again only by removing the power supply. Burn-out of the device may result if the current is not limited in someway. The region of occurance of the latch condition in CMOS ICs under high intensity transient radiation is quite wide. Only two known device types latch below the 1 x 109 RAD (Si)/s level. A significant number of device types do not latch above dose rates of 1 x 1011 RADs (Si)/s.

,_
en
(..) (..) (..)

5
0:

o _.

c:I

12-221

High Reliability CD4000B-Series Standard DC Electrical Characteristics

Standard "8" Series Devices The following table contains electrical characteristicsfor all CD4000B-series standard output CMOS

CMOS ICs

devices. These parameters are 100% tested except where indicated.

Limits at Indicated Temperatures

Slatlc Electrical Parameters Functional Test. Quiescent device current too SSITypes See Classification Chart MSI-l See Classification Chart MSI-2 See Classification Chart Output low drive current 10l min. Output high drive current IOHmin. Output voltage low-level VOL max. Output voltage high-level VOHmin. Input low voltage VIL max. Buffered (B) Unbuffered (UB) Input high voltage V'Hmin. Buffered (B) Unbuffered (UB) Input current l'N 3-state output leakage current lOUT
• These parameters are controlled Mlease and upon design changes NOTES:

Conditions

-55°C

+250C Mu. Min. Max.

+1250C Min. Max.

Units

Notes

Vo
-

V,N
0,5 0,10 0,15 0,20 0,5 0,10 0,15 0,20 0,5 0,10 0,15 0,20 0,5 0,10 0,15 0,5 0,5 0,10 0,15 0,5 0,10 0,15 0,5 0,10 0,15 -

VDD

Min.

5 10 15 20 5 10 15 20 5 10 15 20 5 10 15 5 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 20

0.25· 0.5. 1· 5 1· 2· 4· 20 5. 10· 20. 100·

0.25· 0.5· 1. 5· 1· 2· 4. 20 5· 10· 20· 100

7.5· 15· 30· 150· 30· IlA

0.4 0.5 1.5 4.6 2.5 9.5 13.5 -

0.51 1.3 3.4 -0.51 -1.6 -1.3 -3.4

60·
120· 600 150· 300· 600. 3000

IlA

1,2

0.36· 0.9· 2.4. -0.36· -1.15· -0.9· -2.4·

IlA

0.64. 1.6. 4.2· -0.64 -2.0 -1.6 -4.2

0.05· 0.05· 0.05

mA

0.05· 0.05· 0.05

mA

4.5 9 13.5 4.5 9 13.5 0.5,4.5 1,9 1.5,13.5 0.5,4.5 1,9 1.5,13.5

4.95· 9.95. 14.95

4.950 9.95· 14.95

0.05· 0.05· 0.05

4.95 9.95 14.95 -

1.5 3· 4 1. 2 2.5

1.5 3 4 1 2 2.5 -

0,20 -

3.5 7 11 4 8 12.5 -

1.5 3 4 1 2 2.5

3.5 7 11 4 8 12.5

3.5 7 11 4· 8 12.5 -

±0.1

±0.1

0,20

±1

IlA

0,20

20

±0.4'

±0.4

±12

IlA

1,3

via design or process parameters and are not directly which would affect these characteristics.

tested. These parameters

are characterized

upon initial design

1. AI-SSOC lest is performed with Vee of laV. 2. C04047B - Maximum DC supply voltage VOO is 13V for radiation hardened version of this type when operating with RC network. devices only. 3. For applicable 4. AI 2SoC VIN

=0

- 20V, Vee

- 20V; l2SoC VIN = 0 - 1av, Vee

= laV; and al -SSoC VIN

=0-

3V, Vee

= 3V.

12-222

High Reliability CD4000B-Series CMOS ICs Non-Standard DC Electrical Characteristics

Non-Standard "B" Series Devices 100% electrical tests that are performed on these specialized devices. These tests take the place of corresponding parameters in the Standard Electrical Characteristics table. For the types listed with RON tests, drive current and output voltage tests should be deleted from the Standard Electrical Characteristics table.
Limits at Indicated Temperatures Static Electrical Parameters CD4009UB, CD4010B Output low drive current IOl min. Output high drive current 10Hmin. CD4016B Control Input voltage low V'l max. Control Input voltage high V'Hmin. On-state resistance RONmax. Rl = 10k returned to Voo-Vss/2 CD4031B Output low drive current IOl min. 0 0.4 0.5 1.5 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0,5 0,10 0,15 0,5 0,10 0,15 0,5 0,5 0,10 0,15 5 10 15 5 10 15 5 5 10 15 2.56' 6.4· 16.a· 0.64· 1.6· 4.2' -0.64. -2.0· -1.6· -4.2· 2.04 5.2 13.6 0.51 1.3 3.4 -0.51 -1.6 -1.3 -3.4 1.44. 3.6· 9.6· 0.36· 0.9· 2.4. -0.36' -1.15. -0.9' -2.4. rnA V,s=Vss,Vos = VDO V's = Voo. vos = Vss II,sl<1OIlA 5 10 15 5 10 15 10 10 15 15 0.9 0.9· 0.9 3.5 7.0· 11.0 600 1870 360 775 0.4 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0,5 0,5 0,10 0,15 0,5 0,5 0,10 0,15 4.5 5 10 15 5 5 10 15 3.2· 3.75· 10.0· 30.0· -0.25· -1.0· -0.55· -1.65· 2.6· 3 8 24 -0.2 -0.8 -0.45 -1.5 Conditions -55°C vo V'N Voo Min.lMax. Min. +2S0C Max. +12SoC Min.lMax. Units

The table below indicates all devices which are considered to be non-standard. Non-standard devices are types such as bilateral switches (CD4066B), multiplexers (CD4051 B), special sink or source currents (CD4049UB, CD4050B), and open drain buffer/drivers (CD40107B) which exhibit non-standard outputs or special parameters. This table shows the

0.7 0.7 0.7 -

1.8· 2.1· 5.6· 16.0· -0.15· -0.58· -0.33· -1.1·

rnA

rnA

3.5 7.0· 11.0

0.4 0.4· 0.4 3.5 7.0' 11.0 960 2600 600 1230

V's = Voo or Vss V's = 4.75 or 5.75 V's = Voo or Vss V's = 7.25 or 7.75

660 2000 400 850

ohms

Q, 0', CLd
Output high drive current tOH min. O,a,O',CLd CD4041UB Output low drive current 10lmin. Output high drive current IOH min.

rnA

rnA

."

!:::
u

::>

a:

u u 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0,5 0,10 0,15 0,5 0,5 0,10 0,15 5 10 15 5 5 10 15 2.1' 6.25· 24· -2.1· -8.4. -6.25-24. 1.6 5 19 -1.6 -6.4 -5.0 -19 1.23.513· -1.2· -4.6· -3.5· -13· rnA

....

rnA

Limits with black dots (e) are tested 100%.

• These parameters are controlled via design or process parameters and are not directly tested. These parameters are characterized release and upon design changes which would affect these characteristics. upon initial design

12-223

High Reliability CD4000B-Series Non-Standard DC Electrical Characteristics

SIalic Electrical Parameters CD4046B Zener diode voltage (Vz) Quiescent leakage phase comparator pin 14 open pin 5 = Voo Quiescent leakage phase comparator pin 14 = Vss or Voo pin 5 = Voo CD4049UB, CD4050B 0.4 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0,5 0,5 0,10 0,15 0,5 D,S 0,10 0,15 4.5 5 10 15 5 5 10 15 3.3 4.0 10 26 -0.81 -2.6 -2.0 -5.2 Iz = 50llA CondItions -55°C Yo Y'N YDD Min.lMax.

CMOS ICs

(Continued)
Llmlls at Indicated +2SoC Min. Max. Temperatures +1250C Mln.lMax. Units

5 10 15 20 5 10 15 20 0.2 1.0 1.5 4.0 20 40 80 160

4.45.

6.5. 0.2 1.0 1.5 4.00 20 40 80 1600

0,5 0,10 0,15 0,20 0,5 0,10 0,15 0,20

rnA

IlA

2.60 3.2. 8.00 240 -0.80 -3.2. -1.80 ~.Oo

1.8 2.4 5.6 18 -0.48 -1.55 -1.18 -3.1

Output low drive current 10Lmin. Output high drive current IOHmin.

rnA

rnA

CD4051B, CD4052B, CD4053B, CD4067B, CD4097B On-state resistance RONmax. Input voltage low V'Lmax. Input voltage high V'Hmin. Off channel leakage current Any channel off max. All channels (common ouVin) off max .
• These parameters are controlled via design or process parameter. and are not directly release and upon design changes which would affect these characteristics.

RL = 10k returned to VOD-Vss/2 V,s = Vss to Voo VEE= Vss RL= lktoVss 11,51<21lA VEE= Vss RL= lktoVss 11,51<21lA Yss-Y 0 Yu:-¥ 0

5 10 15 5 10 15 5 10 15

800
310 200 1.50 3.0 4.00 3.50 7.0 11.00

3.50 7.0 11.00

10500 4000 2400 1.50 3.0 4.00

13000 5000 3200 1.50 3.0 4.00 3.50 7.0 11.00

ohms

Volls

Volls

18

1000

1000

± 10000

nA

tested. Thes.

parameter .. are characterized

upon initial design

12-224

High Reliability CD4000B-Series CMOS ICs Non-Standard DC Electrical Characteristics

Static Electrical Parameters CD4066B On-state resistance RONmax. Control Input Voltage Low RL = 10k re1urned to Voo-Vss/2 V,s = Vss to Voo V's = Vss. Vos = Vee V's = Voo. Vos = Vss II,sl<1OI'A 5 10 15 5 10 15 5 10 15
8000

(Continued)
Limits at Indicated Temperatures

Conditions -ssoc Vo V'N VDD Mln.lMax. Min.

+2SOC Max.

+12SOC MlnJMax.

Units

310. 200. 1.0. 2.0 2.0. 3.5. 7.0 11.00

1050. 400. 240. 1.0. 2.0 2.0.

1300. 550. 3200 1.0. 2.0 2.0. 3.5. 7.0 11.0.

ohms

VILC max. Control Input Voltage High V1HC min. Input output leakage current (switch off) Effective off resistance Vc = Vss CD4093B Positive Trigger Threshold Voltage Vpmin.

3.50 7.0 11.00

Volts

Volts

18

± 100

± 100

± 1000

nA

Vp max.

a a a b b b a a a b b b a a a b b b a a a b b b a a a b b b a a a b b b

5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15

2.2. 4.6 6.8. 2.6. 5.6 6.3 3.6. 7.1 10.80 40 8.2 12.7 0.90 2.5 40 1.4. 3.4 4.8 2.80 5.2 7.4. 3.2. 6.6 9.6 0.30 1.2 1.60 0.30 1.2 1.6 1.6 3.4 50 1.6 3.4 5

2.2. 4.6 6.B. 2.60 5.6 6.3

2.2. 4.6 6.80 2.60 5.6 6.3 3.60 7.1 10.80 40 8.2 12.7 0.90 2.5 40 1.4. 3.4 4.8 2.8. 5.2 7.4. 3.2. 6.6 9.6 0.30 t.2 1.60 0.3. 1.2 1.6 1.60 3.4 50 1.60 3.4 5

Negative Trigger Threshold Voltage VNmin.

3.60 7.1 10.8. 4. 8.2 12.7

0.90 2.5 4. 1.4. 3.4 4.8

2.80 5.2 7.40 3.2. 6.6 9.6

VN max.

0.30 1.2 1.60 0.3. 1.2 1.6

Hysteresis Voltage VHmin.

VH max.

1.60 3.4 50 1.60 3.4 5

"Input on terminals 1, 5, 8,12, or 2,6,9,13; other inputs to Voo. b Input on terminals 1 and 2, 5 and 6,8 and 9, or 12 and 13; other inputs to Voo.
• These parameters are controlled release and upon design changes via design or process parameters and are not directly tested. These parameters are characterized which would affect these characteristiCs. upon initial design

12-225

High Reliability CD4000B-Series CMOS ICs Non-Standard DC Electrical Characteristics

Static Electrical Parameters CD4502B Output low drive current IOlmin. CD4503B Output low drive current IOLmin. Output high drive current IOHmin. CD4504B Input low voltage V1L max. TTL-CMOS TTL-CMOS CMOS-CMOS CMOS-CMOS CMOS-CMOS TTL-CMOS TTL-CMOS CMOS-CMOS CMOS-CMOS CMOS-CMOS 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0 0 0 5 5 10 15 5 10 15 5 5 10 15 2.6 6.5 19.2 -1.2 -5.8 -3.1 -8.2 2.15.5. 16.1-1.02. -4.80 -2.60 -8.80 0.4 0.5 1.5 0,5 0,10 0,15 5 10 15 3.84 9.6 25.2 3.060 7.8. 20.4Conditions

(Continued)
Limits atlndicaled -SSoC +2SoC Min. Max. Temperatures +12SoC Mln./Max. Units

Vo

V,N

Voo

Mln./Max.

2.16 5.4 14.4

rnA

1.3 3.8 11.2 -0.7 -3.0 -1.8 -4.8

rnA

rnA

Vee
5 5 5 5 10

1 1 1 1.5 1.5 9 13.5 9 13.5 13.5

10 15 10 15 15 10 15 10 15 15

0.8 0.80 1.Se 1.5 3. 2 2. 3.5. 3.5 7.

0.8 0.80 1.Se 1.5 3.

0.8 0.80 1.Se 1.5 3. 2 2. 3.5. 3.5 7.

Input high voltage VIHmin.

5 5 5 5 10

0,5 0,10 0,15 -

2 2. 3.5. 3.5 7.

CD4511B Output voltage high-level VOHmin. IOH(mA) 0 5 10 15 20 25 Output drive voltage high level VOHmin. 0 5 10 15 20 25 0 5 10 15 20 25

5 10 15 5 5 5 5 5 5 10 10 10 10 10 10 15 15 15 15 15 15

4 9 144.0 3.80

4.1 9.1 14.1. 4.10

4.2 9.2 14.2. 4.20

3.90 3.50 V

3.55 3.40 9.0 8.BS

3.90 3.400 3.10 9.10

9.20 9.0

9.0

8.70 8.60 14.0

8.600 8.30 14.10 14.0

8.40

14.20

13.90

13.75 13.65

13.700 13.50

14.0 V

13.50

• These parameters are controllQd via design or process parameters and are not directly tested. These parameters are characterized release and upon design changes which would affect these characteristics.

upon initial design

12-226

High Reliability CD4000B-Series CMOS ICs Non-Standard DC Electrical Characteristics

Static Electrical Parameters CD40106B Positive trigger threshold voltage Vp min. Vp max. Negative trigger threshold voltage VNmin. VN max. Hysteresis voltage VHmin. VH max. CD40107B 0.4 1 0.5 1 0.5 0,5 0,5 0,10 0,10 0,15 5 5 10 10 15 21 44 49 89 66 1So 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 2.2. 4.6. 6.8. 3.6. 7.1. 10.8. 0.9. 2.5. 4. 2.8. 5.2. 7.4. 0.3. 1.2. 1.6. 1.6. 3.4. 5. 2.2. 4.6. 6.8. 2.2. 4.6. 6.8. 3.6. 7.1. 10.8. 0.9. 2.5. 4. 2.8. 5.2. 7.4. 0.3. 1.2. 1.So 1.So 3.4. 5. V Conditions -SSoC Vo VIN Vee Mln.lMax. Min.

(Continued)
Limits at tndicated Temperatures +2SoC Max. +12SoC Min.lMax. Units

3.6. 7.1. 10.80 2.8. 5.2. 7.4. -

0.9. 2.5. 4. 0.3. 1.2. 1.So -

1.6. 3.4. 5.

Output low current 10L min. Output high current IOH min. Input low voltage V1l max. * Input high voltage VtHmin. *

34.
37. 68. 500

12 25 28 51 38

mA

NO INTERNAL PULL-UP DEVICE 4.5 9 13.5 0.5,4.5 1,9 1.5,13.5

5 10 15 5 10 15

1.5. 3 4. 3.5. 7 11.

3.5. 7 11.

1.5. 3 4.

1.5. 3 4. 3.5. 7 11.

* Measured with external pull-up resistor, RL = 10kn to VOO

• These parameters are controlled via design or process parameters and are nol directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. t At -55°C test is performed with Vee of l8V

!::: => (.) a: U

(.)

en

t:I

.....

12-227

High Reliability CD4000B-Series CMOS ICs Non-Standard DC Electrical Characteristics

Static Electrical Parameters CD40109B Input low voltage V,L max. Input high voltage V,H max. CD40110B IOH Output Voltage Low-Level VOLmax. High-Level VOH min. VOH V,N 0,5 0,10 0,15 0,5 0,10 0,15 Voo 5 10 15 5 10 15 5 5 5 5 5 5 10 10 10 10 10 10 15 15 15 15 15 15 5 10 15 0.05 0.05 0.05. 0.05 0.05 0.05. 0.05 0.05 0.05. V 1,9 1.5,13.5 1,9 1.5,13.5 5 10 5 10 10 15 10 15 1.5. 33.5. 7. CondHlons -SSoC Vo Vee Voo Min.lMax. Min.

(Continued)
Limits at Indicated Temperatures +2SoC Max. +12SoC Mln./Max. Units

3.5. 7.

1.5. 3. -

1.5. 33.5. 7.

V V

--

-5 -10 -15 -20 -25 7-Segment Outputs Output Drive Voltage, High Voo min. -5 -10 -15 -20 -25

3.9 3.65 3.55 3.5 3.45 3.4 8.75 8.45 8.42 8.4 8.4 8.3 13.8 13.65 13.6 13.6 13.6 13.3 1.28 3.2 8.4

3.9 3.7 3.65 3.6 3.45. 3.4 8.75 8.55 8.5 8.47 8.45. 8.3 13.8 13.75 13.72 13.7 13.65. 13.3 1. 2.60 6.80

4 3.7 3.65 3.5 3.35 3.3 8.85 8.55 8.5 8.47 8.40 8.25 13.9 13.75 13.72 13.7 13.6 13.25 0.72 1.8 4.8

-5 -10 -15 -20 -25 7-Segment Outputs Output Low (Sink) Current IOLmin . -

0.4 0.5 1.5

0,5 0,10 0,15

mA

• These parameters are controlled via design or process parameters and are not directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristiCS.

12-228

High Reliability CD4000B-Series CMOS ICs Switching Characteristics at 250C

The chart below lists all Harris high reliability CD4000Bseries devices and shows which switching parameters are 100% tested at final electrical and Group A. In general, Harris tests propagation delay, transition time, and maximum clock frequency at 5V where applicable.
MAX CLOCK PROP TRANS. INPUT DELAY TIME FREO. (ns) (ns) (MHz) 2SO 2SO 2SO 400 110 800 740 400 200 140' 60 ... 200· 130 ... 250 2SO 300 300' 400 ... 320 320 400 ... 100 70 6SO 600 530 400 5SO 300 360 330 280 ... 200 200 200 200 200 200 -

Harris warrants all other switching parameters shown in the appropriate commercial data sheet. Harris high reliability switching tests are performed on a one-input to one-output basis only.

TYPE CD4000B CD4001B CD4002B CD4006B CD4007UB CD4008B

CONDITIONS· VDD 5V, CL 50pF

TYPE CD4024B

CONDITIONS· VDD 5V, CL = 50pF

MAX CLOCK PROP TRANS. INPUT DELAY TIME FREO. (ns) (ns) (MHz) 360 200 3.5 -

2.5

<pIoOl OnloOn ReselloO +1

330 280 ...

200 200

2.5 -

Sum In to Sum Out Carry In to Sum Out Sum In to Carry Out Carry In to Carry Out

CD4025B CD4026B

Clock to Carry Out Clock to Decode Out Reset to Carry Oul Reset to Decode Oul

2SO 500 700 550' 600 300 300' 400 ... 350 500 560 470 640 340 280 500 SOO' 380 ... 380 200 500 700 550' 600 700 400 500 460 360 330 280 ...

3SO· 70 ... 3SO' 70 ... 200 200 200

CD4009UB

CD4010B

CD4011B CD4012B CD4013B

Clock 10 0 or 0 Set to 0 or Reset to 0 Set to 0 or Reset to 0

3.5

200

3.5 -

CD4027B

Clock to 0 or 0 Setto 0 or Reset to 0 Set to 0 or Reset to 0 -

200 200

CD4028B CD4029B

o Output
Carry Output Preset Enable to 0 Preset Enable to Carry Out Carry Input to Carry Out

200 200

3 3

200 200

CD4030B CD4031B Clock to 0 Clock to 0 Clock to 0 Clock to 0' Clock to CLo CD4033B

CD4014B CD4015B Clock 10 0 Reset 10 0 CD4016B

Sig.lnput toSig. Output Turn On

200

2.5

200

2.5

CD4017B

Clock 10 Out Clock 10 Carry Out ResetloOul

Clock to Carry Out Clock to Decode Out Reset to Carry Out Reset to Decode Out

200

CD4018B

Clock to 0 PreseVReset to 0

200

200 200

CD4019B CD4020B <pIoOl OnloOn+1 ReseltoO CD4021B CD4022B

3.5

CD4034B

Parallel In to Parallel Out AE to "An Out tpLZ, tpZL, tpHZ,tpZH

200

200 200

3 2.5 CD4040B

CD4035B

ClocktoO Reset to 0 <p 01 to OntoOn+l ResetioO

200

3.5

Clock 10 Carry Out Clock 10 Decode Out Reset to Oulput

320 600 6SO 530 2SO

200

CD4023B * trLH or IpLH

... ITHL or IpHL

80

CD4041UB

120

12-229

High Reliability CD4000B-Series Switching Characteristics at 250C

MAX. CLOCK PROP. TRANS. INPUT DELAY TIME FREO. (ns) (ns) (MHz) 220 300 450 500 300 230 180 200 -

CMOS ICs

TYPE CD4042B

CONDITIONS' VDD 5V, CL 50pF

TYPE CD4071B, 72B,73B, 75B CD4076B CD4077B CD4078B CD4081B, 82B CD4085B, 86B

CONDITIONS' VDD = 5V, CL = 50pF -

MAX. CLOCK PROP. TRANS. INPUT DELAY TIME FREO. (ns) (ns) (MHz) 250 200

Data In toO Data In toO ClocktoO ClocktoO

3 -

200 360mVMax

CD4043B, 44B

Set or Reset to 0 Enable to 0 - tPHZ, tpZH Enable to 0 - tpLZ, tpZL

Clock to 0

600

200 200 200 200 200

280 300 250 450. 620' 300. 500'

Data Inhibil

CD4046B

AC Coupled Signal Input Voltage Sensitivity (Peak to Peak) fiN 100kHz Sine Wave

1.2

CD4047B

IRtoO,O Astable to 0, 0 Retrigger 10 0, 0 Astable to Oscillator ResettoO,O

1000 700 600 400 500 600

200 -

200 160' 60. 160' 60.

CD4089B

Clock 10 Out Clear to Out Cascade 10 Out

300 760 180 380 600 460 840 580 280 200 500 300 650 60 500 400 380' 270.

200

200 200 -

CD4093B CD4094B

Clock to Serial Out Os Clock to Serial Out O's Clock to Parallel Out Strobe to Parallel Out Out Enable to Parallel Out, tpHZ,tpZH Out Enable to Parallel Out, tpLZ.tpZL

1.25

CD4048B CD4049UB

Ka toOutpul

120' 65. 140' 110. 720 720 450 740 200 360. 1250 1000 40

CD4050B

CD4051B, 52B,53B Add to Signal Out Inhibil to Signal OulChannel On Inhibit 10 Signal OulChannel Off CD4060B Input PuIse Operation $1 to 04 OntoOn

200 200 200 200' 120.

200

3.5 CD4095B. 96B CD4097B

3.5

Clock to Output SelorReset Address or Inhibit to Sig. Out - Channel On Signalln 10 Out

=1

200

Reset Operation CD4063B Comparator Input to Output Cascade Input to Output CD4066B Signal Input to Signal Output RL 200k, vc VDD. VSS GND, VIS Square Wave"" 5V and Ir, tl 20ns

CD4098B CD4099B CD4502B

Trigger to O. 0 Data 10 Output Data or Inhibit Delay Time

= =

Disable Delay Time - tpHZ Disable Delay Time - tpZH

120 220 250 150' 110. 140 180

tpdc trc' tIc 20ns, RL VIS<5V

= 1k &

70

200 200

CD4503B

Disable Delay Time tpLZ.tpZL

90' 70. -

tpHZ.IPZH tpLZ.tpZL

CD4067B

Add or inhibit to Signal Out Channel On Signal In to Out

650 60 300 280

CD4068B CD4070B
• trLH
0(

tpLH

12-230

High Reliability CD4000B-Series CMOS ICs Switching Characteristics at 250C

MAX. CLOCK PROP. TRANS. INPUT DELAY TIME FREO. (ns) (ns) (MHz) MAX. CLOCK RANS. INPUT TIME FREO. (ns) (MHz) 200 0.5 -

TYPE CD45048

CONDITIONS' VDD = 5V. CL = 50pF SHIFT MODE TIL to CMOS VDD>VCC CMOS to CMOS VDD>VCC CMOStoCMOS VCC>VOD TIL to CMOS VOD>VCC CMOStoCMOS VDD>VCC CMOS to CMOS VCC>VOD All Modes trHL.trLH 10 5 5 10 5 10 5 5 10 5 10 10

TYPE CD45368

CONDITIONS' VDD 5V. CL 50pF

PROP. DELAY (ns) 2000 5000 8000 6000. 440 400 600 400 400 400 350. 450 600 500 720 700 280 600 400 1300750. 440 160 90 370. 320. 280 4000280 200 720 600 200 260

Clock to 01 8 8ypass High Clock to 01 8 8ypass Low Clock to 016 Reset to On

VCC VDD 5 10 280. 240. 550. 280' 240' 400200 100 260 400 420 480 250 640 1040. 1320280 400 360 120 970 500 400 420 480 250 640 400 560 650. 300 760 180 220 440 340

CD45558, 568 CD45858

200 200 200 -

Select to Any Output Enable to Any Output Comparator Inputs to Outputs Cascade Inputs to Outputs

CD47248

Data to Outputs Write Disable to Output Reset to Output Address to Output

200 200

CD45088 CD45108

Strobe In to Data Out Clock to 0 Output Preset or Reset to 0 Clock to Carry Out Carry In to Carry Out Preset or Reset to Carry Out

200

CD14388

Trigger to O. 0 Reset to 0 or 0

200 200

1 -

CD401008 CD401018

310. 80200

CD45118

Data to Output

C045128 Inhibit to Output "An Select to Output Data to Output tPHZ.tpZH CD45148. 158 CD45168 Strobe or Data Inhibit Clock to 0 Output Preset or Reset to 0 Clock to Carry Out Carry In to Carry Out Preset or Reset to Carry Out CD45178 CD45188. 208 CD45278 Clock to 016 Clock to Output Reset to Output Clock to Out Clear to Out Cascade to Out CD45328 EI to EO. EI toGs DntoOm Dn to Gs. El to Om
- tTLH or IpLH • trHL or tpHL

Data In to Output Inhibit In to Output

200

0.7

CD401028, 1038

Clock to Output Carry In/Counter Enable to Output Asynchronous Preset Enable to Output Clear to Output

200

200 -

CD401048

Clock toO tpZH. tpLZ. tpZL tpHZ

1.5

200

200

CD401058

Shift Out or Reset to Data Out Ready Shift In to Data In Ready 3-State Control to Data OuttpZH Ripple Thru Delay Input to OuttpLH

200 200

3 1.5 CD401068 CD401078 CD401088

200 100 200

RL

1.5

= 1200

200

1.2 -

Clock or Write Enable to 0 Read or Write Address to 0 Disable Delay Time tpZH.tpHZ Disable Delay Time tpZL.tpLZ

200 -

12-231

High Reliability CD4000B-Series CMOS ICs Switching Characteristics at 250C

MAX. CLOCK PROP. TRANS. INPUT DELAY TIME FREQ. (ns) (ns) (MHz) MAX. CLOCK PROP. TRANS. INPUT DELAY TIME FREQ. (ns) (ns) (MHz) 800 8 1000 640 +4 400 400 480 Soo 400 320 600 440 460~ 720 600 200 260 300 380 200

TYPE CD401098

CONDITIONS' VDO = 5V, CL = 50pF Data Input to Outpu1 SHIFT MODE L-H L-H H-L H-L VCC

TYPE CD401818

CONDITIONS' VDD = SV, CL = 50pF A or 8 to F (Logic Mode) Aor8toGorP Aor8 to F, Cn +4.orA=

VDD
10V 10V SV 600~ 260' 500~ 460' 100

SV SV
10V 10V

200

SV

CD401928, 1938

CD401828

CntoF CntoCn

200

P,GINtoP, GOUT and Carry Outs Cn to Carry Outs Clock Up or Clock Down toQ,ResetQ PEtoQ Clock Up to Carry, Clock Down to 80rrow Reset or PE to Borrow or Carry

3-5tate Disable Delay RL = 1kO SHIFT MODE tpHZ tpHZ tpu tpLZ tpZH tpZH tpZL tpZL CD401108 CD401478 CD401608, 1618,1628, 1638 L-H H-L L-H H-L L-H H-L L-H H-L VCC 5V 10V VDD 10V SV 10V SV 10V SV 10V SV 120 400 740 Soo

200

SV
10V SV 10V SV 10V

600 200 400 600 900 400 450 250 500~ 300 200~ 400 SOO~

Clock to Carry or Borrow In-Phase Outpu1 ClocktoQ Clock to COUT TEtoCOUT Clear to Q (CD40160B & CD 40161 8 only)

200 200

200

1.0

CD401948

ClocktoQ ResettoQ

200

1.S

CD402088

Clock or Write Enable to Q Read or Write Address to Q 3-Slate Disable DelayTime IpZH,tPHZ tPZL,tPLZ

200

200

CD402S78

Data Inpu1 to Qutpu1 Select to Output Output Disable to Output tpZH,tpHZ

190 190

CD401748

Clock to Output Clear to Outpu1

3.S

200

2.0 -

tPZL,IpU

CD4017S8

Clock to Q Output Clear to Q Ou1put

• trLH or tpLH

~ tTHL or tpHL

12-232

High Reliability CD4000B-Series CMOS ICs Functional Diagrams

VDO

92CS-24757 92CS-24762 92CS- 24758

Dual 3-lnput NOR Gate Plus Inverter CD4000B (FileNo. 985)

Quad 2-lnput NOR Gate CD4001B (File No. 985) (File No. 945)

Dual 4-lnput NOR Gate CD4002B (File No. 985)

18-Slage Sialic ShiH Regls1er CD4006B (FileNo. 1033)

2
"

1~{1{} 1 11 ~
r(j
7

J~~
{1
N

"

<0
S.

~ ~ ~ ~

G·i H·i

G-A

B~ C

HaS

C~

I-e
J·O tc·i L-;:

!{>-! r-c
~ ~ ~
J-D

VSS~7 VOOQ4

'-E
L-F

92CS

2'JO~'j

Vee-'-

"I>"

Vee_' _
V$$_8_ NC-·13
9ZSS-4140R2

V5$_8-

VOO"16

YOO·16

Ne-I'

Dual Complementary Pair Plus Inverter CD4007UB (File No. 977)

4-Bil Full Adder with Parallel carry Out CD4008B (File No. 951)

Hex BuHer/Converter Inverling Type CD4009UB (File No. 940)

VDD

Hex BuHer/Converter Non-Inverting Type CD4010B (File No. 940)

VDD

PAR. IN

CI.I I(.)

s
II:

U
(.)

ClOCK!!

0:>

t.:I

....

9lCS-2"5041

vss

Quad 2-lnput NAND Gale CD4011B (File No. 986)

Dual 4-lnput NAND Gate CD4012B (File No. 986)

Dual "0" FHp-Flop with SellResel capabHl1y CD4013B (File No. 936)

8-Sta1e Synchronous ShiH Register with Parallel or Serlel InpuVSerlei OUlpul CD4014B (File No. 1043)

File No. = commercial data sheet

12-233

High Reliability CD4000B-Series CMOS ICs Functional Diagrams

JAM INPUTS "0"

Voo
"5"

QIA Q2A °3A °4A

OUT/IN

"t" CLOCK "2"

"3"

~
"I" "3"

OUTIIN SIG B IN/OUT

CONT 0

CLOCK
INHIBIT RESET

"4" "5
11

.. ,.
0 ...J 0 0 OJ 0 0 0

IN/OUT SIG 0

~
CLOCK 02

"Sll "7"

,.:
:::>
0 0 OJ

OIB 02B

DATA

OUTIIN SIG C IN/OUT VOD=16

"s" Vss = B

Q3B °4B

RESET

04
OS

'" "OJ

.,
":::>

92C$-21627 9-2CS-.25072R2

92C5-25048

vss Quad Bilateral Switch CD4016B Vee (File No. 953) Decade Counter/Divider with 10 Decoded Decimal Dutputs CD4017B
PAR. IN-

Dual 4-Stage Slatlc Shill Register with SeriallnpullParallei Dutput CD4015B (File No. 1024)

vss PreseHable Divide-by-"N" Counter Fixed or Programmable CD4018B (File No. 1034)
"0" "I"

(File No. 1113)

,.:

"2" "4"

i5

"3" ~

"5" ~ "6" "7"

92C5-25036
92CS-25073R2

GNo
92CS-25053R3

92C5-25-047

vss

Quad AND/OR Select Gate CD4019B (File No. 1045)

14-Slage Binary Ripple Counter CD4020B (File No. 1063) Voo

a-Stage Sialic Shill Register Asynchronous Parallel or Synchronous Serial Inpull Serial Dutput CD4021B (File No. 1043)

Divide-by-a Counter/Divider with a Decoded Decimal Outputs CD4022B (File No. 1113)

A-'t----,
B--''t-----, o r
7-STAGE G

14 12

B QI 02 03

'"
0

~
!; ":;]
OJ

RIPPLE
COUNTER

Q4

a:
"u, :::>

cs

sn

06 ...
Q7

Vss
92C524761 NC=8,IO,13

vss
92.CS-2505IR4

92:C$- 24760

92CS-2!5078R2

Triple 3-lnput NAND Gate CD4023B (File No. 986)

7-Stage Ripple-Carry Binary Counter/Divider CD4024B (File No. 1063)

Triple 3-lnput NOR Gate CD4025B (File No. 985)

Decade Counter/Divider with 7Segment Display Output and Display Enable CD4026B (File No. 1118)

File No. = commercial data sheet

12-234

High Reliability CD4000B-Series CMOS ICs Functional Diagrams

VOO 8UFFEREO OCTAL DECODED OUTPUTS II OF 81 PRESET ENABLE BUFFERED OUTPUTS

3 14 2 15
I

6 7 4 9~ 5

BuFFERED

DECIMAL

BINARY; DECADE

DECOO£D OUTPUTS (I OF 101

UP/DOWN· 10 CLOCK 15

V55
92CS-17190R3

92CS-I1!S7RI

Dual J-K Masler-Slave Flip-Flop wllh Set-Resel Capability CD4027B (File No. 942)

BCD-to-Decimal Decoder CD4026B (File No. 1016)

PreseHable Up/Down Counter, Binary or BCD-Decade CD4029B (File No. 1028)

14 Voo 13 H

K--'t-----, C-t.......-...

L- __

+:

12 G !-1 M O

VSS

J •• ®e K-CGlO

L- E®F
M-GGlH

DELAYED

voo
Vss:
92CS·11410RI

16 8

CLOCK OUT

Ne: '3,4,11,12,13,14

9ZCS-29039RI

92CS-25076R'1

Quad Exclusive-OR Gate CD4030B

SI--AE

64-Stage Static Shift Register CD4031B (File No. 1073)

Decade Counter/Divider with 7-Segmenl Display Outpuls and Ripple Blanking CD4033B (File No. 1118)

(File No. 1055)

-,

AlB AIS
PIS CL....,__~~~~__.

'~8

K K·C 9 L

L:C Q,/0
1

QIQ2 TIC

Q3/03
OUT

Q4/04

92CS-19966RI

Gnd

B-Stage Static Bidirectional Parallel/Serial Input/Output Bus Register CD4034B File No.
0

4-Stage Parallel In/Parallel Out Shift Register with J-K Serial Inputs and True/ Complement Outputs CD4035B (File No. 1101)

92-GS-29066R2

12-Stage Ripple-Carry Binary Counter/Divider CD4040B (File No. 1063)

Quad True/Complement Buller CD4041UB (File No. 934)

(File No. 1062)

commercial data sheet

12-235

High Reliability CD4000B-Series Functional Diagrams

CD4043A TERMINAL DIAGRAM

CMOS ICs

CD4044A

TERMINAL

DIAGRAM

'0

5,

R,
52 R2 53

"
'2

'5

R3

54 RO

92CS·20191 V55 92eS-2022'RI 92CS-20222

Quad Clocked "0" Latch CD4042B (File No. 954)

Quad 3-State NOR R/S Latch CD4043B (File No. 956)

Quad 3-State NAND R/S Latch CD4044B (File No. 956)

c,

Micropower Phase-Locked Loop CD4046B

BINARY CONTROL INPUTS A

Low-Power Monostabie/ Astable Mullivibrator CD4047B G·i (File No. 1123)

(File No. 1099)

FUNCTION

CONTROL

~ ~ ~

~ ~ ~
D

G=A

H=B

HoB

I·e
J .. i5

I=C
J=D

'NM5{~
EXPAND

~ ~ ~

~ ~ ~

K=E
L=F

"E
L:F 92CS -26372

'NPUT5{~
vss ..a
YOO.&16 92(5-22249

Vee _,_
vss -"Ne =13 Ne =16

Vee_' V55-"Ne =13 Ne =16

92CS-27!507"

Multi-Function Expandable a-Input Gate CD4048B (File No. 1124)

Hex Buller/Converter Inverting Type CD4049UB (File No. 926)

Hex Buller/Converter Non-Inverting Type CD4050B (File No. 926)

Single 8-Channel Analog Multiplexer/Demultiplexer CD4051B (File No. 902)

File No. = commercial data sheet

12-236

High Reliability CD4000B-Series Functional Diagrams

CMOS ICs

"x"
COMMON OUTIIN ax OR ay OUT/IN bx OR b¥ OUT/IN ell OR cy OUTIIN

CONTROL {;,:~---' INH 92CS - 26;573

92CS-2270BRI

DillerenUal 4-Channel Analog Multiplexer/Demultiplexer CD4052B (File No. 902)

Triple 2-Channel Muniplexer/Demultiplexer CD4053B (File No. 902)

VOO·16

VSS"B 92CS-24516RI

92CS-29073RI

14-5tage Ripple-Carry Binary Counter/Divider and Oscillator CD4060B (File No. 1120)

4-Bit Magnitude Comparator CD4063B (File No. 805)

!:: ::::» u a:: U

c.:J

(I)

...
o

12-237

High Reliability CD4000B-Series

CMOS ICs

SIG A OUT/IN

OUT lIN SIG B IN/OUT

CONT

o
I~

~>--i-:

B C

A~G=A

B..L..f>--!- H B
=

--+--,
__

C~I=C
D~J=D E~K=E Voo'" 14

IN/OUT SIG 0

IN/OUT

15

0--'----0'
92CS-24924RI

'Iss::; 7
6.8-sNO CONNECTION

F~l=F
VOO=14 VSS:7 92:CS-23137R2

OUTIIN SIG C

VoO=24 \Iss::; 12

92:e5-

23874R3

IN/our

Quad Bilateral Swilch CD4066B (File No. 1114)

16-Channel MultiplexerlDemultiplexer CD4067B (File No. 909)

VDO

a-Input NANDIAND Gate CD4068B (File No. 809)

Hex Inverler CD4069UB (File No. 804)

J=A(!)B

M:G(!)H

K=C(±)D

L =E@F -7
92CS-24!i66R2

vss

H-"'cI-....-'

VDO:14

G-,--.._/

VS5

VSS

sacs-

27685

92C5-27571

Quad Exclusive-OR Gale CD4070B (File No. 910)

Quad 2-lnput OR Gate CD4071B (File No. 807)

DATA INPUT DISABLE GI G2 9 10

Dual 4-lnput OR Gate CD4072B

OUTPUT DISABLE I

Triple 3-lnput AND Gate CD4073B (File No. 806)

(File No. 807)

RESET
92CS-24885RI 9lCS-244'97R3

92C5-27687

Triple 3-lnput OR Gate CD4075B (File No. 807)

4-BII D-Type Register CD4076B (File No. 903)

Quad Exclusive-NOR Gate CD4077B (File No. 910)

File No. ; commercial data sheel

12-238

High Reliability CD4000B-Series Functional Diagrams

CMOS ICs

INHI8LTI~'O AI D I 3 EI 61 2 CI 12 01 1"3

C
B A

INHIB':~~~ VOO=14 82 6 C2 8 D2 9 V55

92C5 - 23877R4 92CS-27583 92CS-27570

£2

Vss = 7

Voo = 14

Vss = 7

E = INHIBIT+AB+CD LOGIC I:: HIGH LOGIC Q:LOW 92'CS- 23890R2

8-lnput NOR/OR Gate CD4078B (File No. 810)

Quad 2-lnput AND Gate CD4081 B (File No. 806)

Dual 4-lnput AND Gate CD4082B (File No. 806)

Dual 2-Wide, 2-lnput AND-OR-INVERT (AOt) Gate CD4085B (File No. 811)

BINARY RATE

LOGIC I:!! HIGH lOGIC Q;;iLOW VOD = 14 Voo= t6 VSS=B

92CS-25004RI

Vss = 7
NC=4

J'" INH

+ ENABLE + AB+CD+EF+GH
92C5-23870RI

Expandable 4-Wide, 2-lnput AND-OR-INVERT (AOI) Gate CD4086B (File No. 812)

Binary Rate Mulliplier CD4089B (File No. 1003)

."

!:: =>
II:

u
92C5 - 244211<1
92CS24430RI

U
<.:J

-'

PARALLEL (TERMINALS

OUTPUTS QI-OS 12, II,

4,:5,6,7,14,13, RESPECTIVELY)
92C5 24564RI

92C5-23880

Quad 2-lnput NAND Schmitt Trigger CD4093B (File No. 836)

8-Stage ShiH-and-Store Bus Register CD4094B (File No. 869)

Gated J-K Master-Slave Aip-FIop, Non-Inverting Inputs CD4095B (File No. 879)

Gated J-K Master-Slave Flip-Flop, Inverting and Non-Inverting Inputs CD4096B (File No. 879)

File No.. = commercial data sheet

12-239

High Reliability CD4000B-Series CMOS ICs Functional Diagrams

r::
I
I I
7

of ""
...........
<,

IN/OUT{~~:t Y INIOUT

t
<, ............

I~
tOUTllN
I
Y

+TR -TR RESET

+TR -TR RESET

voo

~ =-24
92CS-24980RZ

Vss""12

92CS-2:4253RI

Differential

8-Channel

Dual Monostable Multivibrator

Multiplexer/Demultiplexer

CD4097B

(File No. 909)

THREE-STATE OUTPUT DISABLE 12 INHIBIT 3 DI

CD4098B

(File No. 979)

OATA

DISABLE A 01 02 03 0" D. 05 II Q5 01 '01

D2 RESET
92CS-0!4425RI

02

502
7", 904

D3 04 10 05 13 D6 15

03

"06 vss
VDD~ 16 =8
92CS-22921RI

Hex Buller Non-Inverting 8-BIt Addressable Latch Strobed Hex Inverter/Buller

Type CD4503B (File No. 1224)

CD4099B

(File No. 948)

CD4502B

(File No. 1002)

OUTPUT DISABLE DOA

QOA QIA Q2A Q3A

Vee

VDD

DIA D2A D3A RESET OUTPUT DOB DIB

OISABL

QOB QIB Q2B Q3B

Vee·PIN' VOD '" PIN 16 SELECT Vss .,PINS

D2B D3B STROBE RESET

92CS-39309

Hex VoIIage-LeveI ShIfter for TTL-to-CMOS or CMOS-Io-CMOS Operalion CD4504B File No. ; commercial data sheet (File No. 1846)

Dual 4-Blt Latch

CD4508B

(File No. 1009)

12-240

High Reliability CD4000B-Series Functional Diagrams

PRESET ENABLE PI 01 02 Q3 04 VDO" CLOCK I.F/DOWN CARRY IN
II:

CMOS ICs

8CD INPUTS

P2
P3

P4

t6

Vss 8
CARRY OUT

RESET 92CS-24824

lEJ:Siii6iiE 5

r
I
8 I C

e•

92CS- 2e083R2 VOD·16

BCD-t~7-Segrnent Latch Decoder Driver CD4510B (File No. 899) CD4511B (File No. 901)

CHANNEL INPUTS

A-II SELECT 1-12 CONTROL { C-13

00-1 01-2 02-3 03-4 04-5 05-8 08-7 07-'

14

SELECT
OUTPUT

!t2CS-28929

92CS-

24597

8-Channel Data Selector CD4512B

PRESET ENABLE PI p2 P3 P4 01 02 Q3 04 Yoo '" 16

4-Blt LatChl4-to-16 UneDecoder CD4514B (File No. B14) Output "High" on Select CD4515B (File No. 814) Output "Low" on Select

(File No. 1032)

WE' WE-

0--

OI6---Q~-~48---Q64 1----DI1---[)33---D49--HiZ

en

CLOCIK
UP/DOWN

VSS'-8

IOF 2 SHIFT REGISTERS. TERM._ IN AO.RENTHESES ARE FOR 2 NOHALF.

YOO·16

Vss·e
92CS-5)371

CiiiiiYiN
RESET

~
92CS-2482:4

048 VOO·16

Vss'S
92CS-24!i06RI

=> .... a: U .... c:;

!:::

...
C)

Dual Up Counter Binary Preeeltable Up/Down Counter CD4516B File No. = commercial data sheet (File No. 899) CD451BB Dual 64-BII ShiH Register CD4517B (File No. 1148) BCD CD4520B Binary (File No. BOB) (File No. BOB)

12-241

High Reliability CD4000B-Series CMOS ICs Functional Diagrams

D7

06
05 04 RATE
OUTPUTS

03 02 DI 00

6 OUTLJ SOUTJ

Voo= [6
VSS=8

92CS

·24913Rl 92CS-26360AI

BCD Rate Multiplier C045278 (File No. 10(6)

a-Bit Priority

Encoder

C04532B

(File No. 876)

QO

A II

QO

QI Q2 Q3

iii

E
A II

1" . 'Iss
92CS-2~

92CS-22919fl~

92CS-30313

Duel -'_1-01-4

DIal Binary-to-1-o1-4

~xer Programmable Timer C04536B (File No. 1186)

Output

''High'' on Select (File No. 858)

o.c"r/OelnUllipleller Output "1..ow" on Select C04556B (File No. 858)

C04555B

File No. = commercial data sheet

12-242

High Reliability

CD4000B-Series

CMOS ICs

WOOO"A"

fO

C ~

NG

WORo.Ff

AI A2 A3

10 7 I~

vee
QI Q2 Q3 Q4 Q5 Q6

A-a A·a

+T" -T"
RESET

QI

81
:~

II

Q7 92CS-3Q372

14

VOD·16

vss·a
92CS-3037!S

+T"
-TR RESET

92CS-24253fU

4-Bit Magnitude Comparator CD4585B (File No. 1146)

8-Bit Addressable Latch CD4724B (File No. 1111)

Dual Precision Monostable MulUvibrator CD14538 (File No. 2098)

LEFT/RIGHT

CONTROL.

IN

OUT

01 I 02 2 03 3

OUT

044

0510
06 II

RECIRCULATE
CONTROL 92CS-2:7567

0712

0813 095

92CS-28811Rr

vss·a
8-Stage Presettable Synchronous Down Counter

Voc -16

92CS- 24816R2

32-Stage Side LeftlRight Shill Register CD40100B (File No. 980)

CD40102B (File No. 964) 2-Decade BCD 9-BIt Parity Generator/Checker CD40101B (File No. 1000) C04e103B (File No. 964) 8-Bit Binary

4-BIt BldlrecHanai Universal Shill Register CD40104B, CD40194B (File No. 1220)

Rle No. = commercial data sheet

:5 ... ... a
I-

.,.
a: U

co

...

12-243

High Reliability CD4000B-Series CMOS ICs Functional Diagrams

3-STATE CONTROL 00 01

A~G.i

02 03
SHIFT IN 14 DATA-QUT READY 2. DATA-IN READY MASTER RESET
92CS~27282R2

:+:::
D~J'ii E~K'E F~L'F VOo·14 VSS.7
92CS28682

FIFO Register 4-Blts Wide by 16-Bits Long CD40105B (File No. 1044)
3151 1131~ 2141~

Hex Schmitt Trigger CD40106B (File No. 1017)

r-,

191----=
vss

C"A·e

WRITE ENABLE

3-STATE

DO DATA INPUTS { 01 ~2

71111~ 61101~

r-;

19f--'-

51S1 F·O·E

Vss
92CS-29434R2

QO}
01 02 Q3 CLOCK 3-STATE B

WORD B OUTPUT

Vss :4(7) NOTE: NUMBERS IN PARENTHESES OTHERS FOR C040107BF, FOR C040107BE.

92CS-24819R2

Dual 2-lnput NAND BufferlDriver CD40107B (File No. 1015)

4-by-4 Muiliporf Register CD40106B (File No. 1011)

eLK UP elK

ON 7 5

RES.ET ~4 LATCH ENABLE

VOO"IS

vss·e
92CS-313075

NC"'IZ 1/00=16 1/5S"'8 Vee: I

9ZC-S26669RI

Quad Low-to-High Voltage Level Shiller CD40109B File No. = commercial data sheet (File No. 1016)

Decade Up-Down Counter/ Decoder/Latch/Driver CD40110B (File No. 1125)

12-244

High Reliability CD4000B-Series Functional Diagrams

CMOS ICs

PE '----""_023
L- __

01 02 03 04
CARRY

C 22 8 2' J--..20
92CS-30552

TE CLEAR LOAD
CLOCK PI

P2 P3 P4
Voo-16

OUT

Vss ,,8

n.c;s - 286Z8RI

Synchronous 4-Bit Counter CD40160B (File No. 1047) Decade with Asynchronous Clear CD40161B (File No. 1047) Binary with Asynchronous Clear CD40162B (File No. 1047) Decade with Synchronous Clear CD40163B (File No. 1047) Binary with Synchronous Clear
01 4 02 5 02
4

10-Line-to-4-Line BCD PrIority Encoder CD40147B

01 3

(File No. 1117)

~ 02 ~
03

01

D3 03
6

03
Q4

04

~
9

04

11

CLOCK

CLEAR I 05 13

06 14

CLOCK--,,9'--t_+--L_:_:_:_~
~~I _ _' ~

'Iss = 8 voo = 16
Hex "0" Type Flip-Flop CD40174B (File No. 1(l31)
FUNCTION SELECT INPUTS

Quad '0'- Type Flip-Flop CD40175B (File No. 1326)

FUNCTION SELECT INPUTS

CARRY MODE CONTROL

IN

CARRY IN MODE CONTROL VOO=24 92CS-24825Ri '100"24 Vss =12 92CS-Z83I7R2

"Iss

"12

Active-Low Data CD40181B File No. = commercial data sheet

4-BHArithmetic Logic Unit Active-High Data (File No. 989)

12-245

High Reliability CD4000B-Series Functional Diagrams

CMOS ICs

6_ G'

_
P

r
P'

r
a

iiRESET

Gi

ENABLE

Cn+X
4 Cn+Y Cn+Z CLOCK CLOCK UP 4

Pi

DOWN RESET

P3

P
if
92CS-24826RI

1100-16

vSS·e
92CS- Z7561RI

VDO= 16 VSS ..

Presettable Up/Down Counter (Dual Clock with Reset) CD40192B Look-Ahead Carry Generator CD40182B (File No. 1008)
WRITE ENABLE ENABLE A

(File No. 993) BCD (File No. 993) Binary

CD40193B

4-Bn Universal Bidirectional Shift Register with Asynchronous Master Reset CD40194B
OUTPUT DISABLE

(File No. 1220)

4 QO}
QI 02 Q3 WORD A OUTPUT

AI 81 A2 82 A3 02 01

83
WRITE I A4 84 WORD B OUTPUT

03

QO}
01 02 Q3

04

INPUT SELECT 92C5-27320

VDO" 24 Vss =12

CLOCK

ENABLE

92.CS-2.8~9RI

4-by-4 MulUpor! Register CD40208B File No. = commercial data sheet (File No. 1007)

Quad 2cLIne-to-1-Line Data Selector/Multiplexer CD40257B (File No. 982)

12-246

High Reliability CD4000B-Series Static Burn-In Test Circuit Connections

CMOS ICs

For Type A devices, use Vee = 12.5V. For Type S and US devices, use Vee = 18V. NOTE: Each pin except Vee and Vss must have resistors of 2-47 kilohms. In most cases, Vss is at pin 7 (of 14-pin Ie), pin 8 (of 16-pin) 0( pin 12 (of 24-pin), while Vee is at the highest-numbered pin; exceptions are noted by an asterisk (*).
STATIC BURN-IN I TYPE CD4000 CD4001 CD4002 CD4006 CD4007 CD400B CD4009' CD4010' CD4011 CD4012 C04013 CD4014 C04015 CD4016 CD4017 CD401B CD4019 CD4020 CD4021 C04022 CD4023 CD4024 CD4025 CD4026 CD4027 CD4028 CD4029 C04030 C04031 CD4003 CD4034 CD4035 CD4040 CD4041 CD4042 CD4043 CD4044 CD4046 CD4047
"Non-standard

STATIC BURN-IN II
Yeo

OPEN 1,2,6,9,10 3,4,10,11 1,6,B,13 2,B-13 1,5,B,12,13 10-14 2,4,6,10,12, 13,15 2,4,6,10,12, 13,15 3,4,10,11 1,6,8,13 1,2,12,13 2,3,12 2-5,10-13 2,3,9,10 1-7,9-12 4-6,11,13 10-13 1-7,9,12-15 2.3,12 1-7;9-12 6,9,10 :Hl,B-13 6,9,10 4-7,9-14 1,2,14,15 1-7,9,14,15 2,6,7,11,14 3,4,10,11 3-7,9,11-14 4-7,9-13 1-8 1,13-15 1-7,9,12-15 1,2,4,5,8,9,11,12 1-3,9-12,15 1,2,9,10,13 1,2,9,10,13 1,2,4,6,7,10,11, 13,15 1,2,10,11,13

GROUND 3-5,7,B,II-13 1,2,5-9,12,13 2-5,7,9-12 1,3-7 3,4,6,7,9,10 1-9,15 3,5,7-9,11,14 3,5,7-9,11,14 1,2,5-9,12,13 2-5,7,9-12 3-11 1,4-11,13-15 1,6-9,14,15 1,4-8,11-13 8,13,15 1-3,7-9,1'!!,12, 14,15 1-9,14,15 B,10,11 1,4-11,13-15 '8,13.15 1-6,7,8,11-13 1,2,7 1-5,7,8,11-13 1-3,11,15 3-13 B,10-13 1,3-5,8-10,12, 13,15 1,2,5-9,12,13 1,2,8,10,15 1-3,8,14,15 12,15-23 2-12 8,10,11 3,6,7,10,13 4-8,13,14 3-B,11,12,14,15 3-8,11,12,14,15 3,5,8,9,14 3-9,12 14 14 14 14

OPEN 1,2,6,9,10 3.4,10,11 1,6,B,13 2,B-13 1,5,B,12,13 10-14 2,4,6,10,12,13,15 2,4,6,10,12,13,15 3,4,10,11 1,6,8,13 1,2,12,13 2,3,12 2-5,10-13 2,3,9,10 1-7,9-12 4-6,11,13 10-13 1-7,9,12:15 2,3,12 - 1-7,9-12 6,9,10 3-6,8-13 6,9,10 4-7,9-14 1,2,14,15 1-7,9,14,15 2,6,7,11,14 3,4,10,11 3-7,9,11-14 4-7,9-13 1-8 1,13-15 1-7,9,12-15 1,2,4,5,8,9,11,12 1-3,9-12,15 1,2,9,10,13 1,2,9,10,13 1,2,4,6,7,10,11, 13,15 1,2,10,11,13 7 7 7 7

GROUND

Yoo
3-5,B,II-14 1,2,5,6,B,9, 12-14 2-5,9-12,14 1,3-6,14 2,3,6,10,11,14 1-7,9,15,16 1.,3,5,7,9,11, 14,160 1.,3,5,7,9,11, 14,160 1,2,5,6,B,9,12-14 2-5,9-12,14 :Hl,B-l1 ,14 1,4-7,9-11,13-16 1,6,7,9,14-16 1,4-6,8,11-14 13,15,16 1-3,7,9,10,12 14-16 1-7,9,14-16 10,11,16 1,4-7,9-11,13-16 13,15,16 1-5,8,11-14 1,2,14 1-5,B,11-14 1-3,15,16 3-7,9-13,16 10-13,16 1,3-5,9,10,12,13 15,16 1,2,5,6,8,9,12-14 1,2,10,15,16 1-3,14-16 9-11,13-24 2-7,9-12,16 10,11,16 3,6,10,13,14 4-7,13,14,16 3-7,11,12,14-16 3-7,11,12,14-16 3,5,9,12,14,16 3-6,B,9,12,14

2,11,14 16 1.,16. 1.,160 14 14

14

4,7,9 8 B B 7 7 7 8 B 7 B,14 8 8 B 8 8,~ 7 7 7 B 8 8 8 7 8 8 12 8 8 7 8 8 8 8 7

16 16 14 14,16 16 16 16 16 14,l6 14 14 14 16 16 16 16 14 16 16 9-11,13,14,24 16 16 14 16 16 16 12,16 14

I-

...
a:

:;

c:;
u

a o

....

pin arrangement, or multiple supply pins; connect pins marked (.) without using resistor.

12-247

High Reliability CD4000B-Series Static Burn-In Test Circuit Connections

STATIC BURN-IN I TYPE CD4048 CD4049· CD4050· CD4051· CD4052· CD4053· CD4060 CD4063 CD4066 CD4067 CD4066 CD4069 CD4070 CD4071 CD4072 CD4073 CD4075 CD4076 CD4077 CD4076 CD4081 CD4062 CD4065 CD4086 CD4069 CD4093 CD4094 CD4095 CD4096 CD4097 CD4098 CD4099 CD4502 CD4503 CD4504 CD4506 CD4510 CD4511 CD4512 1 2,4,6,10,12, 13,15 2,4,6,10,12, 13,15 3 3,13 4,14,15 OPEN GROUND 2-15 3,5,7-9,11,14 3,5,7-9,11,14 1,2,4-6,7.,8., 9-15 1,2,4-6,7.,80, 9-12,14,15 16 1.,16. 1.,16. 16 16 16 16 3,16 14 24 14 14 14 14 14 14 14 16 14 14 14 14 14 14 16 14 16 14 14 24 16 16 16 16 16 (1.,13)' 24 16 16 16
VDD

CMOS ICs

STATIC BURN-IN II OPEN 1 2,4,6,10,12, 13,15 2,4,6,10,12, 13,15 3 3,13 4,14,15 1-7,9,10,13-15 5-7 2,3,9,10 1 1,6,6,13 2,4,6,8,10,12 3,4,10,11 3,4,10,11 1,6,6,13 6,9,10 6,9,10 3-6 3,4,10,11 1,6,8,13 3,4,10,11 1,6,6,13 3,4 3,4 1,5-7 3,4,10,11 4-7,9-14 1,6,6 1,6,6 1,17 2,6,7,9,10,14 1,9-15 2,5,7,9,11,14 3,5,7,9,11,13 2,4,6,10,12,15 5,7,9,11,17,19, 21,23 2,6,7,11,14 9-15 14 8 8 8 7.,80 7.,8. 7.,80 8 3,8 7 12 7 7 7 7 7 7 7 6 7 7 7 7 7 7 8 7 8 7 7 12 1,8,15 6 6 6 6 12 6 6 6 GROUND
VDD

2-7,9-16 10,3,5,7,9,11, 14,160 1.,3,5,7,9,11, 14,160 1,2,4-6,9-16 1,2,4-6,9-12, 14-16 1-3,5,6,9-13,16 11,12,16 1,2,4,9-16 1,4-6,6,11-14 2-11,13-23 2-5,9-12,14 1,3,5,9,11,13,14 1,2,5,6,6,9,12-14 1,2,5,6,6,9,12-14 2-5,9-12,14 1-5,6,11-14 1-5,6,11-14 1,2,7,9-16 1,2,5,6,6,9,12-14 2-5,9-12,14 1,2,5,6,6,9,12-14 2-5,9-12,14 1,2,5,6,6-14 1,2,5,6,6-14 2-4,9-16 1,2,5,6,8,9,12-14 1-3,15,16 2-5,9-14 2-5,9-14 2-11,13-24 3-5,11-13,16 2-7,16 1,3,4,6,10,12,13 15,16 1,2,4,6,10,12, 14-16 16 (10,3,5,7,9, 11,13,14)' 1-4,6,6,10,13-16, 16,20,22,24 1,3-5,9,10,12, 13,15,16 1-7,16 1-7,9-13,15,16

~ ..

1-3,5,6,7.,8., 9-13 8,11,12 1,2,4,8-15 1,4-8,11-13 2-23 2-5,7,9-12 1,3,5,7,9,11,13 1,2,5-9,12,13 1,2,5-9,12,13 2-5,7,9-12 1-5,7,8,11-13 1-5,7,8,11-13 1,2,7-15 1,2,5-9,12,13 2-5,7,9-12 1,2,5-9,12,13 2-5,7,9-12 1,2,5-13 1,2,5-13 2-4,6-15 1,2,5-9,12,13 1-3,6,15 2-5,7,9-13 2-5,7,9-13 2-16,16-23 1,3-5,6,11-13,15 2-8 1,3,4,6,6,10,12, 13,15 1,2,4,6,6,10,12, 14,15 3,5,7-9,11,14 1-4,6,6,10, 12-16,18,20,22 1,3-5,6-10,12, 13,15 1-8 1-13,15

1-7,9,10,13-15 5-7 2,3,9,10 1 1,6,6,13 2,4,6,6,10,12 3,4,10,11 3,4,10,11 1,6,8,13 6,9,10 6,9,10 3-6 3,4,10,11 1,6,8,13 3,4,10,11 1,6,8,13 3,4 3,4 1,5-7 3,4,10,11 4-7,9-14 1,6,6 1,6,6 1,17 2,6,7,9,10,14 1,9-15 2,5,7,9,11,14 3,5,7,9,11,13 2,4,6,10,12,15 5,7,9,11,17,19, 21,23 2,6,7,11,14 9-15 14

"Non-standard pln arrangement, or mutupje supply pins; connect pins marked (.) without using resistor. 1Pin voltage is Vool2 for pins inside parentheses.

12-248

High Reliability CD4000B-Series CMOS ICs Static Burn-In Test Circuit Connections
STATIC BURN-IN I TYPE CD4514 CD4515 CD4516 CD4517 CD4518 CD4520 CD4527 CD4532 CD4536 CD4555 CD4556 CD4585 CD4724 CD14538 CD40100 CD40101 CD40102 CD40103 CD40104 CD40105 CD40106 CD40107 CD40108 CD40109' CD40110 CD40147 CD40160 CD40161 CD40162 CD40163 CD40174
"Non-standard

STATIC BURN-IN"
VDD

OPEN 4-11,13-20 4-11,13-20 2,6,7,11,14 1,2,5,6,10,11, 14,15 3-6,11-14 3-6,11-14 1,5-7 6,7,9,14,15 4,5,13 4-7,9-12 4-7,9-12 3,12,13 4-7,9-12 2,6,7,9,10,14 1,4,5,7,10,12,14 15 6,9 14 14 12-15 2,10-14 2,4,6,8,10,12 1,2,5,6,8,9, 12,13 1,2,4-7,22,23 4,5,11-13 1-3,10-15 6,7,9,14 11-15 11-15 11-15 11-15 2,5,7,10,12,15

GROUND 1-3,12,21-23 1-3,12,21-23 1,3-5,8-10,12, 13,15 3,4,7-9,12,13 1,2,7-10,15 1,2,7-10,15 2-4,8-15 1-5,8,10-13 1-3,6-12,14,15 1-3,8,13-15 1-3,8,13-15 1,2,4-11,14,15 1-3,8,13-15 1,3-5,8,11-13,15 2,3,6,8,9,11,13 1-5,7,8,10-13 1-13,15 1-13,15 1-11 1,3-9,15 1,3,5,7,9,11,13 3,4,7,10,11 3,8-21 2,3,6-10,14,15 4-9 1-5,8,10-13,15 1-10 1-10 1-10 1-10 1,3,4,6,8,9,11, 13,14 24 24 16 16 16 16 16 16 16 16 16 16 16 16 16 14 16 16 16 16 14 14 24 1.,16 16 16 16 16 16 16 16

OPEN 4-11,13-20 4-11,13-20 2,6,7,11,14 1,2,5,6,10,11, 14,15 3-6,11-14 3-6,11-14 1,5-7 6,7,9,14,15 4,5,13 4-7,9-12 4-7,9-12 3,12,13 4-7,9-12 2,6,7,9,10,14 1,4,5,7,10,12, 14,15 6,9 14 14 12-15 2,10-14 2,4,6,8,10,12 1,2,5,6,8,9,12,13 1,2,4-7,22,23 4,5,11-13 1-i 10-15 6,7,9,14 11-15 11-15 11-15 11-15 2,5,7,10,12,15 12 12 8 8 8 8 8 8 8 8 8 8 8

GROUND

VDD

1-3,21-24 1-3,21-24 1,3-5,9,10,12, 13,15,16 3,4,7,9,12, 13,16 1,2,7,9,10, 15,16 1,2,7,9,10, 15,16 2-4,9-16 1-5,10-13,16 1-3,6,7,9-12, 14-16 1-3,13-16 1-3,13-16 1,2,4-7,9-11, 14-16 1,3,13-16 3-5,11-13,16 2,3,6,9,11, 13,16 1-5,8,10-14 1-7,9-13,15,16 1-7,9-13,15,16 1-7,9-11,16 1,3-7,9,15,16 1,3,5,9,11, 13,14 3,4,10,11,14 3,8-11,13-21, 24 (1.,2,3,6,7,9,10, 14,15),16 4-~ 1-5,10-13,15,16 1-7,9,10,16 1-7,9,10,16 1-7,9,10,16 1-7,9,10,16 1,3,4,6,9,11,13, 14,16

1,8,15 8 7 8 8 8 8 7 7 12 8 8 8 8 8 8 8 8

'" s
I-

a:

pin arrangement. or multiple supply pins; connect pins marked (.) without using resistor.

'Pin voltage is Voof2 for pins inside parentheses, 2VOO = 11.5 volts; Vee = 6.5 volts; use 300 (l resistors at pins 10,13-21.

u u

a o .....

12-249

High Reliability CD4000B-Series CMOS ICs Static Burn-In Test Circuit Connections
STATIC BURN-IN I TYPE
CD40175 CD40181 CD40182 CD40192 CD40193 CD40194 CD40208 CD40257

STATIC BURN-IN "

VDO

OPEN
2,3,6,7,10,11, 14,15 9-11,13-17 7,9-12 2,3,6,7,12,13 2,3,6,7,12,13 12-15 1,2,4-7,22,23

GROUND
1,4,5,8,9,12,13 1-8,12,18-23 1-6,8,13-15 1,4,5,8-11,14,15 1,4,5,8-11,14,15 1-11 3,8-21 1-3,5,6,8,10,11, 13-15 16 24 16 16 16 16 24 16

OPEN
2,3,6,7,10,11, 14,15 9-11,13-17 7,9-12 2,3,6,7,12,13 2,3,6,7,12,13 12-15 1,2,4-7,22,23 4,7,9,12 8 12 8 8 8 8 12

GROUND

VDO

1,4,5,9,12,13,16 1-8,18-24 1-6,13-16 1,4,5,9-11, 14-16 1,4,5,9-11, 14-16 1-7,9-11,16 3,8-11,13-21, 24 1-3,5,6,10,11, 13,14,16

4,7,9,12

8,15

Dynamic Burn-In Test Circuit Connections

TYPE
CD4000 CD4001 CD4002 CD4006 CD4007 CD4008 CD4009' CD4010' CD4011 CD4012 CD4013 CD4014 CD4015 CD4016 CD4017 CD4018 CD4019 CD4020 CD4021 CD4022 CD4023 CD4024 CD4025 CD4026 CD4027 CD4028 CD4029 CD4030 CD4031
'Non-standard

OPEN
1,2 7 7 7 7

GROUND

1/2 Voo
6,9.10 3,4,10,11 1,13 8-13 1,5,8,12,13 10-14 2,4,6,10,12,15 2,4,6,10,12,15 3,4,10,11 1,13 1,2,12,13 2,3,12 2-5,10-13 2,3,9,10 1-7,9-12 4-6,11,13 10-13 1-7,9,12-15 2,3,12 1-7,9-12 6,9,10 3-6,9,11,12 6,9,10 4-7,9-14 1,2,14,15 1-7,9,14,15 2,6,7,11,14 3,4,10,11 6,7,9 14 14 14 14

Voo

OSCILLATOR 50kHz
3-5,8,11-13 1,2,5,6,8,9,12,13 2-5,9-12 3 3,6,10 2,4,6,15 3,5,7,9,11,14 3,5,7,9,11,14 1,2,5,6,8,9,12,13 2-5,9-12 3,11 10 1,9 5,6,12,13 14 7,14

25kHz 1,4-6

6,8 2

13 13

4,7,9 8 8 8 7 7 4,6-8,10 1,4-9,13-15 6,8,14 7 8,13,15 2,8,9,15 8 8,11 1,4-9,13-15 8,13,15 7 2,7

2,11,14 16 1.,16. 1.,160 14 14 14 16 16 14 16 1,3,12,16 16 16 16 16 14 14 14 3,16 5,6,10,11,16 16 9,10,16 14 1,16

1,3,5,7,9

5,9 11 7,15 1,4,8,11

6,8

8,10,13

10 1-7,9,14,15

10 10 14 1-5,8,11-13 1 1-5,8,11-13 1 3,13 10,12,13 15 2,6,9,13 2

11

7
2,8,15 4,7-9,12 8 1,3-5,8,12,13

11

3-5,11-14
pin arrangmen1. or multiple supply

1,5,8,12 10

7
8,15
ems: connect pms marked

,.)

without

usmq a resistor.

12-250

High Reliability CD4000B-Series Dynamic Burn-In Test Circuit Connections

TYPE CD4033 CD4034 CD4035 CD4040 CD4041 CD4042 CD4043 CD4044 CD4046 CD4047 CD4048 C04049· C04050· CD4051· CD4052· CD4053· CD4054 CD4055 CD4056 CD4060 CD4063 CD4066 CD4067 CD4068 CD4069 CD4070 CD4071 CD4072 CD4073 CD4075 CD4076 CD4077 CD4078 CD4081 CD4082 CD4085 CD4086 CD4089 CD4093 CD4094 CD4095 CD4096 CD4097 CD4098
"Non-standard 'Pin 10 is@

CMOS ICs

OPEN

GROUND 2,3,6,14,15 1-8,11-14 2,5,7-12 6,11 7 6 6 6 6,9 7,9,12 8,15 8 8 4-6,7.,80,9, 12,14 4-6,7.,80,12,15 1,5,6,7.,80,12 7.,6 7.,6 7.,8 6,12 1,2,4,8,10,11,13 7 12,15 7 7 7 7 7 7 7 1,2,8-10,15 7 7 7 7 7 7 2,4,8,10,12-15 7 8 2,7,13 2,5,7,9,13 12,13 1,4,8,12,15

1/2 VDD 4-7,9-13 16-23 13-15 1-7,9,12-15 1,2,4,5,6,9,11,12 1-3,9-12, 15 1,2,9,12 1,9,10,13 2 1,2,10,11,13 1 2,4,6,10,12,15 2,4,6,10,12,15 3 3,13 4,14,15 3-6 1,9-15 9-15 1-7,9,10,13-15 5-7 2,3,9,10 1 1,13 2,4,6,6,10,12 3,4,10,11 3,4,10,11 1,13 6,9,10 6,9,10 3-6 3,4,10,11 1,13 3,4,10,11 1,13 3,4 3 1,5-7 3,4,10,11 4-7,9-14 6,8 6,8 1,17 6,7,9,10
martc.ed (.)
Without USing a resiStor.

Voo 16 9,24 16 16 14
6, 16

OSCILLATOR 50kHz 1 15 6 10 3,6,10,13 5 4,6,12,14 4,6,12,14 14 6,8 9-14 3,5,7,9,11,14 3,5,7,9,11,14 11 10 9-11 2 6 6 11 12,15 5,6,12,13 2-9,16-23 2-5,9-12 1,3,5,9,11,13 1,5,8,12 1,2,5,6,8,9,12,13 2-5,9-12 25kHz

1,3,4

10

4,7,13,14 3,7,11,15 3,7,11,15

13 2 1,4,6,7,10,11, 13,15

5,16 5,16 3,5,12,16 4,5,14 2,16 1.,16 1.,16 1,2,13,15,16 1,2,11,14,16 2,3,13,16 1,10,12,14 16 1,16 16 3,16 14 24 14 14 14 14 14 14 14 16 14 14 14 14 14 14 3,16 14 1,15,16 3-5,9-11,14 3,4,10,11,14 24 2,14,16

3 3-7

13 13

10 9

9,11,13,15 2-5 2-5

9,14 1,4,6,11 (10,11,13,14)1

6,8

6,8 -

2,6,9,13

1-5,8,11-13 1-5,8,11-13 11-14 2,6,9,13

7 1,5,8,12 2-5,9-12 1,2,5,6,8,9,12,13 2-5,9-12 1,2,5,6,8,9,12,13 1,2,5,6,6,9,11-13 9 1,2,5,6,8,9,12,13 3

6,6

6,8

10,11 10 11

en
I-

1 1

:;
(,,1

2 12

a:
(,,1

12 2-9,15,16,18-23 5,11

:! c:I o

(10,11,14)' 3,13

....

pin arrangemeflt. 14 kHz; pin 11 is@7 or multiple supply 14 is@3.5

pins; connect

pins

kHz; pin 13 is@ 1.7 kHz; pin 14 is@3.5kHz. kHz.

2Pin 10 is@ 14 kHz; pin 11 is@7kHz;pin

12-251

High Reliability CD4000B-Series CMOS ICs Dynamic Burn-In Test Circuit Connections
TYPE CD4099 CD4502 CD4503 CD4504 CD4508 CD451

OPEN

GROUND
5-8 8 1,8,15 8 1,3,12,13,15 1,3,4,8,9,12,13 5,8 8,10,15 2,3,12 2,3,12 1,3,4,8,9,12,13 3,8,13 7,8,15 7,8,15 2,4,8,10,12-15 8 1,2,6-8,14,15 5-7 6-8 1,8,15 1,8,15 5-9,11,14,15 1-3,8 1,4,8,12,15 8 12 2,8,13 4,7 3,8,15 3,8,15 7,8,10 1,8,9 7 7 12 8 4~

1/2 VDD 1,9-15 2,5,7,9,11,14 3,5,7,9,11,13 1.,2,4,6,10,12,15 5,7,9,11,17,19, 21,23 2,6,7,11,14 14 4-11,13-20 4-11,13-20 2,6,7,11,14 1,2,5,6,10,11 14,15 3-6,11-14 3-6,11-14 1,5-7 6,7,9,14,15 4,5,13 1,2,8 9-15 4-7,9-12 4-7,9-12 3,12,13 4-7,9-12 6,7,9,10 10,11,14,15 4,5,8,9,16, 17,20,21 4,12 6,9 14 14 12-15 2,1(}-14 2,4,6,8,10,12 5,9 1,2,4-7,22,23 1.,4,5,11,13 1-3,1(}-15 16 16 16 16

VDD 2,4 4

OSCILLATOR
50kHz 3 1,3,6,10,12,13,15 133 25kHz

2,4,6,10,12,14 (3,5,7,9,11,14)3 4,6,8,10,16,18, 20,22 15 1,2,7 1-7,9,11,12 1 1 15 4,12 1,9 1,9 9 1-4,1(}-13 3 3 2,3,5 2,14 2,14 2 14,15 5,11 1,3,9,12, 13 3,6,7,10,15 18,19,22 3 2,3,5,8,10 1,4,6,11,13 1,4,6,11,13 11 3,15 1,3,5,9,11,13

2,14,24 10,16 3,4,16 16 21,22,24 21,22,24 10,16 16 2,10,16 2,10,16 3,16 5,16 9-12,16 9,10,12-14 1,4,16 16 16 1,4,16 16 2,14,16 7,16 24 9,16 12,14 2, 16 2,16 1,3-6,9,16 16 14 14 3,15,16,21,24 16 16

5 6 13 23 23 5 7,9 11

9-15

CD4511 CD4512 CD4514 CD4515 CD4516 CD4517 CD4518 CD4520 CD4527 CD4532 CD4536 CD4541 CD4543 CD4555 CD4556 CD45B5 CD4724 CDl4538 CD221 00 CD22101 CD40100 CD40101 CD40102 CD401 03 CD401 04 CD401 05 CD40106 CD401 07 CD40108 CD40109' CD40110 CD40116' CD40117 CD40147 CD40160 CD40161 CD40162 CD40163 CD40174
3Pin Voltage ·Pin 5 is@ SPin 2 is@ 'Non-slandard IS VooI2.

4,11

1,5,7,10,14,15

3,13 3,13 10 13 3,13 (2,4-6)' (1,2,11,14,23)5 6,11 1,11,13 5,7,9,10,12 5,7,9,10,12 2 4-7

1,2,6,8,12,13

3,4,10,11 9,10,13,17,18 (2,7,9,15)3

8,11,14,19,20 (3,6,10,14)5 9

12

7 8 8 8 8 8 8
kHz; Pin 2 is@3.5 or multiple supply kHz. kHz. pins marked pins; connect

3-6,8-11 6,7,9,14 11-15 11-15 11-15 11-15 2,5,7,10,12,15

14 16 1,7,9,10,16 1,7,9,10,16 1,7,9,10,16 1,7,9,10,16 1,16

12,13 1,3,11,13 2~ 2~ 2~ 2~ 9

1,2 2,4,5,10,12,15

3,4,6,11,13,14

14 -kHz; Pin 6 is@7 14 kHz; Pin 1 is@7 pin arrangement,

kHz; Pins 14, 23 are@3.5

(e) without

using a resistor.

12-252

High Reliability CD4000B-Series Dynamic Burn-In Test Circuit Connections

TYPE
CD40175 CD401Bl CD40182 CD40192 CD40193 CD40194 CD40208 CD40257

CMOS ICs

OPEN

GROUND
8 4-6,B,12 B 8,14 8,14 7,8,10 12 8,15

1/2 Voo
2,3,6,7,10,11 14,15 9-11,13-17 7,9-12 2,3,6,7,12,13 2.3,6,7,12,13 12-15 1,2,4-7,22,23 4,7,9,12 1,16 3,24 16

Voo
9

OSCILLATOR 50kHz 25kHz

4,5,12,13 7 13

1,2,18-23 1-6,14,15 4 4 11 8,10,14,19,20 2,3,5,6,10,11, 13,14

1,5,9-11,15,16 1,5,9-11,15,16 1,3-6,9,16 3,15,16,21,24 16

2 9,11,13,17,18 1

Guide to Burn-In Delta Limits for Level /MS CD4000B-Series CMOS ICs Delta Parameters
For the IMS level devices, certain parameters are datalogged and deltas are calculated from pre to post burn-in. Critical Parameters Quiescent Device Current Gates MSI-l Types MSI-2 Types Output Low (Sink) Current Output High (Source) Current Types with RONlimits instead of IOLand IOH Symbols These parameters are shown below. Test Conditions VOD V,N
(V) (V)

Vo (V) 0.4 4.6

-

Delta (.1) Limits

100 100 100

0,20 0,20 0,20 0,5 0,5 -

20 20 20

to.l1lA to.2IlA t 1.01lA t20% of initial value t 20% of initial value t 20% of initial value

IOL IOH RON

5 5 10V

12-253

High Reliability Lead/ess Chip Carrier Pinouts

CD4000B-Series

CMOS /Cs

The following table and diagrams show JEDEC standard pinout conversions from 14, 16, 22 and 24 pin leaded FP/DIL packages to 20 and 28 terminal leadless chip
Pinout Conversion From Leaded Package to Leadless-Chlp FP/OIL Pin
Leadless Chip Carrier Terminal

carriers. Harris CD4000B-series products offered in leadless chip carriers are shown below.

Carrier

3 4 4 4 4

4 6 5 5 5

5 8
7

6 9 8 8 7

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

2 2 2 2

3 3 3 3

6 6

10 9 10 9

12 13 14 16 18 19 20 10 12 13 14 15 17 18 19 20 11 12 13 14 16 17 18 19 20 22 24 25 26 27 28 10 11 12 13 14 16 17 18 19 20 21 23 24 25 26 27 28

CD40008-Series

Conversion

Diagrams

Top Views Shown 20-Terminal Leadless-Chlp Carriers

INDEX

00 8
3 2 1 20 4

13 19 18

INOEX

00 @@
3 2 1 20 19 IB 20-TERMINAL CONVERSION FROM 16-PIN 17 16 15 14 9 10 II 12 13 4

0 0
5

20 - TERMINAL CONVERSION FROM 14-PIN

17 16 15 14

0
@

0 0

® ®

5 6 7

8 9 10 II 12 13·

0 0a

00 00

92CS-3533!

00 0@
92CS-

3~334

28-Termlnal Leadless-Chlp Carriers

IN
EX

4321282726 6 7 8 :~ 2B- TER M INAL CONVERSION FROM 24-PIN 25 ~ 4 23 90 2 22 ;: ~

2B-TERMINAL

24 23 22 21

ffi ',~
9

CONVERSION FROM 22-PIN

12 13 14 15 16 17 18

~:~

12 13 14 15 16 17 18

010 ®Ie
@

®I@@I@

92CS-35335

92CS-353H

12-254