Cisco Memory Maps

A P P E N D I X
Memory Maps
This appendix presents memory maps for selected product platforms, processors, and interface cards. Memory map information is useful for technically qualified users who understand concepts of low-level operating systems, bus structures, and address mapping in computer systems.
Troubleshooting Crashes
When a system crashes, the ROM monitor detects the error, prints a message to the console and stores the stack information at the time of the crash. We refer to this crash information as a stack trace, and it is seen from the show stack command. This data is overwritten when the system is reloaded, so you might want to check your configuration register settings and decide how you want to recover from system crashes. Stack traces can be used by qualified technical support representatives who have access to symbol tables, object files, and source code needed to decode the stack. When using this appendix, be aware of the distinct difference between program counter values and operand addresses. Figure B-1 shows part of the show stack output to identify these.
Figure B-1 show stack Output Identifying Difference Between Program Counter Values and Operand Addresses
Type of crash = bus error
System was restarted by bus error at PC 0xD31CA, address 0x184E0006
Program counter = PC 0xD31CA
Address operand = 0x184E006
Note
The addresses that appear in this appendix are operand values and should not be confused with program counter values. All memory addresses are in hexadecimal, unless otherwise noted. Memory map information can be useful when you are determining whether a problem exists in the software or in the hardware. The system software can provide information about the reasons for a system crash. Always collect the show stack, show version, and show run, and the logs. A show tech output may provide additional information, especially on the Cisco 7500 and 7200 series platforms.
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Appendix B Troubleshooting Crashes
Memory Maps
Types of Crashes and Their Causes

Examples of crash types are listed here:

Bus error/SegV exception Software-forced crash Address error Watchdog timeout Parity error Other types
These crashes will be discussed in greater detail in the next sections.
Bus Error/SegV Exception

Bus errors and SegV exceptions are the most common types of crashes. They occur when the processor tries to access a memory-mapped address that either does not exist (software error) or does not respond in time (hardware problem). A SegV exception occurs only on the RISC processors when the memory-mapped address does not exist. The type of processor (RISC or 68000) is seen using the show version command. Figure B-2 shows the important information that you see in the output of show version taken from two different routers.
Figure B-2 Important Information from Output of show version from Two Different Routers
cisco 3640 (R4700) processor (revision 0x00) with 49152K/16384K bytes of memory.
The R indicates a RISC processor

cisco 2500 (68030) processor (revision D) with 8192K/2048K bytes of memory.
This indicates a non-RISC processor
The address that the processor was trying to access when the system crashed provides some indication as to whether the failure occurred in software or hardware. For the 68000 processors, if the operand address is a valid physical memory address in the memory map, the problem is probably in the hardware. Bus errors on an address not in the map usually indicate a software bug. Get the show stack output decoded. For the RISC processors, the rule about addressing errors due to hardware when the address is valid doesnt work anymore. This is because some memory regions do not support all types of CPU accesses, and the hardware will correctly return an error if the software incorrectly uses the wrong access mode. On RISC processors, the virtual addresses are used instead of directly accessing the physical addresses. Get confirmation from an experienced engineer before swapping hardware based on an addressing error.
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Appendix B
Memory Maps Memory Maps
Software-Forced Crash
The router IOS has certain health-checking routines that occur frequently to guard against corruption of various types and infinite loops. If the IOS finds a corruption of data or code in memory or detects that it is stuck in an infinite loop, it will crash itself by calling a crashdump routine to attempt to write a core file. Get the show stack output decoded. If the decode indicates a memory corruption, additional data such as a core dump may be needed to identify the cause of the corruption. Refer to Appendix A, Creating Core Dumps, for more information on setting up a core dump.
Address Error
Address errors occur when the software tries to access data on incorrectly aligned boundaries. For example, 2- and 4-byte accesses are allowed only on even addresses. An address error usually indicates a software bug.
Watchdog Timeout
Cisco processors have timers that guard against certain types of system hangs. The CPU periodically resets a watchdog timer. If the timer is not reset, a trap will occur. Failure to service the watchdog timer indicates either a hardware bug or a software bug.
Parity Error
Parity errors indicate that internal hardware error checks have failed. A parity failure is almost always due to a hardware problem. Use the memory maps listed later in this chapter to identify the affected hardware.
Other Types
There are many other types of crashes, but they are more rare. Some are caused by hardware, and some are caused by code corruption that is stepped on before they are found by the IOS routines. A stack decode mentioned earlier is needed to find the routines that caused the crash.
Memory Maps
The following tables summarize memory map information for the various Cisco platforms: Table B-1 describes the Cisco 12000-GRP memory map. Table B-2 describes the Cisco 12000 linecard memory map. Table B-3 describes the Cisco 8540CSR memory map. Table B-4 describes the Cisco RSP memory map. Table B-5 describes the Cisco RSP4 memory map. Table B-6 describes the Cisco 7000 Series RP memory map. Table B-7 describes the Cisco 7200 Series NPE memory map.
B-3
Appendix B Memory Maps
Memory Maps
Table B-8 describes the Cisco 7100 memory map. Table B-9 describes the Cisco 6400-NRP memory map. Table B-10 describes the Cisco 6400-NSP memory map. Table B-11 describes the Cisco 6200 memory map. Table B-12 describes the Cisco 6260 memory map. Table B-13 describes the Cisco 4000-M memory map. Table B-14 describes the Cisco 45004700 memory map. Table B-15 describes the Cisco 3620 memory map. Table B-16 describes the Cisco 3640 memory map. Table B-17 describes the Cisco 3660 memory map. Table B-18 describes the Cisco 2600 memory map. Table B-19 describes the Cisco 2500 memory map. Table B-20 describes the Cisco 1720 memory map. Table B-21 describes the Cisco 1600 memory map. Table B-22 describes the Cisco 1400 memory map. Table B-23 describes the Cisco AS5200 memory map. Table B-24 describes the Cisco AS5300 memory map. Table B-25 describes the Cisco AS5800 memory map. Table B-26 describes the Cisco 1000, 1003/1004/1005 memory map. Table B-27 describes the Cisco VIP2 memory map.
Table B-1: 12000-GRP Memory Map

General MIPS Addressing
Most displayed addresses are virtual addresses, to be interpreted according to a platforms virtual memory map. However, some messages contain physical address, such as write bus error reports. There is no foolproof way to know from an address itself whether it is virtual or physical; knowledge of the display context is required.
Table B-1 GRP Virtual Memory Map
Address
Description
bfc00000 to bfc7ffff Boot PROM b7000000 to b7ffffff PCMCIA a0000000 to a7ffffff Alternate view of the first 128 MB of DRAM used by ROM monitor 60000000 to 7fffffff Up to 512 MB of main memory DRAM 3e850000 to 3e857fff Ethernet interface
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Table B-1
GRP Virtual Memory Map (continued)
Address 3e84a000 to 3e84bfff 3e848000 to 3e849fff 3e840000 to 3e841fff 3e000000 to 3e07ffff 28090000 to 28097fff 28000000 to 2807ffff
Table B-2
Description Fabric receive registers Fabric transmit registers I/O registers Config NVRAM
38000000 to 39ffffff Onboard Flash SIMM Fabric interface FPGA Fabric interface memory
GRP Physical Memory Map
Address
Description
60000000 to 7fffffff Up to 512 MB of main memory DRAM 1fc00000 to 1fc7ffff Boot PROM 1e850000 to 1e857fff 1e84a000 to 1e84bfff 1e848000 to 1e849fff 1e840000 to 1e841fff 1e000000 to 1e07ffff Ethernet interface Fabric receive registers Fabric transmit registers I/O registers Config NVRAM
18000000 to 19ffffff Onboard Flash SIMM 17000000 to 17ffffff PCMCIA 08090000 to 08097fff 08000000 to 0807ffff Fabric interface FPGA Fabric interface memory
00000000 to 07ffffff First 128 MB of main memory DRAM
Table B-2: 12000 Linecard Memory Map

Terminology: FIASwitch fabric interface ASIC
B-5
Memory Maps
BMABuffer management ASIC L3Layer 3 ASIC MBUSMaintenance bus PLIMPhysical Layer Interface Module
Table B-3 Linecard Virtual Memory Map
Address BFC00000 to BFCFFFFF A0000000 to B7FFFFFF 80000000 to 87FFFFFF 40000000 to 7FFFFFFF 30000000 to 3FFFFFFF 20000000 to 2FFFFFFF 12000000 to 17FFFFFF 11C00000 to 11FFFFFF 11800000 to 11BFFFFF 11400000 to 117FFFFF 10C00000 to 113FFFFF 10400000 to 10BFFFFF 10000000 to 103FFFFF
Table B-4
Description Boot ROM Alternate view of the first 128 MB of DRAM used by ROM monitor Alternate view of the first 128 MB of DRAM used by ROM monitor and IOS scheduler Up to 512 MB of main memory RX SDRAM (packet memory) TX SDRAM (packet memory) PLIM address space MBUS address space RX FIA ASIC address space TX FIA ASIC address space RX BMA ASIC address space TX BMA ASIC address space L3 ASIC address space
Linecard Physical Memory Map
Address E0000000 to EFFFFFFF C0000000 to CFFFFFFF 40000000 to 7FFFFFFF
Description RX SDRAM (packet memory) TX SDRAM (packet memory) Up to 1 GB of main memory
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Table B-4
Linecard Physical Memory Map (continued)
Address 1FC00000 to 1FFFFFFF 12000000 to 17FFFFFF 11C00000 to 11FFFFFF 11800000 to 11BFFFFF 11400000 to 117FFFFF 10C00000 to 113FFFFF 10400000 to 10BFFFFF 10000000 to 103FFFFF 00000000 to 0FFFFFFF
Description Boot ROM PLIM address space MBUS address space RX FIA ASIC address space TX FIA ASIC address space RX BMA ASIC address space TX BMA ASIC address space L3 ASIC address space First 256 MB of main memory (EDO DRAM)
B-7
Memory Maps
Table B-3: Catalyst 8540CSR Memory Map

Table B-5 Catalyst 8540CSR Memory Map
Address Space Name DRAM
Byte Address Start End
Length in Bytes
Notes
Function
0000 0000 128 MB Alias of address Serves as the main DRAM that 6000 0000 holds data and code 07FF FFFF 0800 0000 16 MB 08FF FFFF Alias of addresses 4000 0000 and 5000 0000 Holds the message data to/from the CPU and the switch fabric
MEMD
0900 0000 112 MB Invalid address; access will cause bus error or interrupt. 0FFF FFFF I/O 1000 0000 256 MB Alias of address 3000 0000 1FFF FFFF Empty 2000 0000 256 MB Invalid address; access will cause bus error or interrupt. 2FFF FFFF I/O 3000 0000 256 MB Alias of address 1000 0000 3FFF FFFF MEMD 4000 0000 16 MB 40FF FFFF Alias of addresses 0800 0000 and 5000 0000 Holds the message data to/from the CPU and the switch fabric
4100 0000 240 MB Invalid address; access will cause bus error or interrupt. 4FFF FFFF 5000 0000 16 MB 50FF FFFF Alias of addresses 0800 0000 and 4000 0000 Holds the message data to/from the CPU and the switch fabric
5100 0000 240 MB Invalid address; access will cause bus error or interrupt. 5FFF FFFF DRAM 6000 0000 128 MB Alias of address Serves as the main DRAM that 0000 0000 holds data and code 67FF FFFF
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Table B-5
Catalyst 8540CSR Memory Map (continued)
Address Space Name
Byte Address Start End
Length in Bytes
Notes
Function
6800 0000 384 MB This space not accessible at 7FFF address 0000 FFFF 0000 Empty 8000 0000 2048 MB FFFF FFFF
Table B-6 MEMD Space Physical Address Map
Invalid address; access will cause bus error or interrupt.
Physical Device SAR SRAM None
Byte Address Start End 080F FFFF
Length in Bytes
Width in Bits 64
Function
0800 0000 1 MB
0810 0000 14 MB 08DF FFFF
64
CUBI FPGA CUBI FPGA
08E0 0000 1 MB 08EF FFFF 08F0 0000 1 MB 08FF FFFF
64
CUBI FPGA control and status registers
64
CUBI FPGA control and status registers
B-9
Memory Maps
Table B-7
I/O Space Physical Address Map
Physical Device None PCMCIA cards
Byte Address Start End 1000 0000 16FF FFFF 1700 0000 17FF FFFF
Length in Bytes
Width in Bits
Function
16 MB
16
Access for the contents of the cards plugged into the PCMCIA slots. The exact address at which the cards appear must be programmed via the PCMCIA controller. Card address spaces larger than 16 MB can be used via the windowing scheme that the PCMCIA controller provides. SIMM socket wired for a single 32-bit-wide Flash SIMM. The wiring supports 32 MB, but what is actually stuffed during production is a customer option. This SIMM holds the boot system image, config, and so onwhatever software wants to put here. See PAM space table. See SWC space table. Nonvolatile static RAM used for whatever software wants. The NVRAM provides a TOD function that is read through the same address space as the NVRAM.
Flash SIMM
1800 0000 1BFF FFFF
64 MB
32
PAM bus SWC bus NVRAM Time of day
1C00 0000 1CFF FFFF 1D00 0000 1DFF FFFF 1E00 0000 1E07 FFFE 1E07 FFFF
16 MB 16 MB
32 16
512 K-1 8 1 1
None Tiger ASIC CIDR FPGA None
1E08 0000 1E83 FFFF 1E84 0000 1E84 00FF 1E84 0100 1E84 02FF 1E84 0300 1E84 03DF 512 16 256 16 Tiger control and status registers. Various control and status registers.
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Table B-7
I/O Space Physical Address Map (continued)
Physical Device PCMCIA controller
Byte Address Start End 1E84 03E0 (index) 1E84 03E1 (data)
Length in Bytes 2
Width in Bits 8
Function Control and status registers for configuring the PCMCIA slots. This is one of those lovely chips where you write an index register and then access a data register that uses the index register as the address.
None DUART
1E84 03E2 1E84 03FF 1E84 0400 1E84 047F 128 8 Dual UART for console port and out-of-band RP to RP communications.
None Ethernet controller Ethernet SRAM Network clock module None Boot Flash PROM
1E84 0480 1E84 FFFF 1E85 0000 1E85 FFFF 1E86 0000 1E87 FFFF 1E88 0000 1E88 00FF 1E88 0100 1FBF FFFF 1FC0 0000 1FC7 FFFF 512 KB 8 Holder for R5000 initial start-up code. This part is a Flash part and can be rewritten in system. 256 8 128 KB 32 64 KB 16 10-Mbps Ethernet interface.
None
1FC8 0000 1FFF FFFF
B-11
Memory Maps
Table B-4: RSP Memory Map

Table B-8 RSP Memory Map
Address 80000000 to FFFFFFFF 60000000 to 77FFFFFF 40000000 to 5FFFFFFF 38000000 to 3FFFFFFF 30000000 to 37FFFFFF 20000000 to 2FFFFFFF 18000000 to 1FFFFFFF 10000000 to 17FFFFFF 08000000 to 0FFFFFFF 00000000 to 07FFFFFF Individual addresses:
11110000 11110100 11120000 11120040 11120100-1112013F 11120200 11120300 1115FFFF 111104000
Bit Width Description Available for expansion Main memory Common Packet memory canonical address bit ordering bits in byte-swapped packet memory Common Boot EPROM and I/O space System Flash memory Reserved platform-specific address space Boot EPROM and I/O space System Flash memory Packet memory Main memory
16 32 8 8 8 16 32 1 8
System control System status Counter timer Counter control register Serial I/O ports Environmental monitor control Environmental monitor status Calendar (1 bit bit 0) Flash card status Slot 0 Slot 1 Slot 2 Slot 3 Slot 4
Virtual address:
E00000 E20000 E40000 E60000 E80000
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Table B-8
RSP Memory Map (continued)
Address
EA0000 EC0000 EE0000 F00000 F20000 F40000 F60000 F80000
Bit Width Description Slot 5 Slot 6 Slot 7 Slot 8 Slot 9 Slot 10 Slot 11 Slot 12
B-13
Memory Maps
Table B-5: RSP4 Memory Map

Table B-9 RSP4 Memory Map
Memory Base 0x0000 0000 0x0800 0000 0x1000 0000 0x1700 0000 0x1800 0000 0x1C00 0000 0x1E00 0000 0x1E80 0000 0x1F00 0000 0x2000 0000 0x3000 0000 0x3800 0000 0x4000 0000 0x6000 0000 0x8000 0000
Memory Limit 0x07FF FFFF 0x0F00 0000 0x16FF FFFF 0x17FF FFFF 0x1BFF FFFF 0x1DFF FFFF 0x1E7F FFFF 0x1EFF FFFF 0x1FFF FFFF 0x2FFF FFFF 0x37FF FFFF 0x3FFF FFFF 0x5FFF FFFF 0x7FFF FFFF 0xFFFF FFFF
Size Up to 128 Mb Up to 128 Mb
Device Main memory Packet memory System Flash memory PCMCIA slots RxBootFlash SLOT I/O NVRAM I/O registers BootPROM ReservedPlatform-specific address space
128 Mb
System Flash memory BootEPROM and I/O space Packet memory Main memory Available for expansion
Table B-6: Cisco 7000 Series RP Memory Map

Table B-10 Cisco 7000 Series RP Memory Map
Address 00000000 to 0FFFFFFF 10000000 to 100FFFFF 10400000 to 104FFFFF 11000000 to 110FFFFF 11100000 to 1110FFFF 11110000 to 1112FFFF 11130000 to 11130FFF
Bit Width Description DRAM ROML ROMU Multibus memory Multibus I/O Local I/O Diagnostic bus
Comments
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Table B-10 Cisco 7000 Series RP Memory Map (continued)
Address 11131000 to 111314FF 11140000 to 1115FFFF 12000000 to 13FFFFFF 14000000 to 15FFFFFF 11110000 11110100 11110400 11110C00
Bit Width Description ID PROM NVRAM Internal Flash memory External Flash memory card 16 32 System control System status register Flash memory card status I/O address base
Comments
SwitchBus address space. Each unit occupies 64 bytes (0x40)
11120000 11120040 11120100 to 1112013F 11120200 11120300 11130000 11131000 11140000 1115FC00 1115FFFF 11200000 to 11FFFFFF 12000000 14000000
8 8 8
Counter timer Counter control register Serial I/O ports Environmental monitor control Environmental monitor status Diagnostic bus ID PROM NVRAM Environmental monitor NVRAM base address 16 bits 32 bits
Real-time calendar bit Reserved Onboard Flash memory External Flash memory
1 bit (bit 0) 14 MB reserved
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Memory Maps
Table B-7: Cisco 7200 Series NPE Memory Map

Table B-11 Cisco 7200 Series NPE Memory Map
Base 0x0 0000 0000 0x0 0800 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1A00 0000 0x0 1A40 0000 0x0 1C00 0000 0x0 1E00 0000 0x0 1E20 0000 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000 0x0 1FC0 0000 0x0 1FE0 0000 0x0 4000 0000 0x0 4400 0000 0x0 4800 0000 0x0 4880 0000 0x0 4900 0000
Until 0x0 07FF FFFF 0x0 0FFF FFFF 0x0 13FF FFFF 0x0 141F FFFF 0x0 19FF FFFF 0x0 1A3F FFFF 0x0 1BFF FFFF 0x0 1DFF FFFF 0x0 1E1F FFFF 0x0 1E7F FFFF 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF 0x0 1FDF FFFF 0x0 3FFF FFFF 0x0 43FF FFFF 0x0 47FF FFFF 0x0 487F FFFF 0x0 48FF FFFF 0x0 497F FFFF
Size 128 MB 128 MB 62 MB 2 MB 94 MB 4 MB 28 MB 32 MB 2 MB 6 MB 2 MB 6 MB 12 MB 2 MB x MB 64 MB 64 MB 8 MB 8 MB 8 MB
Device System DRAM System DRAM (rsvd) Reserved GT-64010 registers Reserved Internal Flash SIMM Reserved: more Flash Reserved NVRAM Reserved I/O registers Reserved Reserved Boot EPROM Reserved PCI-to-PCMCIA interface (top slot) PCI-to-PCMCIA interface (bottom slot) Fast Ethernetmemory-mapped I/O PA1 memory-mapped I/O PA3 memory-mapped I/O
Bus
I/O I/O
I/O
I/O
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Table B-11 Cisco 7200 Series NPE Memory Map (continued)
Base 0x0 4800 0000 0x0 4A00 0000 0x0 4A80 0000 0x0 4B00 0000 0x0 4B10 0000 0x0 4B80 0000 0x0 4B90 0000 0x0 4C00 0000 0x0 4C10 0000 0x0 4C80 0000 0x0 4C90 0000 0x0 4D00 0000 0x0 4D80 0000 0x0 4E00 0000 0x0 4E80 0000 0x0 4F00 0000 0x0 4F80 0000 0x0 5000 0000 0x1 0000 0000 0x1 0020 0000 0x1 4B00 0000
Until 0x0 49FF FFFF 0x0 4A7F FFFF 0x0 4AFF FFFF 0x0 4B0F FFFF 0x0 4B7F FFFF 0x0 4B8F FFFF 0x0 4BFF FFFF 0x0 4C0F FFFF 0x0 4C7F FFFF 0x0 4C8F FFFF 0x0 4CFF FFFF 0x0 4D7F FFFF 0x0 4DFF FFFF 0x0 4E7F FFFF 0x0 4EFF FFFF 0x0 4F7F FFFF 0x0 4FFF FFFF 0x0 FFFF FFFF 0x0 001F FFFF 0x1 4B7F FFFF 0x1 4B0F FFFF
Size 8 MB 8 MB 8 MB 1 MB 7 MB 1 MB 7 MB 1 MB 7 MB 1 MB 7 MB 8 MB 8 MB 8 MB 8 MB 8 MB 8 MB x MB 2 MB About 1 GB 1 MB
Device PA5 memory-mapped I/O PA7 memory-mapped I/O PA9 memory-mapped I/O PCI PM, first 1 M, no byte swap PCI PM, larger PM, no swap (rsvd) PCI PM, first 1 M, byte swap PCI PM, larger PM, byte swap (rsvd) PCI alias, first 1 M, no byte swap PCI alias, larger PM, no swap (rsvd) PCI alias, first 1M, byte swap PCI alias, larger PM, byte swap (rsvd) PA2 memory-mapped IO PA4 memory-mapped IO PA6 memory-mapped IO PA8 memory-mapped IO (rsvd) PA10 memory-mapped IO (rsvd) IO assy memory-mapped IO (rsvd) Reserved PCI I/O address space Reserved CPU PM, first 1M, no byte swap
Bus
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Memory Maps
Table B-11 Cisco 7200 Series NPE Memory Map (continued)
Base 0x1 4B10 0000 0x1 4B80 0000 0x2 0000 0000 0x4 0000 0000 0x8 0000 0000
Until 0x1 4B7F FFFF 0x1 FFFF FFFF 0x3 FFFF FFFF 0x7 FFFF FFFF 0xF FFFF FFFF
Size 7 MB About 0 GB 8 GB 16 GB 32 GB
Device CPU PM, larger PM, no swap (rsvd) Reserved L2 cache disabled (alias) for low 8 GB Cache controller tag Op 0 Cache controller tag Op 1
Bus
Table B-12 Cisco 7200 NPE-200 Memory Map
Base 0x0 0000 0000 0x0 0000 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1A00 0000 0x0 1A40 0000 0x0 1C00 0000 0x0 1E00 0000 0x0 1E20 0000 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000 0x0 1FC0 0000
Until 0x0 07FF FFFF 0x0 0FFF FFFF 0x0 13FF FFFF 0x0 141F FFFF 0x0 19FF FFFF 0x0 1A3F FFFF 0x0 1BFF FFFF 0x0 1D00 0000 0x0 1E1F FFFF 0x0 1E7F FFFF 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF 0x0 1FDF FFFF
Size 128 MB 128 MB 62 MB 2 MB 94 MB 4 MB 28 MB 32 MB 2 MB 6 MB 2 MB 6 MB 12 MB 2 MB
Device System DRAM System DRAM (rsvd) Reserved GT-64010 registers Reserved Internal Flash SIMM Larger Flash SIMM (rsvd) Reserved NVRAM (TOD) Reserved I/O registers Reserved Bit bucket (read/write null) Boot EPROM
Bus
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Table B-12 Cisco 7200 NPE-200 Memory Map (continued)
Base 0x0 1FE0 0000 0x0 4000 0000 0x0 4400 0000 0x0 4800 0000 0x0 4880 0000 0x0 4900 0000 0x0 4980 0000 0x0 4A00 0000 0x0 4A80 0000 0x0 4B00 0000 0x0 4B40 0000 0x0 4B80 0000 0x0 4BC0 0000 0x0 4C00 0000 0x0 4C40 0000 0x0 4C80 0000 0x0 4CC0 0000 0x0 4D00 0000 0x0 4D80 0000 0x0 4E00 0000 0x0 4E80 0000
Until 0x0 3FFF FFFF 0x0 43FF FFFF 0x0 47FF FFFF 0x0 487F FFFF 0x0 48FF FFFF 0x0 497F FFFF 0x0 49FF FFFF 0x0 4A7F FFFF 0x0 4AFF FFFF 0x0 4B3F FFFF 0x0 4B7F FFFF 0x0 4BBF FFFF 0x0 4BFF FFFF 0x0 4C3F FFFF 0x0 4C7F FFFF 0x0 4CBF FFFF 0x0 4CFF FFFF 0x0 4D7F FFFF 0x0 4DFF FFFF 0x0 4E7F FFFF 0x0 4EFF FFFF
Size x MB 64 MB 64 MB 8 MB 8 MB 8 MB 8 MB 8 MB 8 MB 4 MB 4 MB 4 MB 4 MB 4 MB 4 MB 4 MB 4 MB 8 MB 8 MB 8 MB 8 MB
Device Reserved PCI-to-PCMCIA interface (top slot) PCI-to-PCMCIA interface (bottom slot) Fast Ethernetmemory-mapped IO PA1 memory-mapped IO PA3 memory-mapped IO PA5 memory-mapped IO PA7 memory-mapped IO (rsvd) PA9 memory-mapped IO (rsvd) PCI PM, first 4 M, no byte swap PCI PM, larger PM, no swap (rsvd) PCI PM, first 4 M, byte swap PCI PM, larger PM, byte swap (rsvd) PCI alias PM, first 4 M, no byte swap PCI alias PM, larger PM, no swap (rsvd) PCI alias PM, first 4 M, byte swap PCI alias PM, larger PM, byte swap (rsvd) PA2 memory-mapped IO PA4 memory-mapped IO PA6 memory-mapped IO PA8 memory-mapped IO (rsvd)
Bus
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Memory Maps
Base 0x0 4F00 0000 0x0 4F80 0000 0x0 5000 0000 0x1 0000 0000 0x1 0020 0000 0x1 4B00 0000 0x1 4B40 0000 0x1 4B80 0000 0x2 0000 0000 0x4 0000 0000 0x8 0000 0000
Until 0x0 4F7F FFFF 0x0 4FFF FFFF 0x0 FFFF FFFF 0x0 001F FFFF 0x1 4B7F FFFF 0x1 4B3F FFFF 0x1 4B7F FFFF 0x1 FFFF FFFF 0x3 FFFF FFFF 0x7 FFFF FFFF 0xF FFFF FFFF
Size 8 MB 8 MB x MB 2 MB About 1 GB 4 MB 4 MB About 0 GB 8 GB 16 GB 32 GB
Device PA10 memory-mapped IO (rsvd) IO assy memory-mapped IO (rsvd) Reserved PCI I/O address space Reserved CPU PM, first 4 M, no byte swap CPU PM, larger PM, no swap (rsvd) Reserved L2 cache disabled (alias) for low 8 GB Cache controller tag Op 0 Cache controller tag Op 1
Bus
Base 0x0 0000 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1500 0000 0x0 1520 0000 0x0 1A00 0000 0x0 1A40 0000
Until 0x0 0FFF FFFF 0x0 13FF FFFF 0x0 141F FFFF 0x0 14FF FFFF 0x0 151F FFFF 0x0 19FF FFFF 0x0 1A3F FFFF 0x0 1BFF FFFF
Size
Device
Bus
256 MB System SDRAM; configurable 64 MB 2 MB 14 MB 2 MB 78 MB 4 MB 28 MB Reserved GT-64120 registers Reserved GT-64120 registers Reserved Internal Flash SIMM Larger Flash SIMM (rsvd)
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Base 0x0 1C00 0000 0x0 1E00 0000 0x0 1E20 0000 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000 0x0 1FC0 0000 0x0 1FE0 0000 0x0 2000 0000 0x0 2200 0000 0x0 3000 0000 0x0 4000 0000 0x0 4400 0000 0x0 4800 0000 0x0 4880 0000 0x0 4900 0000 0x0 4980 0000 0x0 4A00 0000 0x0 4A80 0000 0x0 4B00 0000 0x0 4D00 0000
Until
Size
Device Reserved NVRAM (TOD) Reserved I/O registers Reserved Bit bucket (read/write null) Boot EPROM Reserved System SDRAM (I/O memory); fixed
Bus
0x0 1D00 0000 32 MB 0x0 1E1F FFFF 0x0 1E7F FFFF 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF 0x0 1FDF FFFF 0x0 1FFF FFFF 0x0 21FF FFFF 0x0 2FFF FFFF 0x0 3FFF FFFF 0x0 43FF FFFF 0x0 47FF FFFF 0x0 487F FFFF 0x0 48FF FFFF 0x0 497F FFFF 0x0 49FF FFFF 0x0 4A7F FFFF 0x0 4AFF FFFF 0x0 4CFF FFFF 0x0 4D7F FFFF 2 MB 6 MB 2 MB 6 MB 12 MB 2 MB 2 MB 32 MB
224 MB System SDRAM (rsvd) 256 MB Reserved 64 MB 64 MB 8 MB 8 MB 8 MB 8 MB 8 MB 8 MB 32 MB 8 MB PCI-to-PCMCIA interface (top slot) PCI-to-PCMCIA interface (bottom slot) I/O card Fast Ethernetmemory-mapped IO PA1 memory-mapped IO PA3 memory-mapped IO PA5 memory-mapped IO PA7 memory-mapped IO (rsvd) PA9 memory-mapped IO (rsvd) Reserved PA2 memory-mapped IO
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Memory Maps
Base 0x0 4D80 0000 0x0 4E00 0000 0x0 4E80 0000 0x0 4F00 0000 0x0 4F80 0000 0x0 5000 0000 0x0 C000 0000 0x0 D000 0000 0x0 E000 0000 0x0 F000 0000 0x1 0000 0000 0x1 0020 0000
Until 0x0 4DFF FFFF 0x0 4E7F FFFF 0x0 4EFF FFFF 0x0 4F7F FFFF 0x0 4FFF FFFF 0x0 BFFF FFFF 0x0 CFFF FFFF 0x0 DFFF FFFF 0x0 EFFF FFFF 0x0 FFFF FFFF 0x1 001F FFFF 0xF FFFF FFFF
Size 8 MB 8 MB 8 MB 8 MB 8 MB 1792 MB
Device PA4 memory-mapped IO PA6 memory-mapped IO PA8 memory-mapped IO (rsvd) PA10 memory-mapped IO (rsvd) IO assy memory-mapped IO (rsvd) Reserved
Bus
256 MB Lower system SDRAM, PCI byte swapped 256 MB Reserved 256 MB Upper system SDRAM, PCI byte swapped 256 MB Reserved 2 MB PCI I/O address space Reserved
Base 0x0 0000 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1A00 0000 0x0 1A40 0000 0x0 1C00 0000
Until 0x0 0FFF FFFF 0x0 13FF FFFF 0x0 141F FFFF 0x0 14FF FFFF 0x0 1A3F FFFF 0x0 1BFF FFFF 0x0 1DFF FFFF
Size
Device
Bus
256 MB System SDRAM and packet memory 64 MB 2 MB 14 MB 4 MB 28 MB 32 MB Reserved GT-64120 registers Reserved Internal Flash SIMM Larger Flash SIMM (rsvd) Reserved
B-22
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Base 0x0 1E00 0000 0x0 1E20 0000 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000 0x0 1FC0 0000 0x0 1FE0 0000 0x0 2000 0000 0x0 3000 0000 0x0 4000 0000 0x0 4400 0000 0x0 4800 0000 0x0 4880 0000 0x0 4900 0000 0x0 4980 0000 0x0 4A00 0000 0x0 4A80 0000 0x0 4B00 0000 0x0 4D00 0000 0x0 4D80 0000 0x0 4E00 0000
Until 0x0 1E1F FFFF 0x0 1E7F FFFF 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF 0x0 1FDF FFFF 0x0 1FFF FFFF 0x0 2FFF FFFF 0x0 3FFF FFFF 0x0 43FF FFFF 0x0 47FF FFFF 0x0 487F FFFF 0x0 48FF FFFF 0x0 497F FFFF 0x0 49FF FFFF 0x0 4A7F FFFF 0x0 4AFF FFFF 0x0 4CFF FFFF 0x0 4D7F FFFF 0x0 4DFF FFFF 0x0 4E7F FFFF
Size 2 MB 6 MB 2 MB 6 MB 12 MB 2 MB 2 MB
Device NVRAM (TOD) Reserved I/O registers Reserved Bit bucket (read/write null) Boot EPROM Reserved
Bus
256 MB Reserved 256 MB Reserved 64 MB 64 MB 8 MB 8 MB 8 MB 8 MB 8 MB 8 MB 32 MB 8 MB 8 MB 8 MB PCI-to-PCMCIA interface (top slot) PCI-to-PCMCIA interface (bottom slot) Fast Ethernetmemory-mapped IO PA1 memory-mapped IO PA3 memory-mapped IO PA5 memory-mapped IO PA7 memory-mapped IO (rsvd) PA9 memory-mapped IO (rsvd) Reserved PA2 memory-mapped IO PA4 memory-mapped IO PA6 memory-mapped IO
B-23
Memory Maps
Base 0x0 4E80 0000 0x0 4F00 0000 0x0 4F80 0000 0x0 5000 0000 0x0 8000 0000 0x0 9000 0000 0x0 A000 0000 0x0 B000 0000 0x1 0000 0000 0x1 0020 0000
Until 0x0 4EFF FFFF 0x0 4F7F FFFF 0x0 4FFF FFFF 0x0 7FFF FFFF 0x0 8FFF FFFF 0x0 9FFF FFFF 0x0 AFFF FFFF 0x0 FFFF FFFF 0x1 001F FFFF 0x1 FFFF FFFF
Size 8 MB 8 MB 8 MB
Device PA8 memory-mapped IO (rsvd) PA10 memory-mapped IO (rsvd) IO assy memory-mapped IO (rsvd)
Bus
768 MB Reserved 256 MB System SDRAM, PCI byte swapped 256 MB Reserved 256 MB Reserved 1280 MB 2 MB 2MB Reserved PCI I/O address space Reserved
Base 0x0 0000 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1A00 0000 0x0 1A40 0000 0x0 1C00 0000 0x0 1E00 0000 0x0 1E20 0000
Until 0x0 0FFF FFFF
Size 256 MB
Device System SDRAM and packet memory Reserved GT-64120 registers Reserved Internal Flash SIMM Larger Flash SIMM (rsvd) Reserved NVRAM (TOD) Reserved
Bus
0x0 13FF FFFF 64 MB 0x0 141F FFFF 2 MB 0x0 19FF FFFF 14 MB 0x0 1A3F FFFF 0x0 1BFF FFFF 4 MB 28 MB
0x0 1D00 0000 32 MB 0x0 1E1F FFFF 0x0 1E7F FFFF 2 MB 6 MB
B-24
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Base 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000 0x0 1FC0 0000 0x0 1FE0 0000 0x0 2000 0000 0x0 3000 0000 0x0 4000 0000 0x0 4400 0000 0x0 4800 0000 0x0 4880 0000 0x0 4900 0000 0x0 4980 0000 0x0 4A00 0000 0x0 4A80 0000 0x0 4B00 0000 0x0 4D00 0000 0x0 4D80 0000 0x0 4E00 0000 0x0 4E80 0000 0x0 4F00 0000
Until 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF 0x0 1FDF FFFF 0x0 1FFF FFFF 0x0 2FFF FFFF 0x0 3FFF FFFF
Size 2 MB 6 MB 12 MB 2 MB 2 MB 256 MB 256 MB
Device I/O registers Reserved Bit bucket (read/write null) Boot EPROM Reserved Reserved Reserved PCI-to-PCMCIA interface (top slot) PCI-to-PCMCIA interface (bottom slot) Fast Ethernetmemory-mapped IO PA1 memory-mapped IO PA3 memory-mapped IO PA5 memory-mapped IO PA7 memory-mapped IO (rsvd) PA9 memory-mapped IO (rsvd) Reserved PA2 memory-mapped IO PA4 memory-mapped IO PA6 memory-mapped IO PA8 memory-mapped IO (rsvd) PA10 memory-mapped IO (rsvd)
Bus
0x0 43FF FFFF 64 MB 0x0 47FF FFFF 64 MB 0x0 487F FFFF 8 MB 0x0 48FF FFFF 8 MB 0x0 497F FFFF 8 MB 0x0 49FF FFFF 8 MB 0x0 4A7F FFFF 0x0 4AFF FFFF 0x0 4CFF FFFF 0x0 4D7F FFFF 0x0 4DFF FFFF 0x0 4E7F FFFF 0x0 4EFF FFFF 8 MB 8 MB 32 MB 8 MB 8 MB 8 MB 8 MB
0x0 4F7F FFFF 8 MB
B-25
Memory Maps
Base 0x0 4F80 0000 0x0 5000 0000 0x0 8000 0000 0x0 9000 0000 0x0 A000 0000 0x0 B000 0000 0x1 0000 0000 0x1 0020 0000
Until 0x0 4FFF FFFF 0x0 7FFF FFFF 0x0 8FFF FFFF 0x0 9FFF FFFF 0x0 AFFF FFFF 0x0 FFFF FFFF
Size 8 MB 768 MB 256 MB 256 MB 256 MB 256 MB
Device IO assy memory-mapped IO (rsvd) Reserved System SDRAM, PCI byte swapped Reserved Reserved Reserved PCI I/O address space Reserved
Bus
0x1 001F FFFF 2 MB 0xF FFFF FFFF
B-26
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Appendix B
Table B-8: Cisco 7100 Memory Map

Table B-16 Cisco 7100 Memory Map
Memory Base 0x0 0000 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1A00 0000 0x0 1A40 0000 0x0 1C00 0000 0x0 1E00 0000 0x0 1E40 0000 0x0 1E48 0000 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000 0x0 1FC0 0000 0x0 1FE0 0000 0x0 4D00 0000 0x0 4D00 0000 0x0 4D80 0000 0x0 4E00 0000 0x0 4000 0000 0x0 4000 0000 0x0 4800 0000 0x0 4880 0000 0x0 4900 0000 0x0 5000 0000
Memory Limit 0x0 0FFF FFFF 0x0 13FF FFFF >0x0 141F FFFF 0x0 19FF FFFF 0x0 1A3F FFFF 0x0 1BFF FFFF 0x0 1DFF FFFF 0x0 1E3F FFFF 0x0 1E47 FFFF 0x0 1E7F FFFF 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF 0x0 1FDF FFFF 0x0 1FFF FFFF 0x0 4E7F FFFF 0x0 4D7F FFFF 0x0 4DFF FFFF 0x0 4E7F FFFF 0x0 497F FFFF 0x0 47FF FFFF 0x0 487F FFFF 0x0 48FF FFFF 0x0 497F FFFF 0x0 5FFF FFFF
Size 256 MB 62 MB 2 MB 94 MB 4 MB 28 MB 32 MB 4 MB 512 KB 2 MB 6 MB 12 MB 2 MB x MB 24M 8 MB 8 MB 8 MB 24M 128 MB 8 MB 8 MB 8 MB 512 MB
Device Reserved Reserved GT-64120 registers Reserved Internal Flash SIMM Larger Flash SIMM (rsvd) Reserved NVRAM (first socket) NVRAM/TOD (second socket) Reserved I/O registers Reserved Bit bucket (read/write null) Boot EPROM Reserved L0 local PCI bus Slot 1, WAN adapter 1 Slot 3, port adapter 1 Slot 5, service adapter L1 local PCI bus Slot 0, PCMCIA Slot 0, FE0, FE1 Slot 2, WAN adapter 2 Slot 4, port adapter 2 Reserved Packet SDRAM
0x0 6000 0000
0x067FF FFFF
128 MB
Packet SDRAM
B-27
Memory Maps
Table B-16 Cisco 7100 Memory Map (continued)
Memory Base 0x0 6800 0000
Memory Limit 0x0 7FFF FFFF
Size 384 MB
Device Packet SDRAM reserved Code/data SDRAM Code/data SDRAM Code/data SDRAM reserved
0x0 5000 0000 0x1 0000 0000
0x0FFFF FFFF 0x0 001F FFFF
2816 MB 2 MB
Reserved PCI I/O address space
Table B-9: Cisco 6400-NRP Memory Map

Four categories of devices exist: device reserved, memory reserved, undefined, and I/O reserved. A processor reference to a reserved location will generate either a bus error (on a read) or a system controller interrupt (on a write). Both of these are sourced from the system controller. A processor reference to an undefined location will silently return undefined data on a read or will silently accept data on a write. Writing to an undefined location may generate an undesired side effect. Accessing an I/O reserved location will generate an I/O address error interrupt for either a read or a write. Note that the Rev 1 board memory maps have been copied to the end of the document until the Rev 2 boards are functional and have replaced the Rev 1 boards. All registers are big-endian.
Table B-17 Cisco 6400-NRP Memory Map
Memory Base
Memory Limit
Size 128 MB 128 MB 2 MB 94 MB 16 MB 16 MB 2 MB 30 MB 2 MB
Device System DRAM Reserved Galileo GT-64010A registers Reserved Flash SIMM Undefined (decodes to Flash SIMM socket) I/O space Undefined NVRAM (TOD)
0x0 0000 0000 0x0 07FF FFFF 0x0 0800 0000 0x0 13FF FFFF 0x0 1400 0000 0x0 141F FFFF 0x0 1420 0000 0x0 19FF FFFF 0x0 1A00 0000 0x0 1AFF FFFF
0x0 1B00 0000 0x0 1BFF FFFF 0x0 1C00 0000 0x0 1C1F FFFF 0x0 1C20 0000 0x0 1DFF FFFF 0x0 1E00 0000 0x0 1E1F FFFF
B-28
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Table B-17 Cisco 6400-NRP Memory Map (continued)
Memory Base
Memory Limit
Size 6 MB 4 MB 18 MB 2 MB 642 MB 8 MB 8 MB 8 MB 8 MB 8 MB 8 MB 4 MB 4 MB 4 MB 4 MB 320 MB 2 MB About 1.5 GB 128 MB About 2 GB 4 MB
Device Reserved Boot Flash Reserved Boot EPROM space Reserved BPE Ethernet controller NME Ethernet controller CSE Ethernet controller Undefined (PCI bus timeout) SAR Undefined (PCI bus timeout) PCI packet memory, no byte swap Undefined (PCI bus timeout) PCI packet memory, byte swap Undefined (PCI bus timeout) Reserved PCI I/O address space Reserved PCI bus access to DRAM with byte swap Reserved CPU packet memory, no byte swap
0x0 1E20 0000 0x0 1E7F FFFF 0x0 1E80 0000 0x0 1EBF FFFF 0x0 1EA0 0000 0x0 1FC0 0000 0x0 1FBF FFFF 0x0 1FDF FFFF
0x0 1FE0 0000 0x0 47FF FFFF 0x0 4800 0000 0x0 487F FFFF 0x0 4880 0000 0x0 48FF FFFF 0x0 4900 0000 0x0 497F FFFF 0x0 4980 0000 0x0 49FF FFFF 0x0 4A00 0000 0x0 4A80 0000 0x0 4A7F FFFF 0x0 4AFF FFFF
0x0 4B00 0000 0x0 4B3F FFFF 0x0 4B40 0000 0x0 4B7F FFFF 0x0 4B80 0000 0x0 4BBF FFFF 0x0 4BC0 0000 0x0 4BFF FFFF
0x0 4C00 0000 0x0 5FFF FFFF 0x0 6000 0000 0x0 601F FFFF 0x0 6020 0000 0x0 BFFF FFFF 0x0 C000 0000 0x0 C7FF FFFF 0x0 C800 0000 0x1 4AFF FFFF 0x1 4B00 0000 0x1 4B3F FFFF
B-29
Memory Maps
Table B-17 Cisco 6400-NRP Memory Map (continued)
Memory Base
Memory Limit
Size About 1 GB 4 MB
Device Reserved L2 cache tag test range (Valid only when the L2 cache tag test bit of the control register is set. Otherwise, this space is reserved.) Reserved L2 cache disabled alias for memory space L2 cache controller tag Op 0 (invalidate entry, no writeback) TagOp[0]:1, TagOp[1]: 0 L2 cache controller tag Op 1 (flush all entries, no writeback ) TagOp[0]:0, TagOp[1]: 1
0x1 4B40 0000 0x1 8AFF FFFF 0x1 8B00 0000 0x1 8C3F FFFF
0x1 8C40 0000 0x1 FFFF FFFF 0x2 0000 0000 0x3 FFFF FFFF 0x4 0000 0000 0x7 FFFF FFFF 0x8 0000 0000 0xF FFFF FFFF
About 2 GB 8 GB 16 GB
32 GB
Table B-18 System Memory Map Detailed
Memory Base
Memory Limit
Size
Device System DRAM Reserved Galileo GT-64010A registers CPU interface configuration RAS[1:0] low decode address RAS[1:0] high decode address RAS[3:2] low decode address RAS[3:2] high decode address CS[2:0] low decode address CS[2:0] high decode address CS[3] and BootCS low decode address CS[3] and BootCS high decode address PCI I/O low decode address PCI I/O high decode address PCI memory low decode address PCI memory high decode address Internal space decode BUS error address low
0x0 0000 0000 0x0 07FF FFFF 128 MB 0x0 0800 0000 0x0 13FF FFFF 128 MB 0x0 1400 0000 0x0 141F FFFF 2 MB 0x0 1400 0000 0x0 1400 0007 0x0 1400 0008 0x0 1400 000F 0x0 1400 0010 0x0 1400 0017 0x0 1400 0018 0x0 1400 001F 0x0 1400 0020 0x0 1400 0027 0x0 1400 0028 0x0 1400 002F 0x0 1400 0030 0x0 1400 0037 0x0 1400 0038 0x0 1400 003F 0x0 1400 0040 0x0 1400 0047 0x0 1400 0048 0x0 1400 004F 0x0 1400 0050 0x0 1400 0057 0x0 1400 0058 0x0 1400 005F 0x0 1400 0060 0x0 1400 0067 0x0 1400 0068 0x0 1400 006F 0x0 1400 0070 0x0 1400 0077 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes
B-30
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Appendix B
Table B-18 System Memory Map Detailed (continued)
Memory Base
Memory Limit
Size 8 bytes 896 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 908 bytes 4 bytes 4 bytes 4 bytes
Device BUS error address high Undefined RAS[0] low decode address RAS[0] high decode address RAS[1] low decode address RAS[1] high decode address RAS[2] low decode address RAS[2] high decode address RAS[3] low decode address RAS[3] high decode address CS[0] low decode address CS[0] high decode address CS[1] low decode address CS[1] high decode address CS[2] low decode address CS[2] high decode address CS[3] low decode address CS[3] high decode address BootCS low decode address BootCS high decode address DRAM configuration DRAM Bank0 parameters DRAM Bank1 parameters DRAM Bank2 parameters DRAM Bank3 parameters Device Bank0 parameters Device Bank1 parameters Device Bank2 parameters Device Bank3 parameters Device boot bank parameters Address decode error Undefined Channel 0 DMA byte count Channel 1 DMA byte count Channel 2 DMA byte count Channel 3 DMA byte count
0x0 1400 0078 0x0 1400 007F 0x0 1400 0080 0x0 1400 03FF 0x0 1400 0400 0x0 1400 0403 0x0 1400 0404 0x0 1400 0407 0x0 1400 040C 0x0 1400 040F 0x0 1400 0410 0x0 1400 0413 0x0 1400 0414 0x0 1400 0417 0x0 1400 041C 0x0 1400 041F 0x0 1400 0420 0x0 1400 0423 0x0 1400 0424 0x0 1400 0427 0x0 1400 042C 0x0 1400 042F 0x0 1400 0430 0x0 1400 0433 0x0 1400 0434 0x0 1400 0437 0x0 1400 043C 0x0 1400 043F 0x0 1400 0440 0x0 1400 0443 0x0 1400 0444 0x0 1400 0447 0x0 1400 0448 044B 0x0 1400 044C 0x0 1400 044F 0x0 1400 0450 0x0 1400 0453 0x0 1400 0454 0x0 1400 0457 0x0 1400 045C 0x0 1400 045F 0x0 1400 0460 0x0 1400 0463 0x0 1400 0464 0x0 1400 0467 0x0 1400 046C 0x0 1400 046F 0x0 1400 0470 0x0 1400 0473 0x0 1400 0474 0x0 1400 07FF 0x0 1400 0800 0x0 1400 0803 0x0 1400 0804 0x0 1400 0807 0x0 1400 080C 0x0 1400 080F
0x0 1400 0408 0x0 1400 040B 4 bytes
0x0 1400 0418 0x0 1400 041B 4 bytes
0x0 1400 0428 0x0 1400 042B 4 bytes
0x0 1400 0438 0x0 1400 043B 4 bytes
0x0 1400 0458 0x0 1400 045B 4 bytes
0x0 1400 0468 0x0 1400 046B 4 bytes
0x0 1400 0808 0x0 1400 080B 4 bytes
B-31
Memory Maps
Memory Base
Memory Limit
Size 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes
Device Channel 0 DMA source address Channel 1 DMA source address Channel 2 DMA source address Channel 3 DMA source address Channel 0 DMA destination address Channel 1 DMA destination address Channel 2 DMA destination address Channel 3 DMA destination address Channel 0 DMA next record pointer Channel 1 DMA next record pointer Channel 2 DMA next record pointer Channel 3 DMA next record pointer Channel 0 DMA control Channel 1 DMA control Channel 2 DMA control Channel 3 DMA control Timer/counter 0 Timer/counter 1 Timer/counter 2 Timer/counter 3 DMA arbiter control Timer/counter control Undefined PCI command PCI time out and retry PCI RAS[1:0] bank size PCI RAS[3:2] bank size PCI CS[2:0] bank size PCI CS[3] and boot CS bank size Interrupt cause
0x0 1400 0810 0x0 1400 0813 0x0 1400 0814 0x0 1400 0817 0x0 1400 081C 0x0 1400 081F 0x0 1400 0820 0x0 1400 0823 0x0 1400 0824 0x0 1400 0827
0x0 1400 0818 0x0 1400 081B 4 bytes
0x0 1400 0828 0x0 1400 082B 4 bytes 0x0 1400 082C 0x0 1400 082F 0x0 1400 0830 0x0 1400 0833 0x0 1400 0834 0x0 1400 0837 4 bytes 4 bytes 4 bytes
0x0 1400 0838 0x0 1400 083B 4 bytes 0x0 1400 083C 0x0 1400 083F 0x0 1400 0840 0x0 1400 0843 0x0 1400 0844 0x0 1400 0847 0x0 1400 084C 0x0 1400 084F 0x0 1400 0850 0x0 1400 0853 0x0 1400 0854 0x0 1400 0857 0x0 1400 085C 0x0 1400 085F 0x0 1400 0860 0x0 1400 0863 0x0 1400 0864 0x0 1400 0867 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes 4 bytes
0x0 1400 0848 0x0 1400 084B 4 bytes
0x0 1400 0858 0x0 1400 085B 4 bytes
0x0 1400 0868 0x0 1400 0BFF 920 bytes 0x0 1400 0C00 0x0 1400 0C03 4 bytes 0x0 1400 0C04 0x0 1400 0C07 4 bytes 0x0 1400 0C08 0x0 1400 0C0B 4 bytes 0x0 1400 0C0C 0x0 1400 0C0F 4 bytes
0x0 1400 0C10 0x0 1400 0C13 4 bytes 0x0 1400 0C14 0x0 1400 0C17 4 bytes 0x0 1400 0C18 0x0 1400 0C1B 4 bytes
B-32
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Appendix B
Memory Base 0x0 1400 0C1C
Memory Limit
Size
Device CPU mask Undefined PCI mask PCI SErr mask Undefined PCI interrupt acknowledge Undefined PCI configuration address PCI configuration data Undefined Reserved Flash SIMM I/O space NRP-1 config register NRP-1 control register Reset reason register Interrupt status register Interrupt mask register EHSA register Watchdog register LED register MICE register PMPCI FPGA program register Network interface control register I/O reserved IDPROM (2 KB size, byte access on word boundary) I/O reserved
0x0 1400 0C1F 4 bytes
0x0 1400 0C20 0x0 1400 0C23 4 bytes 0x0 1400 0C24 0x0 1400 0C27 4 bytes 0x0 1400 0C28 0x0 1400 0C2B 4 bytes 0x0 1400 0C2C 0x0 1400 0C33 8 bytes
0x0 1400 0C34 0x0 1400 0C37 4 bytes 0x0 1400 0C38 0x0 1400 0CF7 192 bytes 0x0 1400 0CF8 0x0 1400 0CFB 4 bytes 0x0 1400 0CFC 0x0 1400 0CFF 4 bytes
0x0 1400 0D00 0x0 141F FFFF About 2044 KB 0x0 1420 0000 0x0 19FF FFFF 94 MB 0x0 1A00 0000 0x0 1BFF FFFF 32 MB 0x0 1C00 0000 0x0 1C1F FFFF 2 MB 0x0 1C00 0000 0x0 1C00 0003 4 bytes 0x0 1C00 0004 0x0 1C00 0007 4 bytes 0x0 1C00 0008 0x0 1C00 000B 4 bytes 0x0 1C00 000C 0x0 1C00 000F 4 bytes
0x0 1C00 0010 0x0 1C00 0013 4 bytes 0x0 1C00 0014 0x0 1C00 0017 4 bytes 0x0 1C00 0018 0x0 1C00 001B 4 bytes 0x0 1C00 001C 0x0 1C00 001F 4 bytes
0x0 1C00 0020 0x0 1C00 0023 4 bytes 0x0 1C00 0024 0x0 1C00 0027 4 bytes 0x0 1C00 0028 0x0 1C00 002F 4 bytes 0x0 1C00 0030 0x0 1C00 FFFF 64 KB 0x0 1C01 0000 0x0 1C01 1FFF 8 KB 0x0 1C01 2000 0x0 1C02 FFFF 119 KB
B-33
Memory Maps
Memory Base
Memory Limit
Size
Device PAM bus mailbox memory (2 KB size, byte access on word boundary) Address range accessible only from the NRP-1 processor, not the NSP
0x0 1C03 0000 0x0 1C03 1FFF 8 KB
0x0 1C03 2000 >0x0 1C03 FFFF
55 KB
I/O reserved Undefined Console UART (8-bit device on 64-bit boundary) Console UART mode register (MR1A, MR2A) Undefined Console UARTRead: status register (SRA) Write: clock select register (CSRA)
0x0 1C04 0000 0x0 1C04 0003 4 bytes 0x0 1C04 0000 0x0 1C04 003F 64 bytes 0x0 1C04 0004 0x0 1C04 0004 1 bytes 0x0 1C04 0005 0x0 1C04 000B 7 bytes 0x0 1C04 000C 0x0 1C04 000C 1 bytes
0x0 1C04 000D
0x0 1C04 0013 7 bytes
Undefined Console UARTRead: undefined Write: command register (CRA) Undefined Console UART Read: Rx holding register (RHRA) Write: Tx holding register (THRA)
0x0 1C04 0014 0x0 1C04 0014 1 bytes 0x0 1C04 0015 0x0 1C04 001B 7 bytes 0x0 1C04 001C 0x0 1C04 001C 1 bytes
0x0 1C04 001D
0x0 1C04 0023 7 bytes
Undefined Console UART Read: input port change register (IPCR) Write: aux control register (ACR) Undefined Console UARTRead: interrupt status register (ISR) Write: interrupt mask register (IMR)
0x0 1C04 0024 0x0 1C04 0024 1 bytes
0x0 1C04 0025 0x0 1C04 002B 7 bytes 0x0 1C04 002C 0x0 1C04 002C 1 bytes
0x0 1C04 002D
0x0 1C04 0033 7 bytes
Undefined
B-34
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Appendix B
Memory Base
Memory Limit
Size
Device Console UARTRead: counter/timer upper (CTU) Write: C/T upper register (CRUR)
0x0 1C04 0034 0x0 1C04 0034 1 bytes
Undefined Console UART Read: counter/timer lower (CTL) Write: C/T lower register (CTLR)
0x0 1C04 003D
0x0 1C04 0043 7 bytes
Undefined Modem UART Modem UART mode register (MR1B, MR2B) Undefined Modem UARTRead: status register (SRB) Write: clock select register (CSRB)
0x0 1C04 0044 0x0 1C04 007F 64 bytes 0x0 1C04 0044 0x0 1C04 0044 1 bytes 0x0 1C04 0045 0x0 1C04 004B 7 bytes 0x0 1C04 004C 0x0 1C04 004C 1 bytes
0x0 1C04 004D
0x0 1C04 0053 7 bytes
Undefined Modem UART Read: undefined Write: command register (CRB) Undefined Modem UART Read: Rx holding register (RHRB) Write: Tx holding register (THRB)
0x0 1C04 0054 0x0 1C04 0054 1 bytes 0x0 1C04 0055 0x0 1C04 005B 7 bytes 0x0 1C04 005C 0x0 1C04 005C 1 bytes
0x0 1C04 005D
0x0 1C04 0063 7 bytes
Undefined Modem UARTRead: undefined Write: undefined Undefined Modem UARTRead: input port Write: output port conf register (OPCR)
0x0 1C04 0064 0x0 1C04 0064 1 bytes 0x0 1C04 0065 0x0 1C04 006B 7 bytes 0x0 1C04 006C 0x0 1C04 006D 0x0 1C04 006C 1 bytes
0x0 1C04 0073 7 bytes
Undefined
B-35
Memory Maps
Memory Base
Memory Limit
Size
Device Modem UARTRead: start counter command Write: set output port bits command
0x0 1C04 0074 0x0 1C04 0074 1 bytes
Undefined Modem UARTRead: stop counter command Write: reset output port bits command
0x0 1C04 007D
0x0 1C04 007F 3 bytes
Undefined Undefined Undefined NRP-to-NSP control register NSP-to-NRP control register NRP-to-NSP interrupting semaphore NRP-to-NSP interrupting semaphore GP semaphore 0 GP semaphore 1 GP semaphore 2 GP semaphore 3 IDPROM write enable/lock I/O reserved Reserved NVRAM Reserved Boot Flash Reserved Boot EPROM Undefined (boot EPROM decode) Reserved BPE Ethernet controller NME Ethernet controller CSE Ethernet controller
0x0 1C04 0080 0x0 1C04 00FF 64 bytes 0x0 1C04 0100 0x0 1C04 FFFF 64 KB 0x0 1C05 0000 0x0 1C05 0003 4 bytes 0x0 1C05 0004 0x0 1C05 0007 4 bytes 0x0 1C05 0008 0x0 1C05 000B 4 bytes 0x0 1C05 000C 0x0 1C05 000F 4 bytes
0x0 1C05 0010 0x0 1C05 0013 4 bytes 0x0 1C05 0014 0x0 1C05 0017 4 bytes 0x0 1C05 0018 0x0 1C05 001B 4 bytes 0x0 1C05 001C 0x0 1C05 001F 4 bytes
0x0 1C05 0020 0x0 1C05 0023 4 bytes 0x0 1C05 0024 0x0 1C1F FFFF 1.8 MB 0x0 1C02 0000 0x0 1DFF FFFF 32 MB 0x0 1E00 0000 0x0 1E01 FFFF 128 KB 0x0 1E02 0000 0x0 1E7F FFFF 8 MB 0x0 1E80 0000 0x0 1EB FFFF 0x0 1EC0 0000 4 MB 0x0 1FBF FFFF 16 MB
0x0 1FC0 0000 0x0 1FC7 FFFF 512 KB 0x0 1FC8 0000 0x0 1FDF FFFF 1536 KB 0x0 1FE0 0000 0x0 3FFF FFFF 514 MB 0x0 4800 0000 0x0 487F FFFF 8 MB 0x0 4880 0000 0x0 48FF FFFF 8 MB 0x0 4900 0000 0x0 497F FFFF 8 MB
B-36
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Appendix B
Memory Base
Memory Limit
Size
Device Undefined (PCI bus timeout) SAR Undefined (PCI bus timeout) PCI packet memory, no byte swap Undefined (PCI bus timeout) PCI packet memory, byte swap Undefined (PCI bus timeout) Reserved PCI I/O address space Reserved PCI bus access to DRAM with byte swap Reserved CPU packet memory, no byte swap Reserved L2 cache disabled alias for memory space L2 cache controller tag Op 0 (invalidate entry) L2 cache controller tag Op 1 (flush entry)
0x0 4980 0000 0x0 49FF FFFF 8 MB 0x0 4A00 0000 0x0 4A7F FFFF 8 MB 0x0 4A80 0000 0x0 4AFF FFFF 8 MB 0x0 4B00 0000 0x0 4B3F FFFF 4 MB 0x0 4B40 0000 0x0 4B7F FFFF 4 MB 0x0 4B80 0000 0x0 4BBF FFFF 4 MB
0x0 4C00 0000 0x0 4CFF FFFF 16 MB 0x0 4D00 0000 0x0 5FFF FFFF 320 MB 0x0 6000 0000 0x0 601F FFFF 2 MB 0x0 6020 0000 0x0 BFFF FFFF About 1.5 GB 0x0 C000 0000 0x0 C7FF FFFF 128 MB 0x0 C800 0000 0x1 4AFF FFFF About 2 GB 0x1 4B00 0000 0x1 4B3F FFFF 4 MB 0x1 4B40 0000 0x1 FFFF FFFF About 3 GB 0x2 0000 0000 0x3 FFFF FFFF 8 GB 0x4 0000 0000 0x7 FFFF FFFF 16 GB 0x8 0000 0000 0xF FFFF FFFF 32 GB
Table B-10: Cisco 6400-NSP Memory Map

All registers and memories on the NSP switch card reside in the MEMD (CPU-Switch bus) space of the NSP processor card. Table B-10 lists all addresses that the NSP-SC decodes for itself or for other cards that it interfaces with. Note that all accesses are 32 bits.
Table B-19 Cisco 6400-NSP Memory Map
MEMD Address 0800 0000 0800 0080 0800 0100 0800 0110 0800 0200 0800 0200 0800 007C 0800 00FC 0800 010C 0800 01FC 0800 02D4
Description MMC switch controller registers Reserved Accordian registers Reserved NSP-SC registers Redundancy control
Bits Used 31:0 31:0
31:16
B-37
Memory Maps
Table B-19 Cisco 6400-NSP Memory Map (continued)
MEMD Address 0800 0204 0800 0208 0800 020C 0800 0210 0800 0214 0800 0280 0800 0284 0800 0288 0800 028C 0800 0290 0800 0294 0800 0298 0800 029C 0808 0000 0808 2000 0818 0000 0818 0080 0828 0000 082A 0000 0830 0000 0880 0000 08C0 0000 0900 0000 0807 FFFC 0808 1FFC 0817 FFFC 0818 007C 0827 FFFC 0829 FFFC 082F FFFC 087F FFFC 08BF FFFC 08FF FFFC 0FFF FFFC
Description Redundancy active Linecard sense Linecard ready NSP/PEM/fan sense NSP/PEM/fan ready Slot ID EHSA control Mastership NRP processor resets Network timing BITS clock receiver Power adjust Reserved NSP-SC ID PROM (2 K 8) Reserved BPE Ethernet controller Reserved BPE Ethernet packet buffer SRAM Reserved NSP feature card PAM bus X (linecards/NRPs 0 to 7) PAM bus Y (linecards/NRPs 8 to 15) Reserved
Bits Used 31:16 31:16 31:16 19:16 19:16 16 19:16 16 31:16 17:16 18:16 17:16 31:24 31:0 31:0 31:0 31:0 31:0
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Type System memory
Address Range 0x00000000 to 0x007FFFFF 0x00800000 to 0x01FFFFFF
Description System DRAM (8 MB) Reserved (24 MB) PCMCIA controller Reserved Ethernet 1 (10BaseT) Ethernet 2 (10Base2) Reserved TNETA1570 (SAR) Reserved System controller Tuple Memory space Reserved Tuple
0x02000000 to 0x0FFFFFFF Reserved PCI I/O space PCI memory space 0x10000000 to 0x10000003 0x10000004 to 0x11FFFFFF 0x12000000 to 0x1200001F 0x12000020 to 0x1200003F 0x12000040 to 0x120FFFFF 0x12100000 to 0x121FFFFF 0x12200000 to 0x13FFFFFF GT64011 PCMCIA slot 0 0x14000000 to 0x141FFFFF 0x15000000 to 0x15FFFFFF 0x16000000 to 0x17400000 0x17400000 to 0x17FFFFFF PCMCIA slot 1 0x18000000 to 0x18FFFFFF
0x19000000 to 0x1A3FFFFF Memory space 0x1B000000 to 0x1BFFFFFF Reserved Local GT bus 0x1C000000 to 0x1C7FFFFF (CS0) DUART 0x1C800000 to 0x1CFFFFFF (CS1) NVRAM/TOD 0x1D000000 to 0x1DFFFFFF (CS2) Internal Flash SIMM 0x1F000000 to 0x1FBFFFFF (CS3) IO FPGA 0x1FC00000 to 0x1FFFFFFF (BootCS) Boot EPROM 0x20000000 to 0x3FFFFFFF Reserved PCMICA mapped space 0x40000000 to 0x43FFFFFF 0x44000000 to 0x47FFFFFF 0x48000000 to 0xFFFFFF PCMCIA slot 0 PCMICA slot 1 Reserved

Type System memory
Address Range 0x00000000 to 0x03F00000 0x04000000 to 0x07F00000
Description System DRAM (64 MB) Reserved (64 MB)
B-39
Memory Maps
Type PCI memory space two
Address Range 0x08000000 to 0x0BFFFFFF 0x0C000000 to 0x0CFFFFFF 0x0D000000 to 0x0D7FFFFF 0x0D800000 to 0x0D8000FF 0x0D900000 to 0x0D9027FF 0x0DA00000 to 0x0DA01FFF 0x0DB00000 to 0x0DB003FF 0x0DB00400 to 0x0FFFFFFF
Description Switch cell buffer memory (64 MB) Switch header table memory (16 MB) Switch link memory (8 MB) Switch registers (64 MB) Queue memory Modem input queue count memory Shaper memory Reserved Reserved AM79C970A (10BastT Ethernet) Reserved IDT77252 SAR internal registers IDT77252 SAR external SRAM Upstream FPGA Downstream FPGA System controller Reserved (CS0) DUARTconsole and aux (CS1) NVRAM/TOD (CS2) Flash SIMM Reserved
PCI I/O space PCI memory space one
0x10000000 to 0x11FFFFFF 0x12000000 to 0x1200001F 0x12000020 to 0x12000FFF 0x12001000 to 0x12001FFF 0x12100000 to 0x124FFFFF 0x13000000 to 0x137FFFFF 0x13800000 to 0x13FFFFFF
GT64121
0x14000000 to 0x141FFFFF 0x14200000 to 0x1BFFFFFF
Local GT bus
0x1C000000 to 0x1C7FFFFF 0x1C800000 to 0x1CFFFFFF 0x1D000000 to 0x1DFFFFFF 0x1E000000 to 0x1EFFFFFF
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Type
Address Range 0x1F000000 to 0x1F1FFFFF 0x1F200000 to 0x1F200007 0x1F200008 to 0x1F3FFFFF 0x1F400000 to 0x1F7FFFFF 0x1F800000 to 0x1FBFFFFF 0x1FC00000 to 0x1FFFFFFF 0x20000000 to 0xFFFFFFFF
Description (CS3) CP EPLD (CS3) PCF8584 I2C controller Reserved (CS3) Bootflash Reserved (BootCS) Boot EPROMROM MON Reserved
B-41
Memory Maps

Address 00000000 to 0003FFFF 00040000 to 00FFFFFF 00040000 to 003FFFFF 00040000 to 00FFFFFF 01000000 to 01FFFFFF 01000000 to 010FFFFF 01000000 to 011FFFFF 01000000 to 013FFFFF 01000000 to 017FFFFF 02000000 to 02FFFFFF 02020000 03000000 to 03FFFFFF 03000000 to 031FFFFF 03000000 to 033FFFFF 03000000 to 037FFFFF 05000000 06000000 to 06FFFFFF 06000000 to 060FFFFF 06000000 to 063FFFFF
Bit Width Description 32 32 System SRAM System DRAM memory (SIMMs) 4 MB 16 MB 16 Boot EPROM 1 MB 2 MB 4 MB 8 MB 8 or 32 Onboard resources System I/O 32 Flash memory EPROM or EPROM 2 MB 4 MB 8 MB System DRAM 32 Shared (I/O) memory 1 MB 4 MB
Comments 256 KB, fixed; 0 wait read, 1 wait write 8-, 16-, 32-bit unaligned access supported; 4, 8, 16, or 32 MB
2 MB, fixed
32-bit read/write access
Upper 16 MB of 32-MB configuration 8-, 16-, 32-bit unaligned access supported; 1 to 16 MB
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Address 06000000 to 067FFFFF 04000000 to 05FFFFFF 07000000 to 07FFFFFF 08000000 to 08FFFFFF 08000000 to 080FFFFF 08100000 to 081FFFFF 08200000 to 082FFFFF
1.
Bit Width Description 8 MB Undefined Undefined 32 16 16 16 I/O expansion NIM at I/O expansion slot 1 NIM at I/O expansion slot 2 NIM at I/O expansion slot 3
Comments
NIM slots 16-bit aligned access only 16-bit aligned access only 16-bit aligned access only
Only the Cisco 4000-M supports 32 MB DRAM. The 32-MB configuration is split into two discontiguous pieces, with the upper 16 MB mapped to begin at location 05000000. Only the Cisco 4000-M supports 8 MB Flash memory.
2.
Table B-23 Cisco 4000 Memory Map of Onboard Resources
Address 02000000 to 0201FFFF 02110000 02110002 02110040 to 0211005F 02110100 02120000 02120040 02120100 to 0212013F
Bit Width Description 8
Comments
NVRAM battery backed-up 128 KB, fixed; also CMOS SRAM accommodates 32 KB 8 and 8 KB 8 System status and control registers Hardware revision System ID PROM cookie Shared memory control register Counter timer Counter interrupt control register Control serial I/O 24 bytes
32
8 32 8 8 8
B-43
Memory Maps
Table B-14: Cisco 4500, 4500-M, 4700, 4700-M Memory Map

Table B-24 Cisco 4500, 4500-M, 4700, 4700-M Memory Map
Address 60000000 to 61FFFFFF 60000000 to 607FFFFF 60000000 to 60FFFFFF 60000000 to 61FFFFFF BFC00000 to BFC7FFFF BFC00000 to BFC1FFFF BFC00000 to BFC7FFFF 3E000000 to 3EFFFFFF 30000000 to 30FFFFFF 30000000 to 303FFFFF 30000000 to 307FFFFF 30000000 to 30FFFFFF 38000000 to 387FFFFF 38000000 to 383FFFFF 38000000 to 387FFFFF 40000000 to 40FFFFFF 40000000 to 403FFFFF 40000000 to 40FFFFFF
Bit Width Description 64 System DRAM 8 MB 16 MB 32 MB 8 Boot EPROM 128 KB 512 KB 8 32 Onboard resources System Flash memory EPROM 4 MB 8 MB 16 MB 32 Boot Flash memory EPROM 4 MB 8 MB 32 Shared memory 4 MB 16 MB
Comments Capable of 8- to 64-bit access, cached
8-, 16-, 32-bit access
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Appendix B
Table B-25 Cisco 4500, 4500-M, 4700, 4700-M Memory Map of Onboard Resources
Address 3E000000 to 3E07FFFF 3E000000 to 3E01FFFF 3E000000 to 3E07FFFF 3E000000 3E800400
Bit Width 8 8 8 8 8
Description NVRAM 128 KB 512 KB Time of day clock System ID PROM cookie
Comments Battery backed-up SRAM
B-45
Memory Maps

Memory Base 0x0 0000 0000 0x0 0400 0000 0x0 1400 0000 0x0 1E80 0000
Memory Limit 0x0 0FFF FFFF 0x0 14FF FFFF
Size
Device Reserved GT64010 registers Board registers, DUART Bit bucket ROM monitor
0x0 03FF FFFF Up to 32 Mb Main DRAM (four 72 -pin simms)
0x0 1E9F FFFF Up to 1 MB Up to 1 MB
0x0 1EC0 0000 0x0 1EFF FFFF Up to 1 MB 0x0 1FC0 0000 0x0 1FDF FFFF 0x0 3000 0000 0x0 4000 0000 0x0 4400 0000
0x0 1FE0 0000 0x0 1FFF FFFF Up to 64 KB NVRAM 0x0 3FFF FFFF Up to 48 MB Main Flash (two 80-pin simms) 0x0 43FF FFFF Up to 64 MB PCMCIA slot 1 0x0 47FF FFFF Up to 64 MB PCMCIA slot 2 PM 0, PCI memory PM 1, PCI memory Up to 8 MB
0x0 4D00 0000 0x0 4D7F FFFF Up to 8 MB 0x0 4D80 0000 0x0 4DFF FFFF 0x1 0000 0000 0x1 0000 8000
0x1 0000 7FFF Up to 32 KB General PCI I/O 0x1 0000 9FFF Up to 8 KB PM 0, PCI I/O PM 1, PCI I/O
0x1 0000 A000 0x1 0000 BFFF Up to 8 KB

Memory Base 0x0 0000 0000 0x0 0800 0000 0x0 1400 0000 0x0 1E80 0000 0x0 1EC0 0000 0x0 1FC0 0000 0x0 1FE0 0000 0x0 3000 0000 0x0 4000 0000 0x0 4400 0000 0x0 4D00 0000 0x0 4D80 0000
Memory Limit
Size
Device
0x0 07FF FFFF Up to 64 Mb Main DRAM (four 72-pin simms) 0x0 0FFF FFFF 0x0 14FF FFFF 0x0 1E9F FFFF Up to 1 MB 0x0 1EFF FFFF Up to 1 MB 0x0 1FDF FFFF Up to 1 MB 0x0 1FFF FFFF Up to 1 MB Reserved GT64010 registers Board registers, DUART test CS Bit bucket ROM monitor NVRAM
0x0 3FFF FFFF Up to 48 MB Main Flash (two 80-pin simms) 0x0 43FF FFFF Up to 64 MB PCMCIA slot 0 0x0 47FF FFFF Up to 64 MB PCMCIA slot 1 0x0 4D7F FFFF Up to 8 MB 0x0 4DFF FFFF Up to 8 MB PM 0, PCI memory PM 2, PCI memory
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Memory Base 0x0 4E00 0000 0x0 4E80 0000 0x1 0000 0000 0x1 0000 8000 0x1 0000 A000 0x1 0000 C000 0x1 0000 E000
Memory Limit
Size
Device PM 1, PCI memory PM 3, PCI memory PM 0, PCI I/O PM 2, PCI I/O PM 1, PCI I/O PM 3, PCI I/O
0x0 4E7F FFFF Up to 8 MB 0x0 4EFF FFFF Up to 8 MB 0x1 0000 7FFF 0x1 0000 9FFF Up to 8 KB
Up to 32 KB General PCI I/O
0x1 0000 BFFF Up to 8 KB 0x1 0000 DFFF Up to 8 KB 0x1 0000 FFFF Up to 8 KB
B-47
Memory Maps

Memory Base
Memory Limit
Size
Device Main SDRAM (two 168-pin dimms) GT64120 registers Bit bucket Board registers DUART ROM monitor NVRAM TDM switch
0x0 0000 0000 0x0 0FFF FFFF Up to 128 Mb 0x0 1400 0000 0x0 14FF FFFF 0x0 1E00 0000 0x0 1E7F FFFF Up to 8 MB 0x0 1E80 0000 0x0 1E83 FFFF Up to 1 MB 0x0 1E84 0000 0x0 1E84 FFFF Up to 1 MB 0x0 1FC0 0000 0x0 1FDF FFFF Up to 1 MB
0x0 1FE0 0000 0x0 1FFF FFFF Up to 64 KB 0x0 3C00 0000 0x0 3C0F FFFF Up to 1 MB
0x0 3000 0000 0x0 33FF FFFF Up to 64 MB Main Flash (two 80-pin simms)
0x0 4000 0000 0x0 43FF FFFF Up to 64 MB PCMCIA slot 0 0x0 4400 0000 0x0 47FF FFFF Up to 64 MB PCMCIA slot 1 0x0 4800 0000 0x0 487F FFFF Up to 8 MB 0x0 4880 0000 0x0 48FF FFFF Up to 8 MB 0x0 4A00 0000 0x0 4A7F FFFF 0x0 4A80 0000 0x0 4AFF FFFF 0x0 4D00 0000 0x0 4D7F FFFF 0x0 4D80 0000 0x0 4DFF FFFF 0x0 4E80 0000 0x0 4EFF FFFF Up to 8 MB Up to 8 MB Up to 8 MB Up to 8 MB FE 0/0, PCI memory FE 0/1, PCI memory AIM 0, PCI memory AIM 1, PCI memory NM 1, PCI memory NM 3, PCI memory NM 2, PCI memory NM 4, PCI memory NM 5, PCI memory NM 6, PCI memory General PCI I/O AIM 0, PCI I/O AIM 1, PCI I/O NM 1, PCI I/O NM 3, PCI I/O NM 2, PCI I/O NM 4, PCI I/O
0x0 4E00 0000 0x0 4E7F FFFF Up to 8 MB Up to 8 MB
0x0 4F00 0000 0x0 4F7F FFFF Up to 8 MB 0x0 4F80 0000 0x0 4FFF FFFF Up to 8 MB 0x1 0000 0000 0x1 0000 7FFF Up to 32 KB 0x1 0000 8000 0x1 0000 9FFF Up to 8 KB 0x1 0000 A000 0x1 0000 BFFF Up to 8 KB 0x1 0020 0000 0x1 0020 1FFF Up to 8 KB 0x1 0020 2000 0x1 0020 3FFF Up to 8 KB 0x1 0020 4000 0x1 0020 5FFF Up to 8 KB 0x1 0020 6000 0x1 0020 7FFF Up to 8 KB
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Memory Base
Memory Limit
Size
Device NM 5, PCI I/O NM 6, PCI I/O
0x1 0020 8000 0x1 0020 9FFF Up to 8 KB 0x1 0020 A000 0x1 0020 BFFF Up to 8 KB
B-49
Memory Maps

Memory Base 0x0000 0000 0x4000 0000 0x6000 0000 0x6700 0000 0x6800 0000 0x6801 0000 0x8000 0000
Memory Limit 0x03FF FFFF 0x4FFF FFFF 0x60FF FFFF 0x67FF FFFF 0x6800 FFFF 0x6801 FFFF 0x83FF FFFF
Size Up to 64 Mb 16 Mb Up to 16 Mb 64 Kb 64 Kb Up to 64 Mb
Device Physical address space PCI memory space Flash NVRAM, WIC, internal regs PCI config/IO spze PowerQUICC regs Virtual address space

Address 00000000 to 00FFFFFF 00000000 to 001FFFFF 00000000 to 003FFFFF 00000000 to 007FFFFF 00000000 to 00FFFFFF 00000000 to 001FFFFF 00000000 to 001FFFFF 01000000 to 011FFFFF 01000000 to 011FFFFF 02000000 to 0201FFFF 02000000 to 02007FFF 02000000 to 0201FFFF
Bit Width Description 32 32 32 32 32 8/16 DRAM DRAM 2 MB DRAM 4 MB DRAM 8 MB DRAM 16 MB Boot Flash memory
Comments 2, 4, 8, or 16 MB
1 or 2 MB, when Flash memory PCMCIA card is not installed
16 16
Flash memory PCMCIA Boot mode card Boot EPROMs for ROM 1 or 2 MB ROM; 2 MB monitor and RXBOOT Flash memory images Flash memory PCMCIA When installed card Configuration NVRAM 32 or 128 KB Configuration NVRAM (32 KB) Configuration NVRAM (128 KB)
continues
16 8 8 8
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Address 02100000 to 0213FFFF 03000000 to 03FFFFFF 03000000 to 033FFFFF 03000000 to 037FFFFF 03000000 to 03FFFFFF 08000000 to 081FFFFF
Bit Width Description 8/16 32 32 32 32 8/16 Onboard I/O registers and chips Flash memory RAM (SIMMs) Flash memory RAM (4 MB) Flash memory RAM (8 MB) Flash memory RAM (16 MB)
Comments
4, 8, or 16 MB
Onboard boot EPROMs 1 or 2 MB, when (remapped) PCMCIA Flash memory card is installed
B-51
Memory Maps

Memory Base 0x0000 0000 0x4000 0000 0x5000 0000 0x5008 0000 0x6000 0000 0x6800 0000 0x7000 0000 0xFF00 0000 0xFFF0 0000
Memory Limit 0x027F FFFF 0x5000 0FFF 0x5008 0FFF
Size 40 Mb
Device DRAM PCI memory space Compression Encryption Flash NVRAM, WIC, internal regs Q-SPAN regs PowerQUICC regs Boot ROM
0x4FFF FFFF 64 Mb
0x63FF FFFF 64 Mb reserved; 16 Mb used 0x68FF FFFF 64 Kb 0x7000 FFFF 0xFF00 3FFF 4 Kb 16 Kb
0xFFFF FFFF 1 Mb

Item ROM RAM ROM (d flag) PC card (Flash) PC card (attribute) Misc registers NVRAM DPR
Beginning Address 0x00000000 0x2000000 0x04000000 0x08000000 0x09000000 0x0d000000 0x0e000000 0x0ff00000
Ending Address 0x003ffffff 0x03ffffff 0x043fffff 0x08ffffff 0x09ffffff 0x0dffffff 0x0e007fff 0x0ff00fff

Start Address 0x02000000 0x05000000
End Address
Width
CS
DSACK Source
Description SIMM DRAM SIMM DRAM Onboard DRAM Onboard DRAM ROM
0x03FFFFFF LongWor CS1 Internal 0x07FFFFFF d CS2 CS5 CS6
0x04000000
0x043FFFFF
Word
CS0 Internal
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Start Address 0x08000000 0x09000000 0x0A000000 0x0B000000 0x0D000000
End Address
Width
CS
DSACK Source
Description PC card common memory PC card attribute memory PC card PC card Total CS3 address space allocation Dummy cycles location Reserved PC card control registers Reserved Reserved for WIC registers Reserved
continues Reserved
0x08FFFFFF Byte/wor CS4 External d 0x09FFFFFF Byte/wor CS4 External d 0x0AFFFFFF Byte/wor CS4 External d 0x0BFFFFFF Byte/wor CS4 External d 0x0DFFFFFF Byte CS3 External
0x0D010000 0x0D020000 0x0D030000 0x0D040000 0x0D050000 0x0D060000 0x0D070000 0x0D080000 0x0D080001 0x0D080004 0x0D080005
0x0D01FFFF Byte 0x0D02FFFF Byte 0x0D03FFFF Byte 0x0D04FFFF Byte 0x0D05FFFF Byte 0x0D06FFFF Byte 0x0D07FFFF Byte 0x0D080000 0x0D080001 0x0D080004 0x0D080005 Byte Byte Byte Byte
CS3 External CS3 External CS3 External CS3 External CS3 External CS3 External CS3 External CS3 External CS3 External CS3 External CS3 External
Status register Control register (LEDs) External interrupt mask External interrupt read/clear (wr) NVRAM protect (hex 05 enables writes) Reserved for WIC reset NVRAM PCI register space PCI memory space
0x0D080006
0x0D080006
Byte
CS3 External
0x0D08000F 0x0D880000 0x0E000000 0x0E800000
0x0D08000F
Byte
CS3 External CS3 External
0x0D88FFFF Byte
0x0E7FFFFF LongWor CS7 External d 0x0E8FFFFF LongWor CS7 External d
B-53
Memory Maps
Table B-23: AS5200 Memory Map

Table B-34 AS5200 Memory Map
Start Address 00000000 00000000 00000000 00000000 00000000 00000000 00000000 01000000 01000000 01000000 02000000 02000000 02100000 03000000 03000000 03000000 04000000 08000000
End Address 001FFFFF 003FFFFF 007FFFFF 00FFFFFF 001FFFFF 000FFFFF 001FFFFF 011FFFFF 010FFFFF 011FFFFF 02007FFF 0201FFFF 0218FFFF 033FFFFF 037FFFFF 03FFFFFF 041FFFFF 080FFFFF
Block Name DRAM 2 MB DRAM 4 MB DRAM 8 MB DRAM 16 MB Flash PCMCIA card Boot mode Boot Flash 1 MB Boot mode, no Flash card Boot Flash 2 MB Boot mode, no Flash card FLASH PCMCIA card When installed Boot Flash 1 MB When Flash card is not in Boot Flash 2 MB When Flash card is not in Config RAM 32 K Config RAM 128 K Memory-mapped I/O Flash 4 MB Flash 8 MB Flash 16 MB Reserved when 16 MB DRAM SIMM is installed Boot Flash 1 MB When Flash card is installed
# Bits 32 32 32 32 16 8/16 8/16 16 8/16 8/16 8 8 8/16 32 32 32 32 8/16
Table B-35 I/O Map
Start Address 02100000 02110000 02110002 02110004 02110006
End Address 021001FF 02110001 02110003 02110005 02110007
Block Name Reserved SCR 1 SCR 2 SCR 3 SCR 4
# Bits 16 16 16 16 16
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Table B-35 I/O Map (continued)
Start Address 0211000A 02110010 02110014 02110018 02110019 02110060 02120040 02120050 02120060 02120070 02120100 E 021300 R 021310 02131010 02131012 T 021320 02132100 02132102 02132104 02132106 02134000 02135000 02135002 02135004 02135006 02135008 0213500A 0213500C 0213500E 02135010 02135012 02135014 02135016 02135100 02135180 02135182
End Address 0211000B 02110013 02110017 02110018 02110019 02110060 02120040 02120051 02120061 02120071 0212013F 02130003 0213100F 02131011 02131013 021320FF 02132101 02132103 02132105 02132107 02134001 02135001 02135003 02135005 02135007 02135009 0213500B 0213500D 0213500F 02135011 02135013 02135015 021350FF 0213517F 02135181 02135183
Block Name ASIC REG BP ADDR REG H / L BP MASK REG H / L FC REG/MASK REG BP control reg Cookie reg Counter control reg Counter 0 Counter 1 Counter 2 Ethernet ChA Token Ring ChA Token Ring ChA reg0 Token Ring ChA reg1 DUAL serial ChB Serial 0 modem reg Serial 1 modem reg S0 ack(RD)/LED(wr) S1 ack(RD)/LED(wr) COPAN status reg Motherboard ID Motherboard REV MB config MB Cntl #1 reg MB status reg MB ISR #1 reg MB ISR #2 reg MB Cntl #2 reg MB Cntl #3 reg MB Cntl #4 reg MB IRQ vector reg Reserved Motherboard TDM I/F TDM output disable TDM PLL reg
# Bits 16 16 16 8 8 8 8 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16
2681 DUART (console) continues 8
B-55
Memory Maps
Table B-35 I/O Map (continued)
Start Address 02135184 02136000 02136002 02136004 02138000 02138002 02138004 02138100 02138180 0213A000 0213A002 0213A004 0213A100 0213A180 0213C000 0213C002 0213C004 0213C100 0213C180
End Address 02135FFF 02136001 02136003 02137fff 02138001 02138003 021380FF 0213817F 02139FFF 0213A001 0213A003 0213A0FF 0213A17F 0213BFFF 0213C001 0213C003 0213C0FF 0213C17F 021DFFFF
Block Name Reserved Compress ID Compress REV Reserved for C.M. Slot 0 ID Slot 0 REV Slot 0-specific Slot 0 TDM I/F Slot 0-specific Slot 1 ID Slot 1 REV Slot 1-specific Slot 1 TDM I/F Slot 1-specific Slot 2 ID Slot 2 REV Slot 2-specific Slot 2 TDM I/F Slot 2-specific
# Bits 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16
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Appendix B

Table B-36 AS5300 Memory Map
KUSEG Virtual Address 6000.0000 to 7FFF.FFFF 4000.0000 to 4FFF.FFFF 3000.0000 to 37FF.FFFF 3800.0000 to 3BFF.FFFF 3C00.0000 to 3DFF.FFFF 3E00.0000 to 3E7F.FFFF 3E80.0000 to 3EFF.FFFF 3F00.0000 to 3FFF.FFFF KSEG 0 Virtual Address 8000.0000 to 87FF.FFFF 5000.0000 to 5FFF.FFFF 9000.0000 to 97FF.FFFF 9800.0000 to 9BFF.FFFF 9C00.0000 to 9DFF.FFFF 9E00.0000 to 9E7F.FFFF 9E80.0000 to 9EFF.FFFF 9F00.0000 to 9FFF.FFFF KSEG 1 Virtual Address A000.0000 to A7FF.FFFF A800.0000 to AFFF.FFFF B000.0000 to B7FF.FFFF B800.0000 to BBFF.FFFF BC00.0000 to BDFF.FFFF BE00.0000 to BE7F.FFFF BE80.0000 to BEFF.FFFF BF00.0000 to BFFF.FFFF Physical Address 0000.0000 to 07FF.FFFF 0800.0000 to 0FFF.FFFF 1000.0000 to 17FF.FFFF 1800.0000 to 1BFF.FFFF 1C00.0000 to 1DFF.FFFF 1E00.0000 to 1E7F.FFFF 1E80.0000 to 1EFF.FFFF 1F00.0000 to 1FFF.FFFF Description Main DRAM Shared DRAM System Flash RxBoot Flash Fixed NIM/ slot I/O NVRAM CPU I/O Boot EPROM 16 8 16 8 # Bits 64 32 32 32 Physical Address 0000.0000 to 07FF.FFFF 0800.0000 to 0FFF.FFFF 1000.0000 to 17FF.FFFF 1800.0000 to 1BFF.FFFF 1C00.0000 to 1DFF.FFFF 1E00.0000 to 1E7F.FFFF 1E80.0000 to 1EFF.FFFF 1F00.0000 to 1FFF.FFFF Physical Address 6000.0000 to 7FFF.FFFF 4000.0000 to 4FFF.FFFF 3000.0000 to 37FF.FFFF 3800.0000 to 3BFF.FFFF 3C00.0000 to 3DFF.FFFF 3E00.0000 to 3E7F.FFFF 3E80.0000 to 3EFF.FFFF 3F00.0000 to 3FFF.FFFF Description Main DRAM Shared DRAM System Flash RxBoot Flash Fixed NIM/ slot I/O NVRAM CPU I/O Boot EPROM
continues
# Bits 64 32 32 32 16 8 16 8 # Bits 64 32 32 32 16 8 16 8
Description Main DRAM Shared DRAM System Flash RxBoot Flash Fixed NIM/ slot I/O NVRAM CPU I/O Boot EPROM
B-57
Memory Maps

Table B-37 AS5800 Memory MapNPE-200 Memory Map
Base 0x0 0000 0000 0x0 0800 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1A00 0000 0x0 1A40 0000 0x0 1C00 0000 0x0 1E00 0000 0x0 1E20 0000 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000 0x0 1FC0 0000 0x0 1FE0 0000 0x0 4000 0000 0x0 4400 0000 0x0 4800 0000 0x0 4880 0000 0x0 4900 0000
Until 0x0 07FF FFFF 0x0 0FFF FFFF 0x0 13FF FFFF 0x0 141F FFFF 0x0 19FF FFFF 0x0 1A3F FFFF 0x0 1BFF FFFF 0x0 1D00 0000 0x0 1E1F FFFF 0x0 1E7F FFFF 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF 0x0 1FDF FFFF 0x0 3FFF FFFF 0x0 43FF FFFF 0x0 47FF FFFF 0x0 487F FFFF 0x0 48FF FFFF 0x0 497F FFFF
Size 128 MB 128 MB 62 MB 2 MB 94 MB 4 MB 28 MB 32 MB 2 MB 6 MB 2 MB 6 MB 12 MB 2 MB x MB 64 MB 64 MB 8 MB 8 MB 8 MB
Device System DRAM System DRAM (rsvd) Reserved GT-64010 registers Reserved Internal Flash SIMM Larger Flash SIMM (rsvd) Reserved NVRAM (TOD) Reserved I/O registers Reserved Bit bucket (read/write null) Boot EPROM Reserved PCI-to-PCMCIA interface (top slot) PCI-to-PCMCIA interface (bottom slot) Fast Ethernetmemory-mapped IO PA1 memory-mapped IO PA3 memory-mapped IO
Bus
B-58
1-58705-005-6
Appendix B
Table B-37 AS5800 Memory MapNPE-200 Memory Map (continued)
Base 0x0 4980 0000 0x0 4A00 0000 0x0 4A80 0000 0x0 4B00 0000 0x0 4B40 0000 0x0 4B80 0000 0x0 4BC0 0000 0x0 4C00 0000 0x0 4C40 0000 0x0 4C80 0000 0x0 4CC0 0000 0x0 4D00 0000 0x0 4D80 0000 0x0 4E00 0000 0x0 4E80 0000 0x0 4F00 0000 0x0 4F80 0000 0x0 5000 0000 0x1 0000 0000 0x1 0020 0000 0x1 4B00 0000
Until 0x0 49FF FFFF 0x0 4A7F FFFF 0x0 4AFF FFFF 0x0 4B3F FFFF 0x0 4B7F FFFF 0x0 4BBF FFFF 0x0 4BFF FFFF 0x0 4C3F FFFF 0x0 4C7F FFFF 0x0 4CBF FFFF 0x0 4CFF FFFF 0x0 4D7F FFFF 0x0 4DFF FFFF 0x0 4E7F FFFF 0x0 4EFF FFFF 0x0 4F7F FFFF 0x0 4FFF FFFF 0x0 FFFF FFFF 0x0 001F FFFF 0x1 4B7F FFFF 0x1 4B3F FFFF
Size 8 MB 8 MB 8 MB 4 MB 4 MB 4 MB 4 MB 4 MB 4 MB 4 MB 4 MB 8 MB 8 MB 8 MB 8 MB 8 MB 8 MB x MB 2 MB About 1 GB 4 MB
Device PA5 memory-mapped IO PA7 memory-mapped IO (rsvd) PA9 memory-mapped IO (rsvd) PCI PM, first 4 M, no byte swap PCI PM, larger PM, no swap (rsvd) PCI PM, first 4 M, byte swap PCI PM, larger PM, byte swap (rsvd) PCI alias PM, first 4 M, no byte swap PCI alias PM, larger PM, no swap (rsvd) PCI alias PM, first 4 M, byte swap PCI alias PM, larger PM, byte swap (rsvd) PA2 memory-mapped IO PA4 memory-mapped IO
continues
Bus
PA6 memory-mapped IO PA8 memory-mapped IO (rsvd) PA10 memory-mapped IO (rsvd) IO assy memory-mapped IO (rsvd) Reserved PCI I/O address space Reserved CPU PM, first 4 M, no byte swap
B-59
Memory Maps
Table B-37 AS5800 Memory MapNPE-200 Memory Map (continued)
Base 0x1 4B40 0000 0x1 4B80 0000 0x2 0000 0000 0x4 0000 0000 0x8 0000 0000
Until 0x1 4B7F FFFF 0x1 FFFF FFFF 0x3 FFFF FFFF 0x7 FFFF FFFF 0xF FFFF FFFF
Size 4 MB About 0 GB 8 GB 16 GB 32 GB
Device CPU PM, larger PM, no swap (rsvd) Reserved L2 cache is disabled (alias) for low 8 GB Cache controller tag Op 0 Cache controller tag Op 1
Bus
Table B-38 AS5800 Memory MapDSC Memory Map
Base 0x0 0000 0000 0x0 0400 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1A00 0000 0x0 1A40 0000 0x0 1C00 0000 0x0 1E00 0000 0x0 1E02 0000 0x0 1E20 0000 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000
Until 0x0 03FF0 FFFF 0x0 0FFF FFFF 0x0 13FF FFFF 0x0 141F FFFF 0x0 19FF FFFF 0x0 1A3F FFFF 0x0 1BFF FFFF 0x0 1DFF FFFF 0x0 1E01 FFFF 0x0 1E1F FFFF 0x0 1E7F FFFF 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF
Size 64 MB 192 MB 62 MB 2 MB 94 MB 8 MB 24 MB 32 MB 128 KB About 2 MB 6 MB 2 MB 6 MB 12 MB
Device System DRAM Reserved for larger DRAM Reserved GT-64010 registers Reserved Internal Flash SIMM Reserved: more Flash Reserved NVRAM default config Reserved for larger NVRAM Reserved I/O registers Reserved Reserved
Bus
I/O I/O
I/O I/O
I/O
B-60
1-58705-005-6
Appendix B
Table B-38 AS5800 Memory MapDSC Memory Map (continued)
Base 0x0 1FC0 0000 0x0 1FC8 0000 0x0 1FE0 0000 0x0 4000 0000 0x0 4400 0000 0x0 4800 0000 0x0 4800 0800 0x0 4800 1000 0x0 4800 1800 0x0 4800 2000 0x0 4880 0000 0x0 4C00 0000 0x0 4F80 0000 0x0 5000 0000 0x1 0000 0000 0x1 0020 0000 0x2 0000 0000 0x4 0000 0000 0x8 0000 0000
Until 0x0 1FC7 FFFF 0x0 1FDF FFFF 0x0 3FFF FFFF 0x0 43FF FFFF 0x0 47FF FFFF
Size 512 KB 1536 KB x MB 64 MB 64 MB
Device Boot EPROM Reserved: more EPROM Reserved PCI-to-PCMCIA interface (top slot) PCI-to-PCMCIA interface (bottom slot) Backplane interconnect: Fast Ethernet-0 Backplane interconnect: Fast Ethernet-1 Backplane interconnect: Fast Ethernet-2 (inter-DSC) Front panel 10BaseT MAC
Bus
MB 0 MB 0 MB 0 MB 0 MB 0 MB 0
0x0 4800 07FF 2 KB 0x0 4800 0FFF 2 KB 0x0 4800 17FF 2 KB 0x0 4800 1FFF 2 KB 0x0 487F FFFF 0x0 4BFF FFFF 0x0 4F7F FFFF 0x0 4FFF FFFF 0x0 FFFF FFFF 0x0 001F FFFF 0x1 FFFF FFFF 0x3 FFFF FFFF 0x7 FFFF FFFF 0xF FFFF FFFF About 8 KB 56 MB 56 MB 8 MB x MB 2 MB About 4 GB 8 GB 16 GB 32 GB
Reserved: PCI memory-mapped MB device 0 PCI memory-mapped device (MB1 in trunk cards) PCI memory-mapped device (MB2 in CE1 card) MB 0 MB 0
Reserved: PCI memory-mapped MB device 0 Reserved PCI I/O address space Reserved Aliaslow 8 GB, L2 cache disabled Cache controller tag Op 01 Cache controller tag Op 12 MB 0
1. When this space is accessed, the L2 cache for its alias in low 8 GB is flushed, and the corresponding tag is invalidated. 2. When this space is accessed, the entire L2 cache is flushed and invalidated.
B-61
Memory Maps
Table B-39 AS5800 Memory MapModem Card Memory Map
Base 0x0 0000 0000 0x0 0400 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1A00 0000 0x0 1C00 0000 0x0 1E00 0000 0x0 1E02 0000 0x0 1E20 0000 0x0 1E80 0000 0x0 1EA0 0000 0x0 1F00 0000 0x0 1FC0 0000 0x0 1FC8 0000 0x0 1FE0 0000 0x0 4000 0000 0x0 4800 0000 0x0 4800 0800 0x0 4800 1000 0x0 4800 1900
Until 0x0 03FF0FFFF 0x0 0FFF FFFF 0x0 13FF FFFF 0x0 141F FFFF 0x0 19FF FFFF 0x0 1BFF FFFF 0x0 1DFF FFFF 0x0 1E01 FFFF 0x0 1E1F FFFF 0x0 1E7F FFFF 0x0 1E9F FFFF 0x0 1EFF FFFF 0x0 1FBF FFFF 0x0 1FC7 FFFF 0x0 1FDF FFFF 0x0 3FFF FFFF 0x0 47FF FFFF 0x0 4800 07FF 0x0 4800 0FFF 0x0 4800 18FF 0x0 4800 19FF
Size 64 MB 192 MB 62 MB 2 MB 94 MB 32 MB 32 MB 128 KB About 2 MB 6 MB 2 MB 6 MB 12 MB 512 KB 1536 KB x MB 128 MB 2 KB 2 KB
Device System DRAM Reserved for larger DRAM Reserved GT-64010 registers Reserved Reserved (Flash on DSC) Reserved Reserved (NVRAM on DSC) Reserved Reserved I/O registers Reserved Reserved Boot EPROM Reserved: more EPROM Reserved Reserved (PCMCIA on DSC) Backplane interconnect: Fast Ethernet Tx MAC Backplane interconnect: Fast Ethernet Rx MAC
Bus
I/O
I/O I/O
I/O
I/O I/O
MB 0 MB 0 MB 0 MB 0
About 2 KB Reserved 256 KB
Memory access to PLX9060SD MB runtime registers 0
B-62
1-58705-005-6
Appendix B
Table B-39 AS5800 Memory MapModem Card Memory Map (continued)
Base 0x0 4800 1A00 0x0 4A00 0000 0x0 4C00 0000 0x0 5000 0000 0x1 0000 0000 0x1 0020 0000 0x2 0000 0000 0x4 0000 0000 0x8 0000 0000
Until 0x0 49FF FFFF 0x0 4BFF FFFF 0x0 4FFF FFFF 0x0 FFFF FFFF 0x0 001F FFFF 0x1 FFFF FFFF 0x3 FFFF FFFF 0x7 FFFF FFFF 0xF FFFF FFFF
Size About 32 KB 32 MB 64 MB x MB 2 MB
Device Reserved: PCI memory-mapped device Modem card-specific PCI memory-mapped device
Bus MB 0 MB 0
Reserved PCI memory-mapped MB device 0 Reserved PCI I/O address space MB 0
About 4 GB Reserved 8 GB 16 GB 32 GB Aliaslow 8 GB, L2 cache disabled Cache controller tag Op 01 Cache controller tag Op 12
1. When this space is accessed, the L2 cache for its alias in the low 8 GB is flushed, and the corresponding tag is invalidated. 2. When this space is accessed, the entire L2 cache is flushed and invalidated.
Table B-40 AS5800 Memory MapTrunk Card Memory Map
Base 0x0 0000 0000 0x0 0400 0000 0x0 1000 0000 0x0 1400 0000 0x0 1420 0000 0x0 1500 0000 0x0 1E80 0000 0x0 1E90 0000
Until 0x0 03FF FFFF 0x0 0FFF FFFF 0x0 13FF FFFF 0x0 141F FFFF 0x0 14FF FFFF 0x0 1E7F FFFF 0x0 1E8F FFFF 0x0 1FBF FFFF
Size 64 MB
Device System DRAM
Bus
192 MB Reserved for larger DRAM 62 MB 2 MB X MB X MB 2 MB Generate bus error illegal address Gt64010A registers Legal address decode WatchDog timeout Generate bus error illegal address I/O registers Generate bus error illegal address I/O Interna l
B-63
Memory Maps
Table B-40 AS5800 Memory MapTrunk Card Memory Map (continued)
Base 0x0 1FC0 0000 0x0 1FC8 0000 0x0 1FE0 0000 0x0 4800 0000 0x0 4800 0800 0x0 4800 1000 0x0 4800 2000 0x0 4820 0000 0x0 4830 0000 0x0 487F FFFF 0x0 48C0 0000 0x0 4900 0000
Until 0x0 1FC7 FFFF 0x0 1FDF FFFF 0x0 47FF FFFF 0x0 4800 07FF 0x0 4800 0FFF 0x0 4800 18FF 0x0 4800 2FFF 0x0 482F FFFF 0x0 487F FFFF 0x0 48BF FFFF 0x0 48FF FFFF 0x0 493F FFFF
Size
Device
Bus I/O I/O
512 KB Boot EPROM 1536 KB Reserved for larger EPROM
128 MB Generate bus error illegal address 2 KB 2 KB 2 KB 4 KB 1 MB 5 MB 4 MB 4 MB 4 MB BIC Fast Ethernet-0 BIC Fast Ethernet-1 Reserved Gt64011 Regs PCI memory mapped FDL DRAM PCI memory mapped Future DRAM PCI memory mapped M32x 0 PCI memory mapped M32x 1 PCI memory mapped M32x 2 PCI memory mapped MB0 MB0 MB0 MB0 MB0 MB0 MB1 MB1 MB1
B-64
1-58705-005-6
Appendix B
Table B-26: Cisco 1000, 1003/1004/1005 Memory Map

Table B-41 Cisco 1000, 1003/1004/1005 Memory Map
Address 0000000 to 00FFFFF 2000000 to 2FFFFFF 6000000 to 600FFFF 8000000 to 800FFFF 8010000 to 8FFFFFF C0003E0 to C0003E1 E000000 to E007FFF FF00000 to FF00FFF CPU Space: 003ff00 to 003ff03
Size 1 MB
Chip Select CS0
Description ROM DRAM up to 16 MB PCMCIA I/O space PCMCIA/PC card attribute memory PCMCIA/PC card common memory PCMCIA controller index and data register NVRAM 68360 dual port memory (top 1 MB)
16 MB CS1, 2 64 Kb CS6
16 MB CS5 16 MB CS5 64 Kb 32 Kb 1 MB CS4 CS7 360DPR
4 bytes
MBAR for 68360
Table B-27: VIP2 Memory Map

Table B-42 VIP2 Memory Map
Physical Address 0000 0000 to 07FF FFFF 0800 0000 to 0FFF FFFF 1000 0000 to 1003 FFFF 1004 0000 to 1003 FFFF 1008 0000 to 10FF FFFF 1100 0000 to 11FF FFFF
Segment kseg 0/1
Size
Reno Mode
CPU Parity Checked Yes Yes
Description 64-bit main DRAM (64 bit) Unused (32-bit target) PMA ASIC config space (32 bit) CYA ASIC config space (32 bit) Unused (32-bit target) Cbus/MEMD memory (32 bit)
128 MB 0 128 MB 1+3
kseg 0/1 kseg 0/1
256 KB 2+3 256 KB 2+3 15.5 MB 2+3 2+3
kseg 0/1
16 MB
B-65
Memory Maps
Table B-42 VIP2 Memory Map (continued)
Physical Address 1200 0000 to 12FF FFFF 1300 0000 to 13FF FFFF 1400 0000 to 17FF FFFF 1800 0000 to 1BFF FFFF 1C00 0000 to 1C03 FFFF 1C04 0000 to 1DFF FFFF 1E00 0000 to 1E7F FFFF 1E80 0000 to 1EBF FFFF 1EC0 0000 to 1ECF FFFF 1ED0 0000 to 1EFF FFFF 1F00 0000 to 1FBF FFFF 1FC00 0000 to 1FFF FFFF 2000 0000 to 27FF FFFF 2800 0000 to 2FFF FFFF 3000 0000 to 3003 FFFF 3004 0000 to 3007 FFFF 3008 0000 to 30FF FFFF 3100 0000 to 31FF FFFF 3200 0000 to 32FF FFFF
Segment kseg 0/1 kseg 0/1 kseg 0/1
Size 16 MB 16 MB 64 MB 64 MB
Reno Mode 2+3 2+3 2+3 2+3
CPU Parity Checked
Description PCI/SRAM memory (32 bit) PCI bus: I/O space (32 bit) PCI bus: memory space (32 bit) Unused (32-bit target) Interrupt controller (16 bit) Unused (16-bit target) Unused (8-bit target) Unused (32-bit target) 32-bit address exception register: DRAM Reno 32-bit address exception register: I/O Reno Unused (8-bit target) 8-bit boot PROM Unused (32-bit target) Unused (32-bit target) PMA ASIC config space (32 bit) CYA ASIC config space (32 bit) Unused (32-bit target) Cbus/MEMD memory (32 bit)
continues PCI/SRAM memory (32 bit)
kseg 0/1
256 KB 1+3 About 32 MB 8 MB 4 MB 1+3 2+3 2+3 0
kseg 0/1
1 MB
kseg 0/1
1 MB
1+3
kseg 0 kseg 0
12 MB 4 MB
2+3 2+3
128 MB 1+3 128 MB 2+3 kuseg kuseg kuseg kuseg kuseg 256 KB 2+3 256 KB 2+3 15.5 MB 16 MB 16 MB 2+3 2+3 2+3
B-66
1-58705-005-6
Appendix B
Table B-42 VIP2 Memory Map (continued)
Physical Address 3300 0000 to 33FF FFFF 3400 0000 to 37FF FFFF 3800 0000 to 3BFF FFFF
Segment kuseg kuseg kuseg
Size 16 MB 64 MB 64 MB
Reno Mode 2+3 2+3 2+3
CPU Parity Checked
Description PCI bus: I/O space (32 bit) PCI bus: memory space (32 bit) Unused (32-bit target)
B-67
Memory Maps
B-68
1-58705-005-6

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A P P E N D I X

Program counter = PC 0xD31CA

Address operand = 0x184E006

Internetworking Troubleshooting Handbook, Second Edition 1-58705-005-6

Appendix B Troubleshooting Crashes

Types of Crashes and Their Causes

These crashes will be discussed in greater detail in the next sections.

Bus Error/SegV Exception

The R indicates a RISC processor

This indicates a non-RISC processor

Internetworking Troubleshooting Handbook, Second Edition

Memory Maps Memory Maps

Internetworking Troubleshooting Handbook, Second Edition 1-58705-005-6

Appendix B Memory Maps

Table B-1: 12000-GRP Memory Map

Internetworking Troubleshooting Handbook, Second Edition

Memory Maps Memory Maps

GRP Virtual Memory Map (continued)

GRP Physical Memory Map

00000000 to 07ffffff First 128 MB of main memory DRAM

Table B-2: 12000 Linecard Memory Map

Internetworking Troubleshooting Handbook, Second Edition 1-58705-005-6

Appendix B Memory Maps

Linecard Physical Memory Map

Address E0000000 to EFFFFFFF C0000000 to CFFFFFFF 40000000 to 7FFFFFFF

Description RX SDRAM (packet memory) TX SDRAM (packet memory) Up to 1 GB of main memory

Internetworking Troubleshooting Handbook, Second Edition

Memory Maps Memory Maps

Linecard Physical Memory Map (continued)

Internetworking Troubleshooting Handbook, Second Edition 1-58705-005-6

Appendix B Memory Maps

Table B-3: Catalyst 8540CSR Memory Map

Address Space Name DRAM

Byte Address Start End

Internetworking Troubleshooting Handbook, Second Edition

Memory Maps Memory Maps

Catalyst 8540CSR Memory Map (continued)

Address Space Name

Byte Address Start End

Invalid address; access will cause bus error or interrupt.

Physical Device SAR SRAM None

Byte Address Start End 080F FFFF

0810 0000 14 MB 08DF FFFF

CUBI FPGA CUBI FPGA

08E0 0000 1 MB 08EF FFFF 08F0 0000 1 MB 08FF FFFF

CUBI FPGA control and status registers

CUBI FPGA control and status registers

Internetworking Troubleshooting Handbook, Second Edition 1-58705-005-6

Appendix B Memory Maps

I/O Space Physical Address Map

Physical Device None PCMCIA cards

1800 0000 1BFF FFFF

PAM bus SWC bus NVRAM Time of day

None Tiger ASIC CIDR FPGA None

Internetworking Troubleshooting Handbook, Second Edition

Memory Maps Memory Maps

I/O Space Physical Address Map (continued)

Physical Device PCMCIA controller

1FC8 0000 1FFF FFFF

Internetworking Troubleshooting Handbook, Second Edition 1-58705-005-6