SN54/74LS240 SN54/74LS241 SN54/74LS244: Low Power Schottky
SN54/74LS240 SN54/74LS241 SN54/74LS244: Low Power Schottky
The SN54 / 74LS240, 241 and 244 are Octal Buffers and Line Drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC board density.
Hysteresis at Inputs to Improve Noise Margins 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Input Clamp Diodes Limit High-Speed Termination Effects
LOGIC AND CONNECTION DIAGRAMS DIP (TOP VIEW) SN54 / 74LS240
VCC 2G 20 19 1Y1 18 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 17 16 15 14 13 12 11
20 1
20 1
1 1G
2 1A1
SN54 / 74LS241
VCC 2G 20 19 1Y1 18 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 17 16 15 14 13 12 11
ORDERING INFORMATION
SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXDW SOIC 1 1G 2 1A1 3 4 5 2Y4 1A2 2Y3 6 8 9 10 7 1A3 2Y2 1A4 2Y1 GND
SN54 / 74LS244
VCC 2G 20 19 1Y1 18 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 17 16 15 14 13 12 11
1 1G
2 1A1
June 1989
Features
Y Y
Bi-Directional bus transceiver in a high-density 20-pin package TRI-STATE outputs drive bus lines directly
PNP inputs reduce DC loading on bus lines Hysteresis at bus inputs improve noise margins Typical propagation delay times port-to-port 8 ns Typical enable disable times 17 ns IOL (sink current) 54LS 12 mA 74LS 24 mA IOH (source current) b 12 mA 54LS b 15 mA 74LS Alternate Military Aerospace device (54LS245) is available Contact a National Semiconductor Sales Office Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6413 1
Order Number 54LS245DMQB 54LS245FMQB 54LS245LMQB DM54LS245J DM54LS245W DM74LS245WM or DM74LS245N See NS Package Number E20A J20A M20B N20A or W20A
Function Table
Enable G L L H Direction Control DIR L H X Operation
TL F 6413
RRD-B30M105 Printed in U S A
Units V V 08
b 15
45 2
V mA mA C
12 125 0
24 70
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol VI HYS VOH Parameter Input Clamp Voltage Hysteresis (VT a b VTb) High Level Output Voltage Conditions VCC e Min II e b18 mA VCC e Min VCC e Min VIH e Min VIL e Max IOH e b1 mA VCC e Min VIL e Min VIL e Max IOH e b3 mA VCC e Min VIH e Min VIL e 0 5V IOH e Max VOL Low Level Output Voltage VCC e Min VIL e Max VIH e Min VCC e Max VIL e Max VIH e Min VCC e Max IOL e 12 mA IOL e Max VO e 2 7V VO e 0 4V A or B DIR or G VCC e Max VI e 2 7V VCC e Max VI e 0 4V VCC e Max (Note 2) Outputs High Outputs Low Outputs at Hi-Z
Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time not to exceed one second duration
Min
Typ (Note 1)
Max
b1 5
Units V V
04
34
04 04 05 20
b 200
Off-State Output Current High Level Voltage Applied Off-State Output Current Low Level Voltage Applied Input Current at Maximum Input Voltage High Level Input Current Low Level Input Current Short Circuit Output Current Supply Current
mA mA mA mA mA mA
VI e 5 5V VI e 7V
01 01 20
b0 2 b 40 b 225
VCC e Max
48 62 64
70 90 95 mA
TA e 25 C (See Section 1 for Test Waveforms and Output Load) DM54 74 Conditions Min LS245 Max 12 CL e 45 pF RL e 667X 12 40 40 CL e 5 pF RL e 667X 25 25 16 CL e 150 pF RL e 667X 17 45 45 ns ns ns ns ns ns ns ns ns ns Units
tPLH tPHL tPZL tPZH tPLZ tPHZ tPLH tPHL tPZL tPZH
Propagation Delay Time Low-to-High-Level Output Propagation Delay Time High-to-Low-Level Output Output Enable Time to Low Level Output Enable Time to High Level Output Disable Time from Low Level Output Disable Time from High Level Propagation Delay Time Low-to-High-Level Output Propagation Delay Time High-to-Low-Level Output Output Enable Time to Low Level Output Enable Time to High Level
Ceramic Leadless Chip Carrier Package (E) Order Number 54LS245LMQB NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS245DMQB or DM54LS245J NS Package Number J20A 4
20-Lead Small Outline Molded Package (M) Order Number DM74LS245WM NS Package Number M20B
20-Lead Molded Dual-In-Line Package (N) Order Number DM74LS245N NS Package Number N20A
20-Lead Ceramic Flat Package (W) Order Number 54LS245FMQB or DM54LS245W NS Package Number W20A
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2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness
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SN54 / 74LS244
INPUTS OUTPUT
SN54 / 74LS241
INPUTS 1G L L H D L H X OUTPUT 2G L H (Z) H H L D L H X L H (Z) INPUTS OUTPUT
AC WAVEFORMS
VIN
1.3 V tPLH
VCC RL SW1
VOUT
1.3 V
Figure 1
TO OUTPUT UNDER TEST VIN 1.3 V tPHL VOUT 1.3 V 1.3 V tPLH 1.3 V CL* 5 k SW2
Figure 2
VE VE VOUT
1.3 V tPLZ 1.3 V VOL 0.5 V SYMBOL tPZH tPZL tPLZ tPHZ
SWITCH POSITIONS
SW1 Open Closed Closed Closed SW2 Closed Open Closed Closed
Figure 3
Figure 5
VE 1.3 V VE VOUT tPZH 1.3 V 1.3 V tPHZ VOH 1.3 V 0.5 V
Figure 4