Numbers and Arithmetic

Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University

See: P&H Chapter 2.4 - 2.6, 3.2, C.5 C.6

Big Picture: Building a Processor

memory

inst

register file
+4

alu

+4

PC
offset

=? control
imm cmp

addr din dout memory

new pc

target extend

A Single cycle processor

Goals for Today

Binary Operations
Number representations One-bit and four-bit adders Negative numbers and twos compliment Addition (twos compliment) Subtraction (twos compliment) Performance

Example
Build a circuit (e.g. voting machine) Building blocks (encoders, decoders, multiplexors)

Number Representations
Recall: Binary
Two symbols (base 2): true and false; 0 and 1 Basis of Logic Circuits and all digital computers

So, how do we represent numbers in Binary (base 2)?

Number Representations
Recall: Binary
Two symbols (base 2): true and false; 1 and 0 Basis of Logic Circuits and all digital computers

So, how do we represent numbers in Binary (base 2)?

We know represent numbers in Decimal (base 10).
E.g. 6
102 101 100

37

Can just as easily use other bases

10 0111 Base 2 Binary 2 9 28 27 26 25 24 Base 8 Octal 0o 1 1 7 5 83 82 81 80 Base 16 Hexadecimal

1101
23 22 21 20 162161160

0x 2 7 d

Number Representations
Recall: Binary
Two symbols (base 2): true and false; 1 and 0 Basis of Logic Circuits and all digital computers

So, how do we represent numbers in Binary (base 2)?

We know represent numbers in Decimal (base 10).
E.g. 6
102 101 100

37

6102 + 3101 + 7100 = 637

Can just as easily use other bases

Base 2 Binary 129+126+125+124+123+122+120 = 637 1 + 580 = 637 Base 8 Octal 183 + 182 + 78 2162 + 7161 + d160 = 637 Base 16 Hexadecimal 2162 + 7161 + 13160 = 637

Number Representations: Activity #1 Counting

How do we count in different bases?
Dec (base 10) Bin (base 2) Oct (base 8) Hex (base 16)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
. .

0 1 10 11 100 101 110 111 1000 1001 1010 1011 1100 1101 1110 1111 1 0000 1 0001 1 0010
. .

0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 20 21 22
. .

0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12
. .

99 100

Number Representations
How to convert a number between different bases? Base conversion via repetitive division
Divide by base, write remainder, move left with quotient
637 10 = 63 remainder 7 63 10 = 6 remainder 3 6 10 = 0 remainder 6
lsb (least significant bit)

msb (most significant bit)

Number Representations
Convert a base 10 number to a base 2 number Base conversion via repetitive division
Divide by base, write remainder, move left with quotient lsb (least significant bit) 637 2 = 318 remainder 1 318 2 = 159 remainder 0 159 2 = 79 remainder 1 79 2 = 39 remainder 1 39 2 = 19 remainder 1 19 2 = 9 remainder 1 92=4 remainder 1 42=2 remainder 0 22=1 remainder 0 12=0 remainder 1 msb (most significant bit) 637 = 10 0111 1101 (can also be written as 0b10 0111 1101)
msb lsb

Number Representations
Convert a base 10 number to a base 16 number Base conversion via repetitive division
Divide by base, write remainder, move left with quotient lsb 637 16 = 39 remainder 13 39 16 = 2 remainder 7 dec = hex = bin 2 16 = 0 remainder 2
msb

637 = 0x 2 7 13 = 0x ? 27d Thus, 637 = 0x27d

10 11 12 13 14 15

= = = = = =

0xa 0xb 0xc 0xd 0xe 0xf

= 1010 = 1011 = 1100 = 1101 = 1110 = 1111

Number Representations
Convert a base 2 number to base 8 (oct) or 16 (hex)
Binary to Hexadecimal
Convert each nibble (group of four bits) from binary to hex A nibble (four bits) ranges in value from 015, which is one hex digit E.g. 0b10 0111 1101
0b10 = 0x2 0b0111 = 0x7 0b1101 = 0xd Thus, 637 = 0x27d = 0b10 0111 1101 Range: 00001111 (binary) => 0x0 0xF (hex) => 015 (decimal)

Binary to Octal

Convert each group of three bits from binary to oct Three bits range in value from 07, which is one octal digit
E.g. 0b1 001 111 101
Range: 00001111 (binary) => 0x0 0xF (hex) => 015 (decimal) 0b1 = 0x1 0b001 = 0x1 0b111 = 0x7 0b101 = 0x5 Thus, 637 = 0o1175 = 0b10 0111 1101

Number Representations
Recall: Binary
Two symbols (base 2): true and false; 0 and 1 Basis of Logic Circuits and all digital computers

So, how do we represent numbers in Binary (base 2)?

We know represent numbers in Decimal (base 10).
E.g. 6
102 101 100

37

Can just as easily use other bases

10 0111 Base 2 Binary 2 9 28 27 26 25 24 Base 8 Octal 0o 1 1 7 5 83 82 81 80 Base 16 Hexadecimal

1101
23 22 21 20 162161160

0x 2 7 d

Takeaway

Digital computers are implemented via logic circuits and thus represent all numbers in binary (base 2). We (humans) often write numbers as decimal and hexadecimal for convenience, so need to be able to convert to binary and back (to understand what computer is doing!).

Next Goal
Binary Arithmetic: Add and Subtract two binary numbers

Binary Addition
How do we do arithmetic in binary? Addition works the same way regardless of base
Add the digits in each position Propagate the carry Unsigned binary addition is pretty easy Combine two bits at a time Along with a carry

183 + 254 437

001110 + 011100 101010

1-bit Adder
A Cout S
A 0 0 1 1 B Cout S 0 1 0 1

Half Adder
Adds two 1-bit numbers Computes 1-bit result and 1-bit carry No carry-in

1-bit Adder with Carry

A Cout S
A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 Cout S

Full Adder

Cin

Adds three 1-bit numbers Computes 1-bit result and 1-bit carry Can be cascaded
Activity: Truth Table and Sum-of-Product. Logic minimization via Karnaugh Maps and algebraic minimization. Draw Logic Circuits

4-bit Adder
A[4] B[4] Cout S[4] 4-Bit Full Adder
Adds two 4-bit numbers and carry in Cin Computes 4-bit result and carry out Can be cascaded

4-bit Adder
A3 B 3 Cout S3 S2 S1 S0 A2 B 2 A1 B 1 A0 B 0 Cin

Adds two 4-bit numbers, along with carry-in Computes 4-bit result and carry out Carry-out = overflow indicates result does not fit in 4 bits

Takeaway

Digital computers are implemented via logic circuits and thus represent all numbers in binary (base 2). We (humans) often write numbers as decimal and hexadecimal for convenience, so need to be able to convert to binary and back (to understand what computer is doing!). Adding two 1-bit numbers generalizes to adding two numbers of any size since 1-bit full adders can be cascaded.

Next Goal
How do we subtract two binary numbers? Equivalent to adding with a negative number How do we represent negative numbers?

First Attempt: Sign/Magnitude Representation

First Attempt: Sign/Magnitude Representation
1 bit for sign (0=positive, 1=negative) N-1 bits for magnitude

Problem?
Two zeros: +0 different than -0 Complicated circuits

IBM 7090

Twos Complement Representation

Better: Twos Complement Representation Nonnegative numbers are represented as usual
0 = 0000 1 = 0001 3 = 0011 7 = 0111

Leading 1s for negative numbers To negate any number:

complement all the bits (i.e. flip all the bits) then add 1 -1: 1 0001 1110 1111 -3: 3 0011 1100 1101 -7: 7 0111 1000 1001 -8: 8 1000 0111 1000 -0: 0 0000 1111 0000 (this is good, -0 = +0)

Twos Complement
Non-negatives Negatives
(as usual): (twos complement: flip then add 1):

+0 = 0000 +1 = 0001 +2 = 0010 +3 = 0011 +4 = 0100 +5 = 0101 +6 = 0110 +7 = 0111 +8 = 1000

~0 = 1111 ~1 = 1110 ~2 = 1101 ~3 = 1100 ~4 = 1011 ~5 = 1010 ~3 = 1001 ~7 = 1000 ~8 = 0111

-0 = 0000 -1 = 1111 -2 = 1110 -3 = 1101 -4 = 1100 -5 = 1011 -6 = 1010 -7 = 1001 -8 = 1000

Twos Complement Facts

Signed twos complement
Negative numbers have leading 1s zero is unique: +0 = - 0 wraps from largest positive to largest negative

N bits can be used to represent

unsigned: range 02N-1
eg: 8 bits 0255

signed (twos complement): -(2N-1)(2N-1 - 1)

ex: 8 bits (1000 000) (0111 1111) -127 128

Sign Extension & Truncation

Extending to larger size
1111 = -1 1111 1111 = -1 0111 = 7 0000 0111 = 7

Truncate to smaller size

0000 1111 = 15 BUT, 0000 1111 = 1111 = -1

Twos Complement Addition

Addition with twos complement signed numbers Perform addition as usual, regardless of sign (it just works) Examples
1 + -1 = 0001 + 1111 = 0000 (0) -3 + -1 = 1101 + 1111 = 1100 (-4) -7 + 3 = 1001 + 0011 = 1100 (-4) 7 + (-3) = 0111 + 1101 = 0100 (4)

What is wrong with the following additions? 7 + 1, -7 + -3, -7 + -1

Binary Subtraction
Twos Complement Subtraction Why create a new circuit? Just use addition
How?

Binary Subtraction
Twos Complement Subtraction
Subtraction is simply addition, where one of the operands has been negated
Negation is done by inverting all bits and adding one A B = A + (-B) = A + (B + 1)

B3

B2

B1

B0

A3 Cout

A2

A1

A0 1

Q: How do we detect and handle overflows? Q: What if (-B) overflows?

S3

S2

S1

S0

Takeaway

Digital computers are implemented via logic circuits and thus represent all numbers in binary (base 2). We (humans) often write numbers as decimal and hexadecimal for convenience, so need to be able to convert to binary and back (to understand what computer is doing!). Adding two 1-bit numbers generalizes to adding two numbers of any size since 1-bit full adders can be cascaded. Using Twos complement number representation simplifies adder Logic circuit design (0 is unique, easy to negate). Subtraction is simply adding, where one operand is negated (twos complement; to negate just flip the bits and add 1). .

Next Goal
How do we detect and handle overflow?

Overflow
When can overflow occur?
adding a negative and a positive?

adding two positives? adding two negatives?

Takeaway
Digital computers are implemented via logic circuits and thus represent all numbers in binary (base 2). We (humans) often write numbers as decimal and hexadecimal for convenience, so need to be able to convert to binary and back (to understand what computer is doing!). Adding two 1-bit numbers generalizes to adding two numbers of any size since 1-bit full adders can be cascaded. Using Twos complement number representation simplifies adder Logic circuit design (0 is unique, easy to negate). Subtraction is simply adding, where one operand is negated (twos complement; to negate just flip the bits and add 1). Overflow if sign of operands A and B != sign of result S. Can detect overflow by testing Cin != Cout of the most significant bit (msb), which only occurs when previous statement is true.

A Calculator

A B

8
adder

S 0=add 1=sub

mux

decoder

Next Goal
Performance

Efficiency and Generality

Is this design fast enough? Can we generalize to 32 bits? 64? more? A3 B3 A2 B2 A1 B 1 A0 B0 C0 R3 R2 R1 R0

Performance
Speed of a circuit is affected by the number of gates in series (on the critical path or the deepest level of logic)
Combinational Logic

tcombinational

outputs expected

inputs arrive

4-bit Ripple Carry Adder

A3 B3 C4
S3 C3

A 2 B2
C2

A1 B1
C1

A0 B0 C0
S0

S2

S1

Carry ripples from lsb to msb

First full adder, 2 gate delay Second full adder, 2 gate delay

Goals for Today

Binary Operations
Number representations One-bit and four-bit adders Negative numbers and twos compliment Addition (twos compliment) Subtraction (twos compliment) Performance

Example
Build a circuit (e.g. voting machine) Building blocks (encoders, decoders, multiplexors)

Voting machine
For now, lets just display the numerical identifier to the ballot supervisor we wont do counting yet, just decoding we can use four photo-sensitive transistors to find out which hole is punched out
A photo-sensitive transistor detects the presence of light Photo-sensitive material triggers the gate

Ballot Reading
Input: paper with a hole in it Output: number the ballot supervisor can record

Ballots

The 3410 optical scan vote counter reader machine

Input
Photo-sensitive transistor
photons replenish gate depletion region can distinguish dark and light spots on paper
Vdd i0
i1 i2 i3 i4 i5 i6

Use array of N sensors for voting machine input

Output
7-Segment LED
photons emitted when electrons fall into holes

d7 d6

d5 d4

d3 d2

d1 d0

Block Diagram

detect

Encoders
N might be large
0 1 2

Routing wires is expensive

More efficient encoding?

4 5 6 7

encoder

...

...

Encoder Truth Table

1
o0 2 o1

o2

4 A 3-bit encoder
with 4 inputs for simplicity

Encoder Truth Table

a 0 b 0 0 1 0 0 c 0 0 0 1 0 d 0 0 0 0 1 o2 0 0 0 0 1 o1 0 0 1 1 0 o0 0 1 0 1 0

1
o0 2 o1

1 0 0 0

o2

4 A 3-bit encoder
with 4 inputs for simplicity

o2 = abcd o1 = abcd + abcd o0 = abcd + abcd

Ballot Reading

detect

enc

Ballot Reading
Ok, we built first half of the machine Need to display the result
Ballots The 3410 optical scan vote counter reader machine

7-Segment LED Decoder

7LED decode

3 inputs encode 0 7 in binary

7 outputs one for each LED

7 Segment LED Decoder Implementation

b2 b1 b0 d6 d5 d4 d3 d2 d1 d0 0 0 0

0 0 1
0 1 0 0 1 1

d2

d1
d3

d0

1 0 0
1 0 1 1 1 0 1 1 1

d4
d5

d6

7 Segment LED Decoder Implementation

b2 b1 b0 d6 d5 d4 d3 d2 d1 d0 0 0 0 1 1 1 0 1 0 0 0 1 0 1 0 1 1

0 0 1
0 1 0 0 1 1

0 1
1 1 1 1

1 1
0 1 1 0

1 0
0 0 1 0

1 1
1 1 1 0

0 0
1 1 1 0

1 1
0 1 1 1

1 1
1 0 0 1

d2

d1
d3

d0

1 0 0
1 0 1 1 1 0 1 1 1

d4
d5

d6

Ballot Reading and Display

detect

enc

7LED decode

Ballots
The 3410 optical scan vote counter reader machine

Building Blocks
2N
binary encoder

N N
N
binary decoder

0
Multiplexor

1
2

2N

...

2M-1

Administrivia
Make sure you are
Registered for class, can access CMS Have a Section you can go to Have project partner in same Lab Section

Lab1 and HW1 are out

Lab1 Design Doc due next Mon and complete lab following week HW1 due next Wednesday Work alone But, use your resources
Lab Section, Piazza.com, Office Hours, Homework Help Session, Class notes, book, Sections, CSUGLab

Homework Help Session

Thursday and Monday from 6-8pm Location: B14 Hollister

Administrivia
Check online syllabus/schedule
http://www.cs.cornell.edu/Courses/CS3410/2013sp/schedule.html

Slides and Reading for lectures Office Hours Homework and Programming Assignments Prelims (in evenings):
Tuesday, February 26th Thursday, March 28th April 25th

Schedule is subject to change

Summary
We can now implement any combinational (combinatorial) logic circuit
Decompose large circuit into manageable blocks
Encoders, Decoders, Multiplexors, Adders, ...

Design each block

Binary encoded numbers for compactness

Can implement circuits using NAND or NOR gates Can implement gates using use P- and N-transistors And can add and subtract numbers (in twos compliment)! Next time, state and finite state machines