Review of Dimming Techniques For Solid-State LED Lights
Review of Dimming Techniques For Solid-State LED Lights
Review of Dimming Techniques For Solid-State LED Lights
(Department of Electrical Engineering, Madhav Institute of Technology & Science, Gwalior, India)
ABSTRACT
LEDs lights have numerous advantages as compared to
conventional lighting sources and are becoming popular
these days. Depending upon the application requirement
brightness of the LEDs needs to be controlled. The
brightness is controlled by controlling the forward
current flowing through the LED. In this paper, different
techniques used for dimming the brightness of LED
lamps are reviewed. DC-DC SEPIC converter which is a
fourth-order converter is used as driver to compare
different techniques. Modeling of the SEPIC converter
with LED modeled as resistive load is also presented. It
is showed that PWM and pulse current techniques
exhibits better dimming as compared to other dimming
techniques discussed in this paper. Pulse current driving
technique is the extension of the PWM technique. In
order to verify the performance of dimming techniques
simulation are carried out in MATLAB/SIMULINK
environment.
Keywords - Light emitting Diode (LED), dimming
techniques, SEPIC converter.
I.
INTRODUCTION
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qV/KT -1
I = Is e
(1)
Voltage (volts)
III.
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PWM
(a)
(a)
(b)
(b)
(c)
Fig. 5 PWM dimming (a) Control loop diagram (b), (c)
associated waveforms
(c)
Fig 4 AM dimming (a) Control loop diagram
(b), (c) associated waveforms
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(a)
(a)
(b)
(b)
Fig. 6 Pulse current driving technique (a) schematic diagram
(b) Associated waveform
IV.
(c)
Fig. 7 (a) DC-DC SEPIC Converter as a driver (b) Mode-I (c)
Mode-II
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rSW
L1
rSW
L2
1
L2
1
C1
0
0
0
0
, A
2 1
0
C
2
1
1
RC2
C2
1
L1
1
C2
1
L1
1
L2
,
RC2
B1 B2
0 0 0 ,
L
1
E1 E2 0 0 0 1 , F1 F2 0
V.
(a)
(b)
Fig. 9(a)-(b) Output current and voltage response at 30% and
70 % duty cycle respectively (Vg is 12V & R is 10)
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(a)
(b)
Fig. 11(a)-(b) Output current and voltage response at 30 % and
70 % duty cycle respectively (Vg at 12V and R varies from
15 to 10)
VI.
(b)
Fig. 10 (a)-(b) Output current and voltage response at 30 %
and 70 %duty cycle respectively (Vg varies from 9V to 15V
and load R at 10)
CONCLUSION
REFERENCES
(a)
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