A8504 Datasheet PDF
A8504 Datasheet PDF
A8504 Datasheet PDF
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Recommended Substitutions:
For existing customer transition, and for new customers or new applications, contact Allegro Sales.
Allegro MicroSystems, LLC reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A8504
WLED/RGB Backlight Driver for Medium Size LCDs
Features and Benefits
Description
Typical Application
VIN
5 V 10%
CIN
0.1 F/ 10 V
VBAT
5 to 24 V
L1
10 H
CBAT
2.2 F/ 50 V
VIN
VPWM
SKIP
ROVP
SW SW
PWM
IOUT
VOUT
D1
COUT
OVP
GND
AGND
A8504
PGND
COMP
CC
RFSET
2.2 F
50 V
FSET
SEL3
ISET
SEL2
VIN
SEL1
RISET
LED1
LED3 LED5 LED7
LED2
LGND
Figure 1. LCD monitor backlight, driving 11 green, blue, or white LEDs with Vf= 3.5 V, or 18 red LEDs with Vf = 2.2 V,
per LED string. Overvoltage protection set to 45 V nominal (40.5 V minimum). See also: Recommended Components
table, page 16.
8504-DS, Rev. 3
A8504
Selection Guide
Part Number
Package
Packing*
A8504EECTR-T
4 mm 4 mm QFN/MLP
*Contact Allegro for additional packing options
Device package is lead (Pb) free, with 100% matte tin leadframe plating.
Symbol
Rating
Units
0.3 to 50
0.3 to 23
0.3 to 6
VIN Pin
Notes
VIN
40 to 85
TJ(max)
150
Tstg
55 to 150
Remaining Pins
Operating Ambient Temperature
TA
Range E
Symbol
Note
Rating
Units
RJA
48.5
C/W
A8504
VIN
5 V 10%
VBAT
5 to 25 V
CIN
VIN
D1
L1
CBAT
SW SW
COUT
COMP
CC
VOUT
Reference
and
Soft Start
+
+
R Q
S
ROVP
PGND
OSC
SKIP
FSET
100 k
RFSET
OVP
Feedback
Loop
AGND
Current Sinks
GND
LED1
LED2
On/Off
SEL1
PWM Generator
SEL2
IOUT_SET
LED3
LED4
LED5
SEL3
LED6
PWM
LED7
100 k
LED8
ISET
RISET
PGND
LGND
A8504
ELECTRICAL CHARACTERISTICS, valid at TA = 40C to 85C, typical values at TA = 25C, VIN = 5 V, unless otherwise noted
Characteristics
Input Voltage Range
Undervoltage Lockout Threshold
UVLO Hysteresis Window
Supply Current
Symbol
Test Conditions
VIN
VUVLO
VIN falling
VUVLOhys
ISUP
Min.
Typ.
Max.
Units
4.2
5.5
0.2
mA
0.1
60
dB
Error Amplifier
Error Amplifier Open Loop Gain
AVEA
UGBEA
MHz
GmEA
ICOMP = 10 A
850
A/V
IEAsink
VLED1-8 = 1 V
280
IEAsource
VLED1-8 = 0 V
280
1.8
2.2
MHz
fSW
MHz
200
kHz
70
ns
tOFFmin
Logic Input Levels (PWM, SELx, and SKIP pins unless otherwise specified)
Input Voltage Level Low
VIL
0.4
VIH
1.5
IIleak
100
ISELleak
VOVP
28
34
IOVPH
49
IOVPL
44
IOVPleak
VVOP = 21 V
0.1
Switch On Resistance
Rds(on)
ISW = 1.5 A
225
ISWleak
VSW = 5 V, TA = 25C
VSW = 21 V
ISWlim
1.6
VI(pin) = 5 V, TA = 25C
Boost Switch
A8504
ELECTRICAL CHARACTERISTICS (continued), valid at TA = 40C to 85C, typical values at TA = 25C, VIN = 5 V, unless
otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Units
800
mV
VLEDx
AISET
460
VISET
1.23
ISET
40
100
ISET = 83 A
ErrLEDx
1.2
LEDx1
1.3
LEDx2
1.7
to 2.5
ILSleak5
ILSleak21
VLEDx= 21 V, PWM =0
ISWSS
1.2
ILEDSS
mA
TSHDN
40C hysteresis
165
LEDx Accuracy
LEDx Matching
Soft Start
Soft Start Boost Current Limit
A8504
100
95
95
Efficiency (%)
Efficiency (%)
VIN = 5 V, 6 ch. with 7 LEDs per ch., 40 mA per ch., fSW = 1 MHz
100
90
85
VBAT (V)
9
15
21
80
75
90
85
VBAT (V)
9
15
21
80
75
70
70
0
20
40
60
80
100
10
95
95
90
90
85
Efficiency (%)
Efficiency (%)
VIN = 5 V, 6 ch. with 7 LEDs per ch., 40 mA per ch., fSW = 2 MHz
VBAT (V)
9
15
21
80
75
85
VBAT (V)
9
15
21
80
75
70
70
0
20
40
60
80
100
10
95
95
90
90
85
Efficiency (%)
Efficiency (%)
VIN = 5 V, 8 ch. with 8 LEDs per ch., 40 mA per ch., fSW = 1 MHz
VBAT (V)
9
15
21
80
75
85
VBAT (V)
9
15
21
80
75
70
70
0
20
40
60
80
100
10
95
90
90
85
Efficiency (%)
Efficiency (%)
VIN = 5 V, 8 ch. with 8 LEDs per ch., 40 mA per ch., fSW = 2 MHz
95
VBAT (V)
9
15
21
80
75
85
VBAT (V)
9
15
21
80
75
20
40
60
80
100
10
A8504
Performance Characteristics
Turn-On with PWM Signal
VIN = 5 V, VBAT = 15 V; fPWM= 100 Hz; fSW= 1 MHz
8S8P configuration, 40 mA per channel
C1
C2
1% Duty Cycle
PWM
C1
IIN
C2
VOUT
PWM
IIN
VOUT
C3
C3
C4
C4
IOUT
IOUT
t
Symbol
C1
C2
C3
C4
t
Parameter
VPWM
IIN
VOUT
IOUT
time
Units/Division
5V
500 mA
10 V
200 mA
5 ms
Symbol
C1
C2
C3
C4
t
Parameter
VPWM
IIN
VOUT
IOUT
time
Units/Division
5V
500 mA
10 V
200 mA
20 ms
IIN
C2
VOUT
C3
C4
IOUT
t
Symbol
C1
C2
C3
C4
t
Parameter
VPWM
IIN
VOUT
IOUT
time
Units/Division
5V
500 mA
10 V
200 mA
200 s
A8504
2.5
2.0
fSW (MHz)
1.5
1.0
0.5
0
10
20
30
40
SEL1
SEL2
SEL3
Only LED1 on
LEDx Outputs
50
RFSET (k)
A8504
and all enabled LEDx pins sink 100% current. When the PWM
pin is pulled low, the IC shuts down with the LEDx pins disabled.
External PWM applied to the PWM pin should be in the range of
100 to 400 Hz for optimal accuracy.
At startup, the output capacitor is discharged and the IC enters
soft start. The boost current is limited to 1 A, and all active LEDx
pins sink 1/16 of the set 100% current until all of the enabled
LEDx pins reach 0.8 V. After the IC comes out of soft start, the
boost current and the LEDx pin currents are set to 100% current.
The output capacitor charges to the voltage level required to supply full LEDx current within a few cycles. The startup sequence
is shown in the Soft Start chart in the Performance Characteristics
section. The IC is shut down immediately when PWM goes low.
Device Internal Protection
Overcurrent Protection (OCP). The A8504 has a pulse-by-pulse
junction temperature exceeds 165C and restarts when the junction temperature falls by 40C.
Overvoltage Protection (OVP). The A8504 has overvoltage
VPWM
C1
VOUT
C2
IOUT
C3
Symbol
C1
C2
C3
t
Parameter
VPWM
VOUT(ac)
IOUT
time
Units/Division
2.00 V
500 mV
200 mA
5 ms
VPWM
C1
VOUT
Turn-on Delay
6 s Typical
Shutdown
(0 A)
VPWM
IOUT
C2
IOUT
t
Figure 4. Timing of turn-on delay and turn-off delay when using the
PWM pin. VIN= 5 V, VBAT= 15 V, fSW= 1 MHz, fPWM= 100 Hz, 8S8P
configuration, 40 mA per channel.
Symbol
C1
C2
t
Parameter
VPWM
IOUT
time
Units/Division
2.00 V
200 mA
5 s
A8504
Note: Open strings are removed from boost regulation, but not
disabled. This keeps the string in operation if LEDs open for only
a short length of time, or reach OVP level on a transient event.
The disconnected string can be restored to normal mode by reenabling the IC. It can also be restored to normal operation if the
fault signal is removed from the corresponding LEDx pin, but an
OVP event occurs on any other LEDx pin.
VPWM
C1
Startup
C2
VPWM
Overvoltage condition
detected
ROVP
DZ
COUT
OVP
A
28.8 V
OVP
Disable
22 k
+
1.23 V
4.4 k
OVP Rating
ROVP only
up to 45 V
DZ only
up to 47 V
redundancy
VPWM
C1
IIN
IIN
LED opens
VOUT
IOUT
VOUT
SW SW
C2
Normal operation
established
D1
VIN
Normal
operation
Overvoltage condition
detected
VOUT
VOUT
Normal operation restored
with open LED string
removed from control loop
IOUT
IOUT
C4
C3
C4
C3
Symbol
C1
C2
C3
C4
t
Parameter
VPWM
IIN
vout
Iout
time
Units/Division
5.00 V
500 mA
5.00 V
200 mA
200 s
Symbol
C1
C2
C3
C4
t
Parameter
VPWM
IIN
vout
Iout
time
Units/Division
5.00 V
500 mA
5.00 V
100 mA
200 s
10
A8504
Application Information
Design Example
This section provides a method for selecting component values
when designing an application using the A8504.
Assumptions For the purposes of this example, the following are
VBAT: 8 to 21 V
VIN: 5 V
Quantity of LED channels: 6
Quantity of LEDs per channel: 8
LED current per channel, ILED: 40 mA
Vf at 40 mA: 3 to 3.4 V
fSW: 2 MHz
TA(max): 65C
(5)
(3)
5. Select resistor ROVP (connect to the OVP pin to set the OVP
level, VOUT(max)). Given Vf (max) = 3.4 V, then:
(2)
(6)
(7)
(8)
11
A8504
(9)
(10)
IBAT + IL / 2.
12)]/(10.74)}1/2
(12)
= 0.48 A.
(11)
where VINripple is the input ripple voltage, which can be assumed to be 1% of VBAT. Then:
Quantity
of Strings
SEL1
SEL2
SEL3
25
25
25
25
25
25
25
25
50
50
50
50
100
100
200
8
7
6
5
4
3
2
1
4
3
2
1
2
1
1
H
L
H
L
H
L
H
L
H
H
H
H
H
H
H
H
H
L
L
H
H
L
L
H
L
H
L
H
H
H
H
H
H
H
L
L
L
L
H
H
L
L
H
L
H
LED1
LED3 with LED4, and LED5 with LED6; LED7 and LED8 open;
SEL1 and SEL3 set logic high, and SEL2 set low.
LED2
NC
LED3
NC
NC
LED4
NC
NC
NC
LED5
NC
NC
NC
NC
LED6
LED7
LED8
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Connect
Connect
Connect
Connect
Connect
Connect
Connect
Connect
Connect
NC
NC
NC
NC
NC
NC
NC
NC
Connect
Connect
Connect
NC
NC
NC
NC
NC
NC
Connect
NC
NC
Connect
Figure 7. LED strings can be combined to allow various maximum current levels to be applied.
The Connect notes indicate LED strings connected together.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
A8504
ISET
RISETP
RISET
Q1
100
A wider dimming range can be achieved by changing the reference current, ISET, while using PWM dimming. For higher output,
current levels turn on Q1. RISET and RISETP set the 100% current
level. This current level can be set to 45 mA, and then it can be
dimmed by applying 100% to 0.25% duty cycle on the PWM pin.
The reference current can be reduced by turning off Q1. LED
current can be dimmed to 18 mA by reducing reference current
through ISET pin. This provides 1000:1 combined dimming level
range. Figure 10 shows the accuracy, ErrLEDX , results using this
circuit.
85
80
75
0.1
SW SW
COUT
OVP
PWM
GND
SKIP
AGND
COMP
FSET
100.0
ROVP
VIN
1.0
10.0
Dimming Level (%)
VOUT
CIN
RFSET
90
VBAT
24 V
VIN
5 V 10%
CC
Accuracy (%)
95
A8504
PGND
SEL3
VIN
SEL2
RA
VA
RISET
ISET
SEL1
LED2
LED1
LED3 LED5 LED7 LGND LED8 LED6 LED4
Figure 8. Typical application circuit for PWM dimming, using digital PWM (on the PWM pin).
13
A8504
VBAT 24 V
VIN
5 V 10%
CIN
CBAT
VIN
ROVP
SW SW
COUT
OVP
PWM
GND
SKIP
AGND
A8504
COMP
CC
VOUT
PGND
SEL3
FSET
VIN
SEL2
RFSET
SEL1
ISET
LED1
LED8
LED7 LED6 LED5 LGND LED4 LED3 LED2
RISET
Figure 11. Typical application circuit for PWM dimming, using digital PWM (on the PWM
pin). Showing configuration of 16 WLEDs at 160 mA, in two strings of 8 LEDs each.
VIN
5 V 10%
VBAT
24 V
CIN
PWM
VIN
L1
10 H
D1
CBAT
ROVP
SW
SW
VOUT
COUT
2.2 F
OVP
SKIP
PGND
COMP
CC
0.1 F
A8504
FSET
RFSET
RISET
SEL3
AGND
GND
SEL2
ISET
LED1
VIN
SEL1
Figure 12. Typical application circuit for LED modules with ESD capacitors.
14
A8504
L1
tor, C4, so that they form the smallest loop practical. Avoid
long traces for these paths.
Place the RISET, RFSET, and OVP resistors and the compensation capacitor, C5, close to the ISET, FSET, OVP, and COMP
pins, respectively.
Provide a substantial solder pad under the exposed thermal
pad on the bottom side of the A8504, to provide good thermal
conduction. Connect the PCB solder pad to the PCB ground
plane with multiple thermal vias. For a thermal via specification, please refer to JEDEC guidelines.
For best thermal performance, avoid thermal stresses.
VBAT
CBAT
VIN
COUT
CIN
VOUT
D1
22
OVP
23
SW
24
25
AGND
SW
SEL2
18
17
16
15
14
13
RPWM
LED4
LED2
LED6
LED1
LED8
SEL1
12
RISET
SEL3
A8504
GND
RFSET
ISET
LED3
FSET
LGND
COMP
LED7
21
20
PWM
GND 19
11
ROVP
PGND
SKIP
LED5
PAD
PGND
10
CC
VIN
26
GND
Figure 13. Schematic diagram of A8504 typical application circuit and composite view of typical PCB
layout. In the composite view, the red line superimposed represents the current loop during switch
on-time (return through the A8504 device and the PCB ground plane). The green line represents the
current loop during off-time. Both of these loops should be designed to be as short as practicable.
15
A8504
Figure 15. A8504 typical PCB layout top signal layer (left) and bottom ground plane layer (right)
Reference
Designator
CBAT
COUT
CIN, CC
D1
A8504
Inductor
L1
Resistor
Resistor
Resistor
RISET
RFSET
ROVP
Value
2.2 F / 50 V
2.2 F / 50 V
0.1 F / 6.3 V
60 V / 1.5 A
10 H
4.7 H
4.7 H
14.3 k
24 k
270 k
Part Number
Vendor
TDK
TDK
IR 10MQ060NTRPBF
A8504
SLF6028T-100M1R3-PF
VLS4012T-4R7M1R1
NR4012T4R7M
International Rectifier
Allegro MicroSystems
TDK
TDK
Taiyo Yuden
16
A8504
22 OVP
23 SW
24 SW
25 VIN
26 AGND
Pin-out Diagram
PGND
21 PGND
SKIP
20 PWM
COMP
FSET
ISET
17 SEL2
GND
16 SEL1
LED1
15 LED2
19 GND
LED4 14
LED6 13
18 SEL3
LED8 12
LGND 11
LED7 10
9
LED5
LED3
EP
(Top View)
Name
PGND
SKIP
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
COMP
FSET
ISET
GND
LED1
LED3
LED5
LED7
LGND
LED8
LED6
LED4
LED2
SEL1
SEL2
SEL3
GND
20
PWM
21
PGND
22
OVP
23
24
25
26
SW
SW
VIN
AGND
EP
Description
Power ground pin.
Reduces boost switching frequency in case of light load to improve frequency. Normally, this pin should be low; when
high, fSW is divided by 4.
Compensation pin; connect external compensation network for boost converter.
Sets boost switching frequency. Connect RFSET from FSET to GND to set frequency. Range for RFSET is 13 to 40 k.
Sets 100% current through LED string. Connect RISET from ISET to GND. Range for RISET is 8.45 to 30 k.
Connect to AGND.
LEDx capable of 45 mA.
Power ground pin for LED current sink.
LEDx capable of 45 mA.
17
A8504
0.20
4.00
1
2
0.40
26
26
0.95
A
1
2
1.10
4.00
4.00
1.23
Top View
2.45
4.00
27X
SEATING
PLANE
0.08 C
0.20
0.75
0.40
0.40
1.23
1.10
2
1
26
2.45
Bottom View
18