Computer Organization

CS1403

Mayank Pandey, MNNIT, Allahabad,

India

Instruction Set
The repertoire of instructions of a
computer
Different computers: different
instruction sets
But with many aspects in common

Early computers: very simple

instruction sets
Simplified implementation

Many modern computers also have

simple instruction sets
Mayank Pandey, MNNIT, Allahabad,
India

The MIPS Instruction Set

Used as the example throughout the book
Stanford MIPS commercialized by MIPS
Technologies (www.mips.com)
Large share of embedded core market
Applications in consumer electronics,
network/storage equipment, cameras, printers,

Typical of many modern ISAs

See MIPS Reference Data tear-out card, and
Appendixes B and E
Mayank Pandey, MNNIT, Allahabad,
India

Arithmetic Operations
Add and subtract, three operands
Two sources and one destination

add a, b, c # a gets b + c
All arithmetic operations have this
form
Design Principle 1: Simplicity favours
regularity
Regularity makes implementation
simpler
Simplicity enables
higher
Mayank Pandey, MNNIT,
Allahabad,performance
India

Arithmetic Example
C code:
f = (g + h) - (i + j);

Compiled MIPS code:

add t0, g, h
add t1, i, j
sub f, t0, t1

# temp t0 = g + h
# temp t1 = i + j
# f = t0 - t1

Mayank Pandey, MNNIT, Allahabad,

India

Register Operands
Arithmetic instructions use register
operands
MIPS has a 32 32-bit register file
Use for frequently accessed data
Numbered 0 to 31
32-bit data called a word

Assembler names
$t0, $t1, , $t9 for temporary values
$s0, $s1, , $s7 for saved variables

Design Principle 2: Smaller is faster

c.f. main memory: millions of locations
Mayank Pandey, MNNIT, Allahabad,
India

Register Operand Example

C code:
f = (g + h) - (i + j);
f, , j in $s0, , $s4

Compiled MIPS code:

add $t0, $s1, $s2
add $t1, $s3, $s4
sub $s0, $t0, $t1

Mayank Pandey, MNNIT, Allahabad,

India

Memory Operands

Main memory used for composite data

Arrays, structures, dynamic data

To apply arithmetic operations

Load values from memory into registers

Store result from register to memory

Memory is byte addressed

Each address identifies an 8-bit byte

Words are aligned in memory

Address must be a multiple of 4

MIPS is Big Endian

use the address of the leftmost or big end

byte as the word address
Mayank Pandey, MNNIT, Allahabad,
India

Memory Operand Example 1

C code:
g = h + A[8];
g in $s1, h in $s2, base address of A in
$s3

Compiled MIPS code:

Index 8 requires offset of 32
4 bytes per word

lw $t0, 32($s3)
# load word
add $s1,
$s2, $t0
offset
base register
Mayank Pandey, MNNIT, Allahabad,
India

Memory Operand Example 2

C code:
A[12] = h + A[8];
h in $s2, base address of A in $s3

Compiled MIPS code:

Index 8
lw $t0,
add $t0,
sw $t0,

requires offset of 32
32($s3)
# load word
$s2, $t0
48($s3)
# store word

Mayank Pandey, MNNIT, Allahabad,

India

Registers vs. Memory

Registers are faster to access than
memory
Operating on memory data requires
loads and stores
More instructions to be executed

Compiler must use registers for

variables as much as possible
Only spill to memory for less frequently
used variables
Register optimization is important!
Mayank Pandey, MNNIT, Allahabad,
India

Immediate Operands
Constant data specified in an
instruction
addi $s3, $s3, 4

No subtract immediate instruction

Just use a negative constant
addi $s2, $s1, -1

Design Principle 3: Make the common

case fast
Small constants are common
ImmediateMayank
operand
avoids a load
Pandey, MNNIT, Allahabad,
instruction India

The Constant Zero

MIPS register 0 ($zero) is the
constant 0
Cannot be overwritten

Useful for common operations

E.g., move between registers
add $t2, $s1, $zero

Mayank Pandey, MNNIT, Allahabad,

India

Unsigned Binary Integers

Given an n-bit number

x x n1 2n1 x n2 2n2 x1 21 x 0 20

Range: 0 to +2n 1

Example
0000 0000 0000 0000 0000 0000 0000 1011

3 + 022 +121 +120

= 0 + + 12
= 0 + + 8 + 0 + 2 + 1 = 11

10

Using 32 bits

0 to +4,294,967,295
Mayank Pandey, MNNIT, Allahabad,
India

2s-Complement Signed
Integers
Given an n-bit number

x x n1 2n1 x n2 2n2 x1 21 x 0 20

Range: 2n 1 to +2n 1 1

Example
1111 1111 1111 1111 1111 1111 1111 1100

2
31 + 1230 + + 122 +021 +020

= 12
= 2,147,483,648 + 2,147,483,644 = 4

10

Using 32 bits

2,147,483,648 to +2,147,483,647
Mayank Pandey, MNNIT, Allahabad,
India

2s-Complement Signed
Integers

Bit 31 is sign bit

1 for negative numbers

0 for non-negative numbers

Non-negative numbers have the same

unsigned and 2s-complement
representation
Some specific numbers
0:
0000 0000 0000
1:
1111 1111 1111
Most-negative:
1000 0000 0000
Most-positive:
0111 1111 1111
Mayank Pandey, MNNIT, Allahabad,
India

Signed Negation

Complement and add 1

Complement means 1 0, 0 1
x x 1111...1112 1
x 1 x

Example: negate +2

+2 = 0000 0000 00102

2 = 1111 1111 11012 + 1
= 1111 1111 11102
Mayank Pandey, MNNIT, Allahabad,
India

Sign Extension
Representing a number using more bits
Preserve the numeric value

Replicate the sign bit to the left

unsigned values: extend with 0s

Examples: 8-bit to 16-bit

+2: 0000 0010 => 0000 0000 0000 0010
2: 1111 1110 => 1111 1111 1111 1110

Mayank Pandey, MNNIT, Allahabad,

India

Representing Instructions
Instructions are encoded in binary
Called machine code

MIPS instructions
Encoded as 32-bit instruction words
Small number of formats encoding operation
code (opcode), register numbers,
Regularity!

Register numbers
$t0 $t7 are regs 8 15
$t8 $t9 are regs 24 25
$s0 $s7 are regs 16 23
Mayank Pandey, MNNIT, Allahabad,
India

MIPS R-format Instructions

op

rs

rt

rd

shamt

funct

6 bits

5 bits

5 bits

5 bits

5 bits

6 bits

Instruction fields
op: operation code (opcode)
rs: first source register number
rt: second source register number
rd: destination register number
shamt: shift amount (00000 for now)
funct: function code (extends opcode)
Mayank Pandey, MNNIT, Allahabad,
India

R-format Example
op

rs

rt

rd

shamt

funct

6 bits

5 bits

5 bits

5 bits

5 bits

6 bits

add $t0, $s1, $s2

special

$s1

$s2

$t0

add

17

18

32

000000

10001

10010

01000

00000

100000

000000100011001001000000001000002 = 0232402016
Mayank Pandey, MNNIT, Allahabad,
India

Hexadecimal
Base 16

Compact representation of bit strings

4 bits per hex digit

0000

0100

1000

1100

0001

0101

1001

1101

0010

0110

1010

1110

0011

0111

1011

1111

Example: eca8 6420

1110 1100 1010 1000 0110 0100 0010 0000

Mayank Pandey, MNNIT, Allahabad,
India

MIPS I-format Instructions

op

rs

rt

constant or address

6 bits

5 bits

5 bits

16 bits

Immediate arithmetic and load/store

instructions
rt: destination or source register number
Constant: 215 to +215 1
Address: offset added to base address in rs

Design Principle 4: Good design demands good compromises

Different formats complicate decoding, but allow 32-bit instructions uniformly

Keep formats as similar as possible

Mayank Pandey, MNNIT, Allahabad,

India

Stored Program Computers

Instructions represented
in binary, just like data
Instructions and data
stored in memory
Programs can operate on
programs
e.g., compilers, linkers,

Binary compatibility
allows compiled programs
to work on different
computers
Standardized ISAs
Mayank Pandey, MNNIT, Allahabad,
India

Logical Operations
Instructions for bitwise manipulation

Operation

Java

MIPS

Shift left

<<

<<

sll

Shift right

>>

>>>

srl

Bitwise AND

&

&

and, andi

Bitwise OR

or, ori

Bitwise NOT

nor

Useful for extracting and inserting

groups of bits in a word
Mayank Pandey, MNNIT, Allahabad,
India

Shift Operations
op

rs

rt

rd

shamt

funct

6 bits

5 bits

5 bits

5 bits

5 bits

6 bits

shamt: how many positions to shift

Shift left logical
Shift left and fill with 0 bits
sll by i bits multiplies by 2i

Shift right logical

Shift right and fill with 0 bits

srl by i bits divides by 2i (unsigned only)
Mayank Pandey, MNNIT, Allahabad,
India

AND Operations
Useful to mask bits in a word
Select some bits, clear others to 0
and $t0, $t1, $t2
$t2

0000 0000 0000 0000 0000 1101 1100 0000

$t1

0000 0000 0000 0000 0011 1100 0000 0000

$t0

0000 0000 0000 0000 0000 1100 0000 0000

Mayank Pandey, MNNIT, Allahabad,

India

OR Operations

Useful to include bits in a word

Set some bits to 1, leave others
unchanged
or $t0, $t1, $t2
$t2

0000 0000 0000 0000 0000 1101 1100 0000

$t1

0000 0000 0000 0000 0011 1100 0000 0000

$t0

0000 0000 0000 0000 0011 1101 1100 0000

Mayank Pandey, MNNIT, Allahabad,

India

NOT Operations
Useful to invert bits in a word
Change 0 to 1, and 1 to 0

MIPS has NOR 3-operand instruction

a NOR b == NOT ( a OR b )
nor $t0, $t1, $zero

Register 0: always
read as zero

$t1

0000 0000 0000 0000 0011 1100 0000 0000

$t0

1111 1111 1111 1111 1100 0011 1111 1111

Mayank Pandey, MNNIT, Allahabad,

India

Conditional Operations
Branch to a labeled instruction if a
condition is true
Otherwise, continue sequentially

beq rs, rt, L1

if (rs == rt) branch to instruction labeled
L1;

bne rs, rt, L1

if (rs != rt) branch to instruction labeled
L1;

j L1
unconditional
jump to instruction
Mayank Pandey, MNNIT, Allahabad,
labeled L1 India

Compiling If Statements
C code:
if (i==j) f = g+h;
else f = g-h;
f, g, in $s0, $s1,

Compiled MIPS code:

bne
add
j
Else: sub
Exit:

$s3, $s4, Else

$s0, $s1, $s2
Exit
$s0, $s1, $s2
Assembler calculates addresses
Mayank Pandey, MNNIT, Allahabad,

Compiling Loop Statements

C code:

while (save[i] == k) i += 1;
i in $s3, k in $s5, address of save in $s6

Compiled MIPS code:

Loop: sll
add
lw
bne
addi
j
Exit:

$t1,
$t1,
$t0,
$t0,
$s3,
Loop

$s3, 2
$t1, $s6
0($t1)
$s5, Exit
$s3, 1

Mayank Pandey, MNNIT, Allahabad,

India

More Conditional Operations

Set result to 1 if a condition is true
Otherwise, set to 0

slt rd, rs, rt

if (rs < rt) rd = 1; else rd = 0;

slti rt, rs, constant

if (rs < constant) rt = 1; else rt = 0;

Use in combination with beq, bne

slt $t0, $s1, $s2
bne $t0, $zero, L

# if ($s1 < $s2)

#
branch to L

Mayank Pandey, MNNIT, Allahabad,

India

Branch Instruction Design

Why not blt, bge, etc?
Hardware for <, , slower than =,

Combining with branch involves more

work per instruction, requiring a slower
clock
All instructions penalized!

beq and bne are the common case

This is a good design compromise
Mayank Pandey, MNNIT, Allahabad,
India

Signed vs. Unsigned

Signed comparison: slt, slti
Unsigned comparison: sltu, sltui
Example
$s0 = 1111 1111 1111 1111 1111 1111 1111
1111

$s1 = 0000 0000 0000 0000 0000 0000 0000

0001

slt

$t0, $s0, $s1

# signed

1 < +1 $t0 = 1

sltu $t0, $s0, $s1

# unsigned

Mayank Pandey,
+4,294,967,295
>MNNIT,
+1 Allahabad,
$t0 = 0
India

Procedure Calling

Steps required
1.
2.
3.
4.
5.
6.

Place parameters in registers

Transfer control to procedure
Acquire storage for procedure
Perform procedures operations
Place result in register for caller
Return to place of call

Mayank Pandey, MNNIT, Allahabad,

India

Register Usage
$a0 $a3: arguments (regs 4 7)
$v0, $v1: result values (regs 2 and 3)
$t0 $t9: temporaries
Can be overwritten by callee

$s0 $s7: saved

Must be saved/restored by callee

$gp: global pointer for static data (reg 28)

$sp: stack pointer (reg 29)
$fp: frame pointer (reg 30)
$ra: return address (reg 31)
Mayank Pandey, MNNIT, Allahabad,
India

Procedure Call Instructions

Procedure call: jump and link
jal ProcedureLabel
Address of following instruction put in
$ra
Jumps to target address

Procedure return: jump register

jr $ra
Copies $ra to program counter
Can also be used for computed jumps
e.g., for case/switch statements
Mayank Pandey, MNNIT, Allahabad,
India

Leaf Procedure Example

C code:
int leaf_example (int g, h, i, j)
{ int f;
f = (g + h) - (i + j);
return f;
}
Arguments g, , j in $a0, , $a3
f in $s0 (hence, need to save $s0 on
stack)
Result in $v0
Mayank Pandey, MNNIT, Allahabad,
India

Leaf Procedure Example

Mayank Pandey, MNNIT, Allahabad,

India

Non-Leaf Procedures
Procedures that call other procedures
For nested call, caller needs to save
on the stack:
Its return address
Any arguments and temporaries needed
after the call

Restore from the stack after the call

Mayank Pandey, MNNIT, Allahabad,

India

Non-Leaf Procedure
Example
C code:
int fact (int n)
{
if (n < 1) return f;
else return n * fact(n - 1);
}
Argument n in $a0
Result in $v0

Mayank Pandey, MNNIT, Allahabad,

India

Non-Leaf Procedure
Example

Mayank Pandey, MNNIT, Allahabad,

India

Local Data on the Stack

Local data allocated by callee

e.g., C automatic variables

Procedure frame (activation record)

Used by some compilers to manage stack

storage
Mayank Pandey, MNNIT, Allahabad,
India

Memory Layout
Text: program code
Static data: global
variables
e.g., static variables in
C, constant arrays and
strings
$gp initialized to
address allowing
offsets into this
segment

Dynamic data: heap

E.g., malloc in C, new in
Java
Mayank Pandey, MNNIT, Allahabad,
Stack: automatic
India

Character Data
Byte-encoded character sets
ASCII: 128 characters
95 graphic, 33 control

Latin-1: 256 characters

ASCII, +96 more graphic characters

Unicode: 32-bit character set

Used in Java, C++ wide characters,
Most of the worlds alphabets, plus
symbols
UTF-8, UTF-16: variable-length
Pandey, MNNIT, Allahabad,
encodings Mayank
India

Byte/Halfword Operations
Could use bitwise operations
MIPS byte/halfword load/store
String processing is a common case
lb rt, offset(rs)

lh rt, offset(rs)

Sign extend to 32 bits in rt

lbu rt, offset(rs)

lhu rt, offset(rs)

Zero extend to 32 bits in rt

sb rt, offset(rs)

sh rt, offset(rs)

Store just rightmost byte/halfword

Mayank Pandey, MNNIT, Allahabad,
India

String Copy Example

C code (nave):
Null-terminated string
void strcpy (char x[], char y[])
{ int i;
i = 0;
while ((x[i]=y[i])!='\0')
i += 1;
}
Addresses of x, y in $a0, $a1
i in $s0
Mayank Pandey, MNNIT, Allahabad,
India

String Copy Example

Mayank Pandey, MNNIT, Allahabad,

India

32-bit Constants
Most constants are small
16-bit immediate is sufficient

For the occasional 32-bit constant

lui rt, constant
Copies 16-bit constant to left 16 bits of rt
Clears right 16 bits of rt to 0
lhi lui $s0, 61

0000 0000 0011 1101 0000 0000 0000 0000

ori $s0, $s0, 2304 0000 0000 0011 1101 0000 1001 0000 0000
Mayank Pandey, MNNIT, Allahabad,
India

Branch Addressing

Branch instructions specify

Opcode, two registers, target address

Most branch targets are near branch

Forward or backward

op

rs

rt

constant or address

6 bits

5 bits

5 bits

16 bits

PC-relative addressing

Target address = PC + offset 4

PC already incremented by 4 by this time
Mayank Pandey, MNNIT, Allahabad,
India

Jump Addressing

Jump (j and jal) targets could be

anywhere in text segment
Encode full address in instruction

op

address

6 bits

26 bits

(Pseudo)Direct jump addressing

Target address = PC3128 : (address 4)

Mayank Pandey, MNNIT, Allahabad,

India

Target Addressing Example

Loop code from earlier example
Assume Loop at location 80000
$t1, $s3, 2

80000

19

add

$t1, $t1, $s6

80004

22

32

lw

$t0, 0($t1)

80008

35

bne

$t0, $s5, Exit

80012

21

addi $s3, $s3, 1

80016

19

19

80020

Loop: sll

Exit:

Loop

80024

Mayank Pandey, MNNIT, Allahabad,

India

20000

Branching Far Away

If branch target is too far to encode
with 16-bit offset, assembler rewrites
the code
Example
beq $s0,$s1, L1

bne $s0,$s1, L2
j L1
L2:
Mayank Pandey, MNNIT, Allahabad,
India

Addressing Mode Summary

Mayank Pandey, MNNIT, Allahabad,

India

Translation and Startup

Many compilers produce
object modules directly

Static linking

Mayank Pandey, MNNIT, Allahabad,

India

Assembler Pseudo-instructions
Most assembler instructions
represent machine instructions oneto-one
Pseudoinstructions: figments of the
assemblers imagination
add $t0, $zero, $t1
blt $t0, $t1, L
slt $at, $t0, $t1
move $t0, $t1

bne $at, $zero, L

$at (register 1): assembler temporary

Mayank Pandey, MNNIT, Allahabad,
India

Producing an Object Module

Assembler (or compiler) translates
program into machine instructions
Provides information for building a
complete program from the pieces
Header: described contents of object module
Text segment: translated instructions
Static data segment: data allocated for the life
of the program
Relocation info: for contents that depend on
absolute location of loaded program
Symbol table: global definitions and external
refs
Debug info: for associating with source code
Mayank Pandey, MNNIT, Allahabad,
India

Linking Object Modules

Produces an executable image
1. Merges segments
2. Resolve labels (determine their
addresses)
3. Patch location-dependent and
external refs

Could leave location dependencies

for fixing by a relocating loader
But with virtual memory, no need to do
this
Mayank Pandey, MNNIT, Allahabad,
Program can
India be loaded into absolute

Loading a Program
Load from image file on disk into
memory
1. Read header to determine segment
sizes
2. Create virtual address space
3. Copy text and initialized data into
memory
Or set page table entries so they can be
faulted in

4.
5.

Set up arguments on stack

InitializeMayank
registers
$sp, $fp,
Pandey, MNNIT,(including
Allahabad,
India

Dynamic Linking
Only link/load library procedure when
it is called
Requires procedure code to be
relocatable
Avoids image bloat caused by static
linking of all (transitively) referenced
libraries
Automatically picks up new library
versions
Mayank Pandey, MNNIT, Allahabad,
India

Lazy Linkage
Indirection table
Stub: Loads routine ID,
Jump to linker/loader
Linker/loader code

Dynamically
mapped code

Mayank Pandey, MNNIT, Allahabad,

India

Starting Java Applications

Simple portable
instruction set for
the JVM

Compiles
bytecodes of
hot methods
into native
code for host
machine

Interprets
bytecodes

C Sort Example
Illustrates use of assembly
instructions for a C bubble sort
function
Swap procedure (leaf)
void swap(int v[], int k)
{
int temp;
temp = v[k];
v[k] = v[k+1];
v[k+1] = temp;
}
Mayank Pandey, MNNIT, Allahabad,
v in $a0, kIndiain $a1, temp in $t0

The Procedure Swap

Mayank Pandey, MNNIT, Allahabad,

India

The Sort Procedure in C

Non-leaf (calls swap)

void sort (int v[], int n)

{
int i, j;
for (i = 0; i < n; i += 1) {
for (j = i 1;
j >= 0 && v[j] > v[j + 1];
j -= 1) {
swap(v,j);
}
}
}
Mayank Pandey, MNNIT, Allahabad,
v in $a0, k inIndia
$a1, i in $s0, j in $s1

The Procedure Body

Mayank Pandey, MNNIT, Allahabad,

India

The Full Procedure

Mayank Pandey, MNNIT, Allahabad,

India

Arrays vs. Pointers

Array indexing involves
Multiplying index by element size
Adding to array base address

Pointers correspond directly to

memory addresses
Can avoid indexing complexity

Mayank Pandey, MNNIT, Allahabad,

India

Example: Clearing and Array

clear1(int array[], int size) {

clear2(int *array, int size) {

int i;

int *p;

for (i = 0; i < size; i += 1)

for (p = &array[0]; p < &array[size];

array[i] = 0;

p = p + 1)

*p = 0;
}

move $t0,$zero
loop1: sll $t1,$t0,2
add $t2,$a0,$t1

# i = 0

move $t0,$a0

# p = & array[0]

# $t1 = i * 4

sll $t1,$a1,2

# $t1 = size * 4

# $t2 =

add $t2,$a0,$t1 # $t2 =

&array[i]

sw $zero, 0($t2) # array[i] = 0

&array[size]

loop2: sw $zero,0($t0) # Memory[p] = 0

addi $t0,$t0,1

# i = i + 1

addi $t0,$t0,4

slt $t3,$t0,$a1

# $t3 =

slt $t3,$t0,$t2 # $t3 =

(i < size)

bne $t3,$zero,loop1 # if ()

# p = p + 4

#(p<&array[size])
bne $t3,$zero,loop2 # if ()

# goto loop1

# goto loop2

Mayank Pandey, MNNIT, Allahabad,

India

Comparison of Array vs. Ptr

Multiply strength reduced to shift
Array version requires shift to be
inside loop
Part of index calculation for incremented
i
c.f. incrementing pointer

Compiler can achieve same effect as

manual use of pointers
Induction variable elimination
Better to make
program clearer and
Mayank Pandey, MNNIT, Allahabad,
India
safer

Fallacies
Powerful instruction higher performance
Fewer instructions required
But complex instructions are hard to
implement
May slow down all instructions, including simple ones

Compilers are good at making fast code from

simple instructions

Use assembly code for high performance

But modern compilers are better at dealing
with modern processors
More lines of code more errors and less
productivity
Mayank Pandey, MNNIT, Allahabad,
India

Fallacies

Backward compatibility instruction

set doesnt change
But they do accrete more instructions

x86 instruction set

Chapter 2
Instructions:

Pitfalls
Sequential words are not at
sequential addresses
Increment by 4, not by 1!

Keeping a pointer to an automatic

variable after procedure returns
e.g., passing pointer back via an
argument
Pointer becomes invalid when stack
popped
Chapter 2
Instructions:

 Design principles
1. Simplicity favors regularity
2. Smaller is faster
3. Make the common case fast
4. Good design demands good
compromises

Layers of software/hardware
Compiler, assembler, hardware

MIPS: typical of RISC ISAs

c.f. x86
Chapter 2
Instructions:

2.20 Concluding Remarks

Concluding Remarks

Concluding
Remarks
Measure MIPS instruction executions
in benchmark programs

Consider making the common case fast

Consider compromises
Instruction class

MIPS examples

SPEC2006 Int

SPEC2006 FP

Arithmetic

add, sub, addi

16%

48%

Data transfer

lw, sw, lb, lbu, lh, lhu, sb, lui

35%

36%

Logical

and, or, nor, andi, ori, sll, srl

12%

4%

Cond. Branch

beq, bne, slt, slti, sltiu

34%

8%

Jump

j, jr, jal

2%

0%

Chapter 2
Instructions: