B.tech Eeeproject

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM
CHAPTER-1
1. INTRODUCTOIN
EMBEDDED SYSTEMS:
1.1 Introduction:
An embedded system is a system which is going to do a predefined specified task is
the embedded system and is even defined as combination of both software and hardware. A
general-purpose definition of embedded systems is that they are devices used to control,
monitor or assist the operation of equipment, machinery or plant. "Embedded" reflects the
fact that they are an integral part of the system. At the other extreme a general-purpose
computer may be used to control the operation of a large complex processing plant, and its
presence will be obvious.
All embedded systems are including computers or microprocessors. Some of these
computers are however very simple systems as compared with a personal computer.
The very simplest embedded systems are capable of performing only a single function or set
of functions to meet a single predetermined purpose. In more complex systems an application
program that enables the embedded system to be used for a particular purpose in a specific
application determines the functioning of the embedded system. The ability to have programs
means that the same embedded system can be used for a variety of different purposes. In
some cases a microprocessor may be designed in such a way that application software for a
particular purpose can be added to the basic software in a second process, after which it is not
possible to make further changes. The applications software on such processors is sometimes
referred to as firmware.
The simplest devices consist of a single microprocessor (often called a "chip), which
may itself be packaged with other chips in a hybrid system or Application Specific Integrated
Circuit (ASIC). Its input comes from a detector or sensor and its output goes to a switch or
activator which (for example) may start or stop the operation of a machine or, by operating a
valve, may control the flow of fuel to an engine.
As the embedded system is the combination of both software and hardware
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Embedded
System
Software
Hardware
o ALP
o Processor
o C
o Peripheral
o VB
s
o memory
Etc.,
Figure1.1: Block diagram of Embedded System

Software deals with the languages like ALP, C, and VB etc., and Hardware deals with
Processors, Peripherals, and Memory.
Memory: It is used to store data or address.
Peripherals: These are the external devices connected
Processor: It is an IC which is used to perform some task
1.2 Applications of embedded systems
Manufacturing and process control
Construction industry
Transport
Buildings and premises
Domestic service
Communications
Office systems and mobile equipment
Banking, finance and commercial
Medical diagnostics, monitoring and life support
Processors are classified into four types like:
Micro Processor (p)
Micro controller (c)
Digital Signal Processor (DSP)
Application Specific Integrated Circuits (ASIC)
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Micro Processor (p):
A silicon chip that contains a CPU. In the world of personal computers, the terms
microprocessor and CPU are used interchangeably. At the heart of all personal computers and
most workstations sits a microprocessor. Microprocessors also control the logic of almost all
digital devices, from clock radios to fuel-injection systems for automobiles.
1.3 Three basic characteristics differentiate microprocessors:
Instruction set: The set of instructions that the microprocessor can execute.
Bandwidth : The number of bits processed in a single instruction.
Clock speed : Given in megahertz (MHz), the clock speed determines how many
instructions per second the processor can execute.

In both cases, the higher the value, the more powerful the CPU. For example, a 32-bit
microprocessor that runs at 50MHz is more powerful than a 16-bit microprocessor that runs
at 25MHz. In addition to bandwidth and clock speed, microprocessors are classified as being
either RISC (reduced instruction set computer) or CISC (complex instruction set computer).
A microprocessor has three basic elements, as shown above. The ALU performs all
arithmetic computations, such as addition, subtraction and logic operations (AND, OR, etc).
It is controlled by the Control Unit and receives its data from the Register Array.
The
Register Array is a set of registers used for storing data. These registers can be accessed by
the ALU very quickly. Some registers have specific functions - we will deal with these later.
The Control Unit controls the entire process. It provides the timing and a control signal for
getting data into and out of the registers and the ALU and it synchronizes the execution of
instructions (we will deal with instruction execution at a later date).
Fig:-1.3 Three Basic Elements of a Microprocessor
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Micro Controller (c):
A microcontroller is a small computer on a single integrated circuit
containing
processor
core,
memory,
and
programmable
input/output
peripherals. Program memory in the form of NOR flash or OTP ROM is also
often included on chip, as well as a typically small amount of RAM.
Microcontrollers are designed for embedded applicatio ns, in contrast to the
microprocessors
used
in
personal
computers
or
other
general
purpose
applications.
ALU
CU
MEMORY
Timer,
Counter,
serial
communication ROM
Figure: 1.3.1 Block Diagram of Micro Controller (c)

Digital Signal Processors (DSPs):
Digital Signal Processors is one which performs scientific and mathematical
operation. Digital Signal Processor chips - specialized microprocessors with architectures
designed specifically for the types of operations required in digital signal processing. Like a
general-purpose microprocessor, a DSP is a programmable device, with its own native
instruction code. DSP chips are capable of carrying out millions of floating point operations
per second, and like their better-known general-purpose cousins, faster and more powerful
versions are continually being introduced. DSPs can also be embedded within complex
"system-on-chip" devices, often containing both analog and digital circuitry.
1.4 Application Specific Integrated Circuit (ASIC)
ASIC is a combination of digital and analog circuits packed into an IC to achieve the desired
control/computation function
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ASIC typically contains
CPU cores for computation and control
Peripherals to control timing critical functions
Memories to store data and program
Analog circuits to provide clocks and interface to the real world which is
analog in nature
I/Os to connect to external components like LEDs, memories, monitors etc.
1.5 Computer Instruction Set

There are two different types of computer instruction set there are:
1. RISC (Reduced Instruction Set Computer) and
2. CISC (Complex Instruction Set computer)
Reduced Instruction Set Computer (RISC)
A RISC (reduced instruction set computer) is a microprocessor that is designed to
perform a smaller number of types of computer instruction so that it can operate at a higher
speed (perform more million instructions per second, or millions of instructions per second).
Since each instruction type that a computer must perform requires additional transistors and
circuitry, a larger list or set of computer instructions tends to make the microprocessor more
complicated and slower in operation.
Besides performance improvement, some advantages of RISC and related design
improvements are:
A new microprocessor can be developed and tested more quickly if one of its aims is
to be less complicated.
Operating system and application programmers who use the microprocessor's
instructions will find it easier to develop code with a smaller instruction set.
The simplicity of RISC allows more freedom to choose how to use the space on a
microprocessor.
Higher-level language compilers produce more efficient code than formerly because they
have always tended to use the smaller set of instructions to be found in a RISC computer.
RISC characteristics
Simple instructionset:
In a RISC machine, the instruction set contains simple, basic instructions, from which more
complex instructions can be composed.
Same length instructions.
Each instruction is the same length, so that it may be fetched in a single operation.
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1 machine-cycle instructions.
Most instructions complete in one machine cycle, which allows the processor to handle
several instructions at the same time. This pipelining is a key technique used to speed up
RISC machines.
Complex Instruction Set Computer (CISC)

CISC, which stands for Complex Instruction Set Computer, is a philosophy for
designing chips that are easy to program and which make efficient use of memory. Each
instruction in a CISC instruction set might perform a series of operations inside the processor.
This reduces the number of instructions required to implement a given program, and allows
the programmer to learn a small but flexible set of instructions.
The advantages of CISC:At the time of their initial development, CISC machines used available technologies to
optimize computer performance.
Microprogramming is as easy as assembly language to implement, and much less
expensive than hardwiring a control unit.
The ease of micro-coding new instructions allowed designers to make CISC machines
upwardly compatible: a new computer could run the same programs as earlier computers
because the new computer would contain a superset of the instructions of the earlier
computers.
As each instruction became more capable, fewer instructions could be used to
implement a given task. This made more efficient use of the relatively slow main memory.
Because micro program instruction sets can be written to match the constructs of
high-level languages, the compiler does not have to be as complicated.

The disadvantages of CISC:Still, designers soon realized that the CISC philosophy had its own problems, including:
Earlier generations of a processor family generally were contained as a subset in
every new version --- so instruction set & chip hardware become more complex with each
generation of computers.
So that as many instructions as possible could be stored in memory with the least
possible wasted space, individual instructions could be of almost any length---this means that
different instructions will take different amounts of clock time to execute, slowing down the
overall performance of the machine.
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Many specialized instructions aren't used frequently enough to justify their existence -
-- approximately 20% of the available instructions are used in a typical program.
CISC instructions typically set the condition codes as a side effect of the instruction.
Not only does setting the condition codes take time, but programmers have to remember to
examine the condition code bits before a subsequent instruction changes them.
1.6 Memory Architecture
There two different types memory architectures there are:
Harvard Architecture
Von-Neumann Architecture
Harvard Architecture
Computers have separate memory areas for program instructions and data. There are two
or more internal data buses, which allow simultaneous access to both instructions and data.
The CPU fetches program instructions on the program memory bus.
The Harvard architecture is a computer architecture with physically separate storage and
signal pathways for instructions and data. The term originated from the Harvard Mark I relaybased computer, which stored instructions on punched tape (24 bits wide) and data in electromechanical counters. These early machines had limited data storage, entirely contained
within the central processing unit, and provided no access to the instruction storage as data.
Programs needed to be loaded by an operator, the processor could not boot itself.
Figure:1.6 Harvard Architecture
Modern uses of the Harvard architecture:

The principal advantage of the pure Harvard architecture - simultaneous access to more
than one memory system - has been reduced by modified Harvard processors using modern
CPU cache systems. Relatively pure Harvard architecture machines are used mostly in
applications where tradeoffs, such as the cost and power savings from omitting caches,
outweigh the programming penalties from having distinct code and data address spaces.
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Digital signal processors (DSPs) generally execute small, highly-optimized audio or
video processing algorithms. They avoid caches because their behavior must be extremely
reproducible. The difficulties of coping with multiple address spaces are of secondary
concern to speed of execution. As a result, some DSPs have multiple data memories in
distinct address spaces to facilitate SIMD and VLIW processing. Texas Instruments TMS320
C55x processors, as one example, have multiple parallel data busses (two write, three read)
and one instruction bus.
Microcontrollers are characterized by having small amounts of program (flash
memory) and data (SRAM) memory, with no cache, and take advantage of the Harvard
architecture to speed processing by concurrent instruction and data access. The separate
storage means the program and data memories can have different bit depths, for example
using 16-bit wide instructions and 8-bit wide data. They also mean that instruction pre-fetch
can be performed in parallel with other activities. Examples include, the AVR by Atmel
Corp, the PIC by Microchip Technology, Inc. and the ARM Cortex-M3 processor (not all
ARM chips have Harvard architecture).
Even in these cases, it is common to have special instructions to access program
memory as data for read-only tables, or for reprogramming.
Von-Neumann Architecture
A computer has a single, common memory space in which both program instructions
and data are stored. There is a single internal data bus that fetches both instructions and data.
They cannot be performed at the same time
The von Neumann architecture is a design model for a stored-program digital
computer that uses a central processing unit (CPU) and a single separate storage structure
("memory") to hold both instructions and data. It is named after the mathematician and early
computer scientist John von Neumann. Such computers implement a universal Turing
machine and have a sequential architecture.
A stored-program digital computer is one that keeps its programmed instructions,
as well as its data, in read-write, random-access memory (RAM). Stored-program computers
were advancement over the program-controlled computers of the 1940s, such as the Colossus
and the ENIAC, which were programmed by setting switches and inserting patch leads to
route data and to control signals between various functional units. In the vast majority of
modern computers, the same memory is used for both data and program instructions. The
mechanisms for transferring the data and instructions between the CPU and memory are,
however, considerably more complex than the original von Neumann architecture.
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The terms "von Neumann architecture" and "stored-program computer" are generally used
interchangeably, and that usage is followed in this article.
Figure: 1.6.1 Schematic of the Von-Neumann Architecture.

Basic Difference between Harvard and Von-Neumann Architecture
The primary difference between Harvard architecture and the Von Neumann
architecture is in the Von Neumann architecture data and programs are stored in the same
memory and managed by the same information handling system.
Whereas the Harvard architecture stores data and programs in separate memory
devices and they are handled by different subsystems.
In a computer using the Von-Neumann architecture without cache; the central
processing unit (CPU) can either be reading and instruction or writing/reading data to/from
the memory. Both of these operations cannot occur simultaneously as the data and
instructions use the same system bus.
In a computer using the Harvard architecture the CPU can both read an instruction
and access data memory at the same time without cache. This means that a computer with
Harvard architecture can potentially be faster for a given circuit complexity because data
access and instruction fetches do not contend for use of a single memory pathway.
Today, the vast majority of computers are designed and built using the Von Neumann
architecture template primarily because of the dynamic capabilities and efficiencies gained in
designing, implementing, operating one memory system as opposed to two. Von Neumann
architecture may be somewhat slower than the contrasting Harvard Architecture for certain
specific tasks, but it is much more flexible and allows for many concepts unavailable to
Harvard architecture such as self programming, word processing and so on.
Harvard architectures are typically only used in either specialized systems or for very
specific uses.
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CHAPTER-2
POWER SUPPLY
POWER SUPPLY:
Block diagram:
Figure:2.1 Block diagram of Power Supply

Circuit diagram:
Fig 2.2 Circuit diagram of power supply
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Description:
2.1. Transformer:
A transformer is a device that transfers electrical energy from one circuit to
another through inductively coupled conductorsthe transformer's coils. A varying current
in the first or primary winding creates a varying magnetic flux in the transformer's core, and
thus a varying magnetic field through the secondary winding. This varying magnetic field
induces a varying electromotive force (EMF) or "voltage" in the secondary winding. This
effect is called mutual induction.
Figure:2.1.1 Transformer Symbol

(OR)
Transformer is a device that converts the one form energy to another form of energy
like a transducer.
Figure: 2.1.2Transformer
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Basic Principle:
A transformer makes use of Faraday's law and the ferromagnetic properties of an iron
core to efficiently raise or lower AC voltages. It of course cannot increase power so that if the
voltage is raised, the current is proportionally lowered and vice versa.
Figure: 2.1.3 Basic Principle

Transformer Working:
A transformer consists of two coils (often called 'windings') linked by an iron
core, as shown in figure below. There is no electrical connection between the coils, instead
they are linked by a magnetic field created in the core.
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Figure: 2.1.4 Basic Transformer

Transformers are used to convert electricity from one voltage to another with minimal
loss of power. They only work with AC (alternating current) because they require a changing
magnetic field to be created in their core. Transformers can increase voltage (step-up) as well
as reduce voltage (step-down).
Alternating current flowing in the primary (input) coil creates a continually changing
magnetic field in the iron core. This field also passes through the secondary (output) coil and
the changing strength of the magnetic field induces an alternating voltage in the secondary
coil. If the secondary coil is connected to a load the induced voltage will make an induced
current flow. The correct term for the induced voltage is 'induced electromotive force' which
is usually abbreviated to induced e.m.f.
The iron core is laminated to prevent 'eddy currents' flowing in the core. These are
currents produced by the alternating magnetic field inducing a small voltage in the core, just
like that induced in the secondary coil. Eddy currents waste power by needlessly heating up
the core but they are reduced to a negligible amount by laminating the iron because this
increases the electrical resistance of the core without affecting its magnetic properties.
Transformers have two great advantages over other methods of changing voltage:
1. They provide total electrical isolation between the input and output, so they can be
safely used to reduce the high voltage of the mains supply.
2. Almost no power is wasted in a transformer. They have a high efficiency (power out /
power in) of 95% or more.
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Classification of Transformer:
Step-Up Transformer
Step-Down Transformer
Step-Down Transformer:
Step down transformers are designed to reduce electrical voltage. Their primary
voltage is greater than their secondary voltage. This kind of transformer "steps down" the
voltage applied to it. For instance, a step down transformer is needed to use a 110v product in
a country with a 220v supply.
Step down transformers convert electrical voltage from one level or phase
configuration usually down to a lower level. They can include features for electrical isolation,
power distribution, and control and instrumentation applications. Step down transformers
typically rely on the principle of magnetic induction between coils to convert voltage and/or
current levels.
Step down transformers are made from two or more coils of insulated wire wound
around a core made of iron. When voltage is applied to one coil (frequently called the
primary or input) it magnetizes the iron core, which induces a voltage in the other coil,
(frequently called the secondary or output). The turns ratio of the two sets of windings
determines the amount of voltage transformation.
Figure: 2.1.5 Step-Down Transformer

An example of this would be: 100 turns on the primary and 50 turns on the secondary, a
ratio of 2 to 1.
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Step down transformers can be considered nothing more than a voltage ratio device.
With step down transformers the voltage ratio between primary and secondary
will mirror the "turns ratio" (except for single phase smaller than 1 kva which have
compensated secondary). A practical application of this 2 to 1 turns ratio would be a 480 to
240 voltage step down. Note that if the input were 440 volts then the output would be 220
volts. The ratio between input and output voltage will stay constant. Transformers should not
be operated at voltages higher than the nameplate rating, but may be operated at lower
voltages than rated. Because of this it is possible to do some non-standard applications using
standard transformers.
Single phase step down transformers 1 kva and larger may also be reverse
connected to step-down or step-up voltages. (Note: single phase step up or step down
transformers sized less than 1 KVA should not be reverse connected because the secondary
windings have additional turns to overcome a voltage drop when the load is applied. If
reverse connected, the output voltage will be less than desired.)
Step-Up Transformer:
A step up transformer has more turns of wire on the secondary coil, which makes a
larger induced voltage in the secondary coil. It is called a step up transformer because the
voltage output is larger than the voltage input.
Step-up transformer 110v 220v design is one whose secondary voltage is greater
than its primary voltage. This kind of transformer "steps up" the voltage applied to it. For
instance, a step up transformer is needed to use a 220v product in a country with a 110v
supply.
A step up transformer 110v 220v converts alternating current (AC) from one
voltage to another voltage. It has no moving parts and works on a magnetic induction
principle; it can be designed to "step-up" or "step-down" voltage. So a step up transformer
increases the voltage and a step down transformer decreases the voltage.
The primary components for voltage transformation are the step up transformer
core and coil. The insulation is placed between the turns of wire to prevent shorting to one
another or to ground. This is typically comprised of Mylar, nomex, Kraft paper, varnish, or
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other materials. As a transformer has no moving parts, it will typically have a life expectancy
between 20 and 25 years.
Figure: 2.1.6 Step-Up Transformer

Applications
Generally these Step-Up Transformers are used in industries applications only.
Turns Ratio and Voltage
The ratio of the number of turns on the primary and secondary coils determines the
ratio of the voltages...
where Vp is the primary (input) voltage, Vs is the secondary (output) voltage, Np is the
number of turns on the primary coil, and Ns is the number of turns on the secondary coil.
2.2 Diodes:
Diodes allow electricity to flow in only one direction. The arrow of the circuit
symbol shows the direction in which the current can flow. Diodes are the electrical version
of a valve and early diodes were actually called valves.
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Figure: 2.2.1 Diode Symbol

A diode is a device which only allows current to flow through it in one direction.
In this direction, the diode is said to be 'forward-biased' and the only effect on the signal is
that there will be a voltage loss of around 0.7V. In the opposite direction, the diode is said to
be 'reverse-biased' and no current will flow through it.
2.3 Rectifier:
The purpose of a rectifier is to convert an AC waveform into a DC waveform (OR)
Rectifier converts AC current or voltages into DC current or voltage. There are two different
rectification circuits, known as 'half-wave' and 'full-wave' rectifiers. Both use components
called diodes to convert AC into DC.
The Half-wave Rectifier:
The half-wave rectifier is the simplest type of rectifier since it only uses one diode, as
shown in figure .
Figure: 2.3.1 Half Wave Rectifier

Figure 2 shows the AC input waveform to this circuit and the resulting output. As
you can see, when the AC input is positive, the diode is forward-biased and lets the current
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through. When the AC input is negative, the diode is reverse-biased and the diode does not
let any current through, meaning the output is 0V. Because there is a 0.7V voltage loss
across the diode, the peak output voltage will be 0.7V less than Vs.
Figure: 2.3.2 Half-Wave Rectification

While the output of the half-wave rectifier is DC (it is all positive), it would not be
suitable as a power supply for a circuit. Firstly, the output voltage continually varies between
0V and Vs-0.7V, and secondly, for half the time there is no output at all.
The Full-wave Rectifier:
The circuit in figure 3 addresses the second of these problems since at no time is the
output voltage 0V. This time four diodes are arranged so that both the positive and negative
parts of the AC waveform are converted to DC. The resulting waveform is shown in figure 4.
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Figure: 2.3.4 Full-Wave Rectifier
Figure:2.3.5 Full-Wave Rectification

When the AC input is positive, diodes A and B are forward-biased, while diodes C
and D are reverse-biased. When the AC input is negative, the opposite is true - diodes C and
D are forward-biased, while diodes A and B are reverse-biased.
While the full-wave rectifier is an improvement on the half-wave rectifier, its output
still isn't suitable as a power supply for most circuits since the output voltage still varies
between 0V and Vs-1.4V. So, if you put 12V AC in, you will 10.6V DC out.
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2.4 Capacitor Filter:
The capacitor-input filter, also called "Pi" filter due to its shape that looks like the
Greek letter pi, is a type of electronic filter. Filter circuits are used to remove unwanted or
undesired frequencies from a signal.
Figure:2.4.1 Capacitor Filter

A typical capacitor input filter consists of a filter capacitor C1, connected across the
rectifier output, an inductor L, in series and another filter capacitor connected across the load.
1. The capacitor C1 offers low reactance to the AC component of the rectifier output
while it offers infinite reactance to the DC component. As a result the capacitor shunts
an appreciable amount of the AC component while the DC component continues its
journey to the inductor L
2. The inductor L offers high reactance to the AC component but it offers almost zero
reactance to the DC component. As a result the DC component flows through the
inductor while the AC component is blocked.
3. The capacitor C2 bypasses the AC component which the inductor had failed to block.
As a result only the DC component appears across the load RL.
Figure:2.4.2Centered Tapped Full-Wave Rectifier with a Capacitor Filter

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2.5 Voltage Regulator:
A voltage regulator is an electrical regulator designed to automatically maintain a constant
voltage level. It may use an electromechanical mechanism, or passive or active electronic
components. Depending on the design, it may be used to regulate one or more AC or DC
voltages. There are two types of regulator are they.
Positive Voltage Series (78xx) and
Negative Voltage Series (79xx)
78xx:78 indicate the positive series and xx indicates the voltage rating. Suppose 7805
produces the maximum 5V.05indicates the regulator output is 5V.
79xx:78 indicate the negative series and xx indicates the voltage rating. Suppose 7905
produces the maximum -5V.05indicates the regulator output is -5V.
These regulators consists the three pins there are
Pin1: It is used for input pin.
Pin2: This is ground pin for regulator
Pin3: It is used for output pin. Through this pin we get the output.
Figure: 2.5.1 Regulator
IBM PC/ compatible computers based on x86(8086, 80286, 386, 486 and Pentium)
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2.6 MAX 232
FIG 2.6.1 max232

2.6.1 RS-232 WAVEFORM
TTL/CMOS Serial Logic Waveform

The diagram above shows the expected waveform from the UART when using the
common 8N1 format. 8N1 signifies 8 Data bits, No Parity and 1 Stop Bit. The RS-232 line,
when idle is in the Mark State (Logic 1). A transmission starts with a start bit which is (Logic
0). Then each bit is sent down the line, one at a time. The LSB (Least Significant Bit) is sent
first. A Stop Bit (Logic 1) is then appended to the signal to make up the transmission.
The data sent using this method, is said to be framed. That is the data is framed between a
Start and Stop Bit.
RS-232 Voltage levels
+3 to +25 volts to signify a "Space" (Logic 0)
-3 to -25 volts for a "Mark" (logic 1).
Any voltage in between these regions (i.e. between +3 and -3 Volts) is undefined.
The data byte is always transmitted least-significant-bit first.
The bits are transmitted at specific time intervals determined by the baud rate of the serial
signal. This is the signal present on the RS-232 Port of your computer, shown below.
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RS-232 Logic Waveform
2.6.2 RS-232 LEVEL CONVERTER

Standard serial interfacing of microcontroller (TTL) with PC or any RS232C
Standard device , requires TTL to RS232 Level converter . A MAX232 is used for this
purpose. It provides 2-channel RS232C port and requires external 10uF capacitors.
The driver requires a single supply of +5V.
Fig 2.6.2 max 232 pin diagram

2.6.3 Serial communication
When a processor communicates with the outside world, it provides data in byte
sized chunks. Computers transfer data in two ways: parallel and serial. In parallel data
transfers, often more lines are used to transfer data to a device and 8 bit data path is
expensive. The serial communication transfer uses only a single data line instead of the 8 bit
data line of parallel communication which makes the data transfer not only cheaper but also
makes it possible for two computers located in two different cities to communicate over
telephone.
Serial data communication uses two methods, asynchronous and synchronous. The
synchronous method transfers data at a time while the asynchronous transfers a single byte at
a time. There are some special IC chips made by many manufacturers for data
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communications. These chips are commonly referred to as UART (universal asynchronous
receiver-transmitter) and USART (universal synchronous asynchronous receiver transmitter).
The AT89C51 chip has a built in UART.
In asynchronous method, each character is placed between start and stop bits. This
is called framing. In data framing of asynchronous communications, the data, such as ASCII
characters, are packed in between a start and stop bit. We have a total of 10 bits for a
character: 8 bits for the ASCII code and 1 bit each for the start and stop bits. The rate of serial
data transfer communication is stated in bps or it can be called as baud rate.
To allow the compatibility among data communication equipment made by various
manufacturers, and interfacing standard called RS232 was set by the Electronics industries
Association in 1960. Today RS232 is the most widely used I/O interfacing standard. This
standard is used in PCs and numerous types of equipment. However, since the standard was
set long before the advent of the TTL logic family, its input and output voltage levels are not
TTL compatible. In RS232, a 1 bit is represented by -3 to -25V, while a 0 bit is represented
+3 to +25 V, making -3 to +3 undefined. For this reason, to connect any RS232 to a
microcontroller system we must use voltage converters such as MAX232 to connect the TTL
logic levels to RS232 voltage levels and vice versa. MAX232 ICs are commonly referred to
as line drivers.
Fig 2.6.3 serial communication
The RS232 cables are generally referred to as DB-9 connector. In labeling, DB-9P
refers to the plug connector (male) and DB-9S is for the socket connector (female). The
simplest connection between a PC and microcontroller requires a minimum of three pin,
TXD, RXD, and ground. Many of the pins of the RS232 connector are used for handshaking
signals. They are bypassed since they are not supported by the UART chip.
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Fig 2.6.3(a) RS-232/V.24-EIA-574

IBM PC/ compatible computers based on x86(8086, 80286, 386, 486 and Pentium)
microprocessors normally have two COM ports. Both COM ports have RS232 type
connectors..
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CHAPTER-3
MICRO CONTROLLER
THE MICROCONTROLLER:
A microcontroller is a general purpose device, but that is meant to read data, perform
limited calculations on that data and control its environment based on those calculations. The
prime use of a microcontroller is to control the operation of a machine using a fixed program
that is stored in ROM and that does not change over the lifetime of the system.
The microcontroller design uses a much more limited set of single and double byte
instructions that are used to move data and code from internal memory to the ALU. The
microcontroller is concerned with getting data from and to its own pins; the architecture and
instruction set are optimized to handle data in bit and byte size.
The AT89C51 is a low-power, high-performance CMOS 8-bit microcontroller with
4k bytes of Flash Programmable and erasable read only memory (EROM). The device is
manufactured using Atmels high-density nonvolatile memory technology and is functionally
compatible with the industry-standard 80C51 microcontroller instruction set and pin out. By
combining versatile 8-bit CPU with Flash on a monolithic chip, the Atmels AT89c51 is a
powerful microcomputer, which provides a high flexible and cost- effective solution to many
embedded control applications.
3.1 AT89C51 MICROCONTROLLER
3.1.1FEATURES
80C51 based architecture
4-Kbytes of on-chip Reprogrammable Flash Memory
128 x 8 RAM
Two 16-bit Timer/Counters
Full duplex serial channel
Boolean processor
Four 8-bit I/O ports, 32 I/O lines
Memory addressing capability-64K ROM and 64K RAM
Power save modes-Idle and power-down
Six interrupt sources
Most instructions execute in 0.3 us
CMOS and TTL compatible
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Maximum speed: 40 MHz @ Vcc = 5V
Industrial temperature available
Packages available:
40-pin DIP
44-pin PLCC
44-pin PQFP
3.1.2 Pin configuration:
Fig .3.1.2 Pin configuration
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3.1.3 AT89C51 Block Diagram:
Fig.3.1.3 AT89C51 Block Diagram
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3.1.4 PIN DISCRIPTION:
VCC:
Supply voltage
GND:
Ground
Port 0:
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight
TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance
inputs.
Port 0 can also be configured to be the multiplexed low order address/data bus during
access to external program and data memory. In this mode, P 0 has internal pull-ups. Port 0
also receives the code bytes during Flash programming and outputs the code bytes during
program verification. External pull-ups are required during program verification.
Port 1:
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The port 1output
buffers can sink/source four TTL inputs. When 1s are written to port 1 pins, they are pulled
high by the internal pull-ups can be used as inputs. As inputs, Port 1 pins that are externally
being pulled low will source current (1) because of the internal pull-ups.
Port 2:
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The port 2 output
being pulled low will source current because of the internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program
memory and during access to DPTR. In this application Port 2 uses strong internal pull-ups
when emitting 1s. During accesses to external data memory that use 8-bit data address
(MOVX@R1), Port 2 emits the contents of the P2 Special Function Register. Port 2 also
receives the high-order address bits and some control signals during Flash programming and
verification.
Port 3:
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The port 3 output
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being pulled low will source current because of the internal pull-ups.
Port 3 also receives some control signals for Flash Programming and verification.
Port pin
Alternate Functions
P3.0
RXD(serial input port)
P3.1
TXD(serial input port)
P3.2
INT0(external interrupt 0)
P3.3
INT1(external interrupt 1)
P3.4
T0(timer 0 external input)
P3.5
T1(timer 1 external input)
P3.6
WR(external data memory write strobe)
P3.7
RD(external data memory read strobe)

Table 3.1. Alternate Functions
RST:
Rest input A on this pin for two machine cycles while the oscillator is running resets
the device.
ALE/PROG:
Address Latch Enable is an output pulse for latching the low byte of the address
during access to external memory. This pin is also the program pulse input (PROG) during
Flash programming.
In normal operation ALE is emitted at a constant rate of 1/16 the oscillator frequency and
may be used for external timing or clocking purpose. Note, however, that one ALE pulse is
skipped during each access to external Data memory.
PSEN:
Program Store Enable is the read strobe to external program memory when the
AT89c51 is executing code from external program memory PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external
data memory.
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EA /VPP:
External Access Enable (EA) must be strapped to GND in order to enable the device
to fetch code from external program memory locations starting at 0000h up to FFFFH. Note,
however, that if lock bit 1 is programmed EA will be internally latched on reset. EA should
be strapped to Vcc for internal program executions. This pin also receives the 12-volt
programming enable voltage (Vpp) during Flash programming when 12-volt programming is
selected.
XTAL1:
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL 2:
Output from the inverting oscillator amplifier.
3.2 OPERATING DESCRIPTION
The detail description of the AT89C51 included in this description is:
Memory Map and Registers
Timer/Counters
Interrupt System
MEMORY MAP AND REGISTERS
Memory
The AT89C51 has separate address spaces for program and data memory. The
program and data memory can be up to 64K bytes long. The lower 4K program memory can
reside on-chip. The AT89C51 has 128 bytes of on-chip RAM.
The lower 128 bytes can be accessed either by direct addressing or by indirect
addressing. The lower 128 bytes of RAM can be divided into 3 segments as listed below
1. Register Banks 0-3: locations 00H through 1FH (32 bytes). The device after reset defaults
to register bank 0. To use the other register banks, the user must select them in software. Each
register bank contains eight 1-byte registers R0-R7. Reset initializes the stack point to
location 07H, and is incremented once to start from 08H, which is the first register of the
second register bank.
2. Bit Addressable Area: 16 bytes have been assigned for this segment 20H-2FH. Each one
of the 128 bits of this segment can be directly addressed (0-7FH). Each of the 16 bytes in this
segment can also be addressed as a byte.
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3. Scratch Pad Area: 30H-7FH are available to the user as data RAM. However, if the data
pointer has been initialized to this area, enough bytes should be left aside to prevent SP data
destruction.
Fig.3.2. special function registers
SPECIAL FUNCTION REGISTERS

The Special Function Registers (SFR's) are located in upper 128 Bytes direct
addressing area. The SFR Memory Map in shows that.
Not all of the addresses are occupied. Unoccupied addresses are not implemented on
the chip. Read accesses to these addresses in general return random data, and write accesses
have no effect. User software should not write 1s to these unimplemented locations, since
they may be used in future microcontrollers to invoke new features. In that case, the reset or
inactive values of the new bits will always be 0, and their active values will be 1.
The functions of the SFRs are outlined in the following sections.
Accumulator (ACC):
ACC is the Accumulator register. The mnemonics for Accumulator-specific
instructions, however, refer to the Accumulator simply as A.
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B Register (B):
The B register is used during multiply and divide operations. For other instructions
it can be treated as another scratch pad register.
Program Status Word (PSW):
The PSW register contains program status information.
Stack Pointer (SP):
The Stack Pointer Register is eight bits wide. It is incremented before data is stored
during PUSH and CALL executions. While the stack may reside anywhere in on chip RAM,
the Stack Pointer is initialized to 07H after a reset. This causes the stack to begin at location
08H.
Data Pointer (DPTR):
The Data Pointer consists of a high byte (DPH) and a low byte (DPL). Its function is
to hold a 16-bit address. It may be manipulated as a 16-bit register or as two independent 8bit registers.
Serial Data Buffer (SBUF):
The Serial Data Buffer is actually two separate registers, a transmit buffer and a
receive buffer register. When data is moved to SBUF, it goes to the transmit buffer, where it
is held for serial transmission. (Moving a byte to SBUF initiates the transmission.) When data
is moved from SBUF, it comes from the receive buffer.
Timer Registers:
Register pairs (TH0, TL0) and (TH1, TL1) are the 16-bit Counter registers for
Timer/Counters 0 and 1, respectively.
Control Registers:
Special Function Registers IP, IE, TMOD, TCON, SCON, and PCON contain control
and status bits for the interrupt system, the Timer/Counters, and the serial port.
TIMER/COUNTERS
The IS89C51 has two 16-bit Timer/Counter registers: Timer 0 and Timer 1. All two
can be configured to operate either as Timers or event counters. As a Timer, the register is
incremented every machine cycle. Thus, the register counts machine cycles. Since a machine
cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.
As a Counter, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T0 and T1. The external input is sampled during S5P2 of
every machine cycle. When the samples show a high in one cycle and a low in the next
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cycle, the count is incremented. The new count value appears in the register during S3P1 of
the cycle following the one in which the transition was detected. Since two machine cycles
(24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate
is 1/24 of the oscillator frequency. There are no restrictions on the duty cycle of the external
input signal, but it should be held for at least one full machine cycle to ensure that a given
level is sampled at least once before it changes.
In addition to the Timer or Counter functions, Timer 0 and Timer 1 have four operating
modes: 13-bit timer, 16-bit timer, 8-bit auto-reload, split timer.
TIMERS:
OSCILLATOR
FREQUENCY
12D
TLX
TR
THX
TFX
Fig.3.2.1. Timers
SFRS USED IN TIMERS

The special function registers used in timers are,
TMOD Register
TCON Register
Timer(T0) & timer(T1) Registers
(i) TMOD Register:

TMOD is dedicated solely to the two timers (T0 & T1).
The timer mode SFR is used to configure the mode of operation of each of the two
timers. Using this SFR your program may configure each timer to be a 16-bit timer, or
13 bit timer, 8-bit auto reload timer, or two separate timers. Additionally you may
configure the timers to only count when an external pin is activated or to count
events that are indicated on an external pin.
It can consider as two duplicate 4-bit registers, each of which controls the action of
one of the timers.
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(ii) TCON Register:
The timer control SFR is used to configure and modify the way in which the 8051s
two timers operate. This SFR controls whether each of the two timers is running or
stopped and contains a flag to indicate that each timer has overflowed. Additionally,
some non-timer related bits are located in TCON SFR.
These bits are used to configure the way in which the external interrupt flags are
activated, which are set when an external interrupt occurs.
(iii) TIMER 0 (T0):
TO (Timer 0 low/high, address 8A/8C h)

These two SFRs taken together represent timer 0. Their exact behavior
depends on how the timer is configured in the TMOD SFR; however, these timers
always count up. What is configurable is how and when they increment in value.
T H0
T L0
(iv) TIMER 1 (T1):
T1 (Timer 1 Low/High, address 8B/ 8D h)
These two SFRs, taken together, represent timer 1. Their exact behavior depends on how the
timer is configured in the TMOD SFR; however, these timers always count up. What is
Configurable is how and when they increment in value.
TH1
TL1
The Timer or Counter function is selected by control bits C/T in the Special Function
Register TMOD. These two Timer/Counters have four operating modes, which are selected
by bit pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same for both Timer/Counters,
but Mode 3 is different.
The four modes are described in the following sections.
Mode 0:
Both Timers in Mode 0 are 8-bit Counters with a divide-by-32 pre scalar. Figure 8
shows the Mode 0 operation as it applies to Timer 1. In this mode, the Timer register is
configured as a 13-bit register. As the count rolls over from all 1s to all 0s, it sets the Timer
interrupt flag TF1. The counted input is enabled to the Timer when TR1 = 1 and either GATE
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= 0 or INT1 = 1. Setting GATE = 1 allows the Timer to be controlled by external input INT1,
to facilitate pulse width measurements. TR1 is a control bit in the Special Function Register
TCON. Gate is in TMOD.
The 13-bit register consists of all eight bits of TH1 and the lower five bits of TL1. The
upper three bits of TL1 are indeterminate and should be ignored. Setting the run flag (TR1)
does not clear the registers.
Mode 0 operation is the same for Timer 0 as for Timer 1, except that TR0, TF0 and
INT0 replace the corresponding Timer 1 signals. There are two different GATE bits, one for
Timer 1 (TMOD.7) and one for Timer 0 (TMOD.3).
Mode 1
Mode 1 is the same as Mode 0, except that the Timer register is run with all 16 bits.
The clock is applied to the combined high and low timer registers (TL1/TH1). As clock
pulses are received, the timer counts up: 0000H, 0001H, 0002H, etc. An overflow occurs on
the FFFFH-to-0000H overflow flag. The timer continues to count. The overflow flag is the
TF1 bit in TCON that is read or written by software
Mode 2
Mode 2 configures the Timer register as an 8-bit Counter (TL1) with automatic
reload, as shown in Figure 10. Overflow from TL1 not only sets TF1, but also reloads TL1
with the contents of TH1, which is preset by software. The reload leaves the TH1 unchanged.
Mode 2 operation is the same for Timer/Counter 0.
Mode 3
Timer 1 in Mode 3 simply holds its count. The effect is the same as setting TR1 = 0.
Timer 0 in Mode 3 establishes TL0and TH0 as two separate counters. The logic for Mode 3
on Timer 0 is shown in Figure 11. TL0 uses the Timer 0 control bits: C/T, GATE, TR0,
INT0, and TF0. TH0 is locked into a timer function (counting machine cycles) and over the
use of TR1 and TF1 from Timer 1. Thus, TH0 now controls the Timer 1 interrupt.
Mode 3 is for applications requiring an extra 8-bit timer or counter. With Timer 0 in
Mode 3, the AT89C51 can appear to have three Timer/Counters. When Timer 0 is in Mode 3,
Timer 1 can be turned on and off by switching it out of and into its own Mode 3. In this case,
Timer 1 can still be used by the serial port as a baud rate generator or in any application not
requiring an interrupt.
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3.3 INTERRUPT SYSTEM
An interrupt is an external or internal event that suspends the operation of micro
controller to inform it that a device needs its service. In interrupt method, whenever any
device needs its service, the device notifies the micro controller by sending it an interrupt
signal. Upon receiving an interrupt signal, the micro controller interrupts whatever it is doing
and serves the device. The program associated with interrupt is called as interrupt service
subroutine (ISR).Main advantage with interrupts is that the micro controller can serve many
devices.
Baud Rate
The baud rate in Mode 0 is fixed as shown in the following equation. Mode 0 Baud
Rate = Oscillator Frequency /12 the baud rate in Mode 2 depends on the value of the SMOD
bit in Special Function Register PCON. If SMOD = 0 the baud rate is 1/64 of the oscillator
frequency. If SMOD = 1, the baud rate is 1/32 of the oscillator frequency.
Mode 2 Baud Rate = 2SMODx (Oscillator Frequency)/64.
In the IS89C51, the Timer 1 overflow rate determines the baud rates in Modes 1 and 3.
NUMBER OF INTERRUPTS IN 89C51:
There are basically five interrupts available to the user. Reset is also considered as an
interrupt. There are two interrupts for timer, two interrupts for external hardware interrupt
and one interrupt for serial communication.
Memory location
Interrupt name
0000H
Reset
0003H
External interrupt 0
000BH
Timer interrupt 0
0013H
External interrupt 1
001BH
Timer interrupt 1
0023H
Serial COM interrupt
Lower the vector, higher the priority. The External Interrupts INT0 and INT1 can
each be either level-activated or transition-activated, depending on bits IT0 and IT1 in
Register TCON. The flags that actually generate these interrupts are the IE0 and IE1 bits in
TCON. When the service routine is vectored, hardware clears the flag that generated an
external interrupt only if the interrupt was transition-activated. If the interrupt was levelactivated, then the external requesting source (rather than the on-chip hardware) controls the
request flag.
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The Timer 0 and Timer 1 Interrupts are generated by TF0and TF1, which are set by a
rollover in their respective Timer/Counter registers (except for Timer 0 in Mode 3).When a
timer interrupt is generated, the on-chip hardware clears the flag that is generated.
The Serial Port Interrupt is generated by the logical OR of RI and TI. The service
routine normally must determine whether RI or TI generated the interrupt, and the bit must be
cleared in software.
All of the bits that generate interrupts can be set or cleared by software, with the same
result as though they had been set or cleared by hardware. That is, interrupts can be generated
and pending interrupts can be canceled in software.
Each of these interrupt sources can be individually enabled or disabled by setting or
clearing a bit in Special Function Register IE (interrupt enable) at address 0A8H. There is a
global enable/disable bit that is cleared to disable all interrupts or to set the interrupts.
IE (Interrupt enable register):
Steps in enabling an interrupt:
Bit D7 of the IE register must be set to high to allow the rest of register to take effect.
If EA=1, interrupts are enabled and will be responded to if their corresponding bits in IE are
high. If EA=0, no interrupt will be responded to even if the associated bit in the IE register is
high.
Description of each bit in IE register:
D7 bit: Disables all interrupts. If EA =0, no interrupt is acknowledged, if EA=1 each
interrupt source is individually enabled or disabled by setting or clearing its enable bit.
D6 bit: Reserved.
D5 bit: Enables or disables timer 2 over flow interrupt (in 8052).
D4 bit: Enables or disables serial port interrupt.
D3 bit: Enables or disables timer 1 over flow interrupt.
D2 bit: Enables or disables external interrupt 1.
D1 bit: Enables or disables timer 0 over flow interrupt.
D0 bit: Enables or disables external interrupt 0.
Interrupt priority in 89C51:
There is one more SRF to assign priority to the interrupts which is named as interrupt
priority (IP). User has given the provision to assign priority to one interrupt. Writing one to
that particular bit in the IP register fulfils the task of assigning the priority.
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Description of each bit in IP register:
D7 bit: Reserved.
D6 bit: Reserved.
D5 bit: Timer 2 interrupt priority bit (in 8052).
D4 bit: Serial port interrupt priority bit.
D3 bit: Timer 1 interrupt priority bit.
D2 bit: External interrupt 1 priority bit.
D1 bit: Timer 0 interrupt priority bit.D0 bit: External interrupt 0 priority bit.
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CHAPTER-4
GSM
4.1 GSM:4.1.1Definition of GSM:
GSM (Global System for Mobile communications) is an open, digital cellular
technology used for transmitting mobile voice and data services.
GSM (Global System for Mobile communication) is a digital mobile telephone
system that is widely used in Europe and other parts of the world. GSM uses a variation of
Time Division Multiple Access (TDMA) and is the most widely used of the three digital
wireless telephone technologies (TDMA, GSM, and CDMA). GSM digitizes and compresses
data, then sends it down a channel with two other streams of user data, each in its own time
slot. It operates at either the 900 MHz or 1,800 MHz frequency band. It supports voice calls
and data transfer speeds of up to 9.6 kbit/s, together with the transmission of SMS (Short
Message Service).
4.1.2 History
In 1982, the European Conference of Postal and Telecommunications Administrations
(CEPT) created the Group Special Mobile (GSM) to develop a standard for a mobile
telephone system that could be used across Europe.
In 1987, a memorandum of
understanding was signed by 13 countries to develop a common cellular telephone system

across Europe. Finally the system created by SINTEF lead by Torleiv Maseng was selected.
In 1989, GSM responsibility was transferred to the European Telecommunications
Standards Institute (ETSI) and phase I of the GSM specifications were published in 1990.
The first GSM network was launched in 1991 by Radiolinja in Finland with joint technical
infrastructure maintenance from Ericsson.
By the end of 1993, over a million subscribers were using GSM phone networks
being operated by 70 carriers across 48 countries. As of the end of 1997, GSM service was
available in more than 100 countries and has become the de facto standard in Europe and
Asia.
4.1.3 GSM Frequencies
GSM networks operate in a number of different frequency ranges (separated into
GSM frequency ranges for 2G and UMTS frequency bands for 3G). Most 2G GSM networks
operate in the 900 MHz or 1800 MHz bands. Some countries in the Americas (including
Canada and the United States) use the 850 MHz and 1900 MHz bands because the 900 and
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1800 MHz frequency bands were already allocated. Most 3G GSM networks in Europe
operate in the 2100 MHz frequency band. The rarer 400 and 450 MHz frequency bands are
assigned in some countries where these frequencies were previously used for first-generation
systems.
GSM-900 uses 890915 MHz to send information from the mobile station to the base
station (uplink) and 935960 MHz for the other direction (downlink), providing 124 RF
channels (channel numbers 1 to 124) spaced at 200 kHz. Duplex spacing of 45 MHz is used.
In some countries the GSM-900 band has been extended to cover a larger frequency range.
This 'extended GSM', E-GSM, uses 880915 MHz (uplink) and 925960 MHz (downlink),
adding 50 channels (channel numbers 975 to 1023 and 0) to the original GSM-900 band.
Time division multiplexing is used to allow eight full-rate or sixteen half-rate speech
channels per radio frequency channel. There are eight radio timeslots (giving eight burst
periods) grouped into what is called a TDMA frame. Half rate channels use alternate frames
in the same timeslot.
The channel data rate for all 8 channels is 270.833 Kbit/s, and the frame duration is
4.615 ms. The transmission power in the handset is limited to a maximum of 2 watts in
GSM850/900 and 1 watt in GSM1800/1900. GSM operates in the 900MHz and 1.8GHz
bands in Europe and the 1.9GHz and 850MHz bands in the US. The 850MHz band is also
used for GSM and 3G in Australia, Canada and many South American countries. By having
harmonized spectrum across most of the globe, GSMs international roaming capability
allows users to access the same services when travelling abroad as at home. This gives
consumers seamless and same number connectivity in more than 218 countries.
Terrestrial GSM networks now cover more than 80% of the worlds population. GSM
satellite roaming has also extended service access to areas where terrestrial coverage is not
available.
4.1.4 Mobile Telephone Standards
Table 4.1.4 Mobile Telephone Standards

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1G
The first generation of mobile telephony (written 1G) operated using analogue
communications and portable devices that were relatively large. It used primarily the
following standards:
AMPS (Advanced Mobile Phone System), which appeared in 1976 in the United
States, was the first cellular network standard. It was used primarily in the Americas,
Russia and Asia. This first-generation analogue network had weak security
mechanisms which allowed hacking of telephones lines.
TACS (Total Access Communication System) is the European version of the AMPS
model. Using the 900 MHz frequency band, this system was largely used in England
and then in Asia (Hong-Kong and Japan).
ETACS (Extended Total Access Communication System) is an improved version of

the TACS standard developed in the United Kingdom that uses a larger number of
communication channels.
The first-generation cellular networks were made obsolete by the appearance of an
entirely digital second generation.

Second Generation of Mobile Networks (2G)
The second generation of mobile networks marked a break with the first generation of
cellular telephones by switching from analogue to digital. The main 2G mobile telephony
standards are:
GSM (Global System for Mobile communications) is the most commonly used
standard in Europe at the end of the 20th century and supported in the United States.
This standard uses the 900 MHz and 1800 MHz frequency bands in Europe. In the
United States, however, the frequency band used is the 1900 MHz band. Portable
telephones that are able to operate in Europe and the United States are therefore
called tri-band.
CDMA (Code Division Multiple Access) uses a spread spectrum technique that
allows a radio signal to be broadcast over a large frequency range.
TDMA (Time Division Multiple Access) uses a technique of time division of

communication channels to increase the volume of data transmitted simultaneously.
TDMA technology is primarily used on the American continent, in New Zealand and
in the Asia-Pacific region.
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With the 2G networks, it is possible to transmit voice and low volume digital data, for
example text messages (SMS, for Short Message Service) or multimedia messages (MMS,
for Multimedia Message Service). The GSM standard allows a maximum data rate of 9.6
kbps.
Extensions have been made to the GSM standard to improve throughput. One of these
is the GPRS (General Packet Radio System) service which allows theoretical data rates on
the order of 114 Kbit/s but with throughput closer to 40 Kbit/s in practice. As this technology
does not fit within the "3G" category, it is often referred to as 2.5G
The EDGE (Enhanced Data Rates for Global Evolution) standard, billed as 2.75G,
quadruples the throughput improvements of GPRS with its theoretical data rate of 384 Kbps,
thereby allowing the access for multimedia applications. In reality, the EDGE standard allows
maximum theoretical data rates of 473 Kbit/s, but it has been limited in order to comply with
the IMT-2000 (International Mobile Telecommunications-2000) specifications from the ITU
(International Telecommunications Union).
3G
The IMT-2000 (International Mobile Telecommunications for the year 2000)
specifications from the International Telecommunications Union (ITU) defined the
characteristics of 3G (third generation of mobile telephony). The most important of these
characteristics are:
1. High transmission data rate.
2. 144 Kbps with total coverage for mobile use.
3. 384 Kbps with medium coverage for pedestrian use.
4. 2 Mbps with reduced coverage area for stationary use.
5. World compatibility.
6. Compatibility of 3rd generation mobile services with second generation networks.
3G offers data rates of more than 144 Kbit/s, thereby allowing the access to
multimedia uses such as video transmission, video-conferencing or high-speed internet
access. 3G networks use different frequency bands than the previous networks: 1885-2025
MHz and 2110-2200 MHz.
The main 3G standard used in Europe is called UMTS (Universal Mobile
Telecommunications System) and uses WCDMA (Wideband Code Division Multiple
Access) encoding. UMTS technology uses 5 MHz bands for transferring voice and data, with
data rates that can range from 384 Kbps to 2 Mbps. HSDPA (High Speed Downlink Packet
Access) is a third generation mobile telephony protocol, (considered as "3.5G"), which is able
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to reach data rates on the order of 8 to 10 Mbps. HSDPA technology uses the 5 GHz
frequency band and uses WCDMA encoding.
4.1.5 Introduction to the GSM Standard

The GSM (Global System for Mobile communications) network is at the start of the
21st century, the most commonly used mobile telephony standard in Europe. It is called as
Second Generation (2G) standard because communications occur in an entirely digital mode,
unlike the first generation of portable telephones. When it was first standardized in 1982, it
was called as Group Special Mobile and later, it became an international standard called
"Global System for Mobile communications" in 1991.
In Europe, the GSM standard uses the 900 MHz and 1800 MHz frequency bands. In
the United States, however, the frequency band used is the 1900 MHz band. For this reason,
portable telephones that are able to operate in both Europe and the United States are
called tri-band while those that operate only in Europe are called bi-band.
The GSM standard allows a maximum throughput of 9.6 kbps which allows
transmission of voice and low-volume digital data like text messages (SMS, for Short
Message Service) or multimedia messages (MMS, for Multimedia Message Service).
GSM Standards:
GSM uses narrowband TDMA, which allows eight simultaneous calls on the same
radio frequency. There are three basic principles in multiple access, FDMA (Frequency
Division Multiple Access), TDMA (Time Division Multiple Access), and CDMA (Code
Division Multiple Access). All three principles allow multiple users to share the same
physical channel. But the two competing technologies differ in the way user sharing the
common resource.
TDMA allows the users to share the same frequency channel by dividing the signal
into different time slots. Each user takes turn in a round robin fashion for transmitting and
receiving over the channel. Here, users can only transmit in their respective time slot
CDMA uses a spread spectrum technology that is it spreads the information contained
in a particular signal of interest over a much greater bandwidth than the original signal.
Unlike TDMA, in CDMA several users can transmit over the channel at the same time.
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TDMA in brief:
In late1980s, as a search to convert the existing analog network to digital as a means
to improve capacity, the cellular telecommunications industry association chose TDMA over
FDMA. Time Division Multiplex Access is a type of multiplexing where two or more
channels of information are transmitted over the same link by allocating a different time
interval for the transmission of each channel. The most complex implementation using
TDMA principle is of GSMs (Global System for Mobile communication). To reduce the
effect of co-channel interference, fading and multipath, the GSM technology can use
frequency hopping, where a call jumps from one channel to another channel in a short
interval.
Fig.4.1.5Time Division Multiple Access
TDMA systems still rely on switch to determine when to perform a handoff. Handoff
occurs when a call is switched from one cell site to another while travelling. The TDMA
handset constantly monitors the signals coming from other sites and reports it to the switch
without callers awareness. The switch then uses this information for making better choices
for handoff at appropriate times. TDMA handset performs hard handoff, i.e., whenever the
user moves from one site to another, it breaks the connection and then provides a new
connection with the new site.
Advantages of TDMA:
There are lots of advantages of TDMA in cellular technologies.
1. It can easily adapt to transmission of data as well as voice communication.
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2. It has an ability to carry 64 kbps to 120 Mbps of data rates. This allows the operator to
do services like fax, voice band data and SMS as well as bandwidth intensive
application such as multimedia and video conferencing.
3. Since TDMA technology separates users according to time, it ensures that there will
be no interference from simultaneous transmissions.
4. It provides users with an extended battery life, since it transmits only portion of the
time during conversations. Since the cell size grows smaller, it proves to save base
station equipment, space and maintenance.
TDMA is the most cost effective technology to convert an analog system to digital.
Disadvantages of TDMA:
One major disadvantage using TDMA technology is that the users has a predefined
time slot. When moving from one cell site to other, if all the time slots in this cell are full the
user might be disconnected. Likewise, if all the time slots in the cell in which the user is
currently in are already occupied, the user will not receive a dial tone.
The second problem in TDMA is that it is subjected to multipath distortion. To
overcome this distortion, a time limit can be used on the system. Once the time limit is
expired, the signal is ignored.
The concept of cellular network
Mobile telephone networks are based on the concept of cells, circular zones that
overlap to cover a geographical area.
Fig.4.1.5(a)Cellular Network
Cellular networks are based on the use of a central transmitter-receiver in each cell,
called a "base station" (or Base Transceiver Station, written BTS). The smaller the radius of
a cell, the higher is the available bandwidth. So, in highly populated urban areas, there are
cells with a radius of a few hundred meters, while huge cells of up to 30 kilometers provide
coverage in rural areas.
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In a cellular network, each cell is surrounded by 6 neighboring cells (thus a cell is
generally drawn as a hexagon). To avoid interference, adjacent cells cannot use the same
frequency. In practice, two cells using the same frequency range must be separated by a
distance of two to three times the diameter of the cell.
4.1.6 Architecture of the GSM Network
In a GSM network, the user terminal is called a mobile station. A mobile station is
made up of a SIM (Subscriber Identity Module) card allowing the user to be uniquely
identified and a mobile terminal. The terminals (devices) are identified by a unique 15-digit
identification number called IMEI (International Mobile Equipment Identity). Each SIM card
also has a unique (and secret) identification number called IMSI (International Mobile
Subscriber Identity). This code can be protected using a 4-digit key called a PIN code.
The SIM card therefore allows each user to be identified independently of the
terminal used during communication with a base station. Communications occur through
radio link (air interface) between a mobile station and base sation.
Fig.4.1.6 Architecture of the GSM Network
All the base stations of a cellular network are connected to a base station
controller (BSC) which is responsible for managing distribution of the resources. The
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system consisting of the base station controller and its connected base stations is called
the Base Station Subsystem (BSS).
Finally, the base station controllers are themselves physically connected to the Mobile
Switching Centre (MSC), managed by the telephone network operator, which connects them
to the public telephone network and the Internet. The MSC belongs to a Network Station
Subsystem (NSS), which is responsible for managing user identities, their location and
establishment of communications with other subscribers. The MSC is generally connected to
databases that provide additional functions:
1. The Home Location Register (HLR) is a database containing information
(geographic position, administrative information etc.) of the subscribers registered in
the area of the switch (MSC).
2. The Visitor Location Register (VLR) is a database containing information of users
other than the local subscribers. The VLR retrieves the data of a new user from the
HLR of the user's subscriber zone. The data is maintained as long as the user is in the
zone and is deleted when the user leaves or after a long period of inactivity (terminal
off).
3. The Equipment Identify Register (EIR) is a database listing the mobile terminals.
4. The Authentication Centre (AUC) is responsible for verifying user identities.
5. The cellular network formed in this way is designed to support mobility via
management of handovers (movements from one cell to another).
Finally, GSM networks support the concept of roaming i.e., movement from one operator
network to another.
Introduction to Modem:
Fig.4.1.6.1Modem stands for modulator-demodulator.

A modem is a device or program that enables a computer to transmit data over
telephone or cable lines. Computer information is stored digitally, whereas information
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transmitted over telephone lines is transmitted in the form of analog waves. A modem
converts between these two forms.
Fortunately, there is one standard interface for connecting external modems to
computers called RS-232. Consequently, any external modem can be attached to any
computer that has an RS-232 port, which almost all personal computers have. There are also
modems that come as an expansion board that can be inserted into a vacant expansion slot.
These are sometimes called onboard or internal modems.
While the modem interfaces are standardized, a number of different protocols for
formatting data to be transmitted over telephone lines exist. Some, like CCITT V.34 are
official standards, while others have been developed by private companies. Most modems
have built-in support for the more common protocols at slow data transmission speeds at
least, most modems can communicate with each other. At high transmission speeds, however,
the protocols are less standardized.
Apart from the transmission protocols that they support, the following characteristics
distinguish one modem from another:
Bps: How fast the modem can transmit and receive data. At slow rates, modems are
measured in terms of baud rates. The slowest rate is 300 baud (about 25 cps). At
higher speeds, modems are measured in terms of bits per second (bps). The fastest
modems run at 57,600 bps, although they can achieve even higher data transfer rates
by compressing the data. Obviously, the faster the transmission rate, the faster the
data can be sent and received. It should be noted that the data cannot be received at a
faster rate than it is being sent.
Voice/data: Many modems support a switch to change between voice and data
modes. In data mode, the modem acts like a regular modem. In voice mode, the
modem acts like a regular telephone. Modems that support a voice/data switch have a
built-in loudspeaker and microphone for voice communication.
Auto-answer: An auto-answer modem enables the computer to receive calls in the
absence of the operator.
Data compression: Some modems perform data compression, which enables them to
send data at faster rates. However, the modem at the receiving end must be able to
decompress the data using the same compression technique.
Flash memory: Some modems come with flash memory rather than conventional
ROM which means that the communications protocols can be easily updated if
necessary.
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Fax capability: Most modern modems are fax modems, which mean that they can
send and receive faxes.
4.1.7 GSM Modem:
A GSM modem is a wireless modem that works with a GSM wireless network. A
wireless modem behaves like a dial-up modem. The main difference between them is that a
dial-up modem sends and receives data through a fixed telephone line while a wireless
modem sends and receives data through radio waves.
Fig.4.1.7.1. GSM Modem

A GSM modem can be an external device or a PC Card / PCMCIA Card. Typically,
an external GSM modem is connected to a computer through a serial cable or a USB cable. A
GSM modem in the form of a PC Card / PCMCIA Card is designed for use with a laptop
computer. It should be inserted into one of the PC Card / PCMCIA Card slots of a laptop
computer. Like a GSM mobile phone, a GSM modem requires a SIM card from a wireless
carrier in order to operate.
A SIM card contains the following information:
Subscriber telephone number (MSISDN)
International subscriber number (IMSI, International Mobile Subscriber Identity)
State of the SIM card
Service code (operator)
Authentication key
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PIN (Personal Identification Code)
PUK (Personal Unlock Code)
Computers use AT commands to control modems. Both GSM modems and dial-up modems
support a common set of standard AT commands. In addition to the standard AT commands,
GSM modems support an extended set of AT commands. These extended AT commands are
defined in the GSM standards. With the extended AT commands, the following operations
can be performed:
Reading, writing and deleting SMS messages.
Sending SMS messages.
Monitoring the signal strength.
Monitoring the charging status and charge level of the battery.
Reading, writing and searching phone book entries.
Fig.4.1.7.2. Connection Between PC and GSM Modem
The number of SMS messages that can be processed by a GSM modem per minute
is very low i.e., about 6 to 10 SMS messages per minute.
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4.1..9. Introduction to AT Commands
AT commands are instructions used to control a modem. AT is the abbreviation of AT
tention. Every command line starts with "AT" or "at". That's the reason, modem commands
are called AT commands. Many of the commands that are used to control wired dial-up
modems, such as ATD (Dial), ATA (Answer), ATH (Hook control) and ATO (Return to
online data state) are also supported by GSM modems and mobile phones.
Besides this common AT command set, GSM modems and mobile phones support an
AT command set that is specific to the GSM technology, which includes SMS-related
commands like AT+CMGS (Send SMS message), AT+CMSS (Send SMS message from
storage), AT+CMGL (List SMS messages) and AT+CMGR (Read SMS messages).
It should be noted that the starting "AT" is the prefix that informs the modem about
the start of a command line. It is not part of the AT command name. For example, D is the
actual AT command name in ATD and +CMGS is the actual AT command name in
AT+CMGS.
Some of the tasks that can be done using AT commands with a GSM modem or mobile
phone are listed below:
Get basic information about the mobile phone or GSM modem. For example, name of
manufacturer
(AT+CGMI),
model
number
(AT+CGMM),
IMEI
number
(International Mobile Equipment Identity) (AT+CGSN) and software version

(AT+CGMR).
Get basic information about the subscriber. For example, MSISDN (AT+CNUM) and
IMSI number (International Mobile Subscriber Identity) (AT+CIMI).
Get the current status of the mobile phone or GSM/GPRS modem. For example,
mobile phone activity status (AT+CPAS), mobile network registration status
(AT+CREG), radio signal strength (AT+CSQ), battery charge level and battery
charging status (AT+CBC).
Establish a data connection or voice connection to a remote modem (ATD, ATA, etc).
Send and receive fax (ATD, ATA, AT+F*).
Send (AT+CMGS, AT+CMSS), read (AT+CMGR, AT+CMGL), write (AT+CMGW)
or delete (AT+CMGD) SMS messages and obtain notifications of newly received
SMS messages (AT+CNMI).
Read (AT+CPBR), write (AT+CPBW) or search (AT+CPBF) phonebook entries.
Perform security-related tasks, such as opening or closing facility locks (AT+CLCK),
checking
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passwords(AT+CPWD).
(Facility lock examples: SIM lock [a password must be given to the SIM card every
time the mobile phone is switched on] and PH-SIM lock [a certain SIM card is
associated with the mobile phone. To use other SIM cards with the mobile phone, a
password must be entered.])
Control the presentation of result codes / error messages of AT commands. For
example, the user can control whether to enable certain error messages (AT+CMEE)
and whether error messages should be displayed in numeric format or verbose format
(AT+CMEE=1 or AT+CMEE=2).
Get or change the configurations of the mobile phone or GSM/GPRS modem. For
example, change the GSM network (AT+COPS), bearer service type (AT+CBST),
radio link protocol parameters (AT+CRLP), SMS center address (AT+CSCA) and
storage of SMS messages (AT+CPMS).
Save and restore configurations of the mobile phone or GSM/GPRS modem. For
example, save (AT+CSAS) and restore (AT+CRES) settings related to SMS
messaging such as the SMS center address.
It should be noted that the mobile phone manufacturers usually do not implement all
AT commands, command parameters and parameter values in their mobile phones. Also, the
behavior of the implemented AT commands may be different from that defined in the
standard. In general, GSM modems, designed for wireless applications, have better support of
AT commands than ordinary mobile phones.
4.1.10. Basic concepts of SMS technology
1. Validity Period of an SMS Message
An SMS message is stored temporarily in the SMS center if the recipient mobile
phone is offline. It is possible to specify the period after which the SMS message will be
deleted from the SMS center so that the SMS message will not be forwarded to the recipient
mobile phone when it becomes online. This period is called the validity period. A mobile
phone should have a menu option that can be used to set the validity period. After setting it,
the mobile phone will include the validity period in the outbound SMS messages
automatically.
2. Message Status Reports
Sometimes the user may want to know whether an SMS message has reached the
recipient mobile phone successfully. To get this information, you need to set a flag in the
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SMS message to notify the SMS center that a status report is required about the delivery of
this SMS message. The status report is sent to the user mobile in the form of an SMS
message.
A mobile phone should have a menu option that can be used to set whether the status
report feature is on or off. After setting it, the mobile phone will set the corresponding flag in
the outbound SMS messages for you automatically. The status report feature is turned off by
default on most mobile phones and GSM modems.
3. Message Submission Reports
After leaving the mobile phone, an SMS message goes to the SMS center. When it
reaches the SMS center, the SMS center will send back a message submission report to the
mobile phone to inform whether there are any errors or failures (e.g. incorrect SMS message
format, busy SMS center, etc). If there is no error or failure, the SMS center sends back a
positive submission report to the mobile phone. Otherwise it sends back a negative
submission report to the mobile phone. The mobile phone may then notify the user that the
message submission was failed and what caused the failure.
If the mobile phone does not receive the message submission report after a period of
time, it concludes that the message submission report has been lost. The mobile phone may
then send the SMS message again to the SMS center. A flag will be set in the new SMS
message to inform the SMS center that this SMS message has been sent before. If the
previous message submission was successful, the SMS center will ignore the new SMS
message but send back a message submission report to the mobile phone. This mechanism
prevents the sending of the same SMS message to the recipient multiple times.
Sometimes the message submission report mechanism is not used and the
acknowledgement of message submission is done in a lower layer.
4 .Message Delivery Reports
After receiving an SMS message, the recipient mobile phone will send back a
message delivery report to the SMS center to inform whether there are any errors or failures
(example causes: unsupported SMS message format, not enough storage space, etc). This
process is transparent to the mobile user. If there is no error or failure, the recipient mobile
phone sends back a positive delivery report to the SMS center. Otherwise it sends back a
negative delivery report to the SMS center.
If the sender requested a status report earlier, the SMS center sends a status report to
the sender when it receives the message delivery report from the recipient. If the SMS center
does not receive the message delivery report after a period of time, it concludes that the
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message delivery report has been lost. The SMS center then ends the SMS message to the
recipient for the second time.
4.2 HUMIDITY SENSOR:

A sensor (also called detectors) is a device that measures a measurable attribute
and converts it into a signal which can be read by an observer or by an instrument. For
example, a mercury-in-glass thermometer converts the measured temperature into expansion
and contraction of a liquid which can be read on a calibrated glass tube. A thermocouple
converts temperature to an output voltage which can be read by a voltmeter.
A humidity sensor, also called a hygrometer, measures and regularly reports the
relative humidity in the air. They may be used in homes for people with illnesses affected by
humidity; as part of home heating, ventilating, and air conditioning (HVAC) systems; and in
humidors or wine cellars. Humidity sensors can also be used in cars, office and industrial
HVAC systems, and in meteorology stations to report and predict weather.A humidity sensor
senses relative humidity. This means that it measures both air temperature and moisture.
Relative humidity, expressed as a percent, is the ratio of actual moisture in the air to the
highest amount of moisture air at that temperature can hold. The warmer the air is, the more
moisture it can hold, so relative humidity changes with fluctuations in temperature.
The most common type of humidity sensor uses what is called capacitive
measurement. This system relies on electrical capacitance, or the ability of two nearby
electrical conductors to create an electrical field between them. The sensor itself is composed
of two metal plates with a non-conductive polymer film between them. The film collects
moisture from the air, and the moisture causes minute changes in the voltage between the two
plates. The changes in voltage are converted into digital readings showing the amount of
moisture in the AIR.
Fig 4.2: Humidity sensor
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4.3 Light Dependent Resistor
A photo resistor or light dependent resistor or cadmium sulfide (CdS) cell is
a resistor whose resistance decreases with increasing incident light intensity. It can also be
referred to as a photoconductor.
A photo resistor is made of a high resistance semiconductor. If light falling on the
device is of high enough frequency, photons absorbed by the semiconductor give
bound electrons enough energy to jump into the conduction band. The resulting free electron
(and its hole partner) conduct electricity, there by lowering resistance.
A photoelectric device can be either intrinsic or extrinsic. An intrinsic semiconductor
has its own charge carriers and is not an efficient semiconductor, e.g. silicon. In intrinsic
devices the only available electrons are in the valence band, and hence the photon must have
enough energy to excite the electron across the entire bandgap. Extrinsic devices have
impurities, also called dopants, added whose ground state energy is closer to the conduction
band; since the electrons do not have as far to jump, lower energy photons (i.e., longer
wavelengths and lower frequencies) are sufficient to trigger the device. If a sample of silicon
has some of its atoms replaced by phosphorus atoms (impurities), there will be extra electrons
available for conduction. This is an example of an extrinsic semiconductor.
Fig.4.3.1 Light Dependent Resistor

Applications:
Photo resistors come in many different types. Inexpensive cadmium sulfide cells can
be found in many consumer items such as camera light meters, street lights, clock
radios, alarms, and outdoor clocks.
They are also used in some dynamic compressors together with a small incandescent
lamp or light emitting diode to control gain reduction.
Lead sulfide (PbS) and indium antimonide (InSb) LDRs (light dependent resistor) are
used for the mid infrared spectral region. Ge:Cu photoconductors are among the best farinfrared detectors available, and are used for infrared astronomy and infrared spectroscopy.
Transducers are used for changing energy types.
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Fig 4.3.2. A light dependent resistor

A light dependent resistor is a small, round semiconductor. Light dependent resistors
are used to re-charge a light during different changes in the light, or they are made to turn a
light on during certain changes in lights. One of the most common uses for light dependent
resistors is in traffic lights. The light dependent resistor controls a built in heater inside the
traffic light, and caXuses it to recharge over night so that the light never dies. Other common
places to find light dependent resistors are in: infrared detectors, clocks and security alarms.
LDRs or Light Dependent Resistors are very useful especially in light/dark sensor circuits.
Normally the resistance of an LDR is very high, sometimes as high as 1000 000 ohms, but
when they are illuminated with light resistance drops dramatically.
The animation opposite shows that when the torch is turned on, the resistance of the LDR
falls, allowing current to pass through it.
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Circuit Wizard software has been used to display, the range of values of a ORP12, LDR .
When a light level of 1000 lux (bright light) is directed towards it, the resistance is 400R
(ohms).
When a light level of 10 lux (very low light level) is directed towards it, the resistance has
risen dramatically to 10.43M (10430000 ohms).
Fig.4.3.3.This is an example of a light sensor circuit

When the light level is low the resistance of the LDR is high. This prevents current from
flowing to the base of the transistors. Consequently the LED does not light.
However, when light shines onto the LDR its resistance falls and current flows into the
base of the first transistor and then the second transistor. The LED lights.
The preset resistor can be turned up or down to increase or decrease resistance, in this way it
can make the circuit more or less sensitive.
Fig. 4.3.4. Schematic Symbol of LDR
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The photo resistor, or Light Dependent Resistor, finds many uses as a low cost photo
sensitive element and was used for many years in photographic light meters as well as other
applications.such as flame, smoke, and burgler detectors, card readers and lighting controls
for street lamps.
Units for the light intensity are Lux or Lumence.
4.3.1.Basic structure:
Although there are many ways in which LDRs or photo resistors can be manufactured,
there are naturally a few more common methods that are seen. Essentially the LDR or photo
resistor consists of a resistive material sensitive to light that is exposed to light. The photo
resistive element comprises section of material with contacts at either end. Although many of
the material used for light dependent resistors are semiconductors, when used as photo
resistors, they are used only as a resistive element and there are no p-n junctions. Accordingly
the devices purely passive.
A typical structure for a Light Dependent Resistor uses an active semiconductor layer that
is deposited on an insulating substrate. The semiconductor is normally lightly doped to enable
it to have the required level of conductivity. Contacts then placed either side of the exposed
area. In many instances the area between the contacts is in the form of zig zag, or inter
digital pattern. This maximizes the exposed area and by keeping the distance between the
contacts small it enhances the gain.
It also possible to use a poly crystalline semiconductor that is deposited onto a
substrate such as ceramic. This makes for a very low cost light dependent resistor.
4.3.2. Operation:
Light Dependent Resistor made of a high resistance semiconductor, if light falling on
the is of high enough efficiently, photon absorbed by the semiconductor give bound electrons
enough energy to jump into the conduction band. The resulting free electron (and its hole
partner) conduct electricity, thereby lowering resistance.
In intrinsic devices, the only available electrons are in the valence band, and hence the
photon must have enough energy to excite the electrons across the entire band gap. Extrinsic
devices have impurities added , which have a ground state energy closer to the conduction
band, since the electrons dont have so far to jump, lower energy photons ( i.e. longer
wavelengths and lower frequencies ) will suffice to trigger the device.
4.3.3. Characteristics of LDR:
The characteristics of LDR are shown below. Here the resistance variations are shown as
a function of illumination. The resistance of LDR decreases with increasing incident light
intensity
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1000
100
Res.
10
1.0
0.1
0.1
1.0
10
100
( Ftc )*
*1 Ftc = 10.764 lumens
Fig 4.3.4.(a) Characteristics of LDR
4.3.4.LDR Applications:
LDRs are very useful especially in light/dark sensor circuits. Normally the resistance
of LDR is very high, sometimes as high as 1000k ohms,but when they are illuminated with
light, resistance drops immediately.
1. Camera light meters.
2. Clock radios.
3. Security alarms.
4. Optical switches.
5. Far infrared detector.
6. Streetlights.
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Testing circuit of LDR:

+5v
470K
Vout
LDR
Fig 4.3.5 Testing Circuit of LDR
4.4 Thermistor:
NTC thermistor, bead type, insulated wires
Fig.4.4.Thermistor symbol
A thermistor is a type of resistor with resistance inversely proportional to its
temperature. The word is a portmanteau of thermal and resistor. Samuel Ruben invented the
thermistor in 1930, and was awarded U.S. Patent No. 2,021,491.
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Thermistors are widely used as inrush current limiters, temperature sensors, self-resetting
over current protectors, and self-regulating heating elements.
Assuming, as a first-order approximation, that the relationship between resistance and
temperature is linear, then:
R = kT
where
R = change in resistance
T = change in temperature
k = first-order temperature coefficient of resistance
Thermistors can be classified into two types depending on the sign of k. If k is positive,
the resistance increases with increasing temperature, and the device is called a positive
temperature coefficient (PTC) thermistor, or posistor. If k is negative, the resistance
decreases with increasing temperature, and the device is called a negative temperature
coefficient (NTC) thermistor. Resistors that are not thermistors are designed to have a k as
close to zero as possible, so that their resistance remains nearly constant over a wide
temperature range.
Thermistors differ from resistance temperature detectors (RTD) in that the material used
in a thermistor is generally a ceramic or polymer, while RTDs use pure metals. The
temperature response is also different; RTDs are useful over larger temperature ranges, while
thermistors typically achieve a higher precision within a limited temperature range.
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4.4.1. Contents
1 Steinhart-Hart equation
2 B parameter equation
3 Conduction model
4 Self-heating effects
5 Applications
6 References
7 See also
8 External links
Steinhart-Hart equation
In practice, the linear approximation (above) works only over a small temperature range.
For accurate temperature measurements, the resistance/temperature curve of the device must
be described in more detail. The Steinhart-Hart equation is a widely used third-order
approximation:
where a, b and c are called the Steinhart-Hart parameters, and must be specified for each
device. T is the temperature in kelvins and R is the resistance in ohms. To give resistance as a
function of temperature, the above can be rearranged into:
where
and
The error in the Steinhart-Hart equation is generally less than 0.02C in the measurement of
temperature. As an example, typical values for a thermistor with a resistance of 3000 at
room temperature (25C = 298.15 K) are:
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B parameter equation
NTC thermistors can also be characterised with the B parameter equation, which is essentially
the Steinhart Hart equation with c=0.
where the temperatures are in kelvin and R0 is the resistance at temperature T0 (usually
25 C=298.15 K). Solving for R yields:
or, alternatively,
Where
. This can be solved for the temperature:
The B-parameter equation can also be written as
. This can be
used to convert the function of resistance vs. temperature of a thermistor into a linear function
of lnR vs. 1 / T. The average slope of this function will then yield an estimate of the value of
the B parameter.
Conduction model
Many NTC thermistors are made from a pressed disc or cast chip of a semiconductor
such as a sintered metal oxide. They work because raising the temperature of a
semiconductor increases the number of electrons able to move about and carry charge - it
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promotes them into the conduction band. The more charge carriers that are available, the
more current a material can conduct. This is described in the formula:
I = electric current (ampere)

n=density of charge carriers (count/m)
A = cross-sectional area of the material (m)
v = velocity of charge carriers (m/s)
e = charge of an electron (
coulomb)
The current is measured using an ammeter. Over large changes in temperature, calibration is
necessary. Over small changes in temperature, if the right semiconductor is used, the
resistance of the material is linearly proportional to the temperature. There are many different
semiconducting thermistors with a range from about 0.01 kelvin to 2,000 kelvins (-273.14C
to 1,700C).
Most PTC thermistors are of the "switching" type, which means that their resistance rises
suddenly at a certain critical temperature. The devices are made of a doped polycrystalline
ceramic containing barium titanate (BaTiO3) and other compounds. The dielectric constant of
this ferroelectric material varies with temperature. Below the Curie point temperature, the
high dielectric constant prevents the formation of potential barriers between the crystal
grains, leading to a low resistance. In this region the device has a small negative temperature
coefficient. At the Curie point temperature, the dielectric constant drops sufficiently to allow
the formation of potential barriers at the grain boundaries, and the resistance increases
sharply. At even higher temperatures, the material reverts to NTC behaviour. The equations
used for modeling this behaviour were derived by W. Heywang and G. H. Jonker in the
1960s.
Another type of PTC thermistor is the polymer PTC, which is sold under brand names
such as "Polyswitch" "Semifuse", and "Multifuse". This consists of a slice of plastic with
carbon grains embedded in it. When the plastic is cool, the carbon grains are all in contact
with each other, forming a conductive path through the device. When the plastic heats up, it
expands, forcing the carbon grains apart, and causing the resistance of the device to rise
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rapidly. Like the BaTiO3 thermistor, this device has a highly nonlinear resistance/temperature
response and is used for switching, not for proportional temperature measurement.
Yet another type of thermistor is a Silistor, a thermally sensitive silicon resistor. Silistors
are similarly constructed and operate on the same principles as other thermistors, but employ
silicon as the semi conductive component material.
Self-heating effects
Though commonly used, "self-heating" is a misnomer. Thermistors are passive devices and
thus cannot heat themselves. It is the external circuit that supplies the energy that causes the
heating. "Resistive heating" is a more accurate term.
When a current flows through a thermistor, it will generate heat which will raise the
temperature of the thermistor above that of its environment. If the thermistor is being used to
measure the temperature of the environment, this electrical heating may introduce a
significant error if a correction is not made. Alternatively, this effect itself can be exploited. It
can, for example, make a sensitive air-flow device employed in a sailplane rate-of-climb
instrument, the electronic variometer, or serve as a timer for a relay as was formerly done in
telephone exchanges.
The electrical power input to the thermistor is just
where I is current and V is the voltage drop across the thermistor. This power is converted
to heat, and this heat energy is transferred to the surrounding environment. The rate of
transfer is well described by Newton's law of cooling:
Where T(R) is the temperature of the thermistor as a function of its resistance R, T0 is the
temperature of the surroundings, and K is the dissipation constant, usually expressed in units
of milli watts per C. At equilibrium, the two rates must be equal.
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The current and voltage across the thermistor will depend on the particular circuit
configuration. As a simple example, if the voltage across the thermistor is held fixed, then by
Ohm's Law we have I = V / R and the equilibrium equation can be solved for the ambient
temperature as a function of the measured resistance of the thermistor:
The dissipation constant is a measure of the thermal connection of the thermistor to its
surroundings. It is generally given for the thermistor in still air, and in well-stirred oil.
Typical values for a small glass bead thermistor are 1.5 mW/C in still air and 6.0 mW/C in
stirred oil. If the temperature of the environment is known beforehand, then a thermistor may
be used to measure the value of the dissipation constant. For example, the thermistor may be
used as a flow rate sensor, since the dissipation constant increases with the rate of flow of a
fluid past the thermistor.
4.4.2. Applications
NTC thermistors are used as resistance thermometers in low-temperature

measurements of the order of 10 K.
NTC thermistors can be used as inrush-current limiting devices in power supply

circuits. They present a higher resistance initially which prevents large currents from
flowing at turn-on, and then heat up and become much lower resistance to allow
higher current flow during normal operation. These thermistors are usually much
larger than measuring type thermistors, and are purposely designed for this
application.
NTC thermistors are regularly used in automotive applications. For example, they
monitor things like coolant temperature and/or oil temperature inside the engine and
provide data to the ECU and, indirectly, to the dashboard.
Thermistor are also commonly used in modern digital thermostats and to monitor the
temperature of battery packs while charging.
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CHAPTER-5
LCD (LIQUID CRISTAL DISPLAY)
LCD (Liquid Cristal Display)
A liquid crystal display (LCD) is a thin, flat display device made up of any number of
color or monochrome pixels arrayed in front of a light source or reflector. Each pixel
consists of a column of liquid crystal molecules suspended between two transparent
electrodes, and two polarizing filters, the axes of polarity of which are perpendicular to each
other. Without the liquid crystals between them, light passing through one would be blocked
by the other. The liquid crystal twists the polarization of light entering one filter to allow it to
pass through the other.
A program must interact with the outside world using input and output devices that
communicate directly with a human being. One of the most common devices attached to an
controller is an LCD display. Some of the most common LCDs connected to the contollers
are 16X1, 16x2 and 20x2 displays. This means 16 characters per line by 1 line 16 characters
per line by 2 lines and 20 characters per line by 2 lines, respectively.
Many microcontroller devices use 'smart LCD' displays to output visual information.
LCD displays designed around LCD NT-C1611 module, are inexpensive, easy to use, and it
is even possible to produce a readout using the 5X7 dots plus cursor of the display. They
have a standard ASCII set of characters and mathematical symbols. For an 8-bit data bus, the
display requires a +5V supply plus 10 I/O lines (RS RW D7 D6 D5 D4 D3 D2 D1 D0). For
a 4-bit data bus it only requires the supply lines plus 6 extra lines(RS RW D7 D6 D5 D4).
When the LCD display is not enabled, data lines are tri-state and they do not interfere with
the operation of the microcontroller.
5.1 Features:
(1) Interface with either 4-bit or 8-bit microprocessor.
available. Line
(2) Display data RAM

(3) 80x8 bits (80 characters).
(4) Character generator ROM
(5) 160 different 57 dot-matrix character patterns.
(6) Character generator RAM
(7) 8 different user programmed 57 dot-matrix patterns.
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(8) Display data RAM and character generator RAM may be Accessed by the
microprocessor.
(9) Numerous instructions
(10) Clear Display, Cursor Home, Display ON/OFF, Cursor ON/OFF, Blink Character,
Cursor Shift, Display Shift.
(11) Built-in reset circuit is
(12) Built-in
triggered
at power
ON.
oscillator.
5.2 Description Of 16x2

This is the first interfacing example for the Parallel Port. We will start with
something simple. This example doesn't use the Bi-directional feature found on newer ports,
thus it should work with most, if no all Parallel Ports. It however doesn't show the use of the
Status Port as an input. So what are we interfacing? A 16 Character x 2 Line LCD Module to
the Parallel Port. These LCD Modules are very common these days, and are quite simple to
work with, as all the logic required to run them is on board.
5.3 Schematic diagram:-
5.3 Schematic diagram of LCD

Above is the quite simple schematic. The LCD panel's Enable and Register Select is
connected to the Control Port. The Control Port is an open collector / open drain output.
While most Parallel Ports have internal pull-up resistors, there are a few which don't.
Therefore by incorporating the two 10K external pull up resistors, the circuit is more portable
for a wider range of computers, some of which may have no internal pull up resistors.
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We make no effort to place the Data bus into reverse direction. Therefore we hard
wire the R/W line of the LCD panel, into write mode. This will cause no bus conflicts on the
data lines. As a result we cannot read back the LCD's internal Busy Flag which tells us if the
LCD has accepted and finished processing the last instruction. This problem is overcome by
inserting known delays into our program.
The 10k Potentiometer controls the contrast of the LCD panel. Nothing fancy here.
As with all the examples, I've left the power supply out. You can use a bench power supply
set to 5v or use a onboard +5 regulator. Remember a few de-coupling capacitors, especially if
you have the property.
5.4 16 x 2 Alphanumeric LCD Module Features
Intelligent, with built-in Hitachi HD44780 compatible LCD controller and RAM
providing simple interfacing
61 x 15.8 mm viewing area
5 x 7 dot matrix format for 2.96 x 5.56 mm characters, plus cursor line
Can display 224 different symbols
Low power consumption (1 mA typical)
Powerful command set and user-produced characters
TTL and CMOS compatible
Connector for standard 0.1-pitch pin headers
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5.5 16 x 2 Alphanumeric LCD Module Specifications
Symbol
Level
Function
VSS
Power, GND
VDD
Power, 5V
Vo
Power, for LCD Drive
Pin
Register Select Signal

4
RS
H/L
H: Data Input
L: Instruction Input
R/W
7-14 DB0-DB7
H/L
H: Data Read (LCD->MPU)

L: Data Write (MPU->LCD)
H,H->L Enable
H/L
Data Bus; Software selectable 4- or 8-bit mode
15
NC
NOT CONNECTED
16
NC
NOT CONNECTED
Table 5.5. 16 x 2 Alphanumeric LCD Module Specifications

5.5.1 FEATURES
5 x 8 dots with cursor
Built-in controller (KS 0066 or Equivalent)
+ 5V power supply (Also available for + 3V)
1/16 duty cycle
B/L to be driven by pin 1, pin 2 or pin 15, pin 16 or A.K (LED)
N.V. optional for + 3V power supply
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Data can be placed at any location on the LCD. For 161 LCD, the address locations
are:
Table 5.5.1: Address locations for a 1x16 line LCD
Even limited to character based modules, there is still a wide variety of shapes and sizes
available. Line lengths of 8, 16,20,24,32 and 40 characters are all standard, in one, two and
four line versions.
Several different LC technologies exists. Supertwist types, for example, offer Improved
contrast and viewing angle over the older twisted nematic types. Some modules are
available with back lighting, so that they can be viewed in dimly-lit conditions. The back
lighting may be either electro-luminescent, requiring a high voltage inverter circuit, or
simple LED illumination.
Fig 5.5.1 Electrical block diagram
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5.6. Power supply for LCD driving:
Fig5.5.2: power supply for LCD

5.7. PIN DESCRIPTION:
Most LCDs with 1 controller has 14 Pins and LCDs with 2 controller has 16 Pins (two pins
are extra in both for back-light LED connections).
Fig5.5.3.: pin diagram of 1x16 lines LCD
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Fig 5.5.4: Pin specifications
CONTROL LINES:
EN:
Line is called "Enable." This control line is used to tell the LCD that you are sending
it data. To send data to the LCD, your program should make sure this line is low (0) and then
set the other two control lines and/or put data on the data bus. When the other lines are
completely ready, bring EN high (1) and wait for the minimum amount of time required by
the LCD datasheet (this varies from LCD to LCD), and end by bringing it low (0) again.
RS:
Line is the "Register Select" line. When RS is low (0), the data is to be treated as a
command or special instruction (such as clear screen, position cursor, etc.). When RS is high
(1), the data being sent is text data which sould be displayed on the screen. For example, to
display the letter "T" on the screen you would set RS high.
RW:
Line is the "Read/Write" control line. When RW is low (0), the information on the
data bus is being written to the LCD. When RW is high (1), the program is effectively
querying (or reading) the LCD. Only one instruction ("Get LCD status") is a read command.
All others are write commands, so RW will almost always be low.
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Finally, the data bus consists of 4 or 8 lines (depending on the mode of operation
selected by the user). In the case of an 8-bit data bus, the lines are referred to as DB0, DB1,
DB2, DB3, DB4, DB5, DB6, and DB7.
Logic status on control lines:
E - 0 Access to LCD disable - 1 Access to LCD enabled
R/W - 0 Writing data to LCD- 1 Reading data from LCD
RS - 0 Instructions-1 Character
Writing data to the LCD:
1) Set R/W bit to low
2) Set RS bit to logic 0 or 1 (instruction or character)
3) Set data to data lines (if it is writing)
4) Set E line to high
5) Set E line to low
Read data from data lines (if it is reading) on LCD:
1) Set R/W bit to high
2) Set RS bit to logic 0 or 1 (instruction or character)
3) Set data to data lines (if it is writing)
4) Set E line to high
5) Set E line to low
Entering Text:
First, a little tip: it is manually a lot easier to enter characters and commands in hexadecimal
rather than binary (although, of course, you will need to translate commands from binary
couple of sub-miniature hexadecimal rotary switches is a simple matter, although a little bit
into hex so that you know which bits you are setting). Replacing the d.i.l. switch pack with a
of re-wiring is necessary.
5.8. SWITCHES:
The switches must be the type where On = 0, so that when they are turned to the zero
position, all four outputs are shorted to the common pin, and in position F, all four outputs
are open circuit.
All the available characters that are built into the module are shown in Table 3. Studying
the table, you will see that codes associated with the characters are quoted in binary and
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hexadecimal, most significant bits (left-hand four bits) across the top, and least significant
bits (right-hand four bits) down the left.
Most of the characters conform to the ASCII standard, although the Japanese and Greek
characters (and a few other things) are obvious exceptions. Since these intelligent modules
were designed in the Land of the Rising Sun, it seems only fair that their Katakana phonetic
symbols should also be incorporated. The more extensive Kanji character set, which the
Japanese share with the Chinese, consisting of several thousand different characters, is not
included!
Using the switches, of whatever type, and referring to Table 3, enter a few characters
onto the display, both letters and numbers. The RS switch (S10) must be up (logic 1) when
sending the characters, and switch E (S9) must be pressed for each of them. Thus the
operational order is: set RS high, enter character, trigger E, leave RS high, enter another
character, trigger E, and so on.
The first 16 codes in Table 3, 00000000 to 00001111, ($00 to $0F) refer to the CGRAM.
This is the Character Generator RAM (random access memory), which can be used to hold
user-defined graphics characters. This is where these modules really start to show their
potential, offering such capabilities as bar graphs, flashing symbols, even animated characters.
Before the user-defined characters are set up, these codes will just bring up strange looking
symbols.
Codes 00010000 to 00011111 ($10 to $1F) are not used and just display blank characters.
ASCII codes proper start at 00100000 ($20) and end with 01111111 ($7F). Codes 10000000
to 10011111 ($80 to $9F) are not used, and 10100000 to 11011111 ($A0 to $DF) are the
Japanese characters.
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Fig 5.5.5: character details in LCD
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5.9. Initialization by Instructions:
Fig 5.5.6: flow chart of LCD

If the power conditions for the normal operation of the internal reset circuit are not satisfied,
then executing a series of instructions must initialize LCD unit. The procedure for this
initialization process is as above show.
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5.10. FLOWCHART:
1
Copy Data in to Accumulator
Wait
No
Yes
Is LCD Free
Set RS Bit
Enable LCD
Send Data
Disable LCD
Is Data
Count Zero
No
STOP
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CHAPTER-6
SOURCE CODE
KEIL SOFTWARETOOL (STEPS)
1.
Click on the Keil vision Icon on Desktop
2.
The following fig will appear
3.
Click on the Project menu from the title bar
4.
Then Click on New Project
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5.
Save the Project by typing suitable project name with no extension in u r own
folder sited in either C:\ or D:\
6.
Then Click on save button above.
7.
Select the component for u r project. I.e. Atmel
8.
Click on the + Symbol beside of Atmel
9.
Select AT89C52 as shown below
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10.
Then Click on OK
11.
The Following fig will appear
12.
Then Click either YES or NOmostly NO
13.
Now your project is ready to USE
14.
Now double click on the Target1, you would get another option Source group 1
as shown in next page.
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15.
Click on the file option from menu bar and select new
16.
The next screen will be as shown in next page, and just maximize it by double
clicking on its blue boarder.
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17.
Now start writing program in either in C or ASM
18.
For a program written in Assembly, then save it with extension . asm and for
C based program save it with extension .C
19.
Now right click on Source group 1 and click on Add files to Group Source
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20.
Now you will get another window, on which by default C files will appear.
21.
Now select as per your file extension given while saving the file
22.
Click only one time on option ADD
23.
Now Press function key F7 to compile. Any error will appear if so happen.
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24.
If the file contains no error, then press Control+F5 simultaneously.
25.
The new window is as follows
26.
Then Click OK
27.
Now Click on the Peripherals from menu bar, and check your required port as
shown in fig below
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28.
Drag the port a side and click in the program file.
29.
Now keep Pressing function key F11 slowly and observe.
30.
You are running your program successfully
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CHAPTER-7
CODE
#include<reg51.h>
#include<string.h>
#define lcd_data P2
Sbit lcd_rs = P2^0;
Sbit lcd_en = P2^1;
Sbit fire=P1^1;
Sbit smoke=P1^0;
//sbit buzz=P3^7;
Unsigned char past number [11];
Unsigned int count=0;
Unsigned char rcg,rcv,i;
Void delay (unsigned int t)
{
Unsigned int i, j;
for (i=0;i<t;i++)
for (j=0; j<800;j++);
}
Void lcdcmd (unsigned char value)
// LCD COMMAND
{
lcd_data=value&(0xf0); //send msb 4 bits
lcd_rs=0;
//select command register
lcd_en=1;
//enable the lcd to execute command
delay (3);
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lcd_en=0;
lcd_data= ((value<<4)&(0xf0));
//send lsb 4 bits
lcd_rs=0;
//select command register
lcd_en=1;
//enable the lcd to execute command
delay(3);
lcd en=0;
}
void lcd_init(void)
{
lcdcmd(0x02);
lcdcmd(0x02);
lcdcmd(0x28); //intialise the lcd in 4 bit mode*/
lcdcmd(0x28); //intialise the lcd in 4 bit mode*/
lcdcmd(0x0e);
//cursor blinking
lcdcmd (0x06);
//move the cursor to right side
lcdcmd(0x01);
//clear the lcd
}
void lcddata(unsigned char value)
{
lcd_data=value&(0xf0); //send msb 4 bits
lcd_rs=1;
//select data register
lcd_en=1;
//enable the lcd to execute data
delay(3);
lcd_en=0;
lcd_data= ((value<<4)&(0xf0));
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lcd_rs=1;
//select data register
lcd_en=1;
//enable the lcd to execute data
delay(3);
lcd_en=0;
delay(3);
}
void msgdisplay(unsigned char b[]) // send string to lcd
{
unsigned char s,count=0;
for(s=0;b[s]! ='\0';s++)
{
count++;
if(s==16)
lcdcmd(0xc0);
if(s==32)
{
lcdcmd(1);
count=0;
}
lcddata(b[s]);
}
}
void serinit()
{
TMOD=0x20;
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TH1=0xFD;
//9600
SCON=0x50;
TR1=1;
}
unsigned char receive()
{
unsigned char rx;
while(RI == 0);
rx=SBUF;
RI=0;
return rx;
}
void sertx(unsigned char tx)
{
unsigned char v;
SBUF=tx;
while(TI == 0);
TI=0;
v=receive ();
delay(10);
}
void sertxs(unsigned char *tx)
{
unsigned char v;
for(;*tx != '\0';tx++)
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{
SBUF=*tx;
while(TI == 0);
TI=0;
v=receive();
delay(10);
}
}
void main()
{
fire=smoke=1;
// buz=1;
lcd_init ();
lcdcmd (0x01);
lcdcmd (0x80);
msgdisplay("INDUSTRIAL SAFETY ");
lcdcmd (0xc0);
msgdisplay(" SYSTEM ");
serinit();
sertxs("AT\r\n");
sertxs("AT+CMGF=1\r\n");
sertxs("AT+CNMI=1,2,0,0\r\n");
lcdcmd(0x01);
msgdisplay("SEND MESSAGE TO STR MOBL NUM");
do{
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rcg=receive();
}while (rcg != '+');
for (count=0;count<9;count++)
{
rcg=receive();
}
for(count=0;count<10;count++)
{
Pastnumber [count] =receive ();
}
sertxs ("AT+CMGS=\"");
sertxs(pastnumber);
sertxs("\"\r\n");
sertxs("Mobile no. registered\r\n");
sertx(0x1A);
lcdcmd (0x01);
msgdisplay ("MOBILE NUMBER IS REGISTERED");
delay(200);
lcdcmd(0x01);
while(1)
{
if(fire==0)
{
lcdcmd(0x01);
msgdisplay("FIRE DETECTED");
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sertxs("AT+CMGS=\"");
sertxs(pastnumber);
sertxs("\"\r\n");
sertxs("FIRE DETECTED\r\n");
sertx(0x1A);
delay(100);
lcdcmd(0x01);
}
if(smoke==0)
{
lcdcmd(0xC0);
msgdisplay("SMOKE DETECTED");
sertxs("AT+CMGS=\"");
sertxs(pastnumber);
sertxs("\"\r\n");
sertxs("SMOKE DETECTED\r\n");
sertx(0x1A);
delay(100);
lcdcmd (0x01);
}
}
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CHAPTER-8
CONCLUSION
The project deals with designing a simple and low cost weather monitoring system using
LM35, LCD, SIM300 and ATMEGA-32 microcontroller unit to monitor weather conditions of
the desired location and transmit it to a a cell phone at distant location through SMS. The
designed product module is at prelim stage and designed only for temperature monitoring but can
be enhanced for monitoring other different type of environmental and climatic behavior of a
location, which also can be cost effective.
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CHAPTER-9
APPLICATIONS AND ADVANTAGES
& FUTURE SCOPE
Applications and Advantages:
Weather can be monitored from a remote.
Detection and temperature condition will help us to avoid damage.
It is used as a weather reporting system.
It is widely used in industries.
No need of smart phone and android phone to know the weather.
Weather can be monitored with in simple text message
Automatically send caution message when abnormal condition occurs.
Future Scope:
Different other sensors as humidity sensor, light intensity sensor, pressure

sensor can also be interfaced with the microcontroller to fetch various
information about a location.
Automatic irrigation control can also be implemented using moisture sensor to

fetch data regarding water presence in the farm and do turn on or turn off water
pump accordingly.
Trespassing can be monitored developing surveillance system using infrared

sensors and pressure sensors.
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CHAPTER-10
BIBLIOGRAPHY
REFERENCES
The 8051 Micro controller and Embedded Systems
o MuhammadAliMa
zidi
o JaniceGillispieMa
zidi
The8051MicrocontrollerArchitecture, Programming&
Applications
o KennethJ.Ayala
Fundamentals of Micro processors and Micro computers
o B. Ram
Electronic Components
D.V.Prasad
References on the Web:

www.national.com
www.atmel.com
www.microsoftsearch.com
www.geocities.com
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WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Figure1.1: Block diagram of Embedded System

Manufacturing and process control

Buildings and premises

Office systems and mobile equipment

Banking, finance and commercial

Medical diagnostics, monitoring and life support

Processors are classified into four types like:

Micro Processor (p)

Micro controller (c)

Digital Signal Processor (DSP)

Application Specific Integrated Circuits (ASIC)

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Bandwidth : The number of bits processed in a single instruction.

instructions per second the processor can execute.

Fig:-1.3 Three Basic Elements of a Microprocessor

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Figure: 1.3.1 Block Diagram of Micro Controller (c)

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

CPU cores for computation and control

Peripherals to control timing critical functions

Memories to store data and program

I/Os to connect to external components like LEDs, memories, monitors etc.

1.5 Computer Instruction Set

Operating system and application programmers who use the microprocessor's

Same length instructions.

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Complex Instruction Set Computer (CISC)

Microprogramming is as easy as assembly language to implement, and much less

expensive than hardwiring a control unit.

As each instruction became more capable, fewer instructions could be used to

high-level languages, the compiler does not have to be as complicated.

Earlier generations of a processor family generally were contained as a subset in

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

-- approximately 20% of the available instructions are used in a typical program.

Figure:1.6 Harvard Architecture

Modern uses of the Harvard architecture:

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Digital signal processors (DSPs) generally execute small, highly-optimized audio or

Microcontrollers are characterized by having small amounts of program (flash

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Figure: 1.6.1 Schematic of the Von-Neumann Architecture.

devices and they are handled by different subsystems.

In a computer using the Von-Neumann architecture without cache; the central

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Figure:2.1 Block diagram of Power Supply

Fig 2.2 Circuit diagram of power supply

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Figure:2.1.1 Transformer Symbol

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Figure: 2.1.3 Basic Principle

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Figure: 2.1.4 Basic Transformer

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

Figure: 2.1.5 Step-Down Transformer

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM

WEATHER MONITORING SYSTEM IN REMOTE PLACES USING GSM