AEC MCQ For LAB

Total mark 60
AEC LABORATORY TEST
Time -1hr
1. To prevent a DC return from source or load of BJT amplifier, it is necessary to use

a. resistor in between
b. inductor in between
c. capacitor in between
d. None of these
2. In a voltage divider biased BJT amplifier if the bypass capacitor is removed what
happened to the output voltage
a. Increases
b. Decreases
3. What should be the applied
collector of a BJT amplifier
a. +ve and ve
b. ve and +ve
c. Remain constant
d. saturated
potential to base with respect to emitter and
c. ve and ve
d. +ve and +ve
4. At what terminal the red and black lead connected in a n-p-n BJT amplifier circuit
such that it is showing 0.7 volt.
a. Emitter and Collector
b. Emitter and Base
c. Base and Collector

d. Base and Emitter
5. For a base current of 10 A, what is the value of Ic in common emitter if dc =

100
a. 10 A
b. 100 A
c. 1 mA
d. 10 mA
6. What is the phase difference between the output and input of an emitter
follower amplifier
a. 0 degree
b. 90 degree
c. 180 degree
d. 270 degree
7. What will be the output voltage of a 12 volt DC single power supply BJT amplifier
with voltage amplification factor 100 if the input signal is 1.2volt peak to peak
sinusoidal
a. 1.2 volt peak to peak
b. 12 volt peak to peak
c. 120 volt peak to peak

d. 1200 volt peak to peak
8. The current gain of a BJT is defined as the ratio of collector current to the
a. Base current
b. Emitter current
c. Supply current
d. Collector current
9. If the base resistor is very small, the transistor will operate in the
a. Cut off
b. Active region
10.
A coupling capacitor is
a. A dc short
b. An ac open
11.
c. Saturation region
d. Breakdown region
c. A dc open and ac short

d. A dc short and ac open
The capacitor that produces an ac ground is called a
a. Bypass capacitor
b. Coupling capacitor
12.
The emitter is ac ground in a

a. CB stage
b. CE stage
13.
c. input voltage
d. output voltage
At low frequency the coupling capacitor produce a decrease in

a. Input resistance
b. Voltage gain
23.
c. Greater than Vth

d. None of the above
Frequency response is graph of voltage gain verses

a. frequency
b. power gain
22.
c. threshold voltage
d. cut-off voltage
VGS (on) always

a. Less than Vth
b. Equal to Vth
21.
c. option a or b
d. none of the above
the voltage that turn on an EMOS device is

a. knee voltage
b. pinch off voltage
20.
c. touching
d. conducting
a D-MOSFET can operate in the

a. depletion mode only
b. enhancement mode only
19.
c. Graph of resistor
d. Graph of conductor
When JFET is cut off the depletion layers are

a. Far apart
b. Close together
18.
c. Supply voltage
d. current
the trans-conductance curve is

a. linear
b. Nonlinear
17.
c. The gate voltage

d. All of the above
Compared to BJT, JFET has a much larger

a. Voltage gain
b. Input resistance
16.
c. Low input impedance

d. Large voltage gain
The gate of JFET controls

a. The width of the channel
b. The drain current
15.
c. CC stage
A JFET is a
a. Voltage controlled device
b. Current controlled device
14.
c. Source capacitor
d. None of these
c. Generator resistance
d. Generator voltage
The parasitic capacitors has an effect on the

a. Lower cot-off frequency
b. Mid-band voltage gain
c. Upper cut-off frequency

d. Input resistance
24.
If the voltage gain doubles, the decibel voltage gain increases by

a. Factor of
2
b. 3dB
c. 6dB
d. 10dB
25.
Two stage amplifier having voltage gains of 100 and 200. What is the net
voltage gain in dB
a. 46dB
26.
b. 40df
Bo
d. 10
6sdB
With negative feedback the returning signal

a. Aids the input
b. Opposes the input
27.
c. 86dB
c. Proportional two current

d. Proportional to voltage gain
The voltage between input terminal of an negative feedback ideal Op-Amp

a. zero
b. very small
c. very large
d. equal to input voltage
28.
In a current shunt negative feedback amplifier, due to feedback the input
and output impedance
a. Increases and increases
b. Increases and decreases
29.
The negative feedback in Op-Amp reduces

a. The feedback fraction
b. distortion
30.
c. Decreases and increases

d. Decreases and decreases
c. input offset voltage

d. open loop gain
The voltage that starts an oscillator is caused by

a. Input signal
b. Noise voltage
c. Ripple power supply

e.

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Total mark 60

AEC LABORATORY TEST

1. To prevent a DC return from source or load of BJT amplifier, it is necessary to use

c. Base and Collector

5. For a base current of 10 A, what is the value of Ic in common emitter if dc =

c. 120 volt peak to peak

c. A dc open and ac short

The capacitor that produces an ac ground is called a

The emitter is ac ground in a

At low frequency the coupling capacitor produce a decrease in

c. Greater than Vth

Frequency response is graph of voltage gain verses

VGS (on) always

the voltage that turn on an EMOS device is

a D-MOSFET can operate in the

When JFET is cut off the depletion layers are

the trans-conductance curve is

c. The gate voltage

Compared to BJT, JFET has a much larger

c. Low input impedance

The gate of JFET controls

The parasitic capacitors has an effect on the

c. Upper cut-off frequency

If the voltage gain doubles, the decibel voltage gain increases by

With negative feedback the returning signal

c. Proportional two current

The voltage between input terminal of an negative feedback ideal Op-Amp

The negative feedback in Op-Amp reduces

c. Decreases and increases

c. input offset voltage

The voltage that starts an oscillator is caused by

c. Ripple power supply

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