Digital Communications Lab Manual

Circuit Diagram:
Multiplexer

De-Multiplexer:

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1. Time Division Multiplexing And De-multiplexing
Aim: To study Time Division Multiplexing & Demultiplexing.
Apparatus:
1. Time Division Multiplexing trainer.
2. Time Division De multiplexing trainer
3 Dual channel oscilloscope/storage oscilloscope
.

4. Digital multimeter
5. Patch cords.

Procedure for Multiplexer:

1. Study the theory of operation.
2. Connect the trainer (AET-55M) to the mains and switch on the power supply.
3. Measure the output of the regulated power supply i.e. +5V and -5V with the help of digital
multimeter.
4. Observe the output of the AF generator-1 using CRO, it should be a Sine wave of
100 Hz frequency with 3 Vpp amplitude.
5. Observe the output of the AF generator-2 using CRO it should be a Sine wave of
200 Hz frequency with 3 Vpp amplitude.
6. Verify the operation of logic source with multimeter/scope, output should be +5V
in logic1 position and 0V in logic 0 position.
7. Observe the output of the Clock generator using CRO, it should be a Square wave
of 500 Hz to 15 KHz frequency with 5 Vpp amplitude.
8. Now connect the CH1 & CH2 Inputs of the TDM multiplexer to the outputs of the AF
Generator1 and 2 respectively.
9. Connect Control input of the TDM multiplexer to the output of the logic source.
10. Put control signal (logic source) at logic 1 condition and observe the output of the TDM
multiplexer with the help oscilloscope, by this we can notice that the output of the TDM
multiplexer is a signal which has been connected to CH1 input. In this condition the signal at
CH2 input has no effect on multiplexer output.

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Model Waveforms:

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11. Similarly put logic source at logic 0 position and observe the output of the TD multiplexer.
Now notice that the output of the TDM multiplexer is a signal which has been connected to the
CH2 input and the signal at CH1 input has no effect on multiplexer output.
12. Now disconnect logic source and connect clock output to the control input.
13. Observe TDM wave form using CRO at different values of clock frequency, input signal
voltage levels and sketch them.

De-multiplexer:
14. Study the theory of operation.
15. Connect the trainer (AET-55DM) to the mains and switch on the power supply.
16. Measure the output of the regulated power supply i.e. +5V and -5V with the help of digital
multimeter.
17. Verify the operation of logic source with multimeter/scope, output should be +5V in logic1
position and 0V in logic 0 position.
18. Observe the output of the Clock generator using CRO, it should be a Square wave of 500
Hz to 15 KHz frequency with 5 Vp amplitude.
19. Connect

TDM-PAM

signal

to

input

of

TDM

de-multiplexer

from

TDM

multiplexer (i.e., AET-55M) with the help of co-axial cable (supplied with trainer).
20. Connect control input to logic source output.
21. Keep CRO in dual mode; connect one input to CH1 output and another input to CH2
output.
22. Put logic source to 1 position and observe CH1 and CH2 outputs. You can notice that the
entire TDM signal is transferred to CH1 output and has no signal at CH2 output.
23. Similarly put logic source to 0 position and observe CH1 and CH2 outputs. Now the
entire TDM signal is transferred to CH2 output and has no signal at CH1 output. By the
above two steps you can notice that the entire TDM signal is transferred to CH1 output
when control input is 1 and to CH2 output when control input is 0.
24. Now disconnect logic source and connect clock from the transmitter (i.e., AET-55M)
through a coaxial cable.

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Observations:

Time Period

Amplitude

Messages
Carrier
Output Signal
Demodulated Signal

25. Observe CH1 and CH2 outputs. You will notice that the outputs are natural top sampled
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PAM signals.
26. Connect CH1, CH2 outputs to low pass filters and observe the output of the filters and
compare them with the original AF Signals ( at multiplexer inputs) using CRO. You will
notice that both the signals are same in frequency and shape.

Result:

Viva-voice:
1. Draw the TDM signal with 2 signals being multiplexed over the Channel?
2. Define guard time & frame time?
3. Explain block schematic of TDM?
4. How TDM differ from FDM?
5. What type of filter is used at receiver end in TDM system?

Circuit Diagram:
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2. Pulse Code Modulation & Demodulation

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Aim: To study the Pulse Code Modulation and Demodulation.
Equipment required:
1. PCM Modulator trainer-- AET-68M
2. PCM Demodulator trainer--

AET-68D

3. Cathode Ray Oscilloscope

4. 2 Nos of co-axial cables (standard accessories with AET-68 trainer)

Procedure:
PCM Operation (with DC input) Modulation:
1. Set DC source to some value say 4.4V with the help of mutimeter and connect it to
the A/D converter input and observe the output LEDs.
Note: No need of sample & hold circuit when use DC as modulating signal.
2. Note down the digital code i.e. output of the A/D converter and compare with the
theoretical value.
3. Keep CRO in dual mode. Connect one channel to 4 KHz signal (one which is
connected to the Shift register) and another channel to the PCM output.
4. Observe the PCM output with respect to the 4 KHz signal and sketch the
waveforms. Compare them with the given waveforms
5. Note: From this wave form you can observe that the LSB bit enters the output first.

Demodulation:
6. Connect PCM signal to the demodulator(SP shift register) from the PCM
modulator (AET- 68M) with the help of coaxial cable (supplied with the trainer).
7. Connect clock signal (64 KHz) from the transmitter (AET68M) to the receiver
(AET-68D) using coaxial cable.
8. Connect transmitter clock to the timing circuit.

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Calculation:
Theoretical value can be obtained by:

A/D Input voltage

1 LSB Valu
e

= X (10) = Y (2)

Where
1 LSB Value = Vref/2

Since Vref = 5V and n=8

1 LSB Value = 0.01953

9. Observe and note down the S-P shift register output data and compare it with the
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Digital Communications Lab Manual

transmitted data (i.e. output A/D converter at transmitter). You will notice that the
output of the S-P shift register is following the A/D converter output in the
modulator.
10. Observe D/A converter output (demodulated output) using multimeter/scope and
compare it with the original signal and you can observe that there is no loss in
information in process of conversion and transmission.
11. Similarly you can try for different values of modulating signal voltage.

Result:

Viva-voice:
1. Differentiate PCM over Analog modulation?
2. What is bit synchronization & frame synchronization?
3. Explain block diagram of PCM?
4. What is the different error control coding technique?
5. What is resolution in ADC?
6. For arbitrary fixed reference voltage write the table of 4-bit ADC?
7. The accuracy of any digital reproduction of an analog signal depends on what?
8. If sample requires at least 12 levels of precision (+0 to +5 and 0 to 5). How
many bits should be sent for each sample? use one bit form sign.
9. What is the formula for bit rate in PCM?
10. If we want to digitize human voice (4KHz B.W), what is the bit rate assuming 8
bits/sample?
11. What is the sampling rate for PCM if the frequency ranges from 1000Hz to
4000Hz?
12. If the interval between two samples in a digital signal is 125 micro seconds.
What is the sampling rate?

Circuit Diagram:
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3. Delta Modulation & Demodulation
Aim:

To study the Delta Modulation & Demodulation.

Equipment Required:
1. PCM Modulator trainer-- AET-73M
2. PCM Demodulator trainer-- AET-73D
3. CRO
4. Digital multimeter.
5. 2 Nos co-axial cables

Procedure:
DM With DC Voltage as modulating signal:
1. Connect dc signal from the DC source to the inverting input of the comparator and
set some voltage say 3V.
2. Observe and plot the signals at D/A converter output (i.e., non-inverting input
of

the comparator), DM signal using CRO and compare them with the wave

forms given in figure1:2.

3. Connect DM signal (from 73M) to the DM input of the demodulator (73D).
4. Connect clock (4 KHz) from modulator (73M) to the clock input of the demodulator
(73D). Connect clock input of the UP/DOWN counter (in 73D) to the clock from
transmitter with the help of springs provided.
5. Observe digital output (LED Indication) of the UP/DOWN counter (in 73D) and
compare it with the output of the UP/DOWN (in73M) . By this you can notice that
the both the outputs are same.
6. Observe and plot the output of the D/A converter and compare it with the wave
forms given in Figure 1:2.
7. Measure the demodulated signal (i.e. output of the D/A converter (73D)) with the
help of multimeter and compare it with the original signal (at 73M).

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Model Waveforms:

8. From above observation you can notice that the both the voltages are equal and

there is no loss in process of modulation, transmission and demodulation.

9. Similarly you can verify the DM operation for different values of modulating signal.

DM With AF signal as modulating signal:

10. Connect AF signal from AF generator to the inverting input of the
comparator and set output amplitude at 3Vpp.
11. Observe and plot the signals at D/A converter output (i.e., non-inverting
input of the comparator), DM signal using CRO and compare them with the
wave forms given in figure1:3.
12. Connect DM signal (from 73M) to the DM input of the demodulator (73D).
13. Connect clock (4 KHz) from modulator (73M) to the clock input of the
demodulator (73D). Connect clock input of the UP/DOWN counter (in
73D) to the clock from transmitter with the help of springs provided.
14. Observe and plot the output of the D/A converter and compare it with the
wave forms given in Figure 1:3.
15. Observe and sketch the D/A output.
16. Connect D/A output to the LPF input.
17. Observe the output of the LPF/Amplifier and compare it with the original
modulating signal (AET-73M).
18. From above observation you can verify that there is no loss in information
(modulating signal) in conversion and transmission process.

Observations:

Time Period

Amplitude

Message
Carrier
Output Signal
Demodulated Signal

19. Disconnect clock from transmitter (AET-73M) and connect to local oscillator (i.e., clock
generator output from AET-73D) with remaining setup as it is. Observe demodulated signal
output and compare it with the previous result. This signal is little bit distorted in shape. This is
because lack of synchronization between clock at transmitter and clock at receiver.

Result:

Viva-voice:

1. Justify that at each sample only one bit of data is sent to transmission in DM?
2. Mention the advantages of ADM over DM?
3. Explain ADM?
4. What is compounding?
5. What is micro-law & A-law?
6. What will be the output of DM when the I/P is D.C signal? 7. What is
slope overload? How is it overcome?
8. Is the slow varying signal, a problem for DM?
9. What is the solution for the above problem?
10. What does the integrator do in delta modulation?
11. What is the need for pulse generator in DM?
12. What does the integrator do in delta demodulation?
13. What is the need for pulse generator in DM?
14. What is the expression for step error in DM?
15. Is message (t) & approximated signal (t) should be with in a
step length difference for proper o/p?
16. What is the i/p to the quantizes in delta deform scheme

Circuit Diagram:

4.Differential Pulse Code Modulation

Aim: To study the DPCM modulation & demodulation technique.

Appratus:
1.DPCM Trainer kit
2. Power chords,
3.20 MHz Dual trace CRO
4. Power supply

Procedure:
1) Connect the AC power supply to the trainer kit and switch it ON.

2) Connect the DC output signal to the input of DPCM Modulator.

3) Observe the sampling signal output on the CH-1 of CRO.
4) Observe the DPCM output put on the CH-2 of CRO.
5) By adjusting the DC voltage we can get the DPCM output from 0000 0000 to 1111 1111.
6) Now disconnect the DC voltage and apply AF output to the input of DPCM modulator.
7) Observe the conditioning amplifier output & DPCM output with respect to sampling signal.
8) Connect the DPCM output to the input of demodulator and observe the output with
respect to AF output signal.
9) Calculate the Phase shift of the demodulated signal.
10) Plot the observed waveforms on the graph sheet.

Model Waveforms:

Result:

Viva Voice:
1.What is the use of low pass filter?
2.What are the diadvantages of PCM?
3.Which encoding Scheme DPCM resembles?
4.Which staircase waveform is approximation to original waveform?
5.What is the use of deoding?

Circuit Diagram:

5. Frequency Shift Keying

Aim:
To Study the operation of FSK modulation & Demodulation and to plot the FSK
wave forms for Binary data at different frequencies.

Equipment Required:
1. Frequency Shift Keying system trainer-- AET-48
2. Dual trace Oscilloscope-3. Digital multimeter--

POS-2020
PDC-16C

4. Digital frequency counter

Procedure:
FSK Modulation:

1.Connect output of the logic source to data input of the FSK Modulator.
2. Set logic source switch in 0 position.
3. Connect FSK modulator output to Oscilloscope as well as frequency counter.
4. Set the output frequency of the FSK modulator as per your desire (say 1.2 KHz)
with the help of control F0 which represents logic 0.
5. Set logic source switch in 1 position.
6. Set the output frequency of the FSK modulator as per your desire (say 2.4 KHz)
with the help of control F1 which represents logic 1.

7. Now connect data input of the FSK modulator to the output of the data signal
generator.
8. Keep CRO in dual mode connect CH1 input of the oscilloscope to the input of
the FSK modulator and CH2 input to the output of the FSK modulator.
9. Observe the FSK signal for different data signal frequencies and plot them. By
this we can observe that the carrier frequency is shifting between two
predetermined frequencies as per the data signal i.e. 1.2 KHz when data signal is
0 and 2.4 KHz when data input is 1 in this case.

Model Waveforms:

Observations:

Time Period
Message
Carrier

Amplitude

Output Signal
Demodulated Signal

10. Compare these plotted wave forms with the theoretically drawn in figure 1:3 FSK Demodulation:
11.Again connect input of the FSK modulator to the logic source and put data source switch in 0 position.
12.Connect the frequency counter to the output of the FSK modulator output.
13.Set FSK output frequency to 2025 Hz with the help of FO control.
14.Now put data source switch in 1 position and set the FSK output frequency to 2225 Hz with the
help of F1 control without disturbing the F0.
Note: As per one of the standards, for proper demodulation of FSK signal the F0 should be 2025
Hz and F1 should be 2225 Hz.
15.Disconnect the FSK input of the modulator from logic source and connect to the data signal
generator.
16.Observe the output of the modulator using CRO and compare them with given waveforms in
figure 1:3.
17.Now connect the FSK modulator output to the FSK input of the demodulator.
18.Connect CH1 input of the Oscilloscope to the data signal at modulator and CH2 input to the output of the
FSK demodulator (keep CRO in dual mode).
19.Observe and plot the output of the FSK demodulator for different frequencies of data signal.
Compare the original data signal and demodulated signal; by this we can observe that there is no loss in
process of FSK modulation and demodulation.

Result:
Viva-voice:
1. Explain the concept of FSK?
2. Compare ASK, FSK & PSK?
3. Draw the waveforms of FSK?
4. What is M-ray signaling? What are its advantages over 2-ary signaling?
5. What are the different data coding formats & draw the waveforms what is
advantages of Manchaster coding over other formats?
6. Explain the demodulation scheme of FSK?
7. What is the formula for Band Width required in FSK?
8.What is the minimum B.W for an FSK signal transmitting at 2000bps(haif duplex),if carriers
areseparated by 3KHz?
9.Is the FSK spectrum, a combination of two ASK spectra centered around two frequencies?

Circuit Diagram:

6. Phase Shift Keying

Aim: To Study the operation of PSK ( Binary) modulation &
the PSK wave forms for Binary data at different frequencies.

Demodulation and to plot

Equipment Required:
1. Phase Shift Keying trainer-- AET-71
2. Dual trace Oscilloscope-- POS-2020
3. Digital multimeter

Procedure:
For Modulation:
1

Connect carrier signal to carrier input of the PSK Modulator.

Connect data signal say 4 KHz from data source to data input of the modulator. 3
Keep CRO in dual mode.

Connect CH1 input of the CRO to data signal and CH2 to the output of the PSK
modulator.

Observe the PSK o/p signal with respect to data signal and plot the wave forms.
Compare the plotted waveforms with the given wave forms.

Demodulation:
6

Connect the PSK output to the PSK input of the demodulator. 7

Connect carrier to the carrier input of the PSK demodulator. 8
Keep CRO in dual mode.

Connect CH1 to the data signal (at modulator) and CH2 to the output of the
demodulator.

10 Compare the demodulated signal with the original data signal. By this we can notice that
there is no loss in modulation and demodulation process.
11 Repeat the steps 7 to 15 with different data signals i.e. 2 KHz and 1 KHz.

Model Waveforms:

Observations:

Time Period
Message
Carrier
Output Signal
Demodulated Signal

Amplitude

Result:

Viva-voice:
1. Explain the concept of PSK?
2. Compare ASK, FSK, PSK?
3. Draw the waveforms of PSK?
4. What is M-ary signaling? What are its advantages over 2-ary signaling?
5. Explain the demodulation scheme of PSK?.
6. What is the advantage of PSK over ASK, FSK?
7. Will the smaller variations in the signal can be detected reliably by PSK?
8. Can we transmit data twice as for using 4-PSK as we can using 2-PSK?
9. What is the minimum B.W required in PSK?
10. Is the B.W in PSK is same as in ASK?
11. Is the maximum bit rate in PSK is greater than ASK?
12. Is the maximum baud ate in PSK & ASK are same?

Circuit Diagram:

7.Differential Phase Shift Keying

Aim:

To study the operation of Differential Phase Shift Keying and observe the

waveforms.

Equipment Required:

1. Differential Phase Shift Keying trainer-- AET-72M & 72D

2. CRO
3. Digital Multimeter
4. 2 Nos of co-axial cables (standard accessories with AET-72 trainer)

Procedure:
Modulation:
1Connect carrier signal to carrier input of the PSK Modulator.
2Connect data signal from data source to data input of the X-NOR gate. 3Keep
CRO in dual mode.
4Connect CH1 input of the CRO to data signal and CH2 input to the encoded data (which is
nothing but the output of the X-NOR gate).
5Observe the encoded data with respect to data input. The encoded data will be in a given
sequence.
Actual data signal

: 10101101001010110100

Encoded data signal : 01100011011001110010

6.Now connect CH2 input of the CRO to the DPSK output and CH1 input to the encoded data. Observe
the input and output waveforms and plot the same.

DEMODULATION:
7.Connect DPSK signal to the input of the signal shaping circuit from DPSK
transmitter (i.e., AET 72M) with the help of coaxial cable (supplied with trainer).
8.Connect clock from the transmitter (i.e., AET- 72M) to clock input of the 1 bit delay circuit using coaxial
cable.
9.Keep CRO in dual mode. Connect CH1 input to the encoded data (at modulator) and
CH2 input to the encoded data (at demodulator).

Model Waveforms:

Observations:
Time Period
Message
Carrier
Output Signal
Demodulated Signal

Amplitude

Digital Communications Lab

ECE Department
10 Observe and plot both the waveforms and compare it with the given waveforms. You
will notice that both the signals are same with one bit delay.
11 Keep CRO in dual mode. Connect CH1 input to the data signal (at modulator) and CH2
input to the output of the demodulator.
12 Observe and plot both the waveforms and compare it with the given waveforms. You will
notice that both the signals are same with one bit delay.
13 Disconnect clock from transmitter (AET-72M) and connect to local oscillator cloc (i.e.,
clock generator output from AET-72D) with remaining setup as it is. Observe demodulator
output and compare it with the previous output. This signal is little bitdistorted. This is
because lack of synchronization between clock at modulator andclock at de-modulator. You
can get further perfection in output wave form by adjusting the locally generated clock
frequency by varying potentiometer.

Result:

Viva-voice:
1. How does DPSK differ from PSK?
2. Explain theoretical modulation & demodulation of DPSK using arbitrary bit
sequence and assuming initial bit 0 and 1?
3. What is the advantage of DPSK over PSK?
4. Why do we need 1 bit delay in DPSK modulator & demodulator?
5. What does a synchronous detector (multiplier) do in DPSK demodulator?
6. What is the relation between carrier frequency & the bit interval T?
7. What are the disadvantages of DPSK?
8. Is the error rate of DPSK is greater than PSK?
9. What is the expression for DPSK error?
10. What are the applications of DPSK?

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ECE Department

Circuit Diagram:

COMPRESSOR/PCM CODER

TRCHL

I/P

DECOMPRESSOR+PCM
DECODER
*

A/D

COMPRES

EXPAND

D/A

16 BIT

CODER

DECODER

16
BIT

LEDS-8

LEDS13

LEDS13

UP
SIGNAL
FROM
MICRO
DC/SINE

MODE
AC/DC
DN

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O/P

Digital Communications Lab

ECE Department

8.Companding

Aim: To

find the dynamic range of signal and S/Q with and without companding.

Apparatus:
1.
2.
3.
4.
5.

16 bit micro controller

16 bit A/D
Compress coder
Decoder
16 bit D/A

6. LEDS

Procedure:
1. First observe the communication blocks in the signal chain
2. Apply a given dc voltage at the input by using the up/down keys, measure this with
multi meter. after reset it starts with 0 volts.
3. Note down the codes and the voltages as per the table given below.
4. Do this for both the linear mode and companded mod ( A Law).
5. Observe that higher Quantization error Q/S in the case of linear mode compared to the
companded mode.
6. Observe the quality improvement of a companded channel for a low level asc signal given by
the kit itself in AC mode.
7. bits are taken from the input to be carried in the channel. With companding, at
lower levels the even the lower bits are carried in the channel code as per the coding tables
given for A law and u law.AC Signal Observation through companding process
8.Observe the improvement in waveshape for a low level ac waveform by putting the kit in AC mode.
9.compare the waveforms
10.connect I/P wave form to DSO channel-1 ( trigger source ch1 )
11.connect O/P waveform to DSO channel-2
12.Observe the variation in channel-2 , by putting the mode switch in companding and normal 8 bit
linear chl mode.

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Digital Communications Lab

ECE Department

Observations:
Normal Mode:

I/O data

PCM codes

Compressor
O/P

PCM
Decoder

I/P message

Normal mode

Decoded O/P

O/P

Error

Companding:

I/P signal

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Compressed
code mode

Decoded I/P

Digital Communications Lab

ECE Department

Result:

Viva Voice:
1.
2.
3.
4.

What is Companding?
What is the use of companding?
How many types of companding techniques are there?
What is the difference between A-law and -law companding?

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Digital Communications Lab

ECE Department

Circuit Diagram:

SOURCE CODER DECODER

Coder

TRCHL

Decoder

PBK1

LED-1

PBK2
PBK3

LEDPAIR-1
CODER

LEDPAIR-2

LED-2
DECODER

LED-3

PBK4

LEDPAIR-3

LED-4

PBK5

LEDPAIR-4

LED-5

NORM/CODE
RESET

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DEMO

Digital Communications Lab

ECE Department

9. Source Encoder And Decoder

Aim :
To select an information having in-equal probability of occurrence of each symbol or
having redundancy in the information and applying a source code using one of the
techniques.
2.U s i n g Huffman coding, observing the size of the coded information and sending the
minimized packet , and observing for the correct decoded output.

Appratus:
1. Source Coder
2. Source Decoder
3. LEDS

Procedure:
1. Initialization: Put all nodes in an OPEN list, keep it sorted at all times (e.g.,
ABCDE). 2. Repeat until the OPEN list has only one node left:
(a) From OPEN pick two nodes having the lowest frequencies/probabilities, create a
parent node of them.
(b) Assign the sum of the children's frequencies/probabilities to the parent node and
insert it into OPEN.
(c) Assign code 0, 1 to the two branches of the tree, and delete the children from OPEN.
Student has to observer the signal chain.
3.Then verify how many bits are taken to transmit ABRAKADABRA in normal and
source coded mode
4. To send an input symbol , push any one of the input symbol keys, to transmit a
letter A , student has to press the key marked A
5. Observer how many bits are being transmitted for this key. And the bit code for
the same. , and noted down the bits being transmitted on the LEDS (
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ECE Department
1=Red,0=Green)
6. Observe if the corresponding output LED is glows corresponding to the
symbol pressed at the input
7. Pushing Demo mode switch will give a brief description of implementation of KIT
Note the difference in the length of bits required without coding and with coding.

Observations:

Information

Information bits

Information bits

Decoded

text

Without coding

With coding

information

ABRAKADABRA
DABRAKAABRA

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ECE Department

Result:

Viva Voice:
1.Explain the process of Hauffmann coding?
2.What is the advantage of Source coding?
3.How many types of Coding techniques are there?
4.What is the difference between hauffmann coding and Shanon fano coding?

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Digital Communications Lab

ECE Department

Circuit Diagram:
Channel Coder

CHL CODE

Channel Decoder

CHANNEL CODE
LED PAIR-15*
I/P MESSAGE

LED PAIR-14*

O/ P MESSAGE

LEDPAIR-7*

CODER

LED PAIR-13*

LEDPAIR-6*

( Hamming 7,4)

LED PAIR-12*

LEDPAIR-6*

LEDPAIR-5*

LED PAIR-11*

LEDPAIR-5*

LEDPAIR-4*

LED PAIR-10*

LEDPAIR-4*

LEDPAIR-3

LED PAIR-9*

LEDPAIR-3

LEDPAIR-2

LED PAIR-8*

LEDPAIR-2

LEDPAIR-1

LEDPAIR-7*

LEDPAIR-1

LEDPAIR-0

LEDPAIR-6

LEDPAIR-0

DECODER

LEDPAIR-5
1

CLEAR

LEDPAIR-4
LEDPAIR-3
LEDPAIR-2
LEDPAIR-1
LEDPAIR-0

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DECODE

LEDPAIR-7*

Digital Communications Lab

ECE Department
BITSEL

ERRSET

NORM
RESETKIT

DEMO
/CODE

10. Linear Block Codes

Aim :
To observe that the errors received through a noisy channel can be removed /
minimized by employing the error detection and correction code.

Apparatus:
1. Channel coder
2. Channel decoder
3. LEDS

Procedure:
1.Observe the signal chain , i.e. the input stage, coding stage, transmission stage
and the decode stage
2.Put the mode selection switch in NORMAL mode and see the process and
observe output
3.Student selects input message that is to be coded, by shifting the bits 0/1 by means
of pressing the keys 0, 1, CLEAR.
4.Student codes this input message by pushing the key CODE A BIT or by
pushing CODEALL.
5.Now the message is coded and displayed in the transmission path. Student can now
introduce an error in the transmission channel by means of pressing the keys BITSEL and
ERRSET. On every push of the BITSEL one bit is selected in the channel code, the selected
bit will be completely in OFF mode at this stage, if the student presses ERRSET key, the
OFF mode bit will be inverted to make it as an error.
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6.Now the student pushes the DECODE key, the channel code is decoded and displayed as
the Output message. If an error is detected in the channel code ERRDETECTED LED glows,
if an error is corrected from channel code then the ERRCORRECTED LED glows in the
decoder Output stage.
7.Now put mode selection in CODE mode and repeat the process and observe
the output changes.

Observation Tables:

I/P Data

Channel Code Channel c ode O/p data

Error

Error

abcd

xyzabcd

Detect

Corrected

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With Error

abcd

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8.Observe how the error detection and correction in code mode and hence
the implementation of Linear Block encoder and decoder.
9.Pushing Demo mode switch will give a brief description of implementation of KIT

Result:

Viva Voice:
1.What are linear block codes?
2.Define parity bits?
3.Differences between linear block codes and convolution codes?
4.what is meant by cyclic code?

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ECE Department

Circuit Diagram:

CHANNEL CODER

CHL CODE

CHANNEL DECODER

CHANNEL CODE
LED PAIR-15*
I/P MESSAGE

LED PAIR-14*

O/ P MESSAGE

LEDPAIR-7*

CODER

LED PAIR-13*

LEDPAIR-6*

( Hamming 7,4)

LED PAIR-12*

LEDPAIR-6*

LEDPAIR-5*

LED PAIR-11*

LEDPAIR-5*

LEDPAIR-4*

LED PAIR-10*

LEDPAIR-4*

LEDPAIR-3

LED PAIR-9*

LEDPAIR-3

LEDPAIR-2

LED PAIR-8*

LEDPAIR-2

LEDPAIR-1

LEDPAIR-7*

LEDPAIR-1

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DECODER

LEDPAIR-7*

Digital Communications Lab

ECE Department
LEDPAIR-0

LEDPAIR-6

LEDPAIR-0

LEDPAIR-5
1

LEDPAIR-4

CLEAR

LEDPAIR-3
LEDPAIR-2
LEDPAIR-1

DECODE

LEDPAIR-0
BITSEL

ERRSET

NORM
RESETKIT

DEMO
/CODE

11.Binary Cyclic Code Encoder And Decoder

Aim:

To observe that the errors received through a noisy channel and can be
removed and corrected by using error corecting and detecting codes.

Apparatus:
1. Channel coder
2. Channel decoder
3. LEDS

Procedure:
1.Observe the signal chain , i.e. the input stage, coding stage, transmission stage and the decode
stage
2.Put the mode selection switch in NORMAL mode and see the process and observe output
3. select the input message that is to be coded, by shifting the bits 0/1 by means of pressing the keys
0, 1, CLEAR.
4. code the input message by pushing the key CODE A BIT or by pushing CODEALL.
5.Now the message is coded and displayed in the transmission path. Student can now introduce
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ECE Department
an error in the transmission channel by means of pressing the keys BITSEL and ERRSET.
On every push of the BITSEL one
6.Now

push the DECODE key, the channel code is decoded and displayed as the Output message.

7. If an error is detected in the channel code ERRDETECTED LED glows, if an error is corrected
from channel code then the ERRCORRECTED LED glows in the decoder Output stage.
8.Now put mode selection in CODE mode and repeat the process and observe the
output changes.
9.Observe

how

the

error

detection

and

correction

in

code

mode

and

hence

the

implementation of Binary Cyclic encoder and decoder.

10.Push the Demo mode switch it will give a brief description of implementation of encoding and
decoding on the trainer kit.

Observations:
NORMAL SYSTEM WITHOUT CODING
I/P data

Normal

Errors in

Set

Transmission

Transmission

Chal

O/P

Chal

O/P

data

Data

data

Data

SYSTEM WITH BINARY CYCLIC CODING

Channell

O/P

Channel

O/P

data

Data

data

Data

Normal system without coding

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ECE Department
I/P data set

I/P data

Normal transmission
Channel data Output data

Error in Transmission
Channel data O/p data

System with Block Coding

Channel data o/p data

Channel data

Encoded data

Channel Code

Error Position

Result:

Viva voice:
1.What is the difference between Binary cyclic codes and linear block codes?
2.What are the two types of cyclic codes?
3.What is source encoder?
4.What are the different coding techniques?
5.What is the use of coding?

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o/p data

Decoded o/p

Digital Communications Lab

ECE Department

Circuit Diagram:

CHANNEL CODER

CHL CODE

CHANNEL DECODER

CHANNEL CODE
LED PAIR-15
I/P MESSAGE
LEDPAIR-7
LEDPAIR-6

LED PAIR-14
CODER

LED PAIR-13
LED PAIR-12

O/ P MESSAGE
DECODER

LEDPAIR-7
LEDPAIR-6

LEDPAIR-5

LED PAIR-11

LEDPAIR-5

LEDPAIR-4

LED PAIR-10

LEDPAIR-4

LEDPAIR-3

LED PAIR-9

LEDPAIR-3

LEDPAIR-2

LED PAIR-8

LEDPAIR-2

LEDPAIR-1

LEDPAIR-7

LEDPAIR-1

LEDPAIR-0

LEDPAIR-6

LEDPAIR-0

LEDPAIR-5
1

CLEAR

LEDPAIR-4

LED-ERRDET

LEDPAIR-3

LED-ERCOR

LEDPAIR-2
LEDPAIR-1

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Digital Communications Lab

ECE Department
LEDPAIR-0
BITSEL

DECODE

ERRSET

RESETKIT

12. Convolution Code Encoder And Decoder

Aim:
Employ one of the convolution codes and observe its error correcting
performance and decode-ability.

Appratus:
1. Channel coder
2. Channel decoder
3. LEDS

Procedure:
1.Observe the signal chain , i.e. the input stage, coding stage, transmission stage and the decode stage
2.Put the mode selection switch in NORMAL mode and see the process and observe output select
input message that is to be coded, by shifting the bits 0/1 by means of pressing the keys 0, 1, CLEAR.
3. code the input message by pushing the key CODE A BIT or by pushing CODEALL. Note that
Pragati Engineering College

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ECE Department
after pressing this the input data gets shifted up and two 00 bits are added at lower end. This is required
in the convolution decoding process, the last two bits should always be zero , the state should come
back to 0 , to decode hence this automatic 0 addition.
4.Now the message is coded and displayed in the transmission path. Student can now introduce an error
in the transmission channel by means of pressing the keys BITSEL and ERRSET. On every push of the
BITSEL one bit is selected in the channel code, the selected bit will be completely in OFF mode at this
stage, if the student presses ERRSET key, the OFF mode bit will be inverted to make it as an error.
5.Now the student pushes the DECODE key, the channel code is decoded and displayed as the Output
message. If an error is detected in the channel code ERRDETECTED LED glows, if an error is corrected
from channel code then the ERRCORRECTED LED glows in the decoder Output stage.
6.Now put mode selection in CODE mode and repeat the process and observe the output changes.
7.Observe how the error detection and correction in code mode and hence the implementation of
convolution encoder and decoder.
8.Pushing Demo mode switch will give a brief description of implementation of kit.

Convolution Encoder:

Example Message:

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ECE Department

Observations:
Normal System Without Coding
I/P data
Set

Normal
Transmission
Channel
O/P
data
Data

Errors in
Transmission
Channel
O/P
data
Data

System With Block Coding

Changed
i/p

Channel
data

Channel
Data

O/P
Data

Result:

Viva Voice:

1.What is the main difference between block codes and convolution codes?
2.What are th advantages of convolution codes over block codes?
3.Decoding the transmitted message is done using which decoding process?
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4.Define Trellis diagram?
5. What is state diagram?

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