AN688

Layout Tips for 12-Bit A/D Converter Application

Author: Bonnie C. Baker GETTING A GOOD START

Microchip Technology Inc.
Imagine that the task at hand is to design a pressure
sensing circuit that will accurately measure the pres-
INTRODUCTION sure and present the results on an LCD display screen.
Seems easy enough.
This Application Note originally started as a cook
book for a true 12-bit layout. The assumption of this The circuit diagram for this system is shown in Figure 1.
type of approach is that a reference design could be The pressure sensor that is chosen for the job is a
provided, which easily could be used for every layout piezo resistive sensor that is configured as a four ele-
implementation. But, the notion of this approach is fairly ment bridge. The particular sensor that is selected
unrealistic. There are a multitude of successful ways to requires voltage excitation. The full swing output of the
layout out systems with 12-bit Analog-to-Digital (A/D) sensor is a small (10s of millivolts) differential signal
Converters and each layout is highly dependent on the that most appropriately is gained by an operational
number of devices in the circuit, the types of the amplifier structure that also converts the differential
devices (digital or analog) and the environment that the output of the sensor to a single ended analog signal. A
final product will reside in. Given all of these variables, 12-bit converter is chosen to match the precision of the
it could easily be demonstrated that one successful lay- pressure sensor. Once the converter digitizes the volt-
out that provides twelve noise free bits from an analog age presented at its input, the digital code is sent to a
signal may easily fail in another setting. microcontroller. The job of the microcontroller is to per-
form tasks such as calibration corrections and linear-
Because of the complexity of this problem, this Applica- ization. Once this is done, the results are sent to the
tion Note will provide basic guidelines, ending with a LCD display.
review of issues to be aware of. Throughout the appli-
cation note, examples of good layout and bad layout The final step in the circuit development is to work
implementations will be presented. This will be done in through the calibration and linearization issues associ-
the spirit of discussing concepts and not with the intent ated with the pressure sensor. Once these issues are
of recommending one layout as the only one to use. settled, the microcontroller firmware is developed. Now
the board is ready to go to layout.

RG
VDD
R2

R1
R1
AD 2.5V
680 R2
1
/2 1 8
MCP602
7
1 6
+ /2 2
IA MCP602 MCP3201
IAOUT 12-Bit ADC 5
+
IA+ 3
Pressure Sensor 4 PICmicro

R 1 2R1
IAO U T = ( IA+ IA ) 1 + ------ + --------- + 2.5V
LCD Display
R2 RG

FIGURE 1: This is a pressure sensor application where the differential signal from the sensor is gained by an
instrumentation amplifier and digitized with a 12-bit A/D Converter, MCP3201. The results of the conversion is displayed
on the LCD display.

1999 Microchip Technology Inc. DS00688B-page 1

AN688
ONE MAJOR STEP TOWARDS In Figure 2b. the digital and analog circuit is shown as
being separate from the digital devices, which are closest
DISASTER to the connector or power supply.
The size of this circuit seems manageable. So small that
The pure analog devices are furthest away for the digital
one may be tempted to use an auto router layout tool. If
devices to insure that switching noise is not coupled into
this type of tool is used, it should be used carefully. If the
the analog signal path.
tool is capable of implementing restrictions into the lay-
out implementation, the layout design may have a fight- The treatment of the A/D Converter in layout varies from
ing chance. If restrictions are not implemented by the technology to technology. For instance, if the A/D Con-
auto routing tool, the best approach is to not use it at all. verter uses a Successive Approximation Register (SAR)
design approach, the entire device should be connected
GENERAL LAYOUT GUIDELINES to the analog power and ground planes. A common error
Device Placement is to have the converter straddle the analog and digital
planes. This strategy may work, but as the accuracy
Device placement is critical. In general, there are some specifications of the A/D Converter improve the digital
noise sensitive devices in this layout and other devices ground and power plane noise begins to cause prob-
that are major problem creators. Here is a quick way to lems. For high resolution SAR converters, a digital buffer
identify the good, from the bad, from the ugly. should be used to isolate the converter from bus activity
1. Separate the circuit devices into two categories: on the digital side of the circuit.
high speed (>40MHz) and low speed. In contrast, if the A/D Converter is designed using a
2. Separate the above categories into three delta-sigma technology, it should straddle the analog
sub-categories: pure digital, pure analog, and and digital planes. This is due to the fact that the
mixed signal. Delta-Sigma Converter is primarily a digital IC.
The board layout strategy should map the diagram Ground and Power Supply Strategy
shown in Figure 2. Notice the relationship of digital ver-
sus analog and high speed versus slower speeds to the Once the general vicinity of the devices are deter-
board connector. mined, the ground planes and power planes should be
defined. The strategy of the implementation of these
a) High frequency components b) Separate the digital and planes are a bit tricky.
should be placed near the analog portions of the circuit.
connector. First of all, assuming that a ground plane is not needed
high
is a dangerous assumption in any circuit with analog
and/or mixed signal devices. Ground noise problems
Digital are more difficult to deal with than power supply noise
problems because analog signals are most typically
frequency

Digital
Buffer
referenced to ground. For instance, in the circuit shown
A/D
in Figure 1, the A/D Converters inverting input pin
(MCP3201) is connected to ground. Additionally, the
negative side of the pressure sensor is also connected
Analog to ground.
low
A layout for the circuit in Figure 1 is shown in Figure 3.
FIGURE 2: The placement of an active component on This layout implementation does not have ground or
a PCB is critical in precision 12-bit+ circuits. power planes on the board.
Top Layer Bottom Layer
+5V Connect
Ground Connect

12-Bit 12-Bit
A/D Converter A/D Converter

Dual Pressure Dual Pressure

Op Sensor Op Sensor
Amp Connection Amp Connection

2.5V 2.5V
Reference Reference
FIGURE 3: Layout of the top and bottom layers of the circuit in Figure 1. Note that this layout does not have a ground or
power plane.

DS00688B-page 2 1999 Microchip Technology Inc.

 AN688
With this circuit layout, the controller is dedicated to inter- Top Layer
+5V Connect
facing with the converter and sending the converters
results to the LCD display. The digital output of the con-
verter over time is shown in Figure 4. This data was col-
lected with no excitation being applied to the sensor.
Digital Code VS. Occurrences
1400

1200
Number of Occurrences

1000 12-Bit
A/D Converter
800

600 Dual Pressure

Op Sensor
400 Amp Connection

200
2.5V
0 Reference
03
04
05

06
07
08
09
10
11
12
13
14
15

16
17
25
25
25

25
25
25
25
25
25
25
25
25
25

25
25
Bottom Layer
Output Code of 12-bit A/D Converter
Ground Connect
FIGURE 4: This is a histogram of 4096 samples from
the output of the A/D Converter from a PCB that does
not have a ground or power plane as shown in the PCB
layout in Figure 3. The by-pass capacitors are installed.
When determining the grounding strategy of a board,
the task at hand should actually be to determine if the
circuit can work adequately with just one ground plane
or does it need multiple planes.
Figure 5 shows the same layout shown in Figure 3,
plus a ground plane. It should be noted that the ground
plane has a few breaks due to signal traces. These
breaks should be kept to a minimum. Current return
paths should not be pinched as a consequence of
these traces restricting the easy flow of current from the
device to the power connector. The histogram for the FIGURE 5: Layout of the top and bottom layers of the
A/D Converter output is shown in Figure 6. Compared circuit in Figure 1. Note that this layout DOES have a
to Figure 4, the output codes are much tighter. The ground.
same active devices were used for both tests. The pas-
Digital Code VS. Occurrences
sive devices were different causing a slight offset differ-
1400
ence. The noise shown with the A/D Converter digital
code is assignable to the op amp noise and the 1200
Number of Occurrences

absence of an anti-aliasing filter. 1000

If the circuit has a minimum amount of digital circuitry 800
on board, a single ground plane and a single power
600
plane may be appropriate. The qualifier minimum is
defined by the board designer. The danger of connect- 400

ing the digital and analog ground planes together is that 200
the analog circuitry can pick-up the noise on the supply 0
pins and couple it into the signal path. In either case,
94
95
96

97
98
99
00
01
02
03
04
05
06

07
08
24
24
24

24
24
24
25
25
25
25
25
25
25

25
25

the analog and digital grounds and power supplies Output Code of 12-bit A/D Converter
should be connected together at one or more points in
the circuit to insure that the power supply, input and out- FIGURE 6: This is a histogram of 4096 samples from
put ratings of all of the devices are not violated. the output of the A/D Converter on the PCB that has a
ground plane as shown in the PCB layout in Figure 5.
The inclusion of a power plane in a 12-bit system is not
Note that the power traces are made considerably wider
as critical as the required ground plane. Although a
than the signal traces in order to reduce power supply
power plane can solve many problems, power noise trace inductance. This circuit has all by-pass capacitors
can be reduced by making the power traces two or
installed.
three times wider than other traces on the board and by
using by-pass capacitors effectively.

1999 Microchip Technology Inc. DS00688B-page 3

AN688
Signal Traces DID I SAY BY-PASS?
Generally speaking, the signal traces on the board
A good rule concerning by-pass capacitors is to always
(both digital and analog) should be a short as possible.
include them in the circuit. If they are not included, the
This basic guideline will minimize the opportunities for
power supply noise may very well eliminate any chance
extraneous signals to couple into the signal path.
for 12-bit precision.
One area to be particularly cautious of is the input ter-
By-pass capacitors belong in two locations on the
minals of analog devices. These input terminals nor-
board: one at the power supply (10F to 100F or both)
mally have a higher impedance than the output or
and one for every active device (digital and analog).
power supply pins. As an example, the voltage refer-
The value of the devices by-pass capacitor is depen-
ence input pin to the analog to digital converter is most
dent on the device in question. If the bandwidth of the
sensitive while a conversion is occurring. With the type
device is less than or equal to ~1MHz, a 1F will reduce
of 12-bit converter shown in Figure 1, the input termi-
injected noise dramatically. If the bandwidth of the
nals (IN+ and IN) are also sensitive to injected noise.
device is above ~10MHz, a 0.1F capacitor is probably
Another potential for noise injection into the signal path appropriate. In between these two frequencies, both or
is the input terminals of an operational amplifier. These either one could be used. Refer to the manufacturers
terminals have typically 109 to 1013 input impedance. guidelines for specifics.
These high impedance input terminals are sensitive to Every active device on the board requires a by-pass
injected currents. This can occur if the trace from a high capacitor. The by-pass capacitor must be placed as
impedance input is next to a trace that has fast chang- close as possible to the power supply pin of the device
ing voltages, such as a digital or clock signal. When a as shown in Figure 5. If two by-pass capacitors are
high impedance trace is in close proximity to a trace used for one device, the smaller one should be closest
with these types of voltage changes, charge is capaci- to the device pin. Finally, the lead length of the by-pass
tivly coupled into the high impedance trace. capacitor should be as short as possible.
To illustrate the benefits of by-pass capacitors, data is
w x L x eo x er PCB Trace
C= pF collected from the layout shown in Figure 5, minus the
d by-pass capacitors. This data is shown in Figure 8.

Digital Code VS. Occurrences

d 1400

1200
Number of Occurrences

L
1000

800
w
(typ 0.003mm) 600
PCB
w = thickness of PCB trace Cross-Section 400
L = length of PCB trace
d = distance between the two PCB traces 200
eo = dielectric constant of air = 8.85 X 10-12 F/m 0
er = dielectric constant of substrate coating relative to air
05
06
07

08
09
10
11
12
13
14
15
16
17

18
19
25
25
25

25
25
25
25

25
25
25
25
25
25

25
25
FIGURE 7: A capacitor can be constructed on a PCB Output Code of 12-bit A/D Converter
by placing two traces in close proximity. With this PCB
FIGURE 8: This a histogram of 4096 samples from the
capacitor, signals can be coupled between the traces.
output of the A/D Converter on the PCB that has a
As shown in Figure 7, the value of the capacitance ground plane as shown in the PCB layout in Figure 3.
between two traces is primarily dependent on the dis- With this circuit implementation, all by-pass capacitors
tance (d) between the traces and the distance that the have been removed.
two traces are in parallel (L). From this model, the
amount of current generated into the high impedance
trace is equal to:
I = C V/t
where
I equals the current that appears on the high
impedance trace
C equals the value of capacitance between the two
PCB traces
V equals the change in voltage of the trace that is
switching, and
t equals the amount of time that the voltage
change took to get from one level to the next.

DS00688B-page 4 1999 Microchip Technology Inc.

 AN688
PCB DESIGN CHECK LIST REFERENCES
Good 12-bit layout techniques are not difficult to master Morrison, Ralph, Noise and Other Interfering Signals,
as long as a few guidelines are considered. John Wiley & Sons, Inc., 1992
1. Check device placement versus connectors. Baker, Bonnie, Noise Sources in Applications Using
Make sure that high speed devices and digital Capacitive Coupled Isolated Amplifiers, AB-047,
devices are closest to the connector. Burr-Brown Corporation
2. Always have at least one ground plane in the cir-
cuit.
3. Make power traces wider than other traces on
the board.
4. Review current return paths and look for possi-
ble noise sources on ground connects. This is
done by determining the current density at all
points of the ground plane and the amount of
possible noise present.
5. By-pass all devices properly. Place the capaci-
tors as close to the power pins of the device as
possible.
6. Keep all traces as short as possible.
7. Follow all high impedance traces looking for
possible capacitive coupling problems from
trace to trace.

1999 Microchip Technology Inc. DS00688B-page 5

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when used in the intended manner and under normal conditions.
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