Analog Applications Journal Industrial

Ceramic or electrolytic output capacitors

in DC/DC converters—Why not both?
By Michael Score
Senior Member Technical Staff, Field Applications Engineering
Introduction The spikes at the load transients are primarily caused by
Switching power supplies are used in almost every end- equivalent series inductance (ESL) or impedance of the
equipment that needs a long battery life, low heat genera- output cap at very high frequencies. Fixed inductor-
tion, or to meet ENERGY STAR® guidelines. When current slopes cause the bulk of the transient-event
designing a switching power supply, it is difficult to decide disturbance in the inductor current to overshoot and
which output capacitor type to use. undershoot.[1] Recovery from the load-step transient also
Electrolytic capacitors have high equivalent series resis- causes overshoot and undershoot. Minimizing these lower
tance (ESR), making power loss high and transient frequency errors relies on energy stored in the output
response too poor for use with tough load-response capacitor and the voltage-loop response time. So, it is
requirements. However, electrolytic capacitors have stable important to have a wide loop bandwidth, low ESR, and
capacitance with high bias voltage and are inexpensive. enough output capacitance for adequate storage.
Ceramic capacitors have very low ESR, but capacitance There are two primary factors for maintaining low-noise
is reduced greatly with high bias voltage and can be output under load: 1) how much overshoot and under-
expensive for large values. The effective capacitance of a shoot the regulator will have; and 2) how much ripple
ceramic capacitor can be less than half the rated capaci- voltage occurs at the switching frequency. Peak overshoot/
tance in many buck converters. undershoot is approximately the load-step current times
Today’s buck regulators typically use just one type of the impedance of output capacitors at the loop crossover
output capacitor because it becomes too difficult to design frequency (Equation 1). The equation emphasizes the
with different capacitances and ESRs. This forces many importance of having low output-capacitor impedance at
designers to use more expensive capacitor types like the loop crossover frequency (fC) to get low overshoot or
polymer or tantalum that provide lower ESR than electro- undershoot. The loop crossover frequency is usually
lytic, but not as low as ceramic. Now a stable design with targeted to be one-tenth the switching frequency. A higher
mixed output capacitors can be prepared in minutes by loop crossover frequency minimizes overshoot/undershoot.
using new design tools. To illustrate this concept, this VOVER/UNDER SHOOT ≈ D IOUT × ZOUT (fC) (1)
article describes the design of a DC/DC supply with mixed
An approximation for output ripple voltage is the output
output capacitors.
capacitor’s impedance at the switching frequency times
Causes of output variation under load the peak-to-peak inductor current.[2]
The first step is to understand what the output capacitor VRIPPLE ≈ IL(P-P) × ZOUT (fSW) (2)
does in the system. Figure 1 shows idealized waveforms
Equation 2 shows that the output ripple voltage can be
with contributions of output-capacitor characteristics and
reduced by reducing the peak-to-peak inductor current,
where they occur in a load-transient event.
which is controlled by increasing the inductance value.

Figure 1. An idealized load-transient plot

ILoad
IInductor
Output
Currents
0
ESR & ESL COut
VOver
VOUT
(AC VSpike
Coupled) COut & ESR

COut VUnder
ESR & ESL

Texas Instruments 16 AAJ 3Q 2015

Analog Applications Journal Industrial

However, there are drawbacks. A more effective way to A 47-nF ceramic was chosen because it has a lower
minimize ripple is to reduce the output capacitor’s imped- impedance than the 22-µF capacitor at 20 MHz and above.
ance at the switching frequency. The impedance used for The 47 nF of additional capacitance is too small to affect
ripple voltage is at a much higher frequency because the stability. The black curve shows the impedance of the
switching frequency is around ten times the loop cross- parallel combination of the 22-µF and 47-nF capacitors.
over frequency. Figure 3 shows the 22-µF ceramic as the dominant curve
To minimize ripple and overshoot voltage under load for the impedance through most of the frequency band.
transients, the regulator requires a wide loop-crossover However, the electrolytic dominates at low frequencies
frequency. There should also be sufficient capacitance for and the 47-nF ceramic dominates at very high frequencies.
energy storage and the impedance of the output capaci-
tors should be low over frequency.
Output capacitors minimize output Figure 2. Effective capacitance of different 22-µF, 25-V,
X7R ceramic capacitors
impedance
Ideally, the output capacitor would be very large
for energy storage and have very low impedance 30
at the loop crossover and switching frequencies. 28
26
Polymer and tantalum capacitors come in large Capacitor A
24
values with low ESR, but they are expensive and
22
the ESR is still not as low as a ceramic capacitor.
20
Electrolytic capacitors are very good for obtaining
Capacitance (µF)

18
large capacitance values at a low cost, however,
16
they have a larger ESR and ESL. This makes them
14
unsuitable for output load-step performance.
12
Ceramic capacitors have very low ESR and ESL
10 Capacitor B
that makes them great for transient performance,
8
but they have limitations on capacitor size. 6
Ceramic capacitor values of 22 µF and less are 4
relatively inexpensive. The effective capacitance 2
of ceramic capacitors decreases with bias voltage, 0
which makes it more difficult to provide enough 0 2 4 6 8 10 12 14 16 18 20 22 24
energy storage for large load steps. TDK SEAT DC Bias (V)
software was used for the plot in Figure 2 to show
the effect of VBIAS on effective capacitance. The
two 22-µF-rated ceramic capacitors decrease to
19 µF and 16 µF with 12 V of bias voltage. Note Figure 3. Impedance of ceramic and
that two 22-µF, 25-V, X7R capacitors from the electrolytic capacitors
same vendor have very different VBIAS curves, so
be sure to check the actual VBIAS curve. 100000
With the same software, Figure 3 shows the
impedance of 22-µF and 47-nF ceramic capacitors 10000
versus frequency. The 22-µF capacitor has low
impedance at 100 kHz and above, but it does not 1000

provide enough energy storage. The electrolytic 47-nF Ceramic

100
Impedance (Ω)

capacitor can be paralleled with the 22-µF Capacitor

ceramic, allowing low impedance at frequencies 10
less than 100 kHz. The electrolytic capacitor is
desirable at low frequencies because it has large 1 22-µF Ceramic
Capacitor
capacitance and adding a small ceramic capacitor
in parallel will reduce electromagnetic interfer- 0.1
Additional Lower
ence (EMI) that results from switching noise. Z with Electrolytic
0.01 Total Z of the 22-µF
and 47-nF ceramics
0.001
0.001 0.01 0.1 1 10 100 1000
Frequency (MHz)

Texas Instruments 17 AAJ 3Q 2015

Analog Applications Journal Industrial

A design with mixed output capacitors provides the red in Figure 4.

lowest output impedance across the widest frequency After clicking the schematic to enlarge the view, the
range. However, compensation of the feedback loop for a components on the schematic can be changed by double-
buck regulator becomes very difficult to calculate. It is clicking on the component. In this case, the inductor (L1)
important to consider the pole/zero locations because of was double-clicked to choose a slightly lower cost option.
the combination of lower ESR and capacitance from the Each output capacitor (red arrows in Figure 4) was
ceramics, and higher ESR and capacitance from the elec- changed for the desired mix of electrolytic and ceramic
trolytics. The inductor and each capacitor provide differ- capacitors. COUT was changed to two 100-µF electrolytic
ent pole/zero locations. TI’s WEBENCH® software takes capacitors from the tool’s database and COUTX to a ceramic
each path into account separately, which makes the design capacitor. The database has several suitable ceramic capac-
easier and more robust than calculating by hand. itors. However, the tool did not have the 22-µF ceramic
capacitor shown in Figures 2 and 3. The COUTX capacitor
Mixed-capacitor design example was double-clicked and then “Create Custom Part” (bottom
A mixed-capacitor design was chosen with a buck regula- of window) was selected. A 19-µF ceramic was substituted
tor having an input voltage of 24 V (±20%) and a 12-V for the 22-µF typical value to adjust for reduced capaci-
output voltage at 6 A. The focus is on obtaining a good tance at the 12-V bias voltage and 15 mΩ was entered for
transient response with a low-cost solution. ESR, which adds a little resistance for traces.
You can enter the requirements either in the WEBENCH After changing the output capacitors, the “Re-Comp”
panel or directly into the panel on the product page of the button (Figure 4, circled in red) was clicked to see the
chosen regulator. For this example, the LM25117 buck bode plot and change the compensation.
controller was chosen and the input conditions were On the following page, the blue curves in Figure 5 show
entered on the product page. After the design is started, the total loop magnitude and phase, while the orange
an advanced-option section will appear on the left side as curves show the power stage response. The tool marks the
shown in Figure 4. This design needs good transient pole and zero locations of the power stage with the mixed
performance, so the “user preferred frequency” box was output-capacitor design and the power-stage gain curve.
checked and “500 kHz” was entered in the box below to Stability of the selected design is sufficient, but the goal
allow a wide loop-crossover frequency. Under the “Output was to get a wider crossover frequency. The WEBENCH
Cap Options,” “Mixed” was selected and then “Update” Compensation Designer allows auto compensation with
was clicked to start a new design that allows 500 kHz and the option to select a cross-over frequency, gain margin,
mixed output capacitors. These selections are circled in and phase-margin ranges. In this example, however,

Figure 4. Schematic with mixed output capacitors

Dvcc
VF@ Io= 500.0 m V
@2A

D1
VF@ Io= 500.0 m V
@2A

M1 Cvcc
Ruv2 Cboot 470.0 nF
VdsMax = 100.0 nF
54.9 kOhm
40.0 V 280.0 m Ohm
IdsMax =
50.0 Am ps

L1
DEMB VCC 6.8 µH Vout = 12.0V
13.2 m Ohm
Iout = 6.0A
VIN HB
LM2 5 11 7
Cin UVLO HO
4.7 µF
3.0 m Ohm
Qty= 3 RT U1 SW
Vin Rramp
R = 50 mOhm M2
RES LO 45.3 kOhm
V = 24.0 V Cinx CS
VdsMax =
100.0 nF 60.0 V
64.0 m Ohm SS CSG IdsMax =
VCCDIS CM 20.0 Am ps
AGND RAMP Coutx
PGAND COMP FB 19.0 µF
Rsense 15.0 m Ohm
10.0 m Ohm
Ruv1 Ccomp2
4.32 kOhm 100 .0 pF
50.0 V Rfb2
14.0 kOhm

Rt Css
15.0 nF
9.53 kOhm
50.0 V Ccomp1 Rcomp Cout
1.5 0 nF 20.0 kOhm 100.0 µF
50.0 V 170.0 m Ohm
Qty= 2
Cres
470.0 nF Rfb1
16.0 V 1.0 kOhm

Cramp
820.0 pF
50.0 V

Texas Instruments 18 AAJ 3Q 2015

Analog Applications Journal Industrial

manual compensation was selected for control of the acceptable to stay near its original frequency of 80 kHz.
compensation poles and zeroes instead. The “Edit Poles/ Moving the compensation zero to 2.8 kHz increased the
Zeroes” option allowed the compensation poles and zeroes crossover frequency from 21 kHz to 56 kHz. Phase margin
to be moved and component values automatically changed was reduced to 65 degrees and the gain margin to 15 dB,
to meet the pole/zero locations. “Zero1” was decreased which is still a very stable design. The stability results are
from 5.3 kHz to 2.8 kHz to increase the crossover frequency circled in Figure 6. Selecting the “Apply Changes to
and remove some of the dip in phase at 1 kHz. Pole1 was Design” button updates the schematic.

Figure 5. An initial bode plot with mixed output capacitors showing poles and zeros on the
power stage magnitude curve

A: 20.61 kHz B: 152.76 kHz

100

80

60

40
Gain (dB)

20

–20

–40

–60

–80
1 10 100 1k 10 k 100 k 1M
Frequency (Hz)
180

160
Phase Margin = Phase + 180 (degrees)

140

120

100

80

60

40

20

–20

–40
1 10 100 1k 10 k 100 k 1M
Frequency (Hz)

Figure 6. Bode plot with mixed output capacitors after manual compensation shows increased
bandwidth and good phase margin

A: 56.25 kHz B: 151.89 kHz

100

80

60

40
Gain (dB)

20

–20

–40

–60
1 10 100 1k 10 k 100 k 1M
Frequency (Hz)
180

160
Phase Margin = Phase + 180 (degrees)

140

120

100

80

60

40

20

–20

–40
1 10 100 1k 10 k 100 k 1M
Frequency (Hz)

Texas Instruments 19 AAJ 3Q 2015

Analog Applications Journal Industrial

Figure 7. Final WEBENCH schematic with mixed output capacitors

Dvcc
VF@ Io= 500.0 m V
@2A

D1
VF@ Io= 500.0 m V
@2A

M1 Cvcc
Ruv2 Cboot 470.0 nF
VdsMax = 100.0 nF
54.9 kOhm
40.0 V 280.0 m Ohm
IdsMax =
50.0 Am ps

L1
DEMB VCC 6.8 µH Vout = 12.0V
13.2 m Ohm
Iout = 6.0A
VIN HB
LM2 5 11 7
Cin UVLO HO
4.7 µF
3.0 m Ohm
Qty= 3 RT U1 SW
Vin Rramp
R = 50 mOhm M2
RES LO 45.3 kOhm
V = 24.0 V Cinx CS
VdsMax =
100.0 nF 60.0 V
64.0 m Ohm SS CSG IdsMax =
VCCDIS CM 20.0 Am ps
AGND RAMP Coutx
PGAND COMP FB 19.0 µF
Rsense 15.0 m Ohm
10.0 m Ohm
Ruv1 Ccomp2
4.32 kOhm 56 .0 pF
50.0 V Rfb2
14.0 kOhm

Rt Css
15.0 nF
9.53 kOhm
50.0 V Ccomp1 Rcomp Cout
1.5 0 nF 36.5 kOhm 100.0 µF
50.0 V 170.0 m Ohm
Qty= 2
Cres
470.0 nF Rfb1
16.0 V 1.0 kOhm

Cramp
820.0 pF
50.0 V

The final schematic is shown in Figure 7. If the system References

does not already have bulk decoupling, an electrolytic
1. Briditte Hauke, “Basic Calculation of a Buck Converter’s
should be added to the input for additional bulk capaci-
Power Stage,” Application Note (SLVA477A), Texas
tance. If needed, the 47-nF capacitor shown in Figure 3
Instruments, August 2012
could be added to the output to reduce EMI.
2. Surinder P Singh, “Output Ripple Voltage for Buck
Conclusion Switching Regulators,” Application Note (SLVA630A),
Low impedance of output capacitors across frequency and Texas Instruments, October 2014
a high loop-crossover frequency provide good transient
response. Using both ceramic and electrolytic output
Related Web sites
capacitors minimizes capacitor impedance across General information:
frequency. Ceramic capacitors are best for high frequency www.energystar.gov/
and large-value electrolytic capacitors are good for low product.tdk.com/en/technicalsupport/seat
frequency. Completing a stable design with mixed output Product information:
capacitors using a pen and paper is challenging, but LM25117
WEBENCH Power Designer makes it easy to design with CSD18504Q5A
mixed capacitors and also re-compensate for improved WEBENCH® Design Center:
performance. www.ti.com/webench
Subscribe to the AAJ:
www.ti.com/subscribe-aaj

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