Lab 1

Ex.No.1 Data transfer and Logical operation using 8086

1.1 Introduction:

The purpose of this experiment is to learn about the registers, instruction sets, data
transfer operation and logical operation of 8086 by using AND , OR in the given two 16 bit
numbers and store them in a memory location.

1.2 Hardware Requirement:

The 8086 Microprocessor kit, Power Supply.

1.3 Program Logic:

The logical AND instruction is used for masking off bits. The bits which have to be
cleared are to be AND ed with a logical zero and other bits are to be high.hence to achieve the
above objective,.AND with 0F0F .

The logical OR of a bit with procedure a result of 1.hence bits can be set selectively by
ORing the particular bit with a 1

1.4 Program
Introduction of general purpose registers,data transfer instruction, logical instruction
(AND,OR), immediate addressing, direct addressing:

ADDRESS LABEL MNEMONICS OPCODE COMMENTS

MOV AX, [1100]
AND AX,0F0F
MOV [1200],AX
HLT

Observation

IN PUT DATA OUT PUT DATA

ADDRESS ADDRESS
1100 1200
1101 1201

ADDRESS LABEL MNEMONICS OPCODE COMMENTS

MOV AX, 0000
 OR AX,0F0F
MOV [1200],AX
HLT

Observation

OUT PUT DATA

ADDRESS
1200
1201

1.5 Pre Lab Questions

1. Difference between Microprocessor & Microcontroller?

2. Define BUS and give the classification of Buses
3. How the Microprocessors can be categorized?

1.6 Post Lab Questions

1. Calculate the physical address for the given data. DS=1000h, BP=1234h
2. Initialise register CX to value FFFF and register AX to value 0000. Write a program to
exchange the content of both these registers.
3. Write a program to find the ones complement of FE27 and store it in memory location
1400.
4. What is the purpose of HLT instruction?
5. What happens if the result is greater than 16bit?
Lab 2

Ex.No.2 Arithmetic operation using 8086

2.1 Introduction:

The purpose of this experiment is to learn about the registers, instruction sets, and
arithmetic operators of 8086 by addition , subtraction ,multiplication and division in the given
two 16 bit numbers and store them in a memory location.

2.2 Hardware Requirement:

The 8086 Microprocessor kit, Power Supply.

2.3 Program Logic:

The add instruction requires either the addend or the augend to be in a register, unless the
source operand is immediate since the addressing modes permitted for the source and destination
are register-register, memory to register, register to memory, register to immediate, and finally
memory to immediate.
Hence one of the operands is initially moved to AX. Then using the add instruction, 16-
bit addition is performed.
The next arithmetic primitive is SUB. As discussed in ADD it permits the same modes of
addressing. Hence moving the minuend to a register pair is necessary. Then the result is moved
to a location in memory.
The 8086 Processor provides both signed and unsigned multiply in their instruction set to
overcome the loss of efficiency in performing the repeated addition.
The MUL instruction can have both 16 and 8 bit operands and the multiplicand is AX or
AL, accordingly the result for a byte multiply is a 16 bit number in AX while that for a word
multiply is a 32 bit number, the lower word of which is in AX and the higher word in DX.
2.4 Program
Introduction of general purpose registers, arithmetic operators (add ,sub,mul&div),
immediate addressing, direct addressing:
Addition without carry:
ADDRESS LABEL MNEMONICS OPCODE COMMENTS
MOV AX, [1100]
MOV BX, [1102]
ADD AX,BX
MOV [1200],AX
 HLT

Observation
IN PUT DATA OUT PUT DATA
ADDRESS ADDRESS
1100 1200
1101 1201
1102
1103

Subtraction without borrow:

ADDRESS LABEL MNEMONICS OPCODE COMMENTS
MOV AX, [1100]
MOV BX, [1102]
SUB AX,BX
MOV [1200],AX
HLT

Observation
IN PUT DATA OUT PUT DATA
ADDRESS ADDRESS
1100 1200
1101 1201
1102
1103

Multiplication:
ADDRESS LABEL MNEMONICS OPCODE COMMENTS
MOV AX, [1100]
MOV BX, [1102]
MUL BX
MOV [1200],AX
MOV [1202],DX
HLT
Observation

IN PUT DATA OUT PUT DATA

ADDRESS ADDRESS
1100 1200
1101 1201
1102 1202
1103 1203

Division:
ADDRESS LABEL MNEMONICS OPCODE COMMENTS
MOV AX, [1100]
MOV BX, [1102]
DIV BX
MOV [1200],AX
MOV [1202],DX
HLT

Observation

IN PUT DATA OUT PUT DATA

ADDRESS ADDRESS
1100 1200
1101 1201
1102 1202
1103 1203

2.5 Pre Lab Questions

1. What is a Flag register?

2. Explain how physical Address is formed in 8086?
3.What is the name given to the register combination DX:AX?

2.6 Post Lab Questions

1. Write a program, which address a constant correction factor to a temp, that is stored in
the data segment. The corrected segment should be stored in a new location in memory.
2. The memory address starting from the logical address 0124h:0056h, store the numbers
0978h, CE45h, 45h and 7809h in consecutive locations. Draw a diagram showing the
physical address and the corresponding data stored
3. What is the instruction used for signed division?
4. Write a program to find the factorial of a number N. for 8086, the maximum size of an
operand for multiplication is only a word. This places a limitation on the value of N that
can be used. Hence the value of N is to be less than 9. Store the result in memory
5.List out the type of addressing modes used in your program
 Lab 3
Ex.No.3.Program to demonstrate decision making and looping operation.

3.1 Introduction:
The purpose of this experiment is to learn about the general purpose registers, instruction
sets, addressing modes and logical operators of 8086 by sorting the sequence of numbers from
the array stored in a memory location into ascending and descending series.

3.2 Hardware Requirement:

The 8086 Microprocessor kit, Power Supply.

3.3 Program Logic:

To arrange the given numbers in ascending and descending order, the bubble sorting
method is used. Initially the first number of the series is compared with the second one. If the
first number is greater than second, exchange their positions in the series otherwise leave the
position unchanged. Then compare the second number in the recent form of the series with third
and repeat the exchange part that you are carried out for the first and second number, and for all
the remaining number of the series. Repeat this procedure for complete series (n-1) times. After
n-1 iterations you will get the largest number at the end of the series. Again start from the first
number of the series. Repeat the same procedure right from the first element to the last element.
After n-2 iteration you will get the second highest number at the last but one place in the series.
Repeat this till the complete series is arranged in ascending order.

3.4 Program:
Introduction of general purpose registers, logical operators, indirect addressing, and loop
instructions, compare instruction, exchange instruction, increment & decrement
instruction:
Ascending order:
ADDRESS LABEL MNEMONICS OPCODE COMMENTS
MOV SI,1200
MOV CL,[SI]
DEC CL
LOOP3 MOV SI,1200

MOV CH,[SI]
DEC CH
INC SI
LOOP2 MOV AL,[SI]

INC SI
CMP AL,[SI]
JC LOOP1
XCHG AL,[SI]
XCHG [SI-
1],AL
LOOP1 DEC CH
JNZ LOOP2
DEC CL
JNZ LOOP3
HLT

Descending order:
ADDRESS LABEL MNEMONICS OPCODE COMMENTS
MOV SI,1200
MOV CL,[SI]
DEC CL
LOOP3 MOV SI,1200

MOV CH,[SI]
DEC CH
INC SI
LOOP2 MOV AL,[SI]

INC SI
CMP AL,[SI]
JNC LOOP1
XCHG AL,[SI]
XCHG [SI-1],AL
 LOOP1 DEC CH
JNZ LOOP2
DEC CL
JNZ LOOP3
HLT

3.5 Pre-Lab Questions:

1. What is the purpose of XCHG instruction?

2. Draw the flow chart to arrange a given series of numbers in ascending and descending
order.
3. Write a small program using DAA instruction?
4. Which type of jump instruction (short, near or far) assembles for the following:
If the distance is 0210H bytes
If the distance is 0020H bytes
If the distance is 100000H bytes
3.6 Post-Lab Questions:

1. What is the purpose of AAA instruction?

2. What is the use of PUSH and POP instruction?
3. Write an assembly language program in 8086 to sort the given array of 16-bit numbers in
descending order.
4. What do square brackets means when they appear in an operand?
5. In a given program how many times DEC and JNZ instructions are executed? What will
be content in AX register after executing the program?
MOV AX, 00FF
MOV CL, 05
REPEAT: INC AX
DEC CL
JNZ REPEAT
 Laboratory Report Cover Sheet
SRM Institute of Science and Technology
Faculty of Engineering and Technology
Department of Electronics and Communication Engineering
15EC311L Processor Lab
Fifth Semester, 2019-20 (odd semester)

Name :

Register No. :

Day / Session :

Venue :

Title of Experiment :

Date of Conduction :

Date of Submission :

Max. Marks
Particulars
Marks Obtained
Pre-lab 5
Lab Performance (Flow chart) 25
Post-lab 10
Total 40
Record 5

REPORT VERIFICATION

Date :

Staff Name :

Signature :