Microproccessor NOTES

MICROPROCESSORS AND MICROCONTROLLERS
15CS44
MODULE – 2
A AND L INSTRUCTIONS & INT 21H AND INT 10H PROGRAMMING
ARITHMETIC & LOGIC INSTRUCTIONS AND PROGRAMS
INTRUCTIONS SET DESCRIPTION:
UNSIGNED ADDITION AND SUBTRACTION:
Unsigned numbers are defined as data in which all the bits are used to represent data and no bits are set
aside for the positive or negative sign. This means that the operand can be between 00 and FFH (0 to 255
decimal) for 8-bit data, and between 0000 and FFFFH (0 to 65535 decimal) for 16-bit data.
Addition of Unsigned Numbers:
 The instructions ADD and ADC are used to add two operands. The destination operand can be a
register or in memory. The source operand can be a register, in memory, or immediate.
 Remember that memory-to-memory operations are never allowed in x86 Assembly language.
 The instruction could change any of the ZF, SF, AF, CF, or PF bits of the flag register, depending
on the operands involved. The overflow flag is used only in signed number operations.
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With addition, two cases will be discussed:
CASE1: Addition of Individual Byte and Word Data:
Program 3-1a
These numbers are converted to hex by the assembler as follows: 125 = 7DH, 235 = 0EBH, 197 = 0C5H,
91 = 5BH, 48 = 30H. This program uses AH to accumulate carries as the operands are added to AL
register. Three iterations of the loop are shown below:
1. In the first iteration of the loop, 7DH is added to AL with CF = 0 and AH = 00. CX = 04 and ZF
= 0.
2. In the second iteration of the loop, EBH is added to AL, which results in AL = 68H and CF = 1.
Since a carry occurred, AH is incremented. CX = 03 and ZF = 0.
3. In the third iteration, C5H is added to AL, which makes AL = 2DH. Again a carry occurred, so
AH is incremented again. CX = 02 and ZF = 0.
This process continues until CX = 00 and the zero flag becomes 1, which will cause JNZ to fall through.
Then the result will be saved in the word-sized memory set aside in the data segment.
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Although this program works correctly, due to pipelining it is strongly recommended that the
following lines of the program be replaced:
The instruction "JNC OVER" has to empty the queue of pipelined instructions and fetch the instructions
from the OVER target every time the carry is zero (CF = 0). Hence, the "ADC AH, 00" instruction is
much more efficient.
The addition of many word operands works the same way. Register AX (or CX, DX, or BX) could be
used as the accumulator and BX (or any general-purpose 16-bit register) for keeping the carries. Program
3-1b is the same as Program 3-1a, rewritten for word addition.
Program 3-1b
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CASE2: Addition of Multiword Numbers:
Program 3-2
o Assume, a program is needed that will add the total Indian budget for the last 100 years or the
mass of all the planets in the solar system.
o In cases like this, the numbers being added could be up to 8 bytes wide or even more. Since
registers are only 16 bits wide (2 bytes), it is the job of the programmer to write the code to break
down these large numbers into smaller chunks to be processed by the CPU.
o If a 16-bit register is used and the operand is 8 bytes wide, that would take a total of four
iterations. However, if an 8-bit register is used, the same operands would require eight iterations.
 In writing this program, the first thing to be decided was the directive used for coding the data in
the data segment. DQ was chosen since it can represent data as large as 8 bytes wide.
 In the addition of multibyte (or multiword) numbers, the ADC instruction is always used since the
carry must be added to the next-higher byte (or word) in the next iteration. Before executing
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ADC, the carry flag must be cleared (CF = 0) so that in the first iteration, the carry would not be
added. Clearing the carry flag is achieved by the CLC (clear carry) instruction.
 Three pointers have been used: SI for DATA1, DI for DATA2, and BX for DATA3 where the
result is saved.
 There is a new instruction in that program, "LOOP xxxx", which replaces the often used "DEC
CX" and "JNZ xxxx".
When "LOOP xxxx" is executed, CX is decremented automatically, and if CX is not 0, the microprocessor
will jump to target address xxxx. If CX is 0, the next instruction (the one below "LOOP xxxx") is
executed.
Subtraction of Unsigned Numbers:
The x86 uses internal adder circuitry to perform the subtraction command. Hence, the 2's complement
method is used by the microprocessor to perform the subtraction. The steps involved is –
1. Take the 2's complement of the subtrahend (source operand)
2. Add it to the minuend (destination operand)
3. Invert the carry.
These three steps are performed for every SUB instruction by the internal hardware of the x86 CPU. It is
after these three steps that the result is obtained and the flags are set. The following example illustrates
the three steps:
 After the execution of SUB, if CF = 0, the result is positive; if CF = 1, the result is negative and
the destination has the 2's complement of the result.
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o Normally, the result is left in 2's complement, but the NOT and INC instructions can be used to
change it. The NOT instruction performs the 1’s complement of the operand; then the operand is
incremented to get the 2's complement; as shown in the following example:
SBB (Subtract with Borrow):

This instruction is used for multibyte (multiword) numbers and will take care of the borrow of the lower
operand. If the carry flag is 0, SBB works like SUB. If the carry flag is 1, SBB subtracts 1 from the result.
Notice the "PTR" operand in the following Example.
The PTR (pointer) data directive is used to specify the size of the operand when it differs from the defined
size. In above Example; "WORD PTR" tells the assembler to use a word operand, even though the data is
defined as a double word.
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UNSIGNED MULTIPLICATION AND DIVISION:
One of the major changes from the 8080/85 microprocessor to the 8086 was inclusion of instructions for
multiplication and division. The use of registers AX, AL, AH, and DX is necessary.
Multiplication of Unsigned Numbers:

In discussing multiplication, the following cases will be examined: (1) byte times byte, (2) word times
word, and (3) byte times word.
8-bit * 8-bit AL * BL 16-bit * 16-bit AX * BX
16-bit AX 32-bit DX AX
byte x byte: In byte-by-byte multiplication, one of the operands must be in the AL register and the
second operand can be either in a register or in memory. After the multiplication, the result is in AX.
In the program above, 25H is multiplied by 65H and the result is saved in word-sized memory named
RESULT. Here, the register addressing mode is used.
The next three examples show the register, direct, and register indirect addressing modes.
 In the register addressing mode example, any 8-bit register could have been used in place BL.
 Similarly, in the register indirect example, BX or DI could have been used as pointers.
 If the register indirect addressing mode is used, the operand size must be specified with the help
of the PTR pseudo-instruction. In the absence of the "BYTE PTR" directive in the example above,
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the assembler could not figure out if it should use a byte or word operand pointed at by SI. This
confusion may cause an error.
word x word: In word-by-word multiplication, one operand must be in AX and the second operand can
be in a register or memory. After the multiplication, registers DX and AX will contain the result. Since
word-by-word multiplication can produce a 32-bit result, DX will hold the higher word and AX the lower
word.
word x byte: This is similar to word-by-word multiplication, except that AL-contains the byte operand
and AH must be set to zero.
Table: Unsigned Multiplication Summary
Division of Unsigned Numbers:

In the division of unsigned numbers, the following cases are discussed:
1. Byte over byte
2. Word over word
3. Word over byte
4. Double-word over word
8-bit AL Q: AL 16-bit AX Q: AX
8-bit BL R: AH 16-bit BX R: DX
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16-bit AX Q: AL 32-bit DA AX Q: AX
8-bit BL R: AH 16-bit BX R: DX
In divide, there could be cases where the CPU cannot perform the division. In these cases an interrupt is
activated. This is referred to as an exception. In following situations, the microprocessor cannot handle
the division and must call an interrupt:
1. If the denominator is zero (dividing any number by 00)
2. If the quotient is too large for the assigned register.
In the IBM PC and compatibles, if either of these cases happens, the PC will display the "divide error"
message.
byte/byte: In dividing a byte by a byte, the numerator must be in the AL register and AH must be set to
zero. The denominator cannot be immediate but can be in a register or memory. After the DIV instruction
is performed, the quotient is in AL and the remainder is in AH.
word/word: In this case, the numerator is in AX and DX must be cleared. The denominator can be in a
register or memory. After the DIV; AX will have the quotient and the remainder will be in DX.
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word/byte: Here, the numerator is in AX and the denominator can be in a register or memory. After the
DIV instruction, AL will contain the quotient, and AH will contain the remainder. The maximum quotient
is FFH.
The following program divides AX = 2055 by CL = 100. Then AL = 14H (20 decimal) is the quotient and
AH = 37H (55 decimal) is the remainder.
Double-word/word: The numerator is in DX and AX, with the most significant word in DX and the least
significant word in AX. The denominator can be in a register or in memory. After the DIV instruction; the
quotient will be in AX, and the remainder in DX. The maximum quotient is FFFFH.
 In the program above, the contents of DX: AX are divided by a word-sized data value, 10000.
 The 8088/86 automatically uses DX: AX as the numerator anytime the denominator is a word in
size.
 Notice in the example above that DATAl is defined as DD but fetched into a word-size register
with the help of WORD PTR. In the absence of WORD PTR, the assembler will generate an
error.
Table: Unsigned Division Summary
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LOGIC INSTRUCTIONS:
Here, the logic instructions AND, OR, XOR, SHIFT, and COMPARE are discussed with examples.
Inputs Output
AND A B A AND B
0 0 0
 This instruction will perform a logical AND on the operands and 0 1 0
place the result in the destination. The destination operand can be a 1 0 0
register or memory. The source operand can be a register, memory, 1 1 1
or immediate.
 AND will automatically change the CF and OF to zero, and PF,
ZF, and SF are set according to the result. The rest of the flags are
either undecided or unaffected.
 AND can be used to mask certain bits of the operand. The task of clearing a bit in a binary
number is called masking. It can also be used to test for a zero operand.
 The above code will AND DH with itself, and set ZF =1, if the result is zero. This makes the CPU
to fetch from the target address XXXX. Otherwise, the instruction below JZ is executed. AND
can thus be used to test if a register contains zero.
Inputs Output
OR A B A OR B
0 0 0
 The destination and source operands are ORed and the result is 0 1 1
placed in the destination. 1 0 1
 The destination operand can be a register or in memory. The 1 1 1
source operand can be a register, memory, or immediate.
 OR will automatically change the CF and OF to zero, and PF, ZF,
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and SF are set according to the result. The rest of the flags are either undecided or unaffected.
 The OR instruction can be used to test for a zero operand. For example, "OR BL, 0"will OR the
register BL with 0 and make ZF = 1, if BL is zero. "OR BL, BL" will achieve the same result.
 OR can also be used to set certain bits of an operand to 1.
Inputs Output
XOR
A B A XOR B
0 0 0
 The XOR instruction will eXclusive-OR the operands and place the
0 1 1
result in the destination. XOR sets the result bits to 1 if they are
1 0 1
not equal; otherwise, they are reset to 0.
1 1 0
 The destination operand can be a register or in memory. The
source operand can be a register, memory, or immediate.
 OR will automatically change the CF and OF to zero, and PF, ZF,
and SF are set according to the result. The rest of the flags are either undecided or unaffected.
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 XOR can be used to see if two registers have the same value. "XOR BX, CX" will make ZF = 1, if
both registers have the same value, and if they do, the result (0000) is saved in BX, the
destination.
 XOR can also be used to toggle (invert/compliment) bits of an operand. For example, to toggle bit
2 of register AL:
 This would cause bit 2 of AL to change to the opposite value; all other bits would remain
unchanged.
SHIFT
o Shift instructions shift the contents of a register or memory location right or left.
o The number of times (or bits) that the operand is shifted can be specified directly if it is once
only, or through the CL register if it is more than once.
o There are two kinds of shifts:
 Logical – for unsigned operands
 Arithmetic – signed operands.
SHR: This is the logical shift right. The operand is shifted right bit by bit, and for every shift the LSB
(least significant bit) will go to the carry flag (CF) and the MSB (most significant bit) is filled with 0.
 SHR does affect the OF, SF, PF, and ZF flags.
 The operand to be shifted can be in a register or in memory, but immediate addressing mode is
not allowed for shift instructions. For example, "SHR 25, CL" will cause the assembler to give an
error.
Eg:
SHR BH, CL R/M Cy
Shift right Before After

BH 0100 0100 0001 0001
CL 02H
[Type text]
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Cy 1 0
[Type text]
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 If the operand is to be shifted once only, this is specified in the SHR instruction itself rather than
placing 1 in the CL. This saves coding of one instruction:
 After the above shift, BX = 7FFFH and CF = 1.
SHL: Shift left is also a logical shift. It is the reverse of SHR. After every shift the LSB is filled with 0
and the MSB goes to CF.
 SHL does affect the OF, SF, PF, and ZF flags.
 The operand to be shifted can be in a register or in memory, but immediate addressing mode is
not allowed for shift instructions. For example, "SHL 25, CL" will cause the assembler to give an
error.
Eg:
SHL BH, CL Cy R/M
0
Shift left without Cy Before After

BH 0010 0010 1000 1000
CL 02H
Cy 1 0
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COMPARE of Unsigned Numbers:
 The CMP instruction compares two operands and changes the flags according to the result of the
comparison. The operands themselves remain unchanged.
 The destination operand can be in a register or in memory and the source operand can be in a
register, memory, or immediate.
 The compare instruction is really a SUBtraction, except that the values of the operands do not
change.
 The flags are changed according to the execution of SUB. Although all the flags (CF, AF, SF, PF,
ZF, and OF flags) are affected, the only ones of interest are ZF and CF.
 It must be emphasized that in CMP instructions, the operands are unaffected regardless of the
result of the comparison. Only the flags are affected.
Table: Flag Settings for Compare Instruction
Compare Operands CF ZF Remark
destination > source 0 0 destination – source; results CF = 0 & ZF = 0
destination = source 0 1 destination – source; results CF = 0 & ZF = 1
destination < source 1 0 destination – source; results CF = 1 & ZF = 0
 In the program above, AX is greater than the contents of memory location DATA1 (0CCCCH >
235FH); therefore, CF = 0 and JNC (jump no carry) will go to target OVER.
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 In the above code, BX is smaller than CX (7888H < 9FFFH), which sets CF = 1, making "JNC
NEXT" fall through so that "ADD BX, 4000H" is executed.
 In the example above, CX and BX still have their original values (CX = 9FFFH and BX =7888H)
after the execution of "CMP BX, CX".
 Notice that CF is always checked for cases of greater or smaller than, but for equal, ZF must be
used.
 The above program sample has a variable named TEMP, which is being checked to see if it has
reached 99.
In the following Program the CMP instruction is used to search for the highest byte in a series of 5 bytes
defined in the data segment.
 The instruction "CMP AL, [BX]" works as follows ([BX] is the contents of the memory location
pointed at by register BX).
• If AL < [BX], then CF = 1 and [BX] becomes the basis of the new comparison.
• If AL > [BX], then CF = 0 and AL is the larger of the two values and remains the basis of
comparison.
 Although JC (jump carry) and JNC (jump no carry) check the carry flag and can be used after a
compare instruction, it is recommended that JA (jump above) and JB (jump below) be used
because,
• The assemblers will unassembled JC as JB, and JNC as JA.
 The below Program searches through five data items to find the highest grade.
 The program has a variable called "Highest" that holds the highest grade found so far. One by
one, the grades are compared to Highest. If any of them is higher, that value is placed in Highest.
 This continues until all data items are checked. A REPEAT-UNTIL structure was chosen in the
program design.
 The program uses register AL to hold the highest grade found so far. AL is given the initial value
of 0. A loop is used to compare each of the 5 bytes with the value in AL.
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 If AL contains a higher value, the loop continues to check the next byte. If AL is smaller than the
byte being checked, the contents of AL are replaced by that byte and the loop continues.
Program 3-3
NOTE:
There is a relationship between the pattem of lowercase and uppercase letters, as shown below for A and
a:
A 0100 0001 41H
a 0110 0001 61H
The only bit that changes is d5. To change from lowercase to uppercase , d5 must be masked.
Note that small and capital letters in ASCII have the following values:
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Fig: Flowchart and Pseudocode for Program 3-3
The following Program uses the CMP instruction to determine if an ASCII character is uppercase or
lowercase.
 The following Program first detects if the letter is in lowercase, and if it is, it is ANDed wit h
1101 1111B = DFH. Otherwise, it is simply left alone.
 To determine if it is a lowercase letter, it is compared with 61H and 7AH to see if it is in the
range a to z. Anything above or below this range should be left alone.
In the following Program, 20H could have been subtracted from the lowercase letters instead of ANDing
with 1101 1111B.
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Program 3-4
Digit BCD
0 0000
BCD AND ASCII CONVERSION:
1 0001
o BCD (binary coded decimal) is needed because we use the digits 0 to 9 for
numbers in everyday life. Binary representation of 0 to 9 is called BCD. 2 0010
o In computer literature, one encounters two terms for BCD numbers: (1) unpacked 3 0011
BCD, and (2) packed BCD. 4 0100

5 0101
Unpacked BCD: 6 0110

o In unpacked BCD, the lower 4 bits of the number represent the BCD number and 7 0111
the rest of the bits are 0. 8 1000
• Example: "0000 1001" and "0000 0101" are unpacked BCD for 9 and 5, 9 1001
respectively.
o In the case of unpacked BCD it takes 1 byte of memory location or a register of 8 bits to contain
the number.
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Packed BCD:
o In the case of packed BCD, a single byte has two BCD numbers in it, one in the lower 4 bits and
one in the upper 4 bits.
• For example, "0101 1001" is packed BCD for 59.
o It takes only 1 byte of memory to store the packed BCD operands. This is one reason to use
packed BCD since it is twice as efficient in storing data.
ASCII Numbers:
o In ASCII keyboards, when key "0" is activated, for example, "011 0000" (30H) is provided to the
computer. In the same way, 31H (011 0001) is provided for key "1", and so on, as shown in the
following list:
It must be noted that, although ASCII is standard in many countries, BCD numbers have universal
application. So, the data conversion from ASCII to BCD and vice versa should be studied.
ASCII to BCD Conversion:

To process data in BCD, first the ASCII data provided by the keyboard must be converted to BCD.
Whether it should be converted to packed or unpacked BCD depends on the instructions to be used.
ASCII to Unpacked BCD Conversion:

To convert ASCII data to BCD, the programmer must get rid of the tagged "011" in the higher 4 bits of
the ASCII. To do that, each ASCII number is ANDed with "0000 1111" (0FH), as shown in the next
example. These programs show three different methods for converting the 10 ASCII digits to unpacked
BCD. All use the same data segment:
The data is defined as DB.

• In the following Program 3-5a; the data is accessed in word-sized chunks.
• The Program 3-5b used the PTR directive to access the data.
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• The Program 5-3c uses the based addressing mode (BX+ASC is used as a pointer.
Program 3-5a
Program 3-5b
Program 3-5c
ASCII to Packed BCD Conversion:
To convert ASCII to packed BCD, it is first converted to unpacked BCD (to get rid of the 3) and then
combined to make packed BCD.
For example, for 9 and 5 the keyboard gives 39 and 35, respectively. The goal is to produce 95H or"1001 0101",
which is called packed BCD. This process is illustrated in detail below:
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After this conversion, the packed BCD numbers are processed and the result will be in packed BCD
format. There are special instructions, such as DAA and DAS, which require that the data be in packed
BCD form and give the result in packed BCD.
• For the result to be displayed on the monitor or be printed by the printer, it must be in ASCII
format. Conversion from packed BCD to ASCII is discussed next.
Packed BCD to ASCII Conversion:

To convert packed BCD to ASCII, it must first be converted to unpacked and then the unpacked BCD is
tagged with 011 0000 (30H).
The following shows the process of converting from packed BCD to ASCII:
• After learning bow to convert ASCII to BCD, the application of BCD numbers is the next step.
• There are two instructions that deal specifically with BCD numbers: DAA and DAS.
BCD Addition and Correction:

In BCD addition, after adding packed BCD numbers, the result is no longer BCD. Look at this example:
Adding them gives 0011 1111B (3FH), which is not BCD! A BCD number can- only have digits from
0000 to 1001 (or 0 to 9). The result above should have been 17+ 28 = 45 (0100 0101).
 To correct this problem, the programmer must add 6 (0110) to the low digit: 3F + 06 = 45H.
The same problem could have happened in the upper digit (for example, in 52H + 87H = D9H).
 Again to solve this problem, 6 must be added to the upper digit (D9H + 60H = 139H), to ensure
that the result is BCD (52 + 87 = 139).
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DAA
The DAA (decimal adjust for addition) instruction in x86 microprocessors is provided exactly for the
purpose of correcting the problem associated with BCD addition. DAA will add 6 to the lower nibble or
higher nibble if needed; otherwise, it will leave the result alone.
The following example will clarify these points:
After the program is executed, the DATA3 field will contain 72H (47 + 25 =72).
 Note that DAA works only on AL. In other words, while the source can be an operand of any
addressing mode, the destination must be AL in order for DAA to work.
 It needs to be emphasized that DAA must be used after the addition of BCD operands and that
BCD operands can never have any digit greater than 9. In other words, no A-F digit is allowed.
 It is also important to note that DAA works only after an ADD instruction; it will not work after
the INC instruction.
Summary of DAA Action:

1. If after an ADD or ADC instruction the lower nibble (4 bits) is greater than 9, or if AF = 1, add
0110 to the lower 4 bits.
2. If the upper nibble is greater than 9, or if CF = 1, add 0110 to the upper nibble.
In reality there is no other use for the AF (auxiliary flag) except for BCD addition and correction. For
example, adding 29H and 18H will result in 41H, which is incorrect as far as BCD is concerned.
See the following code:
The above example shows that 6 is added to the upper nibble due to the fact it is greater than 9.
Eg1: ; AL = 0011 1001 = 39 BCD

; CL = 0001 0010 = 12 BCD
ADD AL, CL ; AL = 0100 1011 = 4BH
DAA ; Since 1011 > 9; Add correction factor 06.
; AL = 0101 0001 = 51 BCD
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Eg2: ; AL = 1001 0110 = 96 BCD

; BL = 0000 0111 = 07 BCD
ADD AL, BL ; AL = 1001 1101 = 9DH
DAA ; Since 1101 > 9; Add correction factor 06
; AL = 1010 0011 = A3H
; Since 1010 > 9; Add correction factor 60
; AL = 0000 0011 = 03 BCD. The result is 103.
More Examples:
1: Add decimal numbers 22 and 18.
MOV AL, 22H ; (AL)= 22H

ADD AL, 18H ; (AL) = 3AH Illegal, incorrect answer!
DAA ; (AL) = 40H Just treat it as decimalwith CF = 0
3AH In this case, DAA same as ADD AL, 06H

+06H When LS hex digit in AL is >9, add 6 to it
=40H
MOV AL, 93H ; (AL)= 93H

ADD AL, 34H ; (AL) = C7H, CF = 0 Illegal & Incorrect!
DAA ; (AL) = 27H Just treat it as decimal with CF = 1
C7H In this case, DAA same as ADD AL, 60H

+60H When MS hex digit in AL is >9, add 6 to it
=27H
MOV AL, 93H ; (AL)= 93H

ADD AL, 84H ; (AL) = 17H, CF = 1 Incorrect answer!
DAA ; (AL) = 77H Just treat it as decimal with CF = 1 (carry generated?)
17H In this case, DAA same as ADD AL, 60H

+60H When CF = 1, add 6 to MS hex digit of AL and treat
=77H Carry as 1 even though not generated in this addition
MOV AL, 65H ; (AL)= 65H

ADD AL, 57H ; (AL) = BCH
BCH In this case, DAA same as ADD AL, 66H

+66H
=22H CF = 1
MOV AL, 99H ; (AL)= 99H

ADD AL, 28H ; (AL) = C1H, AF = 1
C1H In this case, DAA same as ADD AL, 66H

+66H 6 added to LS hex digit of AL, as AF = 1
=27H CF = 1 6 added to MS hex digit of AL, as it is >9
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MOV AL, 36H ; (AL)= 36H
ADD AL, 42H ; (AL) = 78H
78H
+00H In this case, DAA same as ADD AL, 00H
=78H
The following Program demonstrates the use of DAA after addition of multibyte packed BCD numbers.
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Program 3-6
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BCD Subtraction and Correction:
The problem associated with the addition of packed BCD numbers also shows up in subtraction. Again,
there is an instruction (DAS) specifically designed to solve the problem.
Therefore, when subtracting packed BCD (single-byte or multibyte) operands, the DAS instruction is put
after the SUB or SBB instruction. AL must be used as the destination register to make DAS work.
Summary of DAS Action:
1. If after a SUB or SBB instruction the lower nibble is greater than 9, or if AF = 1 , subtract 0110
from the lower 4 bits.
2. If the upper nibble is greater than 9, or CF = 1, subtract 0110 from the upper nibble.
Due to the widespread use of BCD numbers, a specific data directive, DT, has been created. DT can be
used to represent BCD numbers from 0 to 1020 – 1 (that is, twenty 9s).
Assume that the following operands represent the budget, the expenses, and the balance, which is the
budget minus the expenses.
Notice in the code section above that,

 no H (hex) indicator is needed for BCD numbers when using the DT directive, and
 the use of the based relative addressing mode (BX + displacement) allows access to all three
arrays with a single register BX.
Eg1: ; AL = 0011 0010 = 32 BCD

; CL = 0001 0111 = 17 BCD
SUB AL, CL ; AL = 0001 1011 = 1BH
DAS ; Subtract 06, since 1011 > 9.
; AL = 0001 0101 = 15 BCD
Eg2: ; AL = 0010 0011 = 23 BCD

; CL = 0101 1000 =58 BCD
SUB AL, CL ; AL = 1100 1011 = CBH
DAS ; Subtract 66, since 1100 >9 & 1011 > 9.
; AL = 0110 0101 = 65 BCD, CF = 1.
; Since CF = 1, answer is – 65.
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More Examples:
1: Subtract decimal numbers 45 and 38.
MOV AL, 45H ; (AL)= 45H

SUB AL, 38H ; (AL) = 0DH Illegal, incorrect answer!
DAS ; (AL) = 07H Just treat it as decimal with Cy = 0
0DH In this case, DAS same as SUB AL, 06H

-06H When LS hex digit in AL is >9, subtract 6
=07H
MOV AL, 63H ; (AL)= 63H

SUB AL, 88H ; (AL) = DBH, Cy=1 Illegal & Incorrect!
DAS ; (AL) = 75H Just treat it as decimal with Cy = 1 (carry generated?)
DBH In this case, DAS same as SUB AL, 66H

-66H When Cy = 1, it means result is negative
=75H Result is 75, which is 10’s complement of 25
Treat Cy as 1 as Cy was generated in the previous subtraction itself!
MOV AL, 45H ; (AL)= 45H

SUB AL, 52H ; (AL) = F3H, Cy = 1 Incorrect answer!
DAS ; (AL) = 93H Just treat it as decimal with Cy = 1 (carry generated?)
F3H In this case, DAS same as SUB AL, 60H

-60H When Cy = 1, it means result is negative
=93H Result is 93, which is 10’s complement of 07
MOV AL, 50H ; (AL)= 50H

SUB AL, 19H ; (AL) = 37H, Ac = 1
DAS ; (AL) = 31H Just treat it as decimal with Cy =0
37H In this case, DAS same as SUB AL, 06H

-06H 06H is subtracted from AL as Ac = 1
=31H
MOV AL, 99H ; (AL)= 99H

SUB AL, 88H ; (AL) = 11H

-00H
=11H
MOV AL, 14H ; (AL)= 14H

SUB AL, 92H ; (AL) = 82H, Cy = 1

-60H 60H is subtracted from AL as Cy = 1
=22H 22 is 10’s complement of 78
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ROTATE INSTRUCTIONS:
In many applications there is a need to perform a bitwise rotation of an operand. The rotation instructions
ROR, ROL and RCR, RCL are designed specifically for that purpose. They allow a program to rotate an
operand right or left.
o In rotate instructions, the operand can be in a register or memory. If the number of times an
operand is to be rotated is more than 1, this is indicated by CL. This is similar to the shift
instructions.
o There are two types of rotations. One is a simple rotation of the bits of the operand, and the other
is a rotation through the carry.
ROR (rotate right)

In rotate right, as bits are shifted from left to right they exit from the right end (LSB) and enter the left
end (MSB). In addition, as each bit exits the LSB, a copy of it is given to the carry flag. In other words, in
ROR, the LSB is moved to the MSB and is also copied to CF, as shown in the diagram.
If the operand is to be rotated once, the 1 is coded, but if it is to be rotated more than once, register CL is
used to hold the number of times it is to be rotated.
Eg:
ROR BH, 1 R/M Cy
Rotate right without Cy Before After

BH 0100 0010 0010 0001
Cy 1 0
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ROL (rotate left)
In rotate left, as bits are shifted from right to left they exit the left end (MSB) and enter the right end
(LSB). In addition, every bit that leaves the MSB is copied to the carry flag. In other words, in ROL the
MSB is moved to the LSB and is also copied to CF, as shown in the diagram.
If the operand is to be rotated once, the 1 is coded. Otherwise, the number of times it is to be rotated is in
CL. Eg:
ROL BH, CL Cy R/M
Rotate left without Cy Before After

BH 0010 0010 1000 1000
CL 02H
Cy 1 0
The following Program shows an application of the rotation instruction. The maximum count in Program
will be 8 since the program is counting the number of 1s in a byte of data. If the operand is a 16-bit word,
the number of 1s can go as high as 16.
Program 3-7
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The Program is similar to the previous one, rewritten for a word-sized operand. It also provides the count
in BCD format instead of hex. Reminder: AL is used to make a BCD counter because the because, the
DAA instruction works only on AL.
Program 3-8
RCR (rotate right through carry)

In RCR, as bits are shifted from left to right, they exit the right end (LSB) to the carry flag, and the carry
flag enters the left end (MSB). In other words, in RCR the LSB is moved to CF and CF is moved to the
MSB. In reality, CF acts as if it is part of the operand. This is shown in the diagram.
If the operand is to be rotated once, the 1 is coded, but if it is to be rotated more than once, the register CL
holds the number of times.
Eg:
RCR BH, 1 R/M Cy
Rotate right with Cy Before After

BH 0100 0010 1010 0001
Cy 1 0
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RCL (rotate left through carry)

In RCL, as bits are shifted from right to left, they exit the left end (MSB) and enter the carry flag, and the
carry flag enters the right end (LSB). In other words, in RCL the MSB is moved to CF and CF is moved
to the LSB. In reality, CF acts as if it is part of the operand. This is shown in the following diagram.
If the operand is to be rotated once, the 1 is coded, but if it is to be rotated more than once, register CL
holds the number of times.
Eg:
RCL BH, CL Cy R/M
Rotate left with Cy Before After

BH 0010 0010 1000 1010
CL 02H
Cy 1 0
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INTERRUPTS IN x86 PC
8088/86 INTERRUPTS
o An interrupt is an external event that informs the CPU that a device needs its service. In 8088/86,
there are 256 interrupts: INT 00, INT 01, . . . , INT FF (sometimes called TYPEs).
o When an interrupt is executed, the microprocessor automatically saves the flag register (FR), the
instruction pointer (IP), and the code segment register (CS) on the stack; and goes to a fixed
memory location.
o In x86 PCs, the memory locations to which an interrupt goes is always four times the value of the
interrupt number. For example, INT 03 will go to address 0000CH (4 * 3 = 12 = 0CH). The
following Table is a partial list of the interrupt vector table.
Table: Interrupt Vector
INT Physical Logical

Number Address Address
INT 00 00000 0000 – 0000
INT 01 00004 0000 – 0004
INT 02 00008 0000 – 0008
INT 03 0000C 0000 – 000C
INT 04 00010 0000 – 0010
INT 05 00014 0000 – 0014
... ... ...
INT FF 003FC 0000 – 03FC
Interrupt Service Routine (ISR):

 For every interrupt there must be a program associated with it.
 When an interrupt is invoked, it is asked to run a program to perform a certain service. This
program is commonly referred to as an interrupt service routine (ISR). The interrupt service
routine is also called the interrupt handler.
 When an interrupt is invoked, the CPU runs the interrupt service routine. As shown in the above
Table, for every interrupt there are allocated four bytes of memory in the interrupt vector table.
Two bytes are for the IP and the other two are for the CS of the ISR.
 These four memory locations provide the addresses of the interrupt service routine for which the
interrupt was invoked. Thus the lowest 1024 bytes (256 x 4 = 1024) of memory space are set
aside for the interrupt vector table and must not be used for any other function.
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Difference between INT and CALL Instructions:

The INT instruction saves the CS: IP of the following instruction and jumps indirectly to the subroutine
associated with the interrupt. A CALL FAR instruction also saves the CS: IP and jumps to the desired
subroutine (procedure).
The differences can be summarized as follows:
CALL Instruction INT instruction
1. A CALL FAR instruction can jump to any 1. INT nn goes to a fixed memory location in
location within the 1M byte address range the interrupt vector table to get the address
of the 8088/86 CPU. of the interrupt service routine.
2. A CALL FAR instruction is used by the 2. An externally activated hardware interrupt
programmer in the sequence of can come-in at any time, requesting the
instructions in the program. attention of the CPU.
3. A CALL FAR instruction cannot be 3. INT nn belonging to externally activated
masked (disabled). hardware interrupts can be masked.
4. A CALL FAR instruction automatically
4. INT nn saves FR (flag register) in addition
saves only CS: IP of the next instruction
to CS: IP of the next instruction.
on the stack.
5. At the end of the subroutine that has been 5. The last instruction in the interrupt service
called by the CALL FAR instruction, the routine (ISR) for INT nn is the instruction
RETF (return FAR) is the last instruction. IRET (interrupt return). IRET pops off the
RETF pops CS and IP off the stack. FR (flag register) in addition to CS and IP.
Processing Interrupts:
When the 8088/86 processes any interrupt (software or hardware), it goes through the following steps:
1. The flag register (FR) is pushed onto the stack and SP is decremented by 2, since FR is a 2-byte
register.
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2. IF (interrupt enable flag) and TF (trap flag) are both cleared (IF = 0 and TF = 0). This masks
(causes the system to ignore) interrupt requests from the INTR pin and disables single stepping
while the CPU is executing the interrupt service routine.
3. The current CS is pushed onto the stack and SP is decremented by 2.
4. The current IP is pushed onto the stack and SP is decremented by 2.
5. The INT number (type) is multiplied by 4 to get the physical address of the location within the
vector table to fetch the CS and IP of the interrupt service routine.
6. From the new CS: IP, the CPU starts to fetch and execute instructions belonging to the ISR
program.
7. The last instruction of the interrupt service routine must be IRET, to get IP, CS, and FR back
from the stack and make the CPU run the code where it left off.
The following Figure summarizes these steps in diagram form.
Categories of Interrupts:
INT nn is a 2-byte instruction where the first byte is for the opcode and the second byte is the interrupt
number. We can have a maximum of 256 (INT 00 INT FFH) interrupts. Of these 256 interrupts, some are
used for software interrupts and some are for hardware interrupts.
1. Hardware Interrupts:
o There are three pins in the x86 that are associated with hardware interrupts. They are INTR
(interrupt request), NMI (non-maskable interrupt), and INTA (interrupt acknowledge).
o INTR is an input signal into the CPU, which can be masked (ignored) and unmasked through the
use of instructions CLI (clear interrupt flag) and STI (set interrupt flag).
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o If IF = 0 (in flag register), all hardware interrupt requests through INTR are ignored. This has no
effect on interrupts coming from the NMI pin. The instruction CLI (clear interrupt flag) will make
IF = 0.
o To allow interrupt request through the INTR pin, this flag must be set to one (IF = 1). The STI
(set interrupt flag) instruction can be used to set IF to 1.
o NMI, which is also an input signal into the CPU, cannot be masked and unmasked using
instructions CLI and STI; and for this reason it is called a non-maskable interrupt.
o INTR and NMI are activated externally by putting 5V on the pins of NMI and INTR of the x86
microprocessor.
o When either of these interrupts is activated, the x86 finishes the instruction that it is executing,
pushes FR and the CS: IP of the next instruction onto the stack, then jumps to a fixed location in
the interrupt vector table and fetches the CS: IP for the interrupt service routine (ISR) associated
with that interrupt.
o At the end of the ISR, the IRET instruction causes the CPU to get (pop) back its original FR and
CS: IP from the stack, thereby forcing the CPU to continue at the instruction where it left off
when the interrupt came in.
• Intel has embedded "INT 02" into the x86 microprocessor to be used only for NMI.
• Whenever the NMI pin is activated, the CPU will go to memory location 00008 to get the address
(CS: IP) of the interrupt service routine (ISR) associated with NMI.
• Memory locations 00008, 00009, 0000A, and 0000B contain the 4 bytes of CS: IP of the ISR
belonging to NMI.
• The 8259 programmable interrupt controller (PIC) chip can be connected to INTR to expand the
number of hardware interrupts to 64.
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2. Software Interrupts:
o If an ISR is called upon as a result of the execution of an x86 instruction such as "INT nn", it is
referred to as software interrupt, since it was invoked from software, not from external hardware.
o Examples of such interrupts are DOS "INT 21H" function calls and video interrupts "INT 10H".
o These interrupts can be invoked in the sequence of code just like any other x86 instruction.
o Many of the interrupts in this category are used by the MS DOS operating system and IBM BIOS
to perform essential tasks that every computer must provide to the system and the user.
o Within this group of interrupts there are also some predefined functions associated with some of
the interrupts. They are "INT 00" (divide error), "INT 01" (single step), "INT 03" (breakpoint),
and "INT 04" (signed number overflow). Each is described below.
o The rest of the interrupts from "INT 05" to "INT FF" can be used to implement either software or
hardware interrupts.
Functions associated with INT 00 to INT 04:

Interrupts INT 00 to INT 04 have predefined tasks (functions) and cannot be used in any other way.
INT 00 (divide error)

 This interrupt belongs to the category of interrupts referred to as conditional or exception
interrupts. Internally, they are invoked by the microprocessor whenever there are conditions
(exceptions) that the CPU is unable to handle.
 One such situation is an attempt to divide a number by zero. Since the result of dividing a number
by zero is undefined, and the CPU has no way of handling such a result, it automatically invokes
the divide error exception interrupt.
 In the 8088/86 microprocessor, out of 256 interrupts, Intel has set aside only INT 0 for the
exception interrupt.
 INT 00 is invoked by the microprocessor whenever there is an attempt to divide a number by
zero.
 In the x86 PC, the service subroutine for this interrupt is responsible for displaying the message
"DIVIDE ERROR" on the screen if a program such as the following is executed:
 INT 0 is also invoked if the quotient is too large to fit into the assigned register when executing a
DIV instruction. Look at the following case:
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INT 01 (single step)

 In executing a sequence of instructions, there is a need to examine the contents of the CPU's
registers and system memory. This is often done by executing the program one instruction at a
time and then inspecting registers and memory. This is commonly referred to as single-stepping,
or performing a trace.
 Intel has designated INT 01 specifically for implementation of single-stepping. To single-step, the
trap flag (TF) (D8 of the flag register), must be set to 1. Then after execution of each instruction,
the 8088/86 automatically jumps to physical location 00004 to fetch the 4 bytes for CS: IP of the
interrupt service routine, which will dump the registers onto the screen.
 Intel has not provided any specific instruction for to set or reset (unlike IF, which uses STI and
CLI instructions to set or reset), the TF; one can write a simple program to do that. The following
shows how to make TF = 0:
 Recall that, TF is D8 of the flag register.

 To make TF = 1, one simply uses the OR instruction in place of the AND instruction above.
INT 02 (non-maskable interrupt)

 All Intel x86 microprocessors have a pin designated NMI. It is an active-high input. Intel has set
aside INT 2 for the NMI interrupt. Whenever the NMI pin of the x86 is activated by a high (5 V)
signal, the CPU jumps to physical memory location 00008 to fetch the CS: IP of the interrupt
service routine associated with NMI.
 The NMI input is often used for major system faults, such as power failures. The NMI interrupt
will be caused whenever AC power drops out. In response to this interrupt, the microprocessor
stores all of the internal registers in a battery-backed-up memory or an EEPROM.
INT 03 (breakpoint)
 To allow implementation of breakpoints in software engineering, Intel has set aside INT 03.
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 In single-step mode, one can inspect the CPU and system memory after the execution of each
instruction, a breakpoint is used to examine the CPU and memory after the execution of a group
of instructions.
 INT 3 is a 1-byte instruction; where as all other “INT nn” instructions are 2-byte instructions.
INT 04 (signed number overflow)

 This interrupt is invoked by a signed number overflow condition. There is an instruction
associated with this, INTO (interrupt on overflow).
 The CPU will activate INT 04 if OF = 1. In cases, where OF = 0, the INTO instruction is not
executed; but is bypassed and acts as a NOP (no operation) instruction.
 To understand this, look at the following example: Suppose in the following program; DATA1=
+64 = 0100 0000 and DATA2 = +64 = 0100 0000. The INTO instruction will be executed and the
8088/86 will jump to physical location 00010H, the memory location associated with INT 04.
The carry from D6 to D7 causes the overflow flag to become l.
 Now, the INTO causes the CPU to perform "INT 4" and jump to physical location 00010H of the
vector table to get the CS: IP of the service routine.
 Suppose that the data in the above program was DATA1 = +64 and DATA2 = +17. In that case,
OF would become 0; the INTO is not executed and acts simply as a NOP (no operation)
instruction.
x86 PC AND INTERRUPT ASSIGNMENT:

o Of the 256 possible interrupts in the x86;
 some are used by the PC peripheral hardware (BIOS)
 some are used by the Microsoft operating system
 the rest are available for programmers of software applications.
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INT 21H & INT 10H PROGRAMMING
The INT instruction has the following format:
Interrupts are numbered 00 to FF; this gives a total of 256 interrupts in x86 microprocessors. Of these 256
interrupts, two of them are the most widely used: INT 10H and INT 21H.
BIOS INT 10H PROGRAMMING:

o INT 10H subroutines are burned into the ROM BIOS of the x86-based IBM PC and compatibles
and are used to communicate with the computer's screen video. The manipulation of screen text
or graphics can be done through INT 10H.
o There are many functions associated with INT 10H. Among them are changing the color of
characters or the background color, clearing the screen, and changing the location of the cursor.
o These options are chosen by putting a specific value in register AH.
Monitor Screen in Text Mode:

 The monitor screen in the x86 PC is divided into 80 columns and 25 rows in normal text mode
(see the following Fig). In other words, the text screen is 80 characters wide by 25 characters
long.
Fig: Cursor Locations (row, column)

 Since both a row and a column number are associated with each location on the screen, one can
move the cursor to any location on the screen simply by changing the row and column values.
 The 80 columns are numbered from 0 to 79 and the 25 rows are numbered 0 to 24. The top left
comer has been assigned 00, 00 (row = 00, column = 00). Therefore, the top right comer will be
00, 79 (row = 00, column = 79).
 Similarly, the bottom left comer is 24, 00 (row = 24, column = 00) and the bottom right corner of
the monitor is 24, 79 (row = 24, column = 79).
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INT 10H Function 06H: Clearing the Screen
To clear the screen before displaying data; the following registers must contain certain values before INT
10H is called: AH = 06, AL = 00, BH = 07, CX = 0000, DH = 24, and DL= 79. The code will look like
this:
 Remember that DEBUG assumes immediate operands to be in hex; therefore, DX would be

entered as 184F. However, MASM assumes immediate operands to be in decimal. In that case
DH = 24 and DL = 79.
 In the program above, one of many options of INT 10H was chosen by putting 06 into AH.
Option AH = 06, called the scroll function, will cause the screen to scroll upward.
 The CH and CL registers hold the starting row and column, respectively, and DH and DL hold
the ending row and column.
 To clear the entire screen, one must use the top left cursor position of 00, 00 for the start point
and the bottom right position of 24, 79 for the end point.
 Option AH = 06 of INT 10H is in reality the "scroll window up" function; therefore, one could
use that to make a window of any size by choosing appropriate values for the start and end rows
and columns.
 To clear the screen, the top left and bottom right values are used for start and stop points in order
to scroll up the entire screen. It is more efficient coding to clear the screen by combining some of
the lines above as follows:
INT 10H Function 02: Setting the Cursor to a Specific Location

 INT 10H function AH = 02 will change the position of the cursor to any location.
 The desired position of the cursor is identified by the row and column values in DX, where DH =
row and DL = column.
 Video RAM can have multiple pages of text, but only one of them can be viewed at a time. When
AH = 02, to set the cursor position, page zero is chosen by making BH = 00.
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INT 10H Function 03: Get Current Cursor Position

In text mode, it is possible to determine where the cursor is located at any time by executing the
following:
 After execution of the program above, registers DH and DL will have the current row and column
positions, and CX provides information about the shape of the cursor.
 The reason that page 00 was chosen is that the video memory could contain more than one page
of data, depending on the video board installed on the PC.
 In text mode, page 00 is chosen for the currently viewed page.
Attribute Byte in Monochrome Monitors:

 There is an attribute associated with each character on the screen.
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 The attribute provides information to the video circuitry, such as color and intensity of the
character (foreground) and the background.
 The attribute byte for each character on the monochrome monitor is limited. The following Fig
shows bit definitions of the monochrome attribute byte.
Fig: Attribute Byte for Monochrome Monitors

The following are some possible variations of the attributes shown in the above Fig.
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Attribute Byte in CGA Text Mode:

The bit definition of the attribute byte in CGA text mode is shown in the following Fig.
From the bit definition, it can be seen that, the background can take eight different colors by combining
the prime colors red, blue, and green. The foreground can be any of 16 different colors by combining red,
blue, green, and intensity.
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The following Program shows the use of the attribute byte in CGA mode.
Graphics: Pixel Resolution and Color:

o In the text mode, the screen is viewed as a matrix of rows and columns of characters.
o In graphics mode, the screen is viewed as a matrix of horizontal and vertical pixels.
o The number of pixels varies among monitors and depends on monitor resolution and the video
board.
o There are two facts associated with every pixel on the screen:
 The location of the pixel
 Its attributes, color, and intensity
o These two facts must be stored in the video RAM.
o Higher the number of pixels and colors, the larger the amount of memory is needed to store.
o The CGA mode can have a maximum of 16K bytes of video memory.
o This 16K bytes of memory can be used in three different ways:
 Text mode of 80 x 25 characters: Use AL = 03 for mode selection in INT 10H option AH
= 00. In this mode, 16 colors are supported.
 Graphics mode of resolution 320 x 200 (medium resolution): Use AL = 04. In this mode,
4 colors are supported.
 Graphics mode of resolution 640 x 200 (high resolution): Use AL = 06. In this mode,
only 1 color (black and white) is supported.
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o Hence, with a fixed amount of video RAM, the number of supported colors decreases as the
resolution increases.
Table: The 16 Possible Colors
I R G B Color I R G B Color
0 0 0 0 Black 1 0 0 0 Gray
0 0 0 1 Blue 1 0 0 1 Light Blue
0 0 1 0 Green 1 0 1 0 Light Green
0 0 1 1 Cyan 1 0 1 1 Light Cyan
0 1 0 0 Red 1 1 0 0 Light Red
0 1 0 1 Magenta 1 1 0 1 Light Magenta
0 1 1 0 Brown 1 1 1 0 Yellow
0 1 1 1 White 1 1 1 1 High Intensity White
INT 10H and Pixel Programming:

To draw a horizontal line, choose values for the row and column to point to the beginning of the line and
then continue to increment the column until it reaches the end of the line, as shown in Example below:
DOS INTERRUPT 21H:

o INT21H is provided by DOS, which is BIOS-ROM based.
o When the OS is loaded into the computer, INT 21H can be invoked to perform some extremely
useful functions. These functions are commonly referred to as DOS INT 21H function calls.
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INT 21H Option 09: Outputting a String of Data to the Monitor
 INT 21H can be used to send a set of ASCII data to the monitor. To do that, the following
registers must be set: AH = 09 and DX = the offset address of the ASCII data to be displayed.
 The address in the DX register is an offset address and DS is assumed to be the data segment.
INT 21H option 09 will display the ASCII data string pointed at by DX until it encounters the
dollar sign "$".
 In the absence of encountering a dollar sign, DOS function call 09 will continue to display any
garbage that it can find in subsequent memory locations until it finds "$".
INT 21H Option 02: Outputting a Single Character to the Monitor

 To output a single character to the monitor, 02 is put in AH, DL is loaded with the character to be
displayed, and then INT 21H is invoked. The following displays the letter "J'.
INT 21H Option 01: Inputting a Single Character, with Echo

This function waits until a character is input from the keyboard, and then echoes it to the monitor. After
the interrupt, the input character (ASCII value) will be in AL.
The Program 4-1 does the following:

1. clears the screen
2. sets the cursor to the center of the screen, and
3. starting at that point of the screen, displays the message "This is a test of the display routine".
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Program 4-1
INT 21H Option 0AH: Inputting a String of Data from the Keyboard
 Option 0AH of INT 21H provides a means by which one can get data from the keyboard and
store it in a predefined area of memory in the data segment.
 To do this; the register options are: AH = 0AH and DX = offset address at which the string of
data is stored.
 This is commonly referred to as a buffer area.
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 DOS requires that a buffer area be defined in the data segment and the first byte specifies the size
of the buffer. DOS will put the number of characters that came in through the keyboard in the
second byte and the keyed-in data is placed in the buffer starting at the third byte.
 For example, the following program will accept up to six characters from the keyboard, including
the return (carriage return) key. Six locations were reserved for the buffer and filled with FFH.
 The following shows portions of the data segment and code segment:
 The following shows the memory contents of offset 0010H:
 When this program is executed, the computer waits for the information to come in from the
keyboard.
 When the data comes in, the IBM PC will not exit the INT 21H routine until it encounters the
return key.
 Assuming the data that was entered through the keyboard was "USA" <RETURN>, the contents
of memory locations starting at offset 0010H would look like this:
 The step-by-step analysis is given below:
 The 0AH option of INT 21H accepts the string of data from the keyboard and echoes (displays) it
on the screen as it is keyed in.
Use of Carriage Return and Line Feed:

o In the Program 4-2, the EQU statement is used to equate CR (carriage return) with its ASCII
value of 0DH, and LF (line feed) with its ASCII value of 0AH.
o This makes the program much more readable. Since the result of the conversion was to be
displayed in the next line, the string was preceded by CR and LF.
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o In the absence of CR the string would be displayed wherever the cursor happened to be.
o In the case of CR and no LF, the string would be displayed on the same line after it had been
returned to the beginning of the line.
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Program 4-2
o The Program 4-3 prompts the user to type in a name. The name can have a maximum of eight
letters.
o After the name is typed in, the program gets the length of the name and prints it to the screen.
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Program 4-3
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o Program 4-4 demonstrates many of the functions described:
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Program 4-4
INT 21H Option 07: Keyboard Input without Echo

 Option 07 of INT 21H requires the user to enter a single character but that character is not
displayed (or echoed) on the screen.
 After execution of the interrupt, the PC waits until a single character is entered and provides the
character in AL.
Using the LABEL Directive to Define a String Buffer:

o A more systematic way of defining the buffer area for the string input is to use the LABEL
directive.
o The LABEL directive can be used in the data segment to assign multiple names to data. When
used in the data segment it looks like this:
o The attribute can be BYTE, WORD, DWORD, FWORD, QWORD, or TBYTE.
*********
*********
VEMANA
54

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MICROPROCESSORS AND MICROCONTROLLERS

Addition of Unsigned Numbers:

Subtraction of Unsigned Numbers:

SBB (Subtract with Borrow):

Multiplication of Unsigned Numbers:

Table: Unsigned Multiplication Summary

Division of Unsigned Numbers:

Shift right Before After

 After the above shift, BX = 7FFFH and CF = 1.

Shift left without Cy Before After

COMPARE of Unsigned Numbers:

Fig: Flowchart and Pseudocode for Program 3-3

BCD, and (2) packed BCD. 4 0100

Unpacked BCD: 6 0110

ASCII to BCD Conversion:

ASCII to Unpacked BCD Conversion:

The data is defined as DB.

Packed BCD to ASCII Conversion:

BCD Addition and Correction:

Summary of DAA Action:

Eg1: ; AL = 0011 1001 = 39 BCD

Eg2: ; AL = 1001 0110 = 96 BCD

MOV AL, 22H ; (AL)= 22H

3AH In this case, DAA same as ADD AL, 06H

2: Add decimal numbers 93 and 34.

MOV AL, 93H ; (AL)= 93H

C7H In this case, DAA same as ADD AL, 60H

3: Add decimal numbers 93 and 84.

MOV AL, 93H ; (AL)= 93H

DAA ; (AL) = 77H Just treat it as decimal with CF = 1 (carry generated?)

17H In this case, DAA same as ADD AL, 60H

4: Add decimal numbers 65 and 57.

MOV AL, 65H ; (AL)= 65H

BCH In this case, DAA same as ADD AL, 66H

5: Add decimal numbers 99 and 28.

MOV AL, 99H ; (AL)= 99H

C1H In this case, DAA same as ADD AL, 66H

6: Add decimal numbers 36 and 42.

Notice in the code section above that,

Eg1: ; AL = 0011 0010 = 32 BCD

Eg2: ; AL = 0010 0011 = 23 BCD

MOV AL, 45H ; (AL)= 45H

0DH In this case, DAS same as SUB AL, 06H

2: Subtract decimal numbers 63 and 88.

MOV AL, 63H ; (AL)= 63H

DBH In this case, DAS same as SUB AL, 66H

3: Subtract decimal numbers 45 and 52.

MOV AL, 45H ; (AL)= 45H

F3H In this case, DAS same as SUB AL, 60H

4: Subtract decimal numbers 50 and 19.

MOV AL, 50H ; (AL)= 50H

37H In this case, DAS same as SUB AL, 06H

5: Subtract decimal numbers 99 and 88.

MOV AL, 99H ; (AL)= 99H

11H In this case, DAS same as SUB AL, 00H

6: Subtract decimal numbers 14 and 92.

MOV AL, 14H ; (AL)= 14H

82H In this case, DAS same as SUB AL, 60H