Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

General Description Features

The AZ7500E is a voltage mode pulse width modula- · Stable 4.95V Reference Voltage Trimmed to
tion switching regulator control circuit designed pri- ±1.0% Accuracy
marily for power supply control. · Uncommitted Output TR for 200mA Sink or
Source Current
The AZ7500E consists of a reference voltage circuit, · Single-End or Push-Pull Operation Selected by
two error amplifiers, an on-chip adjustable oscillator, a Output Control
dead-time control (DTC) comparator, a pulse-steering
· Internal Circuitry Prohibits Double Pulse at Either
control flip-flop, and an output control circuit. The pre-
Output
cision of voltage reference (VREF) is improved up to ±
· Complete PWM Control Circuit with Variable
1% through trimming and this provides a better output Duty Cycle
voltage regulation. The AZ7500E provides for push- · On-Chip Oscillator With Master or Slave Opera-
pull or single-ended output operation, which can be tion
selected through the output control.

AZ7500E is the enhanced version of AZ7500B for it Applications

improves REF Pin's reliability comparing with
AZ7500B. · SMPS
· Back Light Inverter
The AZ7500E is available in standard packages of · Charger
DIP-16 and SOIC-16.

SOIC-16 DIP-16

Figure 1. Package Types of AZ7500E

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 Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Pin Configuration
M Package P Package
(SOIC-16) (DIP-16)

1IN + 1 16 2IN + 1IN + 1 16 2IN +

1IN - 2 15 2IN - 1IN - 2 15 2IN -

FEEDBACK 3 14 REF FEEDBACK 3 14 REF

DTC 4 13 OUTPUT CTRL DTC 4 13 OUTPUT CTRL

CT 5 12 VCC CT 5 12 VCC

RT 6 11 C2 RT 6 11 C2

GND 7 10 E2 GND 7 10 E2

C1 8 9 E1 C1 8 9 E1

Figure 2. Pin Configuration of AZ7500E (Top View)

Output Function Control Table

Signal for Output Control Output Function

VI = GND Single-ended or parallel output
VI = VREF Normal push-pull operation

Functional Block Diagram

OUTPUT CTRL

6 13 8
RT C1
5 Oscillator Pulse-Steering
CT
Flip-Flop
Q1
Dead-Time Control
Comparator 9 E1
D
4 C2
DTC + 11
CK
0.12V Q2
Error Amplifier 1 + 10
PWM E2
1 Comparator
1IN + +
2
1IN -
12
VCC
Error Amplifier 2
16
2IN + + Reference 14
Regulator REF
2IN - 15
0.7mA 7
GND
3
FEEDBACK

Figure 3. Functional Block Diagram of AZ7500E

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 Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Ordering Information

AZ7500 -

E1: Lead Free

G1: Green
Circuit Type
TR: Tape and Reel
Blank: Tube

Reference Voltage Package

E: 4.95V M: SOIC-16
P: DIP-16

Part Number Marking ID

Package Temperature Range Packing Type
Lead Free Green Lead Free Green

AZ7500EM-E1 AZ7500EM-G1 AZ7500EM-E1 AZ7500EM-G1 Tube

SOIC-16
o AZ7500EMTR-E1 AZ7500EMTR-G1 AZ7500EM-E1 AZ7500EM-G1 Tape & Reel
-40 to 85 C
DIP-16 AZ7500EP-E1 AZ7500EP-G1 AZ7500EP-E1 AZ7500EP-G1 Tube

BCD Semiconductor's Pb-free products, as designated with "E1" suffix in the part number, are RoHS compliant. Products with
"G1" suffix are available in green packages.

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 Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Absolute Maximum Ratings (Note 1)

Parameter Symbol Value Unit

Supply Voltage (Note 2) VCC 40 V

Amplifier Input Voltage VI -0.3 to VCC + 0.3 V

Collector Output Voltage VO 40 V

Collector Output Current IO 250 mA

M Package 73
Package Thermal Impedance (Note 3) RθJA o
C/W
P Package 67

Lead Temperature 1.6mm from case for 10 seconds 260 oC

Storage Temperature Range TSTG -65 to 150 o

C

ESD rating (Machine Model) 200 V

Note 1: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those indicated under "Recommended Operating Conditions" is not implied. Exposure to "Absolute Maximum
Ratings" for extended periods may affect device reliability.
Note 2: All voltage values are with respect to the network ground terminal.
Note 3: Maximum power dissipation is a function of TJ(max), RθJA and TA. The maximum allowable power dissi-
pation at any allowable ambient temperature is PD = ( TJ(max) - TA )/RθJA. Operating at the absolute maximum TJ
of 150oC can affect reliability.

Recommended Operating Conditions

Parameter Symbol Min Typ Max Unit
Supply Voltage VCC 7 15 36 V
Collector Output Voltage VC1, VC2 30 36 V
Collector Output Current
IC1, IC2 200 mA
(Each Transistor)
Amplifier Input Voltage VI 0.3 VCC - 2 V
Current Into Feedback Terminal IFB 0.3 mA
Reference Output Current IREF 10 mA
Timing Capacitor CT 0.00047 0.001 10 µF
Timing Resistor RT 1.8 30 500 KΩ
Oscillator Frequency fosc 1.0 40 200 KHz
PWM Input Voltage (Pin 3, 4, 14) 0.3 5.3 V
Operating Free-Air Temperature TA -40 85 oC

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 Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Electrical Characteristics
TA = 25oC, VCC=20V, f=10KHz unless otherwise noted.

Parameter Symbol Conditions Min Typ Max Unit

Reference Section
IREF=1mA 4.90 4.95 5.0 V
Output Reference Voltage VREF
o
IREF=1mA, TA= -40 to 85 C 4.85 4.95 5.05 V

Line Regulation RLINE VCC = 7V to 36V 2 25 mV

Load Regulation RLOAD IREF=1mA to 10mA 1 15 mV
Short-Circuit Output Current ISC VREF = 0V 10 35 50 mA
Oscillator Section
CT=0.001µF, RT=30KΩ, 40
CT=0.01µF, RT=12KΩ 9.2 10 10.8
Oscillator Frequency fOSC KHz
CT=0.01µF, RT=12KΩ,
9.0 12
TA= -40 to 85oC
CT=0.01µF, RT=12KΩ,
Frequency Change with Temperature ∆f /∆T 1 %
TA= -40 to 85oC
Dead-Time Control Section
Input Bias Current IBIAS VCC=15V, V4= 0 to 5.25V -2 -10 µA
VCC=15V, V4= 0V,
Maximum Duty Cycle D(MAX) 45 %
Pin 13= VREF
Zero Duty Cycle 3 3.3
Input Threshold Voltage VITH V
Maximum Duty Cycle 0
Error-Amplifier Section
Input Offset Voltage VIO V3 = 2.5V 2 10 mV
Input Offset Current IIO V3 = 2.5V 25 250 nA
Input Bias Current IBIAS V3 = 2.5V 0.2 1 µA
Common-Mode Input Voltage Range VCM VCC=7V to 36V -0.3 VCC-2 V
Open-Loop Voltage Gain GVO VO =0.5V to 3.5V 70 95 dB
Unity-Gain Bandwidth BW 650 KHz
Common-Mode Rejection Ratio CMRR 65 80 dB
VID = -15mV to -5V,
Output Sink Current (Feedback) ISINK -0.3 -0.7 mA
V3 = 0.7V
VID=15mV to 5V
Output Source Current (Feedback) ISOURCE 2 mA
V3 = 3.5V

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PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Electrical Characteristics (Continued)
Parameter Symbol Conditions Min Typ Max Unit
PWM Comparator Section
Input Threshold Voltage VITH Zero duty cycle 4 4.5 V
Input Sink Current ISINK V3 = 0.7V -0.3 -0.7 mA
Output Section
Common VCE
VE = 0V, IC =200mA 1.1 1.3
Emitter (SAT)
Output Saturation Voltage V
Emitter VCC
VCC = 15V, IE = -200mA 1.5 2.5
Follower (SAT)
Collector Off-State Current IC (OFF) VCE = 36V, VCC=36V 2 100 µA
Emitter Off-State Current IE(OFF) VCC = VC = 36V, VE = 0 -100 µA
Total Device
Supply Current ICC Pin 6 = VREF, VCC=15V 6 10 mA
Output Switching Characteristics
Common Emitter
Rise Time tR 100 200 ns
Common Collector
Common Emitter
Fall Time tF 25 100 ns
Common Collector

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 Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Parameter Measurement information
VCC = 20V

12 150Ω 150Ω
VCC 4W 4W
4 8
DTC C1 Output 1
Test
Inputs 3 9
FEEDBACK E1
12KΩ 6 11
RT C2 Output 2
5 10
CT E2
0.01uF 1
1IN+
2
1IN-
16
2IN+
15
2IN-
13 OUTPUT 14
REF
CTRL
GND
50KΩ
7

Test Circuit

Voltage VCC
at C1
0V

Voltage VCC
at C2
0V

Voltage
at CT

Threshold Voltage
DTC

0V

Threshold Voltage
FEEDBACK

0.7V
0%
Duty Cycle 0% MAX

Voltage Waveforms

Figure 4. Operational Test Circuit and Waveforms

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 Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Parameter Measurement information (Continued)

+ Amplifier Under Test

VI
FEEDBACK

+
Vref Other Amplifier

Figure 5. Error Amplifier Characteristics

20V

68Ω
4W tf tr

Each Output Output 90% 90%

Circuit

CL = 15pF
(See Note A)
10% 10%

Note A: CL includes probe and jig capacitance.

Figure 6. Common-Emitter Configuration

20V

Each Output
Circuit
90% 90%

Output
10% 10%
68Ω
CL = 15pF 4W
tr tf
(See Note A)

Note A: CL includes probe and jig capacitance.

Figure 7. Emitter-Follower Configuration

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 Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Typical Performance Characteristics

VCC=20V
100k O
TA=25 C
f - Oscillator Frequency (Hz)

0.001µF
10k
0.01µF

0.1µF

1k
1k 10k 100k 1M
RT - Timing Resistance (Ω)

Figure 8. Oscillator Frequency vs. RT and CT

100

90 VCC=20V
∆VO=3V
80 o
TA=25 C
70
Voltage Gain (dB)

60

50

40

30

20

10

0
1 10 100 1k 10k 100k 1M

Frequency (Hz)

Figure 9. Error Amplifier Small-Signal Voltage Gain vs. Frequency

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PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Typical Applications

(VI=10V to 40V) 1mH (VO=5V, IO=1A)

KSA1010 2A
VI(+) VO
47

150 0.1µ 1M

5.1k
12 11 8 3 2

VCC C2 C1 FEED 1IN-

BACK 14
REF +
50µ
5.1k
15 10V
2IN-
+ 50µ
50V
AZ7500E 1 5.1k
1IN+

16
2IN+
OUTPUT
DTC GND E1 CTRL E2 RT CT
150 50µ +
4 7 9 13 10 6 5 10V

+
47k 0.001µ

GND
0.1

VI(-)

Figure 10. Pulse Width Modulated Step-Down Converter

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 Data Sheet

PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Mechanical Dimensions

SOIC-16 Unit: mm(inch)

1.350(0.053)
1.750(0.069) 1.250(0.049)
7° 1.650(0.065)
0.330(0.013)
0.510(0.020) 7° A
20:1
B 0.250(0.010) 0.400(0.016)
1.270(0.050)
10.200(0.402)
9.800(0.386)

0°
8°

R0.200(0.008)
1.270(0.050)
BSC

R0.200(0.008)

0.200(0.008)
5.800(0.228) 0.050(0.002) 0.250(0.010)
6.240(0.246) 0.250(0.010)
0.170(0.007)
0.250(0.010)

C-C
3.800(0.150) 50:1
4.040(0.159) 8° B
9 .5 20:1
°
1.000(0.039)

C
0.200(0.008)
3° Sφ1.000(0.039)
7° 8° Depth 0.200(0.008)
A
C
8° 0.400(0.016)×45°

Note: Eject hole, oriented hole and mold mark is optional.

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PULSE-WIDTH-MODULATION CONTROL CIRCUITS AZ7500E

Mechanical Dimensions (Continued)

DIP-16 Unit: mm(inch)

Note: Eject hole, oriented hole and m old mark is optional.

Sep. 2009 Rev. 1. 3 BCD Semiconductor Manufacturing Limited

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