Fpga and HDL: Electronics Club
Fpga and HDL: Electronics Club
Fpga and HDL: Electronics Club
Look up Tables:
00 0
01 0
10 0
11 1
Routing matrix
So why FPGA?
The main reason why FPGAs are used is because of parallel
processing. A microprocessor performs any given task
sequentially, while an FPGA can be reconfigured to perform a
very specific task. This makes it faster than any
microprocessor.
Software programming language
Let us first see how a software programming language works.
A software programming language executes in a sequence i.e.
the code runs from top to bottom unless of course you use
go-to, loop etc. But the important point is in a software
programming language, only one line is executed at a time.
The code that you write is compiled and is converted into
simpler instructions which the processor can understand.
These instructions are then fed into the processor which
then processes them.
Here, the pin numbers for the onboard LED and pushbutton are
U8 and AF13
Creating a clock
The FPGA board usually has a clock of frequency 100 MHz or
50 MHz. In the following example, we will see how to create
a clock of much lower frequency.
Analyzing the code
Array of registers : We can create an array of registers by
using the following syntax: reg [length - 1 : 0] array_name.
Logic: After every clock pulse of the 100 MHz clock, the
register counter is incremented by one bit. Since the
register is three bits long, after 8 such clock pulses, the
most significant bit of the register gets flipped. This is
connected to the wire clk_12_5. Hence, the frequency of this
clock is 12.5 MHz.
Data structures in Verilog
Random access memory
RAM is a basic data structure which can be configured to
have multiple inputs and outputs. A RAM supports 2
functions, Read and write. A RAM takes an address as one
argument. The data at this address can be read or it can be
overwritten using write enable. Since any address can be
accessed at any point in time, hence the name Random Access
Memory.
VHSIC Hardware Description Language
VHSIC Hardware Description Language
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HDLs vs. Software Languages
Signal :It is a physical signal (you can think of it like a piece of wire).
A signal assignment takes effect only after a certain delay (the
smallest possible delay is called a “delta time”).
process (a)
variable c;
begin
c:= a or b;
z <= c;
end process;
Do not “read” and “write”
a signal at the same time !!!
Assignment operator
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