E1121 DIGITAL LOGIC (A)

FALL 2019
Lecture 4
Logic Gates
Lecture 3: Logic Gates
 Last lectures --- Numbers
 Binary numbers
 Base conversion

 Number systems for negative numbers

 Binary codes

 Today’s lecture
 Logic gates
 Operation
 Timing diagram
 Logic families
 Boolean Algebra
1

 Boolean Algebra

 When we learned numbers like 1, 2, 3, we also then learned how to add, multiply, etc. with
them. Boolean Algebra covers operations that we can do with 0’s and 1’s. Computers do
these operations ALL THE TIME and they are basic building blocks of computation inside
your computer program.

 A Boolean algebra is a system consisting of a set of elements, B, binary operators (+,’ and
● ), parentheses to indicate the nested order of evaluation and an = operator to perform
assignment of an expression. The algebra must further obey six fundamental postulates, or
axioms.
 Boolean Operators
2

 There are three basic operators in Boolean Algebra which are called logical
operators or Boolean operators.
OR - logical addition
Binary
AND – logical multiplication
NOT – Logical negation Unary

 The Boolean operators are used to combine Boolean variables and Boolean
constants to form Boolean Expressions.
 Basic Boolean operations
3

 There are three basic operations for logical values.

Operation: OR (sum) of AND (product) NOT(complement)
two inputs of two inputs on one input
Expression: x+y xy, or xy x’ or 𝑥ҧ

Output: =1 if either input =1 if all input are =1 if input = 0

equal to 1 equal to 1 =0 if input =1

Truth table: x y x+y x y xy x x’

0 0 0 0 0 0 0 1
0 1 1 0 1 0 1 0
Note: The statement:
1 0 1 1 0 0
1 + 1 = 2 (read “one plus one equals two”)
is not the same as 1 1 1 1 1 1
1 + 1 = 1 (read “1 or 1 equals 1”).
 LOGIC GATES
4

 A logic gate takes one or more inputs and will produce only one output.

 Logic gates are the building blocks from which most of the digital systems
are built up.

 It must be understood that the logic `1 ` and logic `0’, which are fed as
input to the gates, are represented by two distinct voltage levels.

 Even the output, which is either logic `1’ or `0’, is represented by distinct
voltage levels.
 Logic Gates(cont.)
5

 There are three fundamental logical operations from which all other
Boolean functions, no matter how complex, can be derived.

 These operations are implemented by three basic gates: AND, OR,

and NOT.

 Four other gates NAND, NOR, XOR, and XNOR, which are
derived gates, are also used to construct logic functions.
 Logic Gates(cont.)
In

6
x out
Inverter (NOT) x A
x 0 1 NAND:
1 0
B

x y out x y out
0 0 0 NOR:
x
0 0 1
AND x A
x•y 0 1 0 NAND x•y 0 1 1
y B
y
1 0 0 1 0 1
1 1 1 1 1 0

x y out x y out
0 0 0 0 0 1
x x x+y
OR x+y 0 1 1 NOR y 0 1 0
y 1 0 1 1 0 0
1 1 1 1 1 0
 Logic Gates(cont.)
7

 XOR (Exclusive-OR) x y XOR

0 0 0
x xÅ y 0 1 1
y xy+xy
1 0 1
1 1 0

 XNOR (Exclusive-NOR) x y XNOR

(Equivalence) 0 0 1
0 1 0
1 0 0
1 1 1
 Timing Diagram
8

 Timing Diagram is basically a graph that accurately displays the relationship of

two or more waveforms with respect to each other on a time basis.

• t1: A =1 , B=1 x=1

• t2: A =0 , B=1 x=0

• t3: A =1 , B=1 x=1

• t4: A =1 , B=0 x=0

• t5: A =0 , B=0 x=0

 Timing Behavior
9
 Universal Gates
10

 The NAND and NOR gates can be easily used to implement all the basic
logic gates such as AND,OR and NOT.

 Actually NAND and NOR gates are more popular as they are less
expensive and easier to design.

 Due to their versatility they are often referred to as Universal gates.

 Universality of NAND Gates
11
 Universality of NOR Gates
12
 Combinational Gates
13
Name Symbol Function Truth Table
A B X
A X=A•B 0 0 0
AND X or 0 1
1 0
0
0
B X = AB
1 1 1
A B X
A
OR X X=A+B 0 0
0 1
0
1
B 1 0 1
1A1 1
X
I A X X = A’ 0
1
1
0
A X
Buffer A X X=A 0 0
1 1
A B X
A 0 0 1
NAND X X = (AB)’ 0 1
1 0
1
1
B 1 1 0
A B X
A 0 0 1
NOR X X = (A + B)’ 0 1 0
B 1 0 0
1 1 0
A X=AB A B X
XOR X or
0 0 0
Exclusive OR 0 1 1
B X = A’B + AB’ 1 0 1
1 1 0
A B X
XNOR A X = (A  B)’ 0 0 1
Exclusive NOR X or 0 1 0
or Equivalence B X = A’B’+ AB 1 0 0
1 1 1
 Applications
14

1- Application of using AND Gate 2- Application of using OR Gate

 Exercise
15

• What the type of gate that can replace the box?

• Explain your choice?

?
 Logic Function Implementation
16
 Using Switches
Switches in parallel => OR
 For inputs:
 logic 1 is switch closed
 logic 0 is switch open

 For outputs: Switches in series => AND

 logic 1 is light on
 logic 0 is light off.

 NOT uses a switch such that: Normally-closed switch => NOT

 logic 1 is switch open C
 logic 0 is switch closed
 Logic Families
17

 Logic families classified based on manufacturing technologies to:

 “Diode Logic”(DL)
 “Resistor Transistor Logic”(RTL)

 “Diode Transistor Logic”(DTL)

 “High threshold Logic”(HTL)

 “Transistor Transistor Logic”(TTL)

 “Integrated Injection Logic”(I2L)

 “Emitter coupled logic”(ECL)

 “Metal Oxide Semiconductor Logic”(MOS)

 “Complementary Metal Oxide Semiconductor Logic”( CMOS)

 Types of integrated circuits (IC)
18

 The different sizes of integration of IC chips are usually defined in terms of the number of
logic gates in a single IC or package. They are classified in one of the following
categories:
1) Small-scale integration (SSI) device: contains less than 10 gates in a single package, such as logic gates.
2) Medium scale integration (MSI) device: contains 10 -100 gates in a single package, such as adders and
decoders.
3) Large-scale integration (LSI) device: contains 100 to 10000 gates in a single package, such as
processors.
4) Very large-scale integration (VLSI) device: contains more than 10000 gates in a single package, such as
complex microprocessors chips.
s))
 Some characteristics of the TTL family
19

 Power dissipation: It is the amount of power needed by the gate delivered from the
power supply. It is equal to 20 mw per gate.
𝐼𝐶𝐶𝐻 +𝐼𝐶𝐶𝐿
 𝑃𝑑 = 𝑉𝑐𝑐 ( )
2

 𝑉𝑐𝑐 : Dc Supply Voltage, 𝐼𝐶𝐶𝐻 , 𝐼𝐶𝐶𝐿 : the supply current for the high and LOW output respectively

 Propagation/time delay 𝑡𝑝 : it is the amount of delay between applying the input and the
response of the output of the gate. Generally, the propagation delay is in the range of 0.5
to 50 nanoseconds.
 Some characteristics of the TTL family (Cont.)
20

 Fan-out: it is the maximum number of inputs that can be connected to the output of the
gate without affecting its normal operation. It is 12 gates.
𝐼𝑂𝐿
 fan-out =
𝐼𝐼𝐿
 𝐼𝑂𝐿 : LOW Level Output Current , 𝐼𝐼𝐿 : LOW Level Input Current
 Determine the number of units loads that 74LS00 (NAND gate) can derive if 𝐼𝑂𝐿 =
8.0 mA and 𝐼𝐼𝐿 = 0.4 mA
 Fan-out = 8 / 0.4 = 20