Electronic Devices_11e_Boylestad_2012

164 DC BIASING—BJTs Collector–Emitter Loop

The collector–emitter section of the network appears in Fig. 4.5 with the indicated direc-
tion of current IC and the resulting polarity across RC. The magnitude of the collector cur-
rent is related directly to IB through

IC = bIB (4.5)

It is interesting to note that because the base current is controlled by the level of RB and
IC is related to IB by a constant b, the magnitude of IC is not a function of the resistance
RC. Changing RC to any level will not affect the level of IB or IC as long as we remain in
the active region of the device. However, as we shall see, the level of RC will determine the
magnitude of VCE, which is an important parameter.
Applying Kirchhoff’s voltage law in the clockwise direction around the indicated closed
loop of Fig. 4.5 results in the following:
FIG. 4.5 VCE + IC RC - VCC = 0
Collector–emitter loop.
and VCE = VCC - IC RC (4.6)
which states that the voltage across the collector–emitter region of a transistor in the fixed-
bias configuration is the supply voltage less the drop across RC.
As a brief review of single- and double-subscript notation recall that

VCE = VC - VE (4.7)

where VCE is the voltage from collector to emitter and VC and VE are the voltages from col-
lector and emitter to ground, respectively. In this case, since VE  0 V, we have

VCE = VC (4.8)

In addition, because

VBE = VB - VE (4.9)

and VE  0 V, then

VBE = VB (4.10)

Keep in mind that voltage levels such as VCE are determined by placing the positive lead
(normally red) of the voltmeter at the collector terminal with the negative lead (normally
black) at the emitter terminal as shown in Fig. 4.6. VC is the voltage from collector to ground
and is measured as shown in the same figure. In this case the two readings are identical, but
in the networks to follow the two can be quite different. Clearly understanding the differ-
FIG. 4.6 ence between the two measurements can prove to be quite important in the troubleshooting
Measuring VCE and VC. of transistor networks.

EXAMPLE 4.1 Determine the following for the fixed-bias configuration of Fig. 4.7.
a. IBQ and ICQ.
b. VCEQ.
c. VB and VC.
d. VBC.

Solution:
VCC - VBE 12 V - 0.7 V
a. Eq. (4.4): IBQ = = = 47.08 MA
RB 240 k
Eq. (4.5): ICQ = bIBQ = (50)(47.08 mA) = 2.35 mA
 Electronic Devices_11e_Boylestad_2012
FIXED-BIAS 165
CONFIGURATION

IC

+
IB

VCE

FIG. 4.7
DC fixed-bias circuit for Example 4.1.

b. Eq. (4.6): VCEQ = VCC - ICRC

= 12 V - (2.35 mA)(2.2 k)
= 6.83 V
c. VB = VBE = 0.7 V
VC = VCE = 6.83 V
d. Using double-subscript notation yields
VBC = VB - VC = 0.7 V - 6.83 V
= ⴚ6.13 V
with the negative sign revealing that the junction is reversed-biased, as it should be for
linear amplification.

Transistor Saturation
The term saturation is applied to any system where levels have reached their maximum values.
A saturated sponge is one that cannot hold another drop of water. For a transistor operating in
the saturation region, the current is a maximum value for the particular design. Change the
design and the corresponding saturation level may rise or drop. Of course, the highest saturation
level is defined by the maximum collector current as provided by the specification sheet.
Saturation conditions are normally avoided because the base–collector junction is no
longer reverse-biased and the output amplified signal will be distorted. An operating point
in the saturation region is depicted in Fig. 4.8a. Note that it is in a region where the char-
acteristic curves join and the collector-to-emitter voltage is at or below VCEsat. In addition,
the collector current is relatively high on the characteristics.

IC IC

I C sat – Q-point I C sat – Q-point

0 VCE sat VCE 0 VCE

(a) (b)

FIG. 4.8
Saturation regions: (a) actual; (b) approximate.
 Electronic Devices_11e_Boylestad_2012
EMITTER-BIAS 169
EXAMPLE 4.3 Given the load line of Fig. 4.16 and the defined Q-point, determine the CONFIGURATION
required values of VCC, RC, and RB for a fixed-bias configuration.
I C (mA)
60 μA

12
50 μA
10
40 μA
8
30 μA
6 Q-point
20 μA
4
10 μA
2 I B = 0 μA

0 5 10 15 20 VCE

FIG. 4.16
Example 4.3.
Solution: From Fig. 4.16,
VCE = VCC = 20 V at IC = 0 mA
VCC
IC = at VCE = 0 V
RC
VCC 20 V
and RC = = = 2 k⍀
IC 10 mA
VCC - VBE
IB =
RB
VCC - VBE 20 V - 0.7 V
and RB = = = 772 k⍀
IB 25 mA

4.4 EMITTER-BIAS CONFIGURATION

●
The dc bias network of Fig. 4.17 contains an emitter resistor to improve the stability
level over that of the fixed-bias configuration. The more stable a configuration, the less
its response will change due to undesireable changes in temperature and parameter

FIG. 4.17
BJT bias circuit with emitter resistor.
 The single-subscript voltage VE is the voltage from emitter to ground andElectronic
is deter-Devices_11e_Boylestad_2012
EMITTER-BIAS 171
mined by CONFIGURATION

VE = IERE (4.20)

whereas the voltage from collector to ground can be determined from

VCE = VC - VE

and VC = VCE + VE (4.21)

or VC = VCC - ICRC (4.22)

The voltage at the base with respect to ground can be determined using Fig. 4.18
FIG. 4.22
Collector–emitter loop.
VB = VCC - IBRB (4.23)

or VB = VBE + VE (4.24)

EXAMPLE 4.4 For the emitter-bias network of Fig. 4.23, determine:

a. IB.
b. IC.
c. VCE.
d. VC.
e. VE.
f. VB.
g. VBC.

FIG. 4.23
Emitter-stabilized bias circuit for Example 4.4.

Solution:
VCC - VBE 20 V - 0.7 V
a. Eq. (4.17): IB = =
RB + (b + 1)RE 430 k + (51)(1 k)
19.3 V
= = 40.1 MA
481 k
b. IC = bIB
= (50)(40.1 mA)
⬵ 2.01 mA
 VCE = VCC - IC(RC + RE) Electronic Devices_11e_Boylestad_2012
172 DC BIASING—BJTs c. Eq. (4.19):
= 20 V - (2.01 mA)(2 k + 1 k) = 20 V - 6.03 V
= 13.97 V
d. VC = VCC - ICRC
= 20 V - (2.01 mA)(2 k) = 20 V - 4.02 V
= 15.98 V
e. VE = VC - VCE
= 15.98 V - 13.97 V
= 2.01 V
or VE = IERE ⬵ ICRE
= (2.01 mA)(1 k)
= 2.01 V
f. VB = VBE + VE
= 0.7 V + 2.01 V
= 2.71 V
g. VBC = VB - VC
= 2.71 V - 15.98 V
= ⴚ13.27 V (reverse@biased as required)

Improved Bias Stability

The addition of the emitter resistor to the dc bias of the BJT provides improved stability,
that is, the dc bias currents and voltages remain closer to where they were set by the circuit
when outside conditions, such as temperature and transistor beta, change. Although a
mathematical analysis is provided in Section 4.12, some comparison of the improvement
can be obtained as demonstrated by Example 4.5.

EXAMPLE 4.5 Prepare a table and compare the bias voltage and currents of the circuits of
Fig. 4.7 and Fig. 4.23 for the given value of b  50 and for a new value of b  100. Com-
pare the changes in IC and VCE for the same increase in b.
Solution: Using the results calculated in Example 4.1 and then repeating for a value of
b  100 yields the following:

Effect of b variation on the response of the

fixed-bias configuration of Fig. 4.7.

B IB (MA) IC (mA) VCE (V)

50 47.08 2.35 6.83

100 47.08 4.71 1.64

The BJT collector current is seen to change by 100% due to the 100% change in the value
of b. The value of IB is the same, and VCE decreased by 76%.
Using the results calculated in Example 4.4 and then repeating for a value of b  100,
we have the following:

Effect of b variation on the response of the

emitter-bias configuration of Fig. 4.23.

B IB (MA) IC (mA) VCE (V)

50 40.1 2.01 13.97

100 36.3 3.63 9.11
 Electronic Devices_11e_Boylestad_2012
174 DC BIASING—BJTs Choosing IC  0 mA gives

VCE = VCC 0 IC = 0 mA (4.26)

as obtained for the fixed-bias configuration. Choosing VCE  0 V gives

VCC
IC = ` (4.27)
RC + RE VCE = 0 V

as shown in Fig. 4.25. Different levels of IBQ will, of course, move the Q-point up or down
the load line.

EXAMPLE 4.7
a. Draw the load line for the network of Fig. 4.26a on the characteristics for the transistor
appearing in Fig. 4.26b.
b. For a Q-point at the intersection of the load line with a base current of 15 mA, find the
values of ICQ and VCEQ.
c. Determine the dc beta at the Q-point.
d. Using the beta for the network determined in part c, calculate the required value of RB
and suggest a possible standard value.

I C (mA)
VCC = 18 V
30 μA

6
RC 25 μA
2.2 kΩ
5
RB 20 μA
vo 4
C2 15 μA
vi 3
C1 10 μA
2
RE 5 μA
1.1 kΩ 1 I B = 0 μA

0 5 10 15 20 VCE

FIG. 4.26a FIG. 4.26b

Network for Example 4.7. Example 4.7.

Solution:
a. Two points on the characteristics are required to draw the load line.
VCC 18 V 18 V
At VCE  0 V: IC = = = = 5.45 mA
RC + RE 2.2 k + 1.1 k 3.3 k
At IC  0 mA: VCE  VCC  18 V
The resulting load line appears in Fig. 4.27.
b. From the characteristics of Fig. 4.27 we find
VCEQ ⬵ 7.5 V, ICQ ⬵ 3.3 mA
c. The resulting dc beta is:
ICQ 3.3 mA
b = = = 220
IBQ 15 mA
 Electronic Devices_11e_Boylestad_2012
VOLTAGE-DIVIDER BIAS
I C (mA) 175
CONFIGURATION
30 μA

6
5.45 mA 25 μA
5
20 μA
4
Q-point 15 μA
ICQ = 3.3 mA
3
10 μA
2
5 μA
1 I B = 0 μA

0 5 10 15 20 VCE
VCEQ = 7.5 V VCC = 18 V

FIG. 4.27
Example 4.7.

d. Applying Eq. 4.17:

VCC - VBE 18 V - 0.7 V
IB = =
RB + (b + 1)RE RB + (220 + 1)(1.1 k)
17.3 V 17.3 V
and 15 mA = =
RB + (221)(1.1 k) RB + 243.1 k
so that (15 mA)(RB) + (15 mA)(243.1 k) = 17.3 V
and (15 mA)(RB) = 17.3 V - 3.65 V = 13.65 V
13.65 V
resulting in RB + = 910 k⍀
15 mA

4.5 VOLTAGE-DIVIDER BIAS CONFIGURATION

●
In the previous bias configurations the bias current ICQ and voltage VCEQ were a func-
tion of the current gain b of the transistor. However, because b is temperature sensi-
tive, especially for silicon transistors, and the actual value of beta is usually not well
defined, it would be desirable to develop a bias circuit that is less dependent on, or in
fact is independent of, the transistor beta. The voltage-divider bias configuration of
Fig. 4.28 is such a network. If analyzed on an exact basis, the sensitivity to changes in
beta is quite small. If the circuit parameters are properly chosen, the resulting levels of
ICQ and VCEQ can be almost totally independent of beta. Recall from previous discus-
sions that a Q-point is defined by a fixed level of ICQ and VCEQ as shown in Fig. 4.29.
The level of IBQ will change with the change in beta, but the operating point on the
characteristics defined by ICQ and VCEQ can remain fixed if the proper circuit parame-
ters are employed.
As noted earlier, there are two methods that can be applied to analyze the voltage-divider
configuration. The reason for the choice of names for this configuration will become obvi-
ous in the analysis to follow. The first to be demonstrated is the exact method, which can be
applied to any voltage-divider configuration. The second is referred to as the approximate
method and can be applied only if specific conditions are satisfied. The approximate ap-
proach permits a more direct analysis with a savings in time and energy. It is also particu-
larly helpful in the design mode to be described in a later section. All in all, the approximate
approach can be applied to the majority of situations and therefore should be examined with
the same interest as the exact method.
 Electronic Devices_11e_Boylestad_2012
VOLTAGE-DIVIDER BIAS 177
EXAMPLE 4.8 Determine the dc bias voltage VCE and the current IC for the voltage- CONFIGURATION
divider configuration of Fig. 4.35.
Solution: Eq. (4.28): RTh = R1 7 R2 R1 + +
+
(39 k)(3.9 k) VCC R2 VR E Th
= = 3.55 k –
2
39 k + 3.9 k
– –
R2VCC
Eq. (4.29): ETh =
R1 + R2
(3.9 k)(22 V)
= = 2V FIG. 4.33
39 k + 3.9 k Determining ETh.
ETh - VBE
Eq. (4.30): IB =
RTh + (b + 1)RE
2 V - 0.7 V 1.3 V
= = RTh
3.55 k + (101)(1.5 k) 3.55 k + 151.5 k B

= 8.38 mA +
+ IB VBE – E
IC = bIB ETh
= (100)(8.38 mA) – RE IE

= 0.84 mA
FIG. 4.34
Inserting the Thévenin equivalent
circuit.

100

FIG. 4.35
Beta-stabilized circuit for Example 4.8.

Eq. (4.31): VCE = VCC - IC (RC + RE)

= 22 V - (0.84 mA)(10 k + 1.5 k)
= 22 V - 9.66 V
= 12.34 V

Approximate Analysis
The input section of the voltage-divider configuration can be represented by the network of
Fig. 4.36. The resistance Ri is the equivalent resistance between base and ground for the
transistor with an emitter resistor RE. Recall from Section 4.4 [Eq. (4.18)] that the reflected
resistance between base and emitter is defined by Ri = (b + 1)RE. If Ri is much larger
than the resistance R2, the current IB will be much smaller than I2 (current always seeks the
path of least resistance) and I2 will be approximately equal to I1. If we accept the approxi-
mation that IB is essentially 0 A compared to I1 or I2, then I1 = I2, and R1 and R2 can be
considered series elements. The voltage across R2, which is actually the base voltage, can be
 Electronic Devices_11e_Boylestad_2012
178 DC BIASING—BJTs

FIG. 4.36
Partial-bias circuit for calculating the approximate base
voltage VB.

determined using the voltage-divider rule (hence the name for the configuration). That is,

R2VCC
VB = (4.32)
R1 + R2

Because Ri = (b + 1)RE ⬵ bRE the condition that will define whether the approxi-
mate approach can be applied is

bRE Ú 10R2 (4.33)

In other words, if b times the value of RE is at least 10 times the value of R2, the approximate
approach can be applied with a high degree of accuracy.
Once VB is determined, the level of VE can be calculated from

VE = VB - VBE (4.34)

and the emitter current can be determined from

VE
IE = (4.35)
RE

and

ICQ ⬵ IE (4.36)
The collector-to-emitter voltage is determined by
VCE = VCC - ICRC - IERE
but because IE ⬵ IC,

VCEQ = VCC - IC(RC + RE) (4.37)

Note in the sequence of calculations from Eq. (4.33) through Eq. (4.37) that b does not
appear and IB was not calculated. The Q-point (as determined by ICQ and VCEQ) is therefore
independent of the value of b.

EXAMPLE 4.9 Repeat the analysis of Fig. 4.35 using the approximate technique, and
compare solutions for ICQ and VCEQ.
Solution: Testing:
bRE Ú 10R2
(100)(1.5 k) Ú 10(3.9 k)
150 k Ú 39 k (satisfied)
 R2VCC Electronic Devices_11e_Boylestad_2012
VOLTAGE-DIVIDER BIAS 179
Eq. (4.32): VB = CONFIGURATION
R1 + R2
(3.9 k)(22 V)
=
39 k + 3.9 k
= 2V
Note that the level of VB is the same as ETh determined in Example 4.7. Essentially,
therefore, the primary difference between the exact and approximate techniques is the
effect of RTh in the exact analysis that separates ETh and VB.
Eq. (4.34): VE = VB - VBE
= 2 V - 0.7 V
= 1.3 V
VE 1.3 V
ICQ ⬵ IE = = = 0.867 mA
RE 1.5 k
compared to 0.84 mA with the exact analysis. Finally,
VCEQ = VCC - IC(RC + RE)
= 22 V - (0.867 mA)(10 kV + 1.5 k)
= 22 V - 9.97 V
= 12.03 V
versus 12.34 V obtained in Example 4.8.
The results for ICQ and VCEQ are certainly close, and considering the actual variation in
parameter values, one can certainly be considered as accurate as the other. The larger the
level of Ri compared to R2, the closer is the approximate to the exact solution. Example
4.11 will compare solutions at a level well below the condition established by Eq. (4.33).

EXAMPLE 4.10 Repeat the exact analysis of Example 4.8 if b is reduced to 50, and com-
pare solutions for ICQ and VCEQ.
Solution: This example is not a comparison of exact versus approximate methods, but a test-
ing of how much the Q-point will move if the level of b is cut in half. RTh and ETh are the same:
RTh = 3.55 k, ETh = 2 V
ETh - VBE
IB =
RTh + (b + 1)RE
2 V - 0.7 V 1.3 V
= =
3.55 k + (51)(1.5 k) 3.55 k + 76.5 k
= 16.24 mA
ICQ = bIB
= (50)(16.24 mA)
= 0.81 mA
VCEQ = VCC - IC (RC + RE)
= 22 V - (0.81 mA)(10 k + 1.5 k)
= 12.69 V
Tabulating the results, we have:
Effect of b variation on the response of the
voltage-divider configuration of Fig. 4.35.

B ICQ (mA) VCEQ (V )

100 0.84 mA 12.34 V

50 0.81 mA 12.69 V

The results clearly show the relative insensitivity of the circuit to the change in b. Even though
b is drastically cut in half, from 100 to 50, the levels of ICQ and VCEQ are essentially the same.
 Electronicconfiguration,
Devices_11e_Boylestad_2012
180 DC BIASING—BJTs Important Note: Looking back on the results for the fixed-bias we find the cur-
rent decreased from 4.71 mA to 2.35 mA when beta dropped from 100 to 50. For the voltage-
divider configuration, the same change in beta only resulted in a change in current from
0.84 mA to 0.81 mA. Even more noticeable is the change in VCEQ for the fixed-bias configuration.
Dropping beta from 100 to 50 resulted in an increase in voltage from 1.64 to 6.83 V (a change of
over 300%). For the voltage-divider configuration, the increase in voltage was only from 12.34 V
to 12.69 V, which is a change of less than 3%. In summary, therefore, changing beta by 50%
resulted in a change in an important network parameter of over 300% for the fixed-bias configura-
tion and less than 3% for the voltage-divider configuration—a significant difference.

EXAMPLE 4.11 Determine the levels of ICQ and VCEQ for the voltage-divider configura-
tion of Fig. 4.37 using the exact and approximate techniques and compare solutions. In this
case, the conditions of Eq. (4.33) will not be satisfied and the results will reveal the differ-
ence in solution if the criterion of Eq. (4.33) is ignored.

FIG. 4.37
Voltage-divider configuration for Example 4.11.

Solution: Exact analysis:

Eq. (4.33):
bRE Ú 10R2
(50)(1.2 k) Ú 10(22 k)
60 k  220 k (not satisfied)
RTh = R1 0 0 R2 = 82 k 0 0 22 k = 17.35 k
R2VCC 22 k(18 V)
ETh = = = 3.81 V
R1 + R2 82 k + 22 k
ETh - VBE 3.81 V - 0.7 V 3.11 V
IB = = = = 39.6 mA
RTh + (b + 1)RE 17.35 k + (51)(1.2 k) 78.55 k
ICQ = bIB = (50)(39.6 mA) = 1.98 mA
VCEQ = VCC - IC(RC + RE)
= 18 V - (1.98 mA)(5.6 k + 1.2 k)
= 4.54 V
Approximate analysis:
VB = ETh = 3.81 V
VE = VB - VBE = 3.81 V - 0.7 V = 3.11 V
VE 3.11 V
ICQ ⬵ IE = = = 2.59 mA
RE 1.2 k
VCEQ = VCC - IC (RC + RE)
= 18 V - (2.59 mA)(5.6 k + 1.2 k)
= 3.88 V
 Electronic Devices_11e_Boylestad_2012
COLLECTOR FEEDBACK
Tabulating the results, we have: 181
CONFIGURATION
Comparing the exact and approximate approaches.

ICQ (mA) VCEQ (V)

Exact 1.98 4.54

Approximate 2.59 3.88

The results reveal the difference between exact and approximate solutions. ICQ is about
30% greater with the approximate solution, whereas VCEQ is about 10% less. The results
are notably different in magnitude, but even though bRE is only about three times larger
than R2, the results are still relatively close to each other. For the future, however, our
analysis will be dictated by Eq. (4.33) to ensure a close similarity between exact and
approximate solutions.

Transistor Saturation
The output collector–emitter circuit for the voltage-divider configuration has the same
appearance as the emitter-biased circuit analyzed in Section 4.4. The resulting equation for
the saturation current (when VCE is set to 0 V on the schematic) is therefore the same as
obtained for the emitter-biased configuration. That is,

VCC
ICsat = ICmax = (4.38)
RC + RE

Load-Line Analysis
The similarities with the output circuit of the emitter-biased configuration result in the
same intersections for the load line of the voltage-divider configuration. The load line will
therefore have the same appearance as that of Fig. 4.25, with

VCC
IC = ` (4.39)
RC + RE VCE = 0 V

and VCE = VCC 0 IC = 0 mA (4.40)

The level of IB is of course determined by a different equation for the voltage-divider bias
and the emitter-bias configurations.

4.6 COLLECTOR FEEDBACK CONFIGURATION

●
An improved level of stability can also be obtained by introducing a feedback path from
collector to base as shown in Fig. 4.38. Although the Q-point is not totally independent of
beta (even under approximate conditions), the sensitivity to changes in beta or temperature
variations is normally less than encountered for the fixed-bias or emitter-biased configura-
tions. The analysis will again be performed by first analyzing the base–emitter loop, with
the results then applied to the collector–emitter loop.

Base–Emitter Loop
Figure 4.39 shows the base–emitter loop for the voltage feedback configuration. Writing
Kirchhoff’s voltage law around the indicated loop in the clockwise direction will result in
VCC - IC RC - IBRF - VBE - IERE = 0
It is important to note that the current through RC is not IC, but IC (where IC = IC + IB).
However, the level of IC and IC far exceeds the usual level of IB, and the approximation
IC ⬵ IC is normally employed. Substituting IC ⬵ IC = bIB and IE ⬵ IC results in
VCC - bIBRC - IBRF - VBE - bIBRE = 0
 Electronic Devices_11e_Boylestad_2012
Because IC ⬵ IC and IE ⬵ IC, we have COLLECTOR FEEDBACK 183
CONFIGURATION
IC (RC + RE) + VCE - VCC = 0

and VCE = VCC - IC (RC + RE) (4.42)

which is exactly as obtained for the emitter-bias and voltage-divider bias configurations.

EXAMPLE 4.12 Determine the quiescent levels of ICQ and VCEQ for the network of Fig.
4.41.

10 V

4.7 kΩ
250 kΩ
vo
10 μF
vi  = 90
10 μF

1.2 kΩ

FIG. 4.41
Network for Example 4.12.

VCC - VBE
Solution: Eq. (4.41): IB =
RF + b(RC + RE)
10 V - 0.7 V
=
250 k + (90)(4.7 k + 1.2 k)
9.3 V 9.3 V
= =
250 k + 531 k 781 k
= 11.91 mA
ICQ = bIB = (90)(11.91 mA)
= 1.07 mA
VCEQ = VCC - IC(RC + RE)
= 10 V - (1.07 mA)(4.7 k + 1.2 k)
= 10 V - 6.31 V
= 3.69 V

EXAMPLE 4.13 Repeat Example 4.12 using a beta of 135 (50% greater than in Example
4.12).
Solution: It is important to note in the solution for IB in Example 4.12 that the second
term in the denominator of the equation is much larger than the first. Recall in a recent
discussion that the larger this second term is compared to the first, the less is the sensitivity
to changes in beta. In this example, the level of beta is increased by 50%, which will
increase the magnitude of this second term even more compared to the first. It is more
important to note in these examples, however, that once the second term is relatively large
compared to the first, the sensitivity to changes in beta is significantly less.
 Electronic Devices_11e_Boylestad_2012
184 DC BIASING—BJTs Solving for IB gives
VCC - VBE
IB =
RB + b(RC + RE)
10 V - 0.7 V
=
250 k + (135)(4.7 k + 1.2 k)
9.3 V 9.3 V
= =
250 k + 796.5 k 1046.5 k
= 8.89 mA
and ICQ = bIB
= (135)(8.89 mA)
= 1.2 mA
and VCEQ = VCC - IC(RC + RE)
= 10 V - (1.2 mA)(4.7 k + 1.2 k)
= 10 V - 7.08 V
= 2.92 V
Even though the level of b increased 50%, the level of ICQ only increased 12.1%, whereas
the level of VCEQ decreased about 20.9%. If the network were a fixed-bias design, a 50%
increase in b would have resulted in a 50% increase in ICQ and a dramatic change in the
location of the Q-point.

EXAMPLE 4.14 Determine the dc level of IB and VC for the network of Fig. 4.42.

18 V

3.3 kΩ
91 kΩ 110 kΩ 10 μF
vo
RF1 R F2
10 μF
10 μF
vi  = 75

510 Ω 50 μF

FIG. 4.42
Network for Example 4.14.

Solution: In this case, the base resistance for the dc analysis is composed of two resistors
with a capacitor connected from their junction to ground. For the dc mode, the capacitor
assumes the open-circuit equivalence, and RB = RF1 + RF2.
Solving for IB gives
VCC - VBE
IB =
RB + b(RC + RE)
18 V - 0.7 V
=
(91 k + 110 k) + (75)(3.3 k + 0.51 k)
17.3 V 17.3 V
= =
201 k + 285.75 k 486.75 k
= 35.5 MA
 Electronic Devices_11e_Boylestad_2012
IC = bIB COLLECTOR FEEDBACK 185
CONFIGURATION
= (75)(35.5 mA)
= 2.66 mA
VC = VCC - IC RC ⬵ VCC - ICRC
= 18 V - (2.66 mA)(3.3 k)
= 18 V - 8.78 V
= 9.22 V

Saturation Conditions
Using the approximation IC = IC, we find that the equation for the saturation current is the
same as obtained for the voltage-divider and emitter-bias configurations. That is,

VCC
ICsat = ICmax = (4.43)
RC + RE

Load-Line Analysis
Continuing with the approximation IC = IC results in the same load line defined for the
voltage-divider and emitter-biased configurations. The level of IBQ is defined by the chosen
bias configuration.

EXAMPLE 4.15 Given the network of Fig. 4.43 and the BJT characteristics of Fig. 4.44.
a. Draw the load line for the network on the characteristics.
b. Determine the dc beta in the center region of the characteristics. Define the chosen
point as the Q-point.
c. Using the dc beta calculated in part b, find the dc value of IB.
d. Find ICQ and ICEQ.

(mA)
36 V 60 μA

15
2.7 kΩ 50 μA
150 kΩ 360 kΩ 10 μF
vo 40 μA
R F1 R F2 10
10 μF
10 μF 30 μA
vi
20 μA
5
10 μA
330 Ω 50 μF 0 μA

10 20 30 40 50 VCE (V)

FIG. 4.43 FIG. 4.44

Network for Example 4.15. BJT characteristics.

Solution:
a. The load line is drawn on Fig. 4.45 as determined by the following intersections:
VCC 36 V
VCE = 0 V: IC = = = 11.88 mA
RC + RE 2.7 k + 330 
IC = 0 mA: VCE = VCC = 36 V
 Electronic Devices_11e_Boylestad_2012
186 DC BIASING—BJTs (mA)

60 μA

15
50 μA

11.88 mA
40 μA
10
Q-point
30 μA
IC
Q
β value
20 μA
5
10 μA

0 μA

10 20 30 40 50 VCE (V)
VCEQ 36 V

FIG. 4.45
Defining the Q-point for the voltage-divider bias configuration of
Fig. 4.43.

b. The dc beta was determined using IB = 25 mA and VCE about 17 V.

ICQ 6.2 mA
b ⬵ = = 248
IBQ 25 mA
c. Using Eq. 4.41:
VCC - VBE 36 V - 0.7 V
IB = =
RB + b(RC + RE) 510 k + 248(2.7 k + 330 )
35.3 V
=
510 k + 751.44 k
35.3 V
and IB = = 28 MA
1.261 M
d. From Fig. 4.45 the quiescent values are
ICQ ⬵ 6.9 mA and VCEQ ⬵ 15 V

4.7 EMITTER-FOLLOWER CONFIGURATION

●
The previous sections introduced configurations in which the output voltage is typically
taken off the collector terminal of the BJT. This section will examine a configuration where
the output is taken off the emitter terminal as shown in Fig. 4.46. The configuration of Fig.
4.46 is not the only one where the output can be taken off the emitter terminal. In fact, any of
the configurations just described can be used so long as there is a resistor in the emitter leg.

FIG. 4.46
Common-collecter (emitter-follower) configuration.
 Electronic Devices_11e_Boylestad_2012
COMMON-BASE
The dc equivalent of the network of Fig. 4.46 appears in Fig. 4.47 187
Applying Kirchhoff’s voltage rule to the input circuit will result in CONFIGURATION

-IBRB - VBE - IERE + VEE = 0

and using IE = (b + 1)IB
IBRB + (b + 1)IBRE = VEE - VBE IB

VEE - VBE +
so that IB = (4.44) – VBE
– +
RB + (b + 1)RE
RB RE
For the output network, an application of Kirchhoff’s voltage law will result in + –
IE
-VCE - IERE + VEE = 0
–VEE
and VCE = VEE - IERE (4.45) FIG. 4.47
dc equivalent of
Fig. 4.46.

EXAMPLE 4.16 Determine VCEQ and IEQ for the network of Fig. 4.48.

ⴙ
VCEQ
ⴚ

IEQ

FIG. 4.48
Example 4.16.

Solution:
VEE - VBE
Eq. 4.44: IB =
RB + (b + 1)RE
20 V - 0.7 V 19.3 V
= =
240 k + (90 + 1)2 k 240 k + 182 k
19.3 V
= = 45.73 mA
422 k
and Eq. 4.45: VCEQ = VEE - IERE
= VEE - (b + 1)IBRE
= 20 V - (90 + 1)(45.73 mA)(2 k)
= 20 V - 8.32 V
= 11.68 V
IEQ = (b + 1)IB = (91)(45.73 mA)
= 4.16 mA

4.8 COMMON-BASE CONFIGURATION

●
The common-base configuration is unique in that the applied signal is connected to the
emitter terminal and the base is at, or just above, ground potential. It is a fairly popular
configuration because in the ac domain it has a very low input impedance, high output
impedance, and good gain.
188 DC BIASING—BJTs A typical common-base configuration appears in Electronic
Fig. 4.49Devices_11e_Boylestad_2012
. Note that two supplies are
used in this configuration and the base is the common terminal between the input emitter
terminal and output collector terminal.
The dc equivalent of the input side of Fig. 4.49 appears in Fig. 4.50.

C1 C2

FIG. 4.49
Common-base configuration.

IE Applying Kirchhoff’s voltage law will result in

– -VEE + IERE + VBE = 0
+
VBE
RE
– + VEE - VBE
– IE = (4.46)
VEE RE
+
Applying Kirchhoff’s voltage law to the entire outside perimeter of the network of Fig.
FIG. 4.50 4.51 will result in
Input dc equivalent of -VEE + IERE + VCE + ICRC - VCC = 0
Fig. 4.49.
and solving for VCE: VCE = VEE + VCC - IERE - ICRC
Because IE ⬵ IC

VCE = VEE + VCC - IE (RC + RE) (4.47)

VCE IC
IE
ⴚ ⴙ The voltage VCB of Fig. 4.51 can be found by applying Kirchhoff’s voltage law to the
ⴙ
ⴙ output loop of Fig 4.51 to obtain:
VCB ⴚ
ⴚ VCB + ICRC - VCC = 0
ⴚ ⴙ or VCB = VCC - ICRC
ⴚ ⴙ
Using IC ⬵ IE

we have VCB = VCC - ICRC (4.48)

FIG. 4.51
Determining VCE and VCB.

EXAMPLE 4.17 Determine the currents IE and IB and the voltages VCE and VCB for the
common-base configuration of Fig. 4.52.

FIG. 4.52
Example 4.17.
 VEE - VBE Electronic Devices_11e_Boylestad_2012
MISCELLANEOUS BIAS 189
Solution: Eq. 4.46: IE = CONFIGURATIONS
RE
4 V - 0.7 V
= = 2.75 mA
1.2 k
IE 2.75 mA 2.75 mA
IB = = =
b + 1 60 + 1 61
= 45.08 MA
Eq. 4.47: VCE = VEE + VCC - IE(RC + RE)
= 4 V + 10 V - (2.75 mA)(2.4 k + 1.2 k)
= 14 V - (2.75 mA)(3.6 k)
= 14 V - 9.9 V
= 4.1 V
Eq. 4.48: VCB = VCC - ICRC = VCC - bIBRC
= 10 V - (60)(45.08 mA)(24 k)
= 10 V - 6.49 V
= 3.51 V

4.9 MISCELLANEOUS BIAS CONFIGURATIONS

●
There are a number of BJT bias configurations that do not match the basic mold of those
analyzed in the previous sections. In fact, there are variations in design that would require
many more pages than is possible in a single publication. However, the primary purpose
here is to emphasize those characteristics of the device that permit a dc analysis of the
configuration and to establish a general procedure toward the desired solution. For each
configuration discussed thus far, the first step has been the derivation of an expression for
the base current. Once the base current is known, the collector current and voltage levels of
the output circuit can be determined quite directly. This is not to imply that all solutions
will take this path, but it does suggest a possible route to follow if a new configuration is
encountered.
The first example is simply one where the emitter resistor has been dropped from the
voltage-feedback configuration of Fig. 4.38. The analysis is quite similar, but does require
dropping RE from the applied equation.

EXAMPLE 4.18 For the network of Fig. 4.53:

a. Determine ICQ and VCEQ.
b. Find VB, VC, VE, and VBC.

FIG. 4.53
Collector feedback with RE = 0 .
 Electronic Devices_11e_Boylestad_2012
190 DC BIASING—BJTs Solution:
a. The absence of RE reduces the reflection of resistive levels to simply that of RC, and the
equation for IB reduces to
VCC - VBE
IB =
RB + bRC
20 V - 0.7 V 19.3 V
= =
680 k + (120)(4.7 k) 1.244 M
= 15.51 MA
ICQ = bIB = (120)(15.51 mA)
= 1.86 mA
VCEQ = VCC - ICRC
= 20 V - (1.86 mA)(4.7 k)
= 11.26 V
b. VB = VBE = 0.7 V
VC = VCE = 11.26 V
VE = 0 V
VBC = VB - VC = 0.7 V - 11.26 V
= ⴚ10.56 V

In the next example, the applied voltage is connected to the emitter leg and RC is con-
nected directly to ground. Initially, it appears somewhat unorthodox and quite different
from those encountered thus far, but one application of Kirchhoff’s voltage law to the base
circuit will result in the desired base current.

EXAMPLE 4.19 Determine VC and VB for the network of Fig. 4.54.

FIG. 4.54
Example 4.19.

Solution: Applying Kirchhoff’s voltage law in the clockwise direction for the base–emitter
loop results in
-IBRB - VBE + VEE = 0
VEE - VBE
and IB =
RB
Substitution yields
9 V - 0.7 V
IB =
100 k
8.3 V
=
100 k
= 83 mA
 Electronic Devices_11e_Boylestad_2012
IC = bIB MISCELLANEOUS BIAS 191
CONFIGURATIONS
= (45)(83 mA)
= 3.735 mA
VC = -ICRC
= -(3.735 mA)(1.2 k)
= ⴚ4.48 V
VB = -IBRB
= -(83 mA)(100 k)
= ⴚ8.3 V

Example 4.20 employs a split supply and will require the application of Thévenin’s
theorem to determine the desired unknowns.

EXAMPLE 4.20 Determine VC and VB for the network of Fig. 4.55.

VCC = + 20 V

RC 2.7 kΩ
R1 8.2 kΩ C2
C vo
C1 10 μF
B
vi  = 120
10 μF
E
R2 2.2 kΩ
RE 1.8 kΩ

VEE = – 20 V

FIG. 4.55
Example 4.20.

Solution: The Thévenin resistance and voltage are determined for the network to the left
of the base terminal as shown in Figs. 4.56 and 4.57.

RTh
RTh = 8.2 k } 2.2 k = 1.73 k

8.2 kΩ
B
R1 R1 +
B
I +
8.2 kΩ + R2 2.2 kΩ
VCC ETh
R2 2.2 kΩ 20 V –
– –
RTh VEE 20 V
+ –

FIG. 4.56 FIG. 4.57

Determining RTh. Determining ETh.
 Electronic Devices_11e_Boylestad_2012
192 DC BIASING—BJTs ETh
VCC + VEE 20 V + 20 V 40 V
I = = =
R1 + R2 8.2 k + 2.2 k 10.4 k
= 3.85 mA
ETh = IR2 - VEE
= (3.85 mA)(2.2 k) - 20 V
= -11.53 V
The network can then be redrawn as shown in Fig. 4.58, where the application of
Kirchhoff’s voltage law results in
-ETh - IBRTh - VBE - IERE + VEE = 0

+ R Th – VB
 = 120
1.73 kΩ +
IB VBE
– – E
E Th 11.53 V +
+ RE 1.8 kΩ
–
VEE = –20 V

FIG. 4.58
Substituting the Thévenin equivalent circuit.

Substituting IE = (b + 1)IB gives

VEE - ETh - VBE - (b + 1)IBRE - IBRTh = 0
VEE - ETh - VBE
and IB =
RTh + (b + 1)RE
20 V - 11.53 V - 0.7 V
=
1.73 k + (121)(1.8 k)
7.77 V
=
219.53 k
= 35.39 mA
IC = bIB
= (120)(35.39 mA)
= 4.25 mA
VC = VCC - ICRC
= 20 V - (4.25 mA)(2.7 k)
= 8.53 V
VB = -ETh - IBRTh
= -(11.53 V) - (35.39 mA)(1.73 k)
= ⴚ 11.59 V

4.10 SUMMARY TABLE

●
Table 4.1 is a review of the most common single-stage BJT configurations with their
respective equations. Note the similarities that exist between the equations for the various
configurations.