Finalo CDSL Manual

Loyola Institute of Technology & Science
Loyola Nager,Thovalai-Rajavoor Road

Thovalai Post-6296301
Kanyakumari Dist
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
LAB MANUAL
(Regulation -2017)
SUBJECT NAME : CIRCUIT DESIGN AND SIMULATION LABORATORY

SUBJECT CODE : EC8461
Loyola INSTITUTE OF TECHNOLOGY AND SCIENCE

LOYOLA NAGAR, THOVALAI,
KANYA KUMARI DISTRICT - 629 302.
1
Register No:
Certified that, this is the bonafide record of work done by Mr./Ms.

……………………………………………………….... of IV Semester Electronics and
Communication Engineering of this college, in the Circuits Design and Simulation
Laboratory (EC8461) during 2019 -’20 in partial fulfillment of the requirements of the
B.E. Degree course of the Anna University, Chennai.
Staff-in-charge Head of the Department

This record is submitted for the University Practical Examination held
on…………………………..
Internal Examiner External Examiner
2
ANNA UNIVERSITY CHENNAI
Regulation 2017
EC8461 CIRCUITS DESIGN AND SIMULATION LABORATORY
DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS
1. Series and Shunt feedback amplifiers-Frequency response, Input and output
impedance calculation
2. RC Phase shift oscillator and Wien Bridge Oscillator
3. Hartley Oscillator and Colpits Oscillator
4. Single Tuned Amplifier
5. RC Integrator and Differentiator circuits
6. Astable and Monostable Multivibrators
7. Clippers and Clampers
SIMULATION USING SPICE (Using Transistor):
8. Tuned Collector Oscillator
9. Twin -T Oscillator / Wein Bridge Oscillator
10. Double and Stager tuned Amplifiers
11. Bistable Multivibrator
12. Schmitt Trigger circuit with Predictable hysteresis
13. Monostable multivibrator with emitter timing and basetiming
TOTAL: 45 Periods
3
INDEX
EXP PAGE
LIST OF EXPERIMENTS SIGNATURE REMARKS
No No
DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS
1 Voltage Shunt Feedback Amplifier 07

2 Current Series Feedback Amplifier 14
3 RC Phase Shift Oscillator 20
4 Wein- Bridge Oscillator 26
5 Hartley Oscillator 32
6 Colpitt’s Oscillator 38
7 Single Tuned Amplifier 44
8 Integrator And Differentiator 50
9 Clipper and Clamper Circuits 54
10 Astable Multivibrator 64
11 Monostable Multivibrator 68
12 Bistable Multivibrator 72
SIMULATION USING SPICE (Using Transistor):
13 Tuned Collector Oscillators 78

14 Twin-T Oscillator 80
15 Double and Stager Tuned Amplifiers 82
16 Bi-Stable Multivibrator 84
Schmitt Trigger Circuit with Predictable
17
Hysteresis 86
18 Mono Stable Multivibrator 90
4
CIRCUIT DIAGRAM: (VOLTAGE SHUNT FEEDBACK AMPLIFIER)
(a) WithoutFeedback:
TABULATION (Without feedback):
OUTPUT Gain=
S.NO FREQUENCY
VO(V) 20log(Vo/Vin)
dB
5
Ex. No: 1
VOLTAGE SHUNT FEEDBAK AMPLIFIER
Date:
AIM:
To design and study the frequency response of voltage shunt feedback amplifier and to
calculate the midband gain, bandwidth with and without feedback and cutoff frequency.
APPARATUS REQUIRED:
S. No APPARATUS RANGE QUANTITY
1 FG (0-3)MHz 1
2 CRO (0-30)MHz 1
1.5 kΩ, 2.2 kΩ,10kΩ, 180Ω Each 1

3 Resistors 6.8kΩ
2
4 Power supply (0-30)V 1
5 Transistors BC 107 1
6 Capacitors 47µF, 0.1µF,470 µF 1
Design example:
Given specifications:
VCC= 15V, IC=IE =1 mA, VCE= 6V, AVF= 100, fI = 60 Hz, hfe= 100, hie=1 k
(i) Selection of RE and RC:

The voltage gain is given by,
VCC= ICRC + VCE+IERE
15= 1 x 10-3 RC + 1 x 10-3 RE + 6
(RC + RE) = 9 x 103
Assume RE = 2.2 KΩ
RC = (9 – 2.2) x 103
RC = 6.8 KΩ
6
CIRCUIT DIAGRAM: (VOLTAGE SHUNT FEEDBAK AMPLIFIER)
(b)With Feedback:
TABULATION (With feedback):
OUTPUT Gain in dB=

S.NO FREQUENCY
VO(V) 20log(Vo/Vin) dB
7
(ii) Selection ofR1&R2:
VCC= I1R1 + I2R2 = VR1 +VR2

But Ib = I1 + I2 and I1=I2
VR2= VBE + IERE= 0.7 + 1 x 10-3 x 2.2 x 103= 2.9 V
VCC = VR1 +VR2
VR1= VCC - VR2= 15 – 2.9 = 12.1 V
(VR1/ VR2) = (I1R1 / I2R2) ≈ (R1 /R2) = (12.1 / 2.9)
Let R2 = 1.5 KΩ
R1 = (12.1 / 2.9) x 1.5 KΩ = 6.258 KΩ
Select R1= 6.8 KΩ

(iii) Selection of Ce:
XCe = hie/(1=hfe)
1/(2πfCe) = (1000/101) = 9.9009
Ce= 1/(2π x 60x 9.9009) = 321.5 µF
Choose Ce = 470µF
XC1 = Zn /10
Zn = R1 ǁR2 ǁ hie= 6.8 KΩ ǁ 1.5 KΩ ǁ 1000 = 551.5
XC1 = 55.315
1/(2πfC1) = 55.315
C1 = 1/(2 π x 60 x 55.315) = 57.73 µF
Select C1 = 47 µF, C2 = 0.1 µF
(iv) Selection of Rf:
Vf = (VoR2) /(Rf +R2)

Vo / Vf= β = R2 /(Rf +R2)
Avf = A/(1+Aβ)
If Aβ >>1, Avf = 1/β
100 = (Rf +R2) / R2
Rf = 100 x 1.5 K – 1.5K =148.5 K
Select Rf = 150 KΩ
8
MODELGRAPH:(VOLTAGE SHUNT FEEDBAKAMPLIFIER)
9
THEORY:
Negative feedback increases the bandwidth of the transfer function stabilized by the
specific type of feedback used in a circuit. In Voltage shunt feedback amplifier,
consider a common emitter stage with a resistance R’ connected from collector to
base. This is a case of voltage shunt feedback and we expect the bandwidth of the
trans-resistance to be improved due to the feedback through R’. The voltage source is
represented by its Norton’s equivalent current source IS=Vs/Rs.
PROCEDURE:
1. Connect the amplifier without feedback circuit as per the circuit diagram.
2. Set VCC = 15V; set input voltage using audio frequency oscillator.
3. By varying audio frequency oscillator take down output frequency oscillator voltage
for difference infrequency.
4. Calculate the gain in dB.
5. Plot gain Vs frequency curve in semi-log sheet.
6. Connect the amplifier with feedback circuit as per the circuit diagram.
8.By varying audio frequency oscillator take down output frequency oscillator voltage
for difference infrequency.
9. Calculate the gain indB

10. Plot gain Vs frequency curve in semi-logsheet.
11. Compare response with respect to the amplifier with and without feedback.
RESULT
Thus voltage shunt feedback amplifier is designed and Bandwidth is calculated.
10
CIRCUIT DIAGRAM: (CURRENT SERIES FEEDBACK AMPLIFER)
(a) Without Feedback:
TABULATION:(Without feedback)
FREQUENCY OUTPUT Gain in dB=

(in Hz) VO(V) 20log(Vo/Vin)
dB
11
Ex. No: 2
CURRENT SERIES FEEDBACK AMPLIFER
Date:
AIM:
To design and study the frequency response of current series feedback amplifier and to calculate the
midband gain, bandwidth with and without feedback and cutoff frequency.
APPARATUS REQUIRED:

1 AFO (0-3)MHz 1
2 CRO (0-30)MHz 1
3 Resistors 2.2KΏ, 5.6kΩ, 150KΩ, Each 1
1KΩ, 1.5KΩ
6.8KΩ
4 RPS (0-30V) 1
5 Transistors BC 107 1
6 Capacitors 100µF, 0.1µF, 470µF, 1
470µF
7 Connecting wires - few
Design example:
VCC= 20V, IC=IE=1mA, VCE= 7V, AVf= 75, fL= 100Hz, VRE= 0.1VCC, hFE= 100,
hie=1KΏ, RL=150 KΩ
(i) Selection ofRE:

VRE=IERE
RE= VRE/IE = (0.1 x 20)/1 mA = 2 KΩ
Select RE = 2.2 KΩ
(ii) Selection ofRC:
VCC= ICRC + VCE+IERE
20 = 1 x 10-3 RC + 7 + (1 x 10-3 x 2.2 x 103) = 10.8 KΩ
Choose RC = 6.8 KΩ
12
WITH FEEDBACK: (CURRENT SERIES FEEDBACK AMPLIFER)
TABULATION:
Gain
FREQUENCY OUTPUT VO(V)
20log(Vo/Vin) dB
13
(iii) Selection of RB1&RB2:
VR2= VBE + IERE= 0.7 + 1 x 10-3 x 2.2 x103 = 2.9V

VCC= VR1 + VR2
VR1= VCC - VR2 = 20 – 17.1 V
(VR1/VR1) = (I1R1/I2R2) = (R1/R2)
Assume R2= 1 KΩ
R1 = (17.1/2.9) x 1 x 103 = 5.89 KΩ
Select R1= 5.6 KΩ
(iv) Selection of C1, C2 and Ce:

XC1 = Zn/10
Zn= R1 ǁ R2 ǁ hie = 5.6 K ǁ 1K ǁ1000 = 459 Ω
XC1= 1/ 2пf C1 = 45.9 Ω
C1 = 34.67 µF
Select C1 = 47 µF
XC2 = RL/100 = 150K/100 = 1.5 K

1/ 2пf C2 = 1.5 KΩ
C2 = 1.067 µF
Select C2 = 0.1 µF
XCe = hie /(1+ hfe) =1000/101 = 9.9009

1/ 2пf Ce = 9.9009
Ce = 160.7 µF
Select Ce = 100 µF
(v) With feedback:
Avf= Vo/Vi=75
Vo= IC (RCǁ RL) = hfeIb (RCǁ RL)
Vi = hieIb + IERf = hieIb + IcRf = hieIb + hfeIbRf
75 = 100 x (6.8 x 103 x 150 x 103)/ (1000+100 Rf)(6.8 + 150) x 103 = 76.73 Ω
Select Rf= 100 Ω

14
MODEL GRAPH(CURRENT SERIES FEEDBACK AMPLIFER)
15
THEORY:
Negative feedback in general increases the bandwidth of the transfer function

stabilized by the specific type of feedback used in a circuit. In current series feedback amplifier,
the feedback error signal is in series with the input and proportional to the load current. We
expect the bandwidth of the Trans conductance to be improved due to the feedback through R’
.The current source is represented by its Norton’s equivalent current source Is=Vs/Rs.
PROCEDURE:
1. Connect the circuit as per the circuit diagram.

3.By varying audio frequency oscillator take down output
frequency oscillator voltage for difference infrequency.
4. Calculate the gain in dB
5. Plot gain Vs frequency curve in semi-log sheet
RESULT:
Thus current series feedback amplifier is designed and Bandwidth is calculated
16
CIRCUITDIAGRAM:(RC PHASE SHIFT OSCILLATOR)
MODEL GRAPH:
Amplitude (V)
Time (sec)
17
Ex. No: 3
RC PHASE SHIFT OSCILLATOR
Date:
AIM:
To design a RC phase shift oscillator and to find the frequency of oscillation.
APPARATUS REQUIRED:
S.No APPARATUS RANGE QUANTITY

REQUIRED
1 Transistor BC107 1
2 Resistors 27kΩ,10 kΩ,1 kΩ ,2 kΩ Each 1

4.7KΩ, 2.7 kΩ 2
4 Capacitors 0.02µf 3
100 µf 1
5 CRO (0-30)MHz 1
6 Bread board - 1
Design Example:
Specifications:
VCC = 10V, IC =2mA, =100, Vce = 4V, f=500 Hz, Vbe = 0.7V,hie= 2K, hfe= 100, AV= 100
Design:
(i)Selection of RC:
Av = hfeRC / hie
100 = 100 RC / 2x 103
RC = 2KΩ
18
TABULATION:(RC PHASE SHIFT OSCILLATOR)
Time period
Amplitude (V) Frequency (Hz)
(m sec)
19
(ii) Selection of RE:
VCC = ICRc + VCE + IERE
10 = (2 x 10-3 x 2 x 103) + 4 +2 x 10-3RE
RE =1K
(iii) Selection of R1&R2:
VCC= VR1+VR2 =I1R1+I2R2
VR2= VBE +IERE= 0.7+2 x 10-3 x 103=2.7V
VR1= VCC -VR2 = 10 – 2.7 = 7.3 V
VR1/VR2 = R1/R2
(7.3/2.7) = (R1/R2)
Assume R2 = 10 KΩ
R1 = (7.3/2.7) x 10 x 103
R1 = 2.7 KΩ
20
21
THEORY:
The RC phase shift oscillator produces a sinewave of desired frequency. A 60ophase shift will be
given for each RC combination and the total phase shift is of 180o. The BC107 of emitter
configuration will introduce a phase shift of 180o. Therefore the total phase shift of 360o is
introduced. Capacitor are designed in order to get a desired output frequency.
PROCEDURE:

2. Set VCC =10V.
3. For the given supply the amplitude and time period is measured from CRO.
4. Frequency of oscillation is calculated by the formula f=1/T.
5. Amplitude Vs time graph is drawn.
RESULT:
Thus the RC-phase shift oscillator is designed and constructed for the given frequency.
Frequency:
22
CIRCUIT DIAGRAM (WEIN- BRIDGE OSCILLATOR)
TABULATION:
Frequency (KHz) Amplitude(V) Time(msec)
23
Ex. No: 4
WEIN- BRIDGE OSCILLATOR
Date:
AIM:
To design a Wein-bridge oscillator using transistors and to find the frequency of
oscillation for the given cut off frequency.
APPARATUS REQUIRED:

REQUIRED
1 Resistors 3.9 kΩ, 4.7 kΩ, 47kΩ, 2,2,1,1,2,1
2.7 k, 10 kΩ, 1.5 kΩ
4 Capacitors 0.1µF, 0.01µF, Each 1

0.7µF
5 CRO (0-30)MHz 1
6 Bread board - 1
7 Connecting wires - Few
DESIGN:
VCC = 12V, IC=2 MA, VCE=0.6V, VRC=4.8V, VRE=1.2V, hfe = 100, f= 1KHz
(i)Selection of RC and RE:
VRC=ICRC
RC=VRC/IC = (4.8 /2 x 10-3) = 2.4 KΩ
Select RC = 2.7KΩ
VRE=IERE
RE=VRE/IE = (1.2 /2 x 10-3) = 600 Ω
Select RE = 1.5 KΩ
24
MODEL GRAPH:
Amplitude (V)
Time (sec)
25
(ii)Selection of R1&R2:
IB = IC /hfe = (3 x 10-3/102) = 20µA

Assume current through R1 equal 10 and current through R2 equals 9IB
VR2= VBE +VRE =0.7 + 1.2 = 1.9V
VR2= 1.9 = 9IB x R2
R2= 10.55 KΩ
Select R2= 10 KΩ
VR1= VCC -VR2 = 12-1.9 =10.1V
VR1 =10.1 =10IB x R1 = 10 x 20 x 10-6 x R1
R1 = 50.5 KΩ
Select R1 = 47 KΩ
(iii)Selection of CC:
f = 1/(2πCC(R1ǁR2 ǁRE ǁ hfe))
CC= 1/(2πf(R1ǁR2 ǁRE ǁ hfe)) = 0.216 µF
Select CC = 0.7 µF
26
27
THEORY:
Generally in an oscillator, amplifier stage introduces 180o phase shift feedback
network introduces additional 180o phase shift, to obtain a phase shift of 360o around a loop.
This is a condition for any oscillator. But Wein bridge oscillator ses a non-inverting amplifier
and hence does not provide any phase shift during amplifier stage. As total phase shift requires is
0o or 2n radians, in Wein bridge type no phase shift is necessary through feedback. Thus the
total phase shift around a loop is 0o. The output of the amplifier is applied between the terminals
1 and 3, which are the input to the feedback network. While the amplifier input is supplied from
the diagonal terminals 2 and 4, which is the output from the feedback network. Thus amplifier
supplied its own output through the Wein Bridge as a feedback network
The two arms of the bridge, namely R1, C1 in series and R2, C2 in parallel are called
frequency sensitive arms. This is because the components of these two arms decide the
frequency of the oscillator.
PROCEDURE:
2. Set VCC =12V.
4. Frequency of oscillation is calculated by the formula f=1/T
5. Amplitude Vs Time graph is drawn.
RESULT:
Thus the Wein – bridge oscillator is designed for the given frequency of oscillation.
Frequency :
28
CIRCUIT DIAGRAM: (HARTLEY OSCILLATOR)
MODEL GRAPH:
Amplitude (V)
Time (msec)
29
Ex.No.5
HARTLEY OSCILLATOR
Date:
AIM:
To design and construct a Hartley oscillator for the given operating frequency
APPARATUS REQUIRED:

REQUIRED
1 Resistors 47kΩ,2.9KΩ,8.6 Each one
kΩ,600Ω
2 RPS (0-30)V 1
4 Capacitors 0.1 µF, 10 µF 3,1
5 Inductor 20mH 2
6 CRO (0-30)MHz 1
7 Bread board - 1
DESIGN:
L1= L2=20mH, f=2 KHz, VCC=12V, IC=2mA,VCE=12V, β=125, VRE=0.1VCC, S=12
(i)Selection of RE and RC:
XRE=0.1 x 12 = 1.2 = IERE

RE = 1.2/ 2 x 10-3 = 600 Ω
Select RE = 600 Ω
VCC=ICRC + VCE + IERE

12 = 2 x 10-3 RC + 5+ 1.2
RC = 2.9 KΩ
Select RC = 2.9 KΩ
30
TABULATION(HARTLEY OSCILLATOR)
Amplitude(V) Time(msec) Frequency(Hz)
31
(ii) Selection of R1&R2:
RE = R1 ǁ R2
(1+𝛽)
S= 𝑅𝐸
1+ 𝛽 ( )
𝑅𝐸+𝑅𝐵
1+125
12 = 125 ×600
1+( )
600+𝑅𝐵
75 x 10-3 = 5700 + 9.5 RB
RB= 7.29 KΩ
(R1R2/ R1+ R2) = 7.29 KΩ
VR2= VBE+VRE= 0.7+1.2 =1.9V
VR2 = (VCCR2 / R1R2)
1.9 = (R1R2 / R1+R2)
R1 = 45.5 KΩ
Select R1 = 47 KΩ
(R2 / R1+R2) = 0.158
Select R2= 8.6 KΩ
(iii)Selection of C:
fo = 1/2π√𝐶(𝐿1 + 𝐿2)
L1 = L2 = 20 mH and fo = 2 KHz
C = 0.158 µF
Select C = 0.1 µF
(iv)Selection of Cc:
XCC = Zi /10
1/(2πfCC) = Zi /10, Zi= 10 K
1//(2π x 100 x CC) = (10 x 103)/10
Cc = 1.59 µF
Select Cc = 2.2 µF
32
33
THEORY:
Hartley oscillator is very popular and is commonly used as local oscillator in radio
receivers. The collector voltage is applied to the collector through inductor L whose reactance is
high compared with X2 and may therefore be omitted from equivalent circuit, at zero frequency,
however capacitor Cb acts as an open circuit.
PROCEDURE:
2. Set VCC =12V.
4. Frequency of oscillation is calculated by the formula F=1/T
5. Verify it with theoretical frequency, F=1/2П( (L1 L2)C )
RESULT:
Thus the Hartley oscillator is designed and constructed for the given frequency.
Frequency :
34
CIRCUIT DIAGRAM: (COLPITT’S OSCILLTOR)
MODEL GRAPH:
Amplitude (V)
Time (msec)
35
Ex. No: 6
COLPITT’S OSCILLTOR
Date:
AIM:
To design and construct a Colpitt’s oscillator at the given operating frequency
APPARATUS REQUIRED:
1 Resistors 56kΩ,1.2KΩ,2.2 kΩ, 470Ω Each One
2 RPS (0-30)V 1
4 Capacitors 2.2 µF, 47 µF, 0.1µF, 0.01µF 2,1,1,1
5 Inductor 1mH 1
6 CRO (0-30)MHz 1
7 Bread board - 1
8 Connecting - few
wires
DESIGN:
L1= L2=20mH, f=100 Hz,fo=100 KHz, VCC=10V, IC=2mA,VCE=5V, β=125, VRE=0.1VCC,VR2=1.7V, S=20
(i)Selection of RE and RC:
VRE=0.1 x 10 = 1 V = IERE
RE = 1/ 2 x 10-3 = 500 Ω
Select RE = 470 Ω
VCC=ICRC + VCE + IERE

10 = 2 x 10-3 RC + 5+ 2 x 10-3 x 470
RC = 2.03 KΩ
Select RC = 2.2 KΩ
36
TABULATION:
Amplitude(V) Time( msec ) Frequency(Hz)
37
RE = R1 ǁ R2
(1+𝛽)
S= 𝑅𝐸
1+ 𝛽 ( )
𝑅𝐸+𝑅𝐵
1+125
12 = 125 ×470
1+( )
470+𝑅𝐵
11.08 x 103 = 470 RB
RB = 10.61 KΩ
(R1R2/ R1+ R2) = 10.61 KΩ
VR2= VBE +VRE = 0.7+1 =1.7V
VR2 = (VCCR2 / R1R2)
1.7 = (R1R2 / R1+R2)
R1 = 56 KΩ
Select R1 = 56 KΩ
(R2 / R1+R2) = 1.9
Select R2 = 12 KΩ
(iii)Selection of Cc:
XCC = Zi /10
1/(2πfCC) = Zi /10 , Zi= 10 K
1//(2π x 2 x 103x CC) = (10 x 103)/10
Cc = 0.019 µF
Select Cc = 0.01 µF
(iv)Selection of CE:
XCE ≤ RE /10
1/(2πfCE) ≤RE /10
1//(2π x 100 x CE) ≤ 470/10
CE ≥ 33.8 µF
Select Cc = 47 µF
38
39
THEORY:
Colpitt’s oscillator is very popular and is commonly used as local oscillator in radio
receivers. The collector voltage is applied to the collector through inductor L whose reactance is
high compared with X2 and may therefore be omitted from equivalent circuit, at zero frequency.
The circuit operates as Class C. the tuned circuit determines basically the frequency
ofoscillation.
PROCEDURE:
2. Set VCC =10V.
RESULT:
Thus the colpitt’s oscillator is designed and constructed for the given frequency.
Frequency :
40
CIRCUIT DIAGRAM:(single tuned amplifier)
MODEL GRAPH:
41
Ex.No:7
SINGLE TUNED AMPLIFIER
Date:
AIM:
To design a single tuned amplifier for the given specifications and to draw its frequency
response.
APPARATUS REQUIRED:

REQUIRED
1 Resistors 30kΩ,5 kΩ,1.5kΩ Each one
2 RPS (0-30)V 1
4 Capacitors 0.1μf ,0.01μf,1 μf 2,1,1
5 Inductance 1mH 1
6 CRO (0-30)MHz 1
7 Function generator (0-3)MHz 1
8 Bread board - 1
DESIGN:
Vcc = 15V, Ic = 1mA, f0=50 KHz, f=1500 Hz, RE =1.5K, RC =1.5K
VR2= VBE +IERE= VBE +ICRE = 0.7+1 x 103 x 1.5 x103 =2.2 V
VCC= VR1 +VR2
VR2= VCC -VR1 = 15 – 2.2 = 12.8 V
VR1/VR2= (I1R1 / I2R2) = R1 / R2
Assume R2 = 5 KΩ, R1 = (12.8 / 2.2) x 5 KΩ = 29.09 KΩ
Select R1 = 30 KΩ
42
TABULATION:
FREQUENCY OUTPUT Gain in dB=

AV = Vo/Vin
(Hz) VO(V) 20log A V (dB)
43
(iii)Selection of CE:
XCE ≤ 0.1 RE
1/(2πfCE) ≤ 0.1 RE
CE≤ 1/ 2π(1500 x 0.1 x 1.5 x103)
CE≤ 0.707 µF
Choose CE = 0.1 µF
fo= 1/2π√𝐿𝐶
50 KHz = 1/2π√1 × 10−3 𝐶
C = 0.01 µF
44
45
THEORY:
The single tuned amplifier selecting the range of frequency the resistance load replaced
by the tank circuit. Tank circuit is nothing but inductors and capacitor in parallel with each other.
The tuned amplifier gives the response only at particular frequency at which the output is almost
zero. The resistor R1 and R2 provide potential diving biasing, Re and Ce provide the thermal
stabilization. This it fixes up the operating point.
PROCEDURE:
1. Connections are given as per the circuit diagram
2. By varying the frequency, amplitude is noted down
3. Gain is calculated in dB
4. Frequency response curve is drawn.
RESULT:
Thus the class – C single tuned amplifier is designed and frequency response is plotted.
46
CIRCUIT DIAGRAM:
(a) DIFFERENTIATOR:
MODEL GRAPH:
47
Ex. No: 8
INTEGRATOR AND DIFFERENTIATOR
Date:
AIM:
To design and construct, differentiator and integrator circuit.
APPARATUS REQUIRED:
S. No. APPARATUS RANGE QUANTITY

REQUIRED
1. Function generator (0-3)MHz 1
2. CRO (0-30)MHz 1
3. Capacitor 0.1μf, 220 pf 1,1
4. Resistor 5.6KΩ 1
5. Bread board - 1
THEORY:
Differentiator:
Differentiator is a circuit which differentiates the input signal, it allows high order
frequency and blocks low order frequency. If time constant is very low it acts as a differentiator.
In this circuit input is continuous pulse with high and low value.
Integrator:
In a low pass filter when the time constant is very large it acts as an integrator.
In this the voltage drop across C will be very small in comparison with the drop across resistor
R. Therefore, the total input appears across the R.
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. Set the signal voltage Vi (5V, 1KHz) in the function generator.
3. Observe the output waveform in the CRO.
4. Sketch the output waveform.
48
CIRCUIT DIAGRAM:
(b) INTEGRATOR:
MODEL GRAPH:
49
RESULT:
Thus the integrator and differentiator circuit is constructed and output waveform is
observed.
50
CIRCUIT DIAGRAM:
(a) BIASED POSITIVECLIPPER:
MODEL GRAPH:
51
Ex. No: 9
CLIPPER AND CLAMPER CIRCUITS
Date:
AIM:
To construct and design the clipper and clamper circuits using diodes at 1 KHz
APPARATUS REQUIRED:
1 Resistors 1 kΩ 1
2 RPS (0-30)V 1
3 Diode IN4007 1
4 CRO (0-30)MHz 1
6 Function generator (0-3)MHz 1
7 Capacitor 1 μf 2
8 Bread board - 1
DESIGN:
Given f=1 kHz,
T=t=1/f=1x10-3 sec=RC
Assume, C=1µF
Then, R=1K
52
(b) BIASED NEGATIVE CLIPPER:
MODEL GRAPH:
53
THEORY
Clipper:
A Clipper is a circuit that removes either the positive or negative part of a waveform. For a
positive clipper only the negative half cycle will appear as output. Clipping circuits are also
referred as voltage or current limiters, Amplitude selectors, or Slicers.
Clamper:
A Clamper circuit is a circuit that adds a dc voltage to the signal. A positive clamper shifts
the ac reference level up to a dc level.
Working:
During the positive half cycle, the diode turns on and looks like a short circuit across the
output terminals. Ideally, the output voltage is zero. But practically, the diode voltage is 0.7 V
while conducting. On the negative half cycle, the diode is open and hence the negative half cycle
appear across the output.
Application:
 Used for wave shaping

 To protect sensitive circuits
PROCEDURE:
1. Connect as per the circuit diagram.

2. Set the signal voltage (say 5V, 1 KHz) using signal generator.
3. Observe the output waveform using CRO.
4. Sketch the output waveform.
54
CIRCUIT DIAGRAM:
(c) CLAMPER CIRCUIT (Positive Clamper)
MODEL GRAPH:
60
61
(d) Negative clamper:
MODEL GRAPH:
TABULATION:
Clipper Clamper
input output input output
Amplitude (V)
Time (ms)
62
RESULT:
Thus, the output waveforms for Clipper and Clamper circuits were observed.
62
CIRCUIT DIAGRAM(Astable Multivibrator)
TABULATION:
Voltage Amplitude(V) OFF Time(ms) ON Time(ms)
63
Ex. No: 10
ASTABLE MULTIVIBRATOR
Date:
AIM:
To design an Emitter coupled Astable multivibrator, for the given specifications and to
study the output waveform.
APPARATUS REQUIRED:
1 Resistors 68kΩ, 2.2kΩ Each 2

2 RPS (0-30)V 1
4 Capacitors 0.0047 µF 2
5 CRO (0-30)MHz 1
6 Bread board - 1
Design example:
VCC= 12V; hfe = 40; f=2 KHz; Ic(sat) = 5mA; VCE (sat)= 0.3V;VBE (sat)= 0.7V
(i)Selection of RC:
VCE=IC(sat) RC1 + VCE(sat)

RC1 = VCC – (VCE(sat) / IC(sat)) = (12-0.3)/ (5 x 10-3) = 2.34 KΩ
Select RC1and RC2= 2.2 KΩ
(ii)Selection of RC:
To ensure saturation RB ≤ hfeRC

RB ≤ 40 x 2.2 x 103
RB ≤ 88 KΩ
Select RB = 68 KΩ
64
MODEL GRAPH(Astable Multivibrator)
65
(iii)Selection of C:
T = T1 + T2 = 0.69 RC + 0.69 RC = 1.38 RC

C = T/1.38R = 1/ (1.38fR)
R = 68 KΩ, C= 1/ (1.38 x 2 x 103 x 68 x 103)
C= 0.0053 µF
Select C1 and C2 = 0.0047 µF
THEORY:
The Astable multivibrator generates square wave without any external triggering pulse. It
has no stable state, i.e., it has two quasi- stable states. It switches back and forth from one stable
state to other, remaining in each state for a time depending upon the discharging of a
capacitive circuit. When supply voltage +Vcc is applied, one transistor will conduct more than
the other due to some circuit imbalance.
PROCEDURE:
2. Set VCC =12V.
RESULT:
Thus the Astable Multivibrator is designed and output waveform is plotted.

66
CIRCUIT DIAGRAM(Monostable Multivibrator)
TABULATION:
Voltage Time period(msec)

Amplitude(V)
TON TOFF
67
Ex. No: 11
MONOSTABLE MULTIVIBRATOR
Date:
AIM:
To design and test the performance of Monostable Multivibrator for the given
specifications and to obtain its output waveform.
APPARATUS REQUIRED:
Resistors 4.7 kΩ,150 kΩ,56 2,1,1,1,1

1
kΩ,6.8KΩ, 8.7 kΩ
2 RPS (0-30)V 1
4 CRO (0-30)MHz 1
5 Capacitor 0.01 µF 3
6 Bread board - 1
Design example:
VCC= 10V;VBB= -10V; VBE (sat) = 0.7V; VCE (sat) = 0.7V;VCC (sat) = 0.3V, IC= 2mA
(i) Selection of R1 & R2:
When Q1is OFF, VB1= {(VCC(sat) RB/ RB +R2) + (VBB R2 / RB+R2)}

Let VB1 = -1V, -1= (0.3RB /RB +R2) – (10R2/RB +R2)
-RB -R2 = 0.3RB -10R2
RB = 6.923R2
68
MODEL GRAPH(Monostable Multivibrator)
69
Q2 is OFF, assume a current of 10IB flows through R2 and 9IB flows through RB
9IBRB = VBE(sat) – (-VBB) = 0.7 + 10
IB = IC /hfe = 2 x 10-5 A
RB= 10.7/9 x 2 x 10-5 = 59.44 KΩ
Select RB = 56 KΩ
R2 = 56 x 103 / 6.923 = 8.08 KΩ
Select R2 = 8.7 KΩ
To find R1, Let T1 = 1 ms, C= 0.01 µF
T = 0.69 R1C, R1 = (1 x 10-3 / 0.69 x 0.01 x 10-6) = 144.9 KΩ
Select R1 = 150 KΩ
(ii)Selection of RC:
RC = VCC – VCE(sat) / IE = 10-0.7/2 x 10-3 = 4.65 KΩ
Select RC = 4.7KΩ
THEORY:
The Monostable multivibrator has one stable state when an external trigger input is
applied the circuit changes its state from stable to quasi -stable state. And then automatically
after some time interval the circuit returns back to the original normal stable state. The time T is
dependent on circuit components. The value of R2, V BB are chosen such that transistor Q1 is off
by reverse biasing it. Q2 is on. This is possible by forward biasing Q2 with the help of VCC and
resistance R. Thus Q2-ON and Q1-OFF is normal stable state of circuit.
PROCEDURE:

2. Give a negative trigger input to the base ofQ1.
3. Note the output of transistor Q2 andQ1.
4. Find the value of Ton and Toff.
5. Plot the response of the Monostable Multivibrator
RESULT:
Thus the Monostable Multivibrator is designed and the performance is verified.
70
CIRCUIT DIAGRAM(Bistable Multivibrator)
TABULATION:
Input Output
VC1 VC2
TON
TOFF
71
Ex. No: 12
BISTABLE MULTIVIBRATOR
Date:
AIM:
To design and test the performance of bistable multivibrator and to obtain its output
waveform.
APPARATUS REQUIRED:
APPARATUS
S. No RANGE QUANTITY
REQUIRED
1 Resistors 84.6kΩ,6.8KΩ, 2,2,2,1

10KΩ,5.8 KΩ
2 RPS (0-30)V 1
4 CRO (0-30)MHz 1
5 Capacitor 0.1 µF 2
6 Diode 1N4007 2
7 Bread board - 1
72
MODEL GRAPH(Bistable Multivibrators)
73
THEORY:
The bistable multivibrator has two states. It also has input at the base of both transistor.
In this circuit the output of Q2 is coupled to the base of Q1 through R2. Similarly output of Q1 is
connected to base of Q2 through R2 when a change from one stage to other occur simultaneously.
PROCEDURE:
2. Note down the voltages at VC1 and VC2.
3. Draw the waveform for various values.
RESULT:
Thus the bistable multivibrator is designed and the performance is verified.
74
75
SIMULATION USING PSPICE
(Using Transistor)
76
CIRCUIT DIAGRAM:
TUNED COLLECTOR OSCILLATORS:
MODEL GRAPH:
77
Ex. No: 13
TUNED COLLECTOR OSCILLATORS
Date:
AIM:
To simulate a tuned collector oscillation circuit using PSPICE
APPARATUS REQUIRED:
1. PC
2. PSPICE software
THEORY:
Tuned collector oscillator is a type of transistor LC oscillator where the tuned circuit
(tank) consists of a transformer and a capacitor is connected in the collector circuit of the
transistor. Tuned collector oscillator is of course the simplest and the basic type of LC
oscillators. The tuned circuit connected at the collector circuit behaves like a purely resistive
load at resonance and determines the oscillator frequency. The common applications of tuned
collector oscillator are RF oscillator circuits, mixers, frequency demodulators, signal generators
etc.
PROCEDURE:
1. Click on the start menu and select the Pspice simulation software
2. Select the parts required for the circuit from the parts menu
and place them in the workspace
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding

output waveforms
RESULT:
Thus, the tuned collector oscillator circuit is simulated using Pspice.
78
CIRCUIT DIAGRAM(Twin-T Oscillator)
MODEL GRAPH:
79
Ex. No: 14
TWIN-T OSCILLATOR
Date:
AIM:
To simulate a twin-T oscillation circuit using PSPICE
APPARATUS REQUIRED:
1. PC
2. PSPICE software
THEORY:
"Twin-T" oscillator uses two "T" RC circuits operated in parallel. One circuit is an R-C-R
"T" which acts as a low-pass filter. The second circuit is a C-R-C "T" which operates as a high-
pass filter. Together, these circuits form a bridge which is tuned at the desired frequency of
oscillation. The signal in the C-R-C branch of the Twin-T filter is advanced, in the R-C-R -
delayed, so they may cancel one another for frequency f=12πRC if x=2; if it is connected as a
negative feedback to an amplifier, and x>2, the amplifier becomes an oscillator.
PROCEDURE:

output waveforms
RESULT:
Thus, the twin-T oscillator circuit is simulated using Pspice.
80
CIRCUIT DIAGRAM:
(a) Double Tuned Amplifiers
(b) Stager Tuned Amplifiers
MODEL GRAPH:
81
Ex. No: 15
DOUBLE AND STAGGER TUNED AMPLIFIERS
Date:
AIM:
To simulate a double and stager tuned amplifiers circuit using PSPICE
APPARATUS REQUIRED:
1. PC
2. PSPICE software
THEORY:
Stagger Tuned Amplifiers are used to improve the overall frequency response of tuned
Amplifiers. Stagger tuned Amplifiers are usually designed so that the overall response exhibits
maximal flatness around the center frequency. It needs a number of tuned circuits operating in
union. The overall frequency response of a Stagger tuned amplifier is obtained by adding the
individual response together. Since the resonant Frequencies of different tuned circuits are
displaced or staggered, they are referred as stagger tuned amplifier.
PROCEDURE:
output waveforms
RESULT:
Thus, the double and stager tuned amplifier circuit is simulated using Pspice.
82
CIRCUIT DIAGRAM(Bi-Stable Multivibrator)
MODEL GRAPH:
83
Ex. No: 16
BI-STABLE MULTIVIBRATOR
Date:
AIM:
To simulate an Bi-stable multivibrator using PSPICE
APPARATUS REQUIRED:
1. PC
2. PSPICE software
THEORY:
Bi- stable multivibrator contains two stable states and no quasi states. It requires two
clock or trigger pulses to change the states. It is also called as flip flop, scale of two toggle
circuit, trigger circuit.
PROCEDURE:
2. Select the parts required for the circuit from the parts menu and
place them in the workspace
5. Simulate the circuit and observe the corresponding output waveforms
APPLICATIONS:
 It is used in digital operations like counting, storing data’s in flip-flops

and production of square waveforms.
RESULT:
Thus, the Bi-stable multivibrator circuit is simulated using PSpice.
84
CIRCUIT DIAGRAM(Schmitt Trigger Circuit)
MODEL GRAPH:
85
Ex. No: 17 SCHMITT TRIGGER CIRCUIT WITH PREDICTABLE
Date: HYSTERESIS
AIM:
To simulate a schmitt trigger circuit with predictable hysteresis using PSPICE
APPARATUS REQUIRED:
1. PC
2. PSPICE software
THEORY:
A Schmitt trigger is a comparator circuit with hysteresis, implemented by applying

positive feedback to the non-inverting input of a comparator or differential amplifier. It is an
active circuit which converts an analog input signal to a digital output signal. The circuit is
named a "trigger" because the output retains its value until the input changes sufficiently to
trigger a change. In the non-inverting configuration, when the input is higher than a certain
chosen threshold, the output is high. When the input is below a different (lower) chosen
threshold, the output is low, and when the input is between the two levels, the output retains its
value. This dual threshold action is called hysteresis and implies that the Schmitt trigger
possesses memory and can act as a bistable circuit (latch or flip-flop). There is a close relation
between the two kinds of circuits: a Schmitt trigger can be converted into a latch and a latch can
be converted into a Schmitt trigger.
Schmitt trigger devices are typically used in signal conditioning applications to remove
noise from signals used in digital circuits, particularly mechanical switch bounce. They are also
used in closed loop negative feedback configurations to implement relaxation oscillators, used
in function generators and switching power supplies.
86
87
PROCEDURE:
2. Select the parts required for the circuit from the parts menu and
place them in the workspace
5. Simulate the circuit and observe the corresponding output waveforms
RESULT:
Thus, the Bi-stable multivibrator circuit is simulated using PSpice.
88
CIRCUIT DIAGRAM(Mono Stable Multivibrator)
MODEL GRAPH:
89
Ex. No: 18
MONO STABLE MULTIVIBRATOR
Date:
AIM:
To simulate an Monostable multivibrator circuit using PSPICE
APPARATUS REQUIRED:
1. PC
2. PSPICE software
THEORY:
Monostable multivibrator is an electronic circuit which has one stable state
and one quasi stable state. It needs external pulse to change their stable state to quasi state and
return back to its stable state after completing the time constant RC. Thus the RC time constant
determines the duration of quasi state. Also called as one-shot, single shot and one swing
multivibrator.
PROCEDURE:
output waveforms
Applications:
 Used as triggering circuit for some circuits like timer circuit, delay
circuits etc.
RESULT:
Thus, the Monostable Multivibrator circuit is simulated using Pspice
90

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Loyola Institute of Technology & Science

Loyola Nager,Thovalai-Rajavoor Road

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

SUBJECT NAME : CIRCUIT DESIGN AND SIMULATION LABORATORY

Loyola INSTITUTE OF TECHNOLOGY AND SCIENCE

Certified that, this is the bonafide record of work done by Mr./Ms.

Staff-in-charge Head of the Department

Internal Examiner External Examiner

EC8461 CIRCUITS DESIGN AND SIMULATION LABORATORY

DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS

1. Series and Shunt feedback amplifiers-Frequency response, Input and output

2. RC Phase shift oscillator and Wien Bridge Oscillator

3. Hartley Oscillator and Colpits Oscillator

4. Single Tuned Amplifier

5. RC Integrator and Differentiator circuits

6. Astable and Monostable Multivibrators

7. Clippers and Clampers

SIMULATION USING SPICE (Using Transistor):

8. Tuned Collector Oscillator

9. Twin -T Oscillator / Wein Bridge Oscillator

10. Double and Stager tuned Amplifiers

11. Bistable Multivibrator

12. Schmitt Trigger circuit with Predictable hysteresis

13. Monostable multivibrator with emitter timing and basetiming

DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS

1 Voltage Shunt Feedback Amplifier 07

13 Tuned Collector Oscillators 78

TABULATION (Without feedback):

S. No APPARATUS RANGE QUANTITY

1.5 kΩ, 2.2 kΩ,10kΩ, 180Ω Each 1

6 Capacitors 47µF, 0.1µF,470 µF 1

(i) Selection of RE and RC:

TABULATION (With feedback):

OUTPUT Gain in dB=

VCC= I1R1 + I2R2 = VR1 +VR2

Select R1= 6.8 KΩ

Select C1 = 47 µF, C2 = 0.1 µF

(iv) Selection of Rf:

Vf = (VoR2) /(Rf +R2)

9. Calculate the gain indB

(a) Without Feedback:

FREQUENCY OUTPUT Gain in dB=

S. No APPARATUS RANGE QUANTITY

(i) Selection ofRE:

VR2= VBE + IERE= 0.7 + 1 x 10-3 x 2.2 x103 = 2.9V

(iv) Selection of C1, C2 and Ce:

XC2 = RL/100 = 150K/100 = 1.5 K

XCe = hie /(1+ hfe) =1000/101 = 9.9009

(v) With feedback:

Select Rf= 100 Ω

Negative feedback in general increases the bandwidth of the transfer function

1. Connect the circuit as per the circuit diagram.

Thus current series feedback amplifier is designed and Bandwidth is calculated

To design a RC phase shift oscillator and to find the frequency of oscillation.

S.No APPARATUS RANGE QUANTITY

2 Resistors 27kΩ,10 kΩ,1 kΩ ,2 kΩ Each 1

7 Connecting wires - few

VCC = ICRc + VCE + IERE

10 = (2 x 10-3 x 2 x 103) + 4 +2 x 10-3RE