Gujarat National Law University

Submission of Project for Internal Continuous Evaluation of

Intellectual Property Rights

Topic - INFRINGEMENT OF LAYOUT DESIGN

Submitted to : Dr. Nidhi Buch, Assistant Professor of Law

Submitted by: Aakriti Singh (16A003)

1
 Table of Contents

Sr. No Title Pg. No.

1 Abstract 4

2 Introduction 5

3 Legal Provisions in India 6

4 Highlights of the Indian Legislation 7

5 Chip Piracy and need for Protection 8

6 Background of the Semiconductor Act, 2000 9

7 Subject Matter of Protection 10-12

8 Protection period 13

9 Infringement of layout-design 14-15

10 Conclusion 16

11 Bibliography 17

List of Cases

2
 Ocular Sciences Ltd v Aspect Vision Care Ltd

List of Abbreviations

Sr. No Abbreviation Meaning

1 u/s Under Section
2 i.e. That is
3 Eg. Example
4 EC European Comission
5 EU European Union
6 WIPO World Intellectual Property
Organisation
7 TRIPS Trade Related Aspects of
Intellectual Property Rights
8 v Versus
9 Ltd. Limited

ABSTRACT

The purpose of this research is to know about the concept of Layout Designs, the laws
applicable for the registration of layout design, the procedure for registration of layout

3
design and the rights and remedies available in case of layout design infringements and
furthermore to study relevant cases in the said matter. The research further aims to
strengthen the belief that only the registered proprietor or a registered user can make
use of the layout design. Emphasis is laid upon the Indian legal system governing the
layout design and its pros and cons have been analyzed in comparison to norms set by
WIPO and TRIPS. The research highlights the important provision of the Semiconductor
Integrated Circuits Layout Design Act, 2000. The research also deals with the issues and
consequences of infringement of layout design.

It has been observed that the steps taken by the government in this field have created
trust between business houses, corporations and the government, thus it can be accepted
that the Indian IT regime has been bolstered by this latest enactment as we are able to
meet with the global standards set for this specialized field. In order to continue growth
in this direction India’s Government will require a tremendous foresight in implementing
the right policies.

INTRODUCTION

4
The Semiconductor Integrated Circuit Layout-Design Act, 2000, Protects original, intrinsically
distinctive layout-designs that were not previously exploited commercially, and registration is a
required prerequisite for security. A layout design is original if it is not merely a copy of
everything or a significant part of another layout design, and is the product of the creative effort
of the designer himself. Registration of a layout-design is available to the registered proprietor
irrespective of whether or not the layout-design is used in an document. The Act provides for a
registry to be headed for the registration of model designs by a registrar. Protection under the Act
lasts for 10 years and begins from the date of registration in Example of layout-designs that were
not used commercially. Of software designs that have been exploited commercially (for less than
two years) before the date of registration filing, security starts retrospectively from the date of
first commercial exploitation. The registered-owner has the exclusive right to reproduce the
registered layout-design or any substantial portion thereof by any means. Except for specific
purposes, the Act enables 'reverse engineering' of a layout-design. The registered owner also has
the exclusive right to manufacture, sell or distribute any semiconductor chip products in which
the registered layout design is applied for commercial purposes is entailed. The Act specifically
allows for criminal recourse to infringe a layout-design, although civil recourses are also
available to implement law compliance. You may grant or distribute a licensed layout-design
with or without the goodwill of the business concerned. To create title to the registered layout-
design, assignment or transmission registration is required. The Act also provides for mutual
agreements between countries within the Convention. This article aims to explore the essence of
the intellectual property involved in the design of models, their usage in integrated
semiconductor circuits and the other related provisions of the Act.

LEGAL PROVISIONS IN INDIA (Regarding Layout Design)

5
The Semiconductor Integrated Circuits Layout Design Act, 2000 (the 'Act') recognizes a new
type of intellectual property, namely, the 'layout-designs' used in integrated semiconductor
circuits as specified in the Act as u / s 2(h).
The worldwide exchange of knowledge will now take place instantly, as it can be processed in
semiconductor so readily and in such quantities Integrated circuits or chips as are widely known
in semiconductors have far-reaching implications for privacy, foreign affairs, national security
and safety. Chips are also referred to as the digital age's crude oil1.
The simplest integrated circuit consists of three layers, one of which consists of material made
from semiconductor. A wafer (i.e. a thin, highly polished silicon crystal disk) of semiconductor
material is covered with a film of silicon oxide (an insulator) and the electronic components
(e.g., transistors) are created through a diffusion process (chemically doping the semiconductor
material with impurities by holes cut by the oxide). Finally, there is an aluminum coating that is
partially added Applied that is partly evaporated using a filter, leaving the interconnections
between components formed in the semiconductor layer behind. Therefore it may be said that the
road to knowledge is lined with silicon.
The mask is transparent except for the opaque patterns on the mask which correspond to the
patterns of the circuit to be engraved into the wafer. Another sheet of silicon, in a complex
circuit, another layer of silicone is mounted on top of the etched wafer, and repeats the same
etching cycle. A chip usually has eight to twelve layers, each with a specific mask that generates
the necessary circuits. Such mask layers, collectively known as 'mask work' or 'layout-design'
manifest the chip's three-dimensional structure. This is the structure of a coin, or three-
dimensional arrangement That calls for defense. In more advanced manufacturing methods, the
actual physical mask may be dispensed with, and the semiconductor material may be subjected
to a guided light beam that essentially traces a mask for each layer of the chip (in raster fashion).
References to 'masks' should be read hereafter as containing the stored information used in
guided light beams and the more conventional photographic type physical ‘mask’.

HIGHLIGHTS OF THE INDIAN LEGISLATION

1
A J W Van de Gevel, ‘From confrontation to competition in the globalized semiconductor industry’ [2000]

6
1. Semi-conductor integrated circuit layout and designs are covered via a registration process. 
2. There's a mechanism to distinguish which model designs can be secured. 
3. There are laws banning registration of model designs that are not original or that have been us
ed commercially.
4. Design designs are provided with 10 year security duration.
5. Provisions are listed about infringement and evidence of validity.
6. In the case of an accidental or unintended violation, provisions exist for deciding the award of
royalty for registered layout designs.
7. Under the Act, fines are levied in the form of imprisonment and fine for deliberate violation
and other offences.
8. The Registrar is named for administration purposes and the appellate Board is formed to
promote the legal purpose.

CHIP PIRACY AND NEED FOR PROTECTION

The layout-designs of integrated circuits are creations of human mind. It takes enormous
investment, both in terms of time and money, to design a new layout-design. But a chip pirate

7
can easily replicate the layout-design of a chip in few months by removing the chips
plastic/ceramic casing and photographing each layer of the translucent silicon material; at a
fraction of the original cost2.
Prior to 2003, the copyright, patent or industrial design legal system did not offer sufficient
protection for model designs. Firstly, the defense of layout-designs requires more rigorous
originality requirements than those provided by the Copyright Act. The Copyright Act is too
general to fit the original layout-design ideas of the scientific development. Even though it may
have been the case that any design sketches and masks used in the manufacturing process would
benefit from the protection of copyright, the status of the finished product was less clear. Just as
copyright in an architectural plan does not prohibit someone from building the house that is
depicted in that plan3, copyright in technical drawings that reflect a chip design does not preclude
Guard itself against unwanted replication. Secondly, the concept must be original and non-
obvious for an article to obtain a patent. For what is essentially the spatial arrangement of widely
known circuit components, this high standard of inventiveness expected by patentable papers is
rarely achieved. While the work involved in the manufacture of chips is more of a developmental
nature than an imaginative move, which may not qualify for a patent 4. Third, integrated circuit
layout-designs are not industrial designs, because they do not decide the exterior appearance of
integrated circuits. They decide the physical location of each part having an electronic role
within the Integrated Circuit. Thus the need for the defense of sui generis was felt.

BACKGROUND OF THE SEMICONDUCTOR ACT, 2000

Semiconductor chip protection was first provided in the US through the Semiconductor Chip
Protection Act (SCPA) in 1984 and its effect was felt practically all over the world. In 1985,
Japan adopted similar legislation, namely, the Japanese Circuit Layout Right Act (JCLRA). An
2
Development of a new chip can take upto $100 million in front-end costs. It can be pirated at a cost of less than
$50,000 – Senate Report No 425, 98th Cong, 2d Session 8 (1984)
3
U/s 59 of The Copyright Act, 1957, though the owner of copyright is entitled to recover damages for infringement,
if the construction of such building or structure, has been commenced, plaintiff cannot obtain an injunction to
restrain its construction or order its demolition, nor will the building or structure be deemed to be the property of the
owner of copyright
4
In the Patents (Amendment) Act, 2005, ‘topography of integrated circuits’ is not an invention under sub-section (o)
of Section 3

8
EC Directive,5 applying legislation in all EU Member States, has strengthened diplomatic efforts
and has contributed to Formulation of the 1989 Integrated Circuit Intellectual Property Treaty
(IPIC Treaty), under the aegis of the WIPO. Later on the IPIC Treaty was part of the TRIPS
Agreement. TRIPS called for majority of the substantive terms of the IPIC Treaty to be adhered
to.6 India adopted as a member of the TRIPS Agreement the Semiconductor Integrated Circuit
Layout-Design Act, 2000, Yet it has yet to take effect. 7 The Ministry of Communication and
Information Technology accounts for the enforcement of the Act. To get cover under the Act, a
layout-design must be registered.
The need for a form of security sui generis emerged primarily as a result of chip piracy which
threatened to undermine the vitality of the semiconductor industry. Computer pirates could sell
similar chips at cheaper prices than the companies that produced them originally did. This
prompted legitimate enterprises engaged in chip research and development to slash prices to
compete with pirated chips, which robbed legitimate enterprises of the funds required to carry
out further research and development to create the next generation chip. Legitimate Under
patent, copyright or trade secret law, companies could not get appropriate chip protection, so a
sui generis style of safeguards were given.

SUBJECT MATTER OF PROTECTION

The Act provides security for the layout-design8 of an integrated semiconductor circuit. The
layout-design itself is covered, so design houses manufacturing layout-designs should have
separate security for such products from their integration into a chip product. In the United
States, on the contrary, a mask function is not liable for protection unless and until set in a
semiconductor chip product. A mask work is ‘fixed’ according to section 90 1 (a) (3) of the
SCPA, in a semiconductor chip Product 'when its representation in the product is sufficiently
5
[1987] O J L24/30
6
Article 35 of TRIPS obliges adherence to Article 2 through 7 [other than Article 6(3) on compulsory licences],
Article 12 and 16(3) of the IPIC
7
Presidential assent has been accorded on the Act on 4th September 2000. For Government notifications and other
information, www.mit.gov.in
8
Sec 2(h), ‘layout-design’ means a layout of transistors and other circuitry elements and includes lead wires
connecting such elements and expressed in any manner in a semiconductor integrated circuit

9
permanent or durable to enable the mask work to be interpreted or replicated from the product
for longer than a transitory time.' Hence, the mask work is usually fixed in a semiconductor chip
product until the first product has been made. Thus, a mask work in a semiconductor chip device
would usually be set until the first sample has been produced.
However, under Article 2(ii) of the IPIC Treaty, 'layout design' has been defined as 'the, but
expressed, three-dimensional arrangement of the elements, at least one of which is an active
element, and of some or all of the interconnections of an integrated circuit, or such Such a three-
dimensional arrangement prepared for an integrated circuit intended for manufacture. "Hence it
is obvious from this, too, that there is no need for the design to be incorporated in physical form
as the words 'or such a three-dimensional arrangement prepared for an integrated circuit intended
for production' are included in the description. The Indian Legislature could have imputed the
same purpose when drafting the Act. The clarification to Section 17 also stipulates that the right
granted by the registration of a layout design shall be made available to the registered proprietor
irrespective of whether or not the layout design is incorporated into a document, also, India being
a member of the TRIPS Agreement obliges adherence to Article 2 through 7 [except Article 6
(3)] of the IPIC Treaty. This suggestion is based on the fact that there are specialized design
houses that plan for a customer the layout-design of an application-specific integrated circuit
(ASIC), the topography being applied in a different semiconductor foundry. Clearly, it is
necessary to protect the layout design at this point, not just after it has been implemented in a
semiconductor chip product.
Safeguard under this Act exists only after the layout-design has been registered. Layout-designs
can be registered, if they are;
(i) original,
(ii) inherently distinctive,
(iii) capable of being distinguished from any other registered layout-design and if they
have not been commercially exploited for more than two years before date of
application for registration.
Thus, the Act requires ‘distinctiveness’ and not ‘novelty’ for the purpose of registration.
A layout-design usually consists of a composition of elements and interconnections that are
widely recognized among layout-design creators and semiconductor-integrated circuit
manufacturers and are therefore considered original only if that combination taken as a whole
is the product of the intellectual efforts of its maker. Thus, the Act has recognized that layout
designs would typically include already existing or licensed design elements in the
semiconductor industry, which is an significant problem for semiconductor layout designs
because they are new compilations of well-known (i.e. commonplace) elements in the vast
majority of cases. The Act calls for 'own creative effort by the author' and also stipulates that
Those designs should not be that among designers and manufacturers of layout designs. This
can be illustrated by the initial mixture of design elements that aren't unique by themselves.
Thus, a new topography can be the product of a mixture of commonplace components, which
were not exactly the same as before. It is also possible that any newly developed interface
design that is not simply a copy of an existing design would have at least some features or
combinations of features that are distinct from features already well-known for
semiconductor products.

10
 In the case of Ocular Sciences Ltd v Aspect Vision Care Ltd. 9 Attempts were made to explain
what is meant by 'common place.' Mr Justice Laddie pointed out in the Patents Court that the
term "common place" was not historically used in UK law (here its sense as it appeared in the
1988 Copyright, Designs and Patents Act was in question), but originated from the E C
Directive on the legal security of topographies of semiconductors. Although not intending to
paraphrase a word used in a statute, Laddie J liked the submission of counsel that any design
that is 'trite, trivial, common-or-garden, hackneyed or of the sort that would not arouse
particular interest in those in the applicable art is likely to be commonplace.' Nevertheless,
and in line with the Directive on semiconductors, he stated that a system consisting of a
number of Those features should not always be ubiquitous themselves. The combination
itself must not be commonplace for safety and that may be so even if the constituent parts are
trivial or routine.10
Given the use of layout design, the need to demonstrate 'intellectual effort' and the fact that
the concepts of assembling the elements of a layout design are relatively well known But the
effort involved will be small. Hence this requirement for originality is stronger than the
originality required under the Copyright Act, but weaker than the want for creativity under
the Patents Act. They are drafted in compliance with paragraph (a) and (b) of Article 3(2) of
the IPIC Treaty.
The second criterion is that it must be uniquely distinctive or distinguishable from any other
registered layout-design. Those terms have different meanings, though the same as appearing in
the Trade Marks Act, 1999. It has to be exclusive to other registered designs by its very nature.
Probable intrinsic distinguishing criteria may be:
• The layout-design feature is unique and distinct from those performed by other layout-designs.
This would make the layout-design distinct in itself, even though some well-known design
elements are present in it.
• The layout-design elements / substances used for the production are novel in the industry, for
example some new alloys.
This provision of innate distinctness can only be seen in the Indian Act, no mention of the same
can be found anywhere in any previous Semiconductor layout-design Act or in the IPIC Treaty
or TRIPS Agreement for that matter.

9
[1997] RPC 289
10
Software Copyright Law, 4th ed, David Bainbridge

11
 PROTECTION PERIOD

Protection under the Act lasts for 10 years, as provided for in Section 38(1) of the TRIPS
Agreement. While the TRIPS Agreement and the IPIC Treaty remain silent on the date of
initiation of enforcement, many of the existing laws on the safety of integrated circuit model
designs, including, inter alia, U.S. legislation (SCPA Section 904(a)), of the Member States of
the European Union (Pursuant to Article 7(1) of the Council Directive of December 1986 of the
then European Communities; see, for example, Section 5(1) of German law and Section 8(1) of
Austrian law) grant some immunity from the date of the first commercial exploitation, anywhere
in the world where that exploitation has taken place Or, if no such misuse has occurred, on the
date on which the layout-design registration application was filed or registered.

12
Under the Indian Act, it starts in the case of model designs that have not been commercially
exploited, from the date of filing for registration. For commercially used layout-designs (For less
than two years, i.e.) before the date of registration, security shall begin retrospectively from the
date of first commercial exploitation. But regardless of the date from which security period is
measured, rights can only be exercised after registration. So, if a chip was published in the
commercial exploitation market in March 2001 and recorded in October 2002, Protection will
begin for a duration of ten years from March 2001, i.e. until March 2011. However, upon
registration, the owner is entitled to seek damages not only for the violation of his rights that
took place after October 2002 but also for the violation that occurred after March 2001.

INFRINGEMENT OF LAYOUT-DESIGN

1. A registered layout-design is said to have been infringed by a person when, he is not the
registered proprietor of the layout-design or a registered user thereof, and does any act of
–
(a) Reproducing a registered layout design, by incorporating it in a semiconductor
integrated circuit or otherwise, and reproduces it entirely or any part of it, with the
exception of the reproduction of such part or parts which is not original within the
meaning of sub section (2) of section 7.

13
 (b) As given under sub section (5), if any person, does any act of selling or importing a
registered layout design or a semiconductor integrated circuit with such layout design
or any article which incorporates such a semiconductor integrated circuit which
contains such registered layout design or otherwise distributes it for commercial
purpose, but such a person is not entitled for its use under the Act.
2. Notwithstanding anything contained in section 17, sub-section (1) or sub-
section (5), when the act of reproduction as defined under clause (a) of sub section (1), is
done for any scientific evaluation, analysis, research or teaching purpose, such use for
such limited purpose does not amount to infringement as defined in clause (a).
3. When any person creates an original layout design on the basis of any scientific research
or analysis, of another registered layout design, and if such design created by him is
original within the meaning of sub section (2) of section 7, then he shall have the right to
incorporate such design created by him in a semiconductor integrated circuit or to
perform any of the acts referred to in sub section (1) of sub section (5), and such
incorporation or act will not be considered as infringement.
4. When any layout design is created as mentioned under sub section (3) given above, then
the use of such layout design by the creator shall be regarded as infringement within the
meaning of sub section (1) after the date of registration of such layout design under this
Act.
5. Where any person does not have the knowledge, or has no reasonable ground to know
that the layout design that he is using is already registered, then it shall not be regarded as
infringement within the meaning of clause (b) of sub section 1, but after receiving the
notice of such knowledge, he may continue such use only upon the payment of a certain
sum by way of royalty, to the registered proprietor of such registered layout design and
such sum is to be determined upon negotiation between the registered proprietor and that
person, or by the Appellate Board after considering the amount of benefit made by that
person by the use of such registered layout design in any way.
6. When any person purchases a semiconductor integrated circuit with the registered layout
design inside it or any article which has such semiconductor integrated circuit referred to
in sub section (5), from a person who has been referred to in the same sub section, then
such other person shall not be accused of infringement, he shall be granted the immunity
from infringement of that semiconductor integrated circuit, to the extent and in the
manner as if the word ‘‘person’’ referred in that sub-section includes the word any other
person referred in this subsection.
7. When a person performs some act on a registered layout design, with the written consent
of the registered proprietor of such registered design, or if he works under the control of
the person who has obtained such consent, for such registered design which has been put
in the market with the consent of its registered proprietor, then, it shall not be regarded as
infringement within the meaning of clause (b) of sub section 1.
8. If any person creates a new layout design by the application of his own intellect, but if it
comes out to be identical to the design of an already registered layout design, then the act
of the person in respect of the layout design which he has created shall not be regarded as
infringement within the meaning of this Act.
Penalty For Infringement Of Layout-Design (Sec 56)

14
Any person knowingly and deliberately violating any of the provisions of section 18 shall be
punished with imprisonment for a period of up to three years, or with a fine not being less than
fifty thousand rupees but which may extend to ten lakhs rupees or both.

CONCLUSION

This enactment meets the responsibilities of India under the TRIPS Agreement, as it complies
with the TRIPS requirements. This move by the Government to protect integrated circuits will
create trust in the industry and the international investment ecosystem. The Act fits well with
overseas legislation in all important respects and often goes further, for example, with the
provision of innate detectivities' and criminal proceedings for the breach. Before this enactment,
the IP regime in India did not completely meet the standards of this specialized field which left a
chip developer with insufficient security for his work. The identification of sui generis layout
designs would help both the industry and consumers of chip products by adding and
attracting more stakeholders In the chip industry and keeping a competitive
environment between them, leading to more competitive pricing. India itself is steadily growing
as a significant player in the international semiconductor industry with a multibillion dollar
valuation. Indian manufacturers say to be doing significant project work in the field of chip
design today and have their goals set to make India the centre of the World. Since India is a
developing nation, the government needs tremendous foresight and preparation to implement

15
right policies. TRIPS needs a high degree of IP security to promote such creative behavior,
which will ensure a safe legal climate.

BIBLIOGRAPHY

BOOKS:-
 Alka Chawla, Law of Copyright: Comparative Perspective, 5th edition, Lexis Nexis, 2015.
 Dr. Subhash Chandra Roy, Lectures on Intellectual Property Law, published by
Chanakya National Law University, Patna.
 Rama Sarma, Commentary on Intellectual Property Laws, Volume II, 2009.
 Ahuja K.V., Intellectual Property Rights in India, 2015.
 Bhandari M.K., Laws Relating to Intellectual Property Rights, 4th edition, 2003.

16
WEBSITES:-
 Semiconductor Integrated Circuits Layout-Design Act, 2000
 https://blog.ipleaders.in/semiconductor-integrated-circuit-layout-design-act-2000/
 http://sicldr.gov.in/Resources/SICLD-Act-English.pdf
 https://www.lawctopus.com/academike/rights-semiconductor-act-2000/
 http://docs.manupatra.in/newsline/articles/upload/eadbc6cd-281a-4624-880f-
8ab66e262126.pdf
 http://corporatelawreporter.com/2016/11/21/semiconductor-integrated-circuit-layout-
design-an-intellectual-property-protection-in-indian-regime/
 https://learn.sparkfun.com/integrated-circuits
 https://www.electrical4u.com/integrated-circuits-types-of-ic/

17