Service Manual: English
Service Manual: English
Service Manual: English
SERVICE MANUAL
CD MECHANISM BASIC CD MECHANISM : KSM-880CAB
TYPE
Z8RMDJM
TA
DA
Solder
2
How to Adjust the Rotating Phase of the
Gear, Main Cam
1) Push down the hooking catch of the CHAS. MECH, and
remove the TRAY.
2) Align the arrow mark of the Gear, Main Cam with the black
round mark of the CHAS, MECHA as shown below.
3) Confirm that the Slide, Mech Cam is located in the right
position, then insert the TRAY gently.
3
ELECTRICAL MAIN PARTS LIST
REF. NO PART NO. KANRI DESCRIPTION REF. NO PART NO. KANRI DESCRIPTION
NO. NO.
IC C111 87-010-312-080 C-CAP,S 15P-50 CH
C112 87-010-154-080 CAP CHIP 10P
87-A20-446-010 C-IC,LA9241ML C113 87-010-178-080 CHIP CAP 1000P
87-A21-319-010 C-IC,LC78622NE C115 87-010-404-080 CAP, ELECT 4.7-50V
87-A20-445-010 IC,BA5936 C116 87-010-196-080 CHIP CAPACITOR,0.1-25
4
REF. NO PART NO. KANRI DESCRIPTION REF. NO PART NO. KANRI DESCRIPTION
NO. NO.
MOTOR C.B
• Regarding connectors, they are not stocked as they are not the initial order items.
The connectors are available after they are supplied from connector manufacturers upon the order is received.
TRANSISTOR ILLUSTRATION
C D
B G
E ECB S
2SA1235F KTA1266GR 2SK2158
2SC3052F
DTC124XK
DTC144TK
5
WAVE FORM
1 IC11 Pin = (RFSH) VOLT/DIV: 0.5V 4 IC11 Pin ≥ (SPD) VOLT/DIV: 100mV
TIME/DIV: 1µS TIME/DIV: 1mS
MAX
2.0±0.1 Vp-p
VREF
0V
EYE PATTERN
must be CLEAR and MAX
VREF
VREF
VREF
IC BLOCK DIAGRAM
IC, BA5936S
6
BLOCK DIAGRAM
7 8
WIRING
1 2 3 4 5 6 7 8 9 10 11 12 13 14
K
9 10
SCHEMATIC DIAGRAM
11 12
TEST MODE IC DESCRIPTION
1. How to Activate CD Test Mode 2. How to Cancel CD Test Mode IC, LC78622NE
Insert the AC plug while pressing the function CD button. Either one of the following operations will cancel the CD test
All FL display tubes will light up, and the test mode will be mode. Pin No. Pin Name I/O Description
activated. • Press the function button. • Press the power switch button.
1 DEFI I Defect sense signal (DEF) input pin. (Connect to 0V when not used).
(except CD function button) • Disconnect the AC plug
2 TAI I Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
3. CD Test Mode Functions
3 PDO O Phase comparator output pin to control external VCO.
When test mode is activated, the following mode functions from No.1 to No.5 can be used by pressing the operation keys.
4 VVSS — GND pin for built-in VCO. Be sure to connect to 0V.
Mode/No. Operation FL display Operation Contents For PLL.
5 ISET I Pin to which external resistor adjusting the PD0 output current.
Start mode Activation All lamps light • Test mode is activated. • FL display check (All displays light.)
No.1 • CD block power is ON. 6 VVDD — Power supply pin for built-in VCO.
Search mode 9 key • Laser diode turns always ON. • APC circuit check 7 FR I Pin for VCO frequency range adjustment.
• Continual focus search • Laser current measurement
(The pickup lens repeats the full- (Laser current control. Across a 8 VSS — Digital system GND. Be sure to connect to 0V.
swing up-down motion.) resistor connected between emitter
and GND.) 9 EFMO O EFM signal output pin.
* Avoid continual searches that last for For slice level control.
more than 10 minutes. FOCUS SERVO 10 EFMIN I EFM signal input pin.
• Check focus search waveform
• Check focus error waveform 11 TEST2 I Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
(FOK/FZC are not monitored in the
12, 13 CLV+, CLV– O Disc motor control output. Three level output is possible using command.
No.2 * NOTE 1 search mode)
Play mode 1 2 key • Normal playback FOCUS SERVO/TRACKING SERVO ___ Rough servo or phase control automatic selection monitoring output pin. Rough servo
14 V/P O
• Focus search is continued if TOC CLV SERVO/SLED SERVO at H. Phase servo at L.
No.3 cannot be read. * NOTE 1 Check DRF
15 HFL I Track detect signal input pin. Schmidt input.
Traverse mode ; key • During normal disc playback TRACKING SERVO ON/OFF
Press once; tracking servo OFF Tracking balance (traverse) check 16 TES I Tracking error signal input pin. Schmidt input.
Press twice; tracking servo ON 17 TOFF O Tracking OFF output pin.
No.4 * NOTE 2
18 TGL O Tracking gain selection output pin. Gain boost at L.
Sled mode fi key All lamps light • Pickup moves to the outermost track SLED SERVO
fl • Pickup moves to the innermost track Check SLED mechanism operation 19, 20 JP+, JP– O Track jump control signal output pin. Three level output is possible using command.
* NOTE 3 21 PCK O EFM data playback clock monitoring pin 4.3218 MHz when phase is locked in.
(During playback, machine operates Sync signal detection output pin. H when the sync signal which is detected from EFM
No.5 normally.) 22 FSEQ O
signal and thesync signal which is internally generated agree.
* NOTE 1: There are cases when the tracking servo cannot be locked owing to the protection circuit being operated when heat builds up 23 VDD — Digital system power supply pin.
in the driver IC if the focus search is operated continually for more than 10 minutes. In these cases the power supply should be
24 SLD+ I/O The pin is controlled by the serial data
switched off for 10 minutes until heat has been reduced and then re-started.
* NOTE 2: Do not press the fi or fl keys when the machine is in the ; status is active. If they are pressed, playback will not be possible 25 SLD- I/O command from microprocessor. When
after the ; status has been canceled. If the fi or fl keys are pressed in the ; status, press the 9 key and return to the start mode the pin is not used, set the pin to the input
26 PUSW I/O General purpose input/output pin 1 to 5.
(No.1). terminal and connect to 0V, or alternately
* NOTE 3: When pressing the fi or fl keys, take care to avoid damage to the gears. Because the sled motor is activated when the fi or fl 27 DRF I/O set the pin to output terminal and leave
keys are pressed, even when the pick-up is at the outermost or innermost track.
28 LENSDW I/O the pin open.
4. Operation Outline 29 EMPH O De-emphasis monitor output pin. De-emphasis disc is being played back at H.
The operation of each mode is carried out in the direction of the arrows from the start mode as indicated in the following illustration.
30 C2F O C2 flag output pin.
31 DOUT O DIGITAL OUT output pin. (EIAJ format).
No. 2 No. 3
32, 33 TEST3, TEST4 I Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Search mode 1 2 Play mode
34 N.C. — Not used. Set the pin to open.
9
35 MUTEL O L-channel mute output pin.
9 1 2
No. 1 36 LVDD — L-channel power supply pin.
Start mode L-channel 1-bit DAC.
2 9
(All FLs light up.) ; 37 LCHO O L-channel output pin.
38 LVSS — L-channel GND. Be sure to connect to 0V.
fi
fl ;
39 RVSS — R-channel GND. Be sure to connect to 0V.
No. 5 9 No. 4
40 RCHO O R-channel output pin.
Sled mode ; Traverse mode
41 RVDD —
R-channel 1-bit DAC.
R-channel power supply pin.
42 MUTER O R-channel mute output pin.
If the DISC DIRECT PLAY button is pressed, the machine performs the same operation as the PLAY button is pressed as shown. If
the tray is opened by pressing OPEN/CLOSE button during Play mode or Traverse mode, the machine returns to the Start mode.
13 14
Pin No. Pin Name I/O Description
43 XVDD — Crystal oscillator power supply pin.
44 XOUT O
Pin to which external 16.9344 MHz crystal oscillator is connected.
45 XIN I
46 XVSS — Crystal oscillator GND pin. Be sure to connect to 0V.
47 SBSY O Subcode block sync signal output pin.
48 EFLG O C1, C2, single and dual correction monitoring pin.
49 PW O Subcode P, Q, R, S, T, U and W output pin.
50 SFSY O Subcode frame sync signal output pin. Falls down when subcode enters standby.
Subcode read clock input pin. Schmidt input. (Be sure to connected to 0V when not
51 SBCK I
in use.)
Pin outputting the 7.35 kHz sync signal which is generated by dividing frequency of
52 FSX O
crystal oscillator.
53 WRQ O Subcode Q output standby output pin.
54 RWC I Read/write control input pin. Schmidt input.
55 SQOUT O Subcode Q output pin.
56 COIN I Command input pin from microprocessor.
___________
57 CQCK I Command input read clock or subcode read input clock from SQOUT pin
________
58 RES I LC78622 reset input pin. Set this pin to L once when the main power is turned on.
59 TST11 O Test signal output pin. Use this pin as open (normally L output).
60 16M O 16.9344 MHz output pin.
61 4.2M O 4.2336 MHz output pin.
62 TEST5 I Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
______ Chip select signal input pin with built-in pull-down resistor. Be sure to connect to 0V
63 CS I
while it is not controlling.
64 TEST1 I Test signal input pin without built-in pull-down resistor. Be sure to connect to 0V.
Note: The same potential must be applied to the respective power supply terminals. (VDD, VVDD, LVDD, RVDD, XVDD)
15
IC, LA9241ML
Pin No. Pin Name I/O Description
Pin to which external pickup photo diode is connected. RF signal is created by adding
1 FIN2 I
with the FIN1 pin signal. FE signal is created by subtracting from the FIN1 pin signal.
2 FIN1 I Pin to which external pickup photo diode is connected.
Pin to which external pickup photo diode is connected. TE signal is created by
3 E I
subtracting from the F pin signal.
4 F I Pin to which external pickup photo diode is connected.
5 TB I DC component of the TE signal is input.
6 TE– I Pin to which external resistor setting the TE signal gain is connected between the TE pin.
7 TE O TE signal output pin.
TES “Track Error Sense” comparator input pin. TE signal is passed through a band-
8 TESI I
pass filter then input.
9 SCI I Shock detection signal input pin.
10 TH I Tracking gain time constant setting pin.
11 TA O TA amplifier output pin.
Pin to which external tracking phase compensation constants are connected between
12 TD– I
the TD and VR pins.
13 TD I Tracking phase compensation setting pin.
14 JP I Tracking jump signal (kick pulse) amplitude setting pin.
15 TO O Tracking control signal output pin.
16 FD O Focusing control signal output pin.
Pin to which external focusing phase compensation constants are connected between
17 FD– I
the FD and FA pins.
Pin to which external focusing phase compensation constants are connected between
18 FA I
the FD– and FA– pins.
Pin to which external focusing phase compensation constants are connected between
19 FA– I
the FA and FE pins.
20 FE O FE signal output pin.
21 FE– I Pin to which external FE signal gain setting resistor is connected between the FE pin.
22 PGND — Analog signal GND.
23 SP — No connection.
24 SP1 O Single ended output of the CV+ and CV– pin input signal.
25 SPG I Pin to which external spindle gain setting resistor in 12 cm mode is connected.
Pin to which external spindle phase compensation constants are connected together
26 SP– I
with SPD pin.
27 SPD O Spindle control signal output pin.
28 SLEQ I Pin to which external sled phase compensation constants are connected.
29 SLD O Sled control signal output pin.
30, 31 SL–, SL+ I Sled advance signal input pin from microprocessor.
32, 33 JP–, JP+ I Tracking jump signal input pin from DSP.
34 TGL I Tracking gain control signal input from DSP. Low gain when TGL = H.
35 TOFF I Tracking off control signal input pin from DSP. Off when TOFF = H.
16
Pin No. Pin Name I/O Description
36 TES O Pin from which TES signal is output to DSP.
“High Frequency Level” is used to judge whether the main beam position is on top of
37 HFL O
bit or on top of mirror.
38 SLOF I Sled servo off control input pin.
39, 40 CV–, CV+ I CLV error signal input pin from DSP.
41 RFSH O RF output pin.
RF gain setting and EFM signal 3T compensation constant setting pin together with
42 RFS– I
RFSM pin.
“Slice Level Control” is the output pin which controls the RF signal data slice level by
43 SLC O
DSP.
44 SLI I Input pin which control the data slice level by the DSP.
45 DGND — Digital system GND.
46 FSC O Output pin to which external focus search smoothing capacitor is connected.
47 TBC I “Tracking Balance Control” EF balance variable range setting pin.
48 NC — No connection.
49 DEF O Disc defect detector output pin.
50 CLK I Reference clock input pin. 4.23 MHz of the DSP is input.
51 CL I Microprocessor command clock input pin.
52 DAT I Microprocessor command data input pin.
53 CE I Microprocessor command chip enable input pin.
54 DRF O “Detect RF” RF level detector output.
55 NC I No connection.
56 VCC2 — Servo system and digital system Vcc pin.
57 REF1 — Pin to which external bypass capacitor for reference voltage is connected.
58 VR O Reference voltage output pin.
59 LF2 I Disc defect detector time constant setting pin.
60 PH1 I Pin to which external capacitor for RF signal peak holding is connected.
61 BH1 I Pin to which external capacitor for RF signal bottom holding is connected.
62 LDO O APC circuit output pin.
63 LDS I APC circuit input pin.
64 VCC1 — RF system Vcc pin.
17
MECHANICAL EXPLODED VIEW 1/1
28 29
30 A
14 27
26
13
31
25
19
24 20
P.C.B
23
21
12 22
C
11
B a
10
a
CHAS MECHA
9
33
32 LED 901
4
8
18
7
6 P.C.B
17
3 5
4
P.C.B
CUSHION,CD880
1 16
15 15
34
CUSHION,CD880
18
MECHANICAL PARTS LIST 1/1
REF. NO PART NO. KANRI DESCRIPTION REF. NO PART NO. KANRI DESCRIPTION
NO. NO.
1 84-ZG1-225-010 BELT,SQ1.0-63.3 21 83-ZG3-604-010 RING,MAG 2
2 84-ZG1-673-010 F-CABLE,5P 1.25 210MM BLACK N 22 83-ZG3-213-010 LVR,SW
3 87-045-364-010 MOTOR(BCH3B14) 23 84-ZG1-266-010 LEVER,CAN 8
4 84-ZG1-267-010 PULLEY,LOAD MO 8 24 84-ZG1-205-210 GEAR,TRAY (*)
5 84-ZG1-238-010 GEAR,WORM N 25 81-ZG1-291-110 GEAR,TRAY RELAY NO3
19
CD MECHANISM EXPLODED VIEW 1/1
6
7
4 5
A 9
10
11
2
3
P.C.B
1
6 92-647-595-020 SHUTTER B
7 92-647-732-010 NS SLIDE RACK
8 92-647-742-010 SPRING COMPRESSION
9 93-321-813-110 POLI WASHER
10 92-647-407-010 GEAR A
11 92-647-408-020 GEAR B
A 93-713-786-510 SCREW,+P2-3
20
REFERENCE NAME LIST
ELECTRICAL SECTION MECHANICAL SECTION
DESCRIPTION REFERENCE NAME DESCRIPTION REFERENCE NAME
WHL WHEEL
WORM-WHL WORM-WHEEL
21
2–11, IKENOHATA 1–CHOME, TAITO-KU, TOKYO 110-8710, JAPAN TEL:03 (3827) 3111
0251431 Printed in Singapore