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    74HC HCT86

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    Ashish Shrivastava
    The document describes an integrated circuit called the 74HC/HCT86 quad 2-input exclusive-OR gate. It contains 4 exclusive-OR gates that provide the exclusive-OR function. The document provides specifications for parameters like propagation delay, input capacitance, power dissipation, and operating temperature ranges. It also includes pin descriptions, logic diagrams, truth tables and AC/DC characteristic specifications.

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    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd

    74HC HCT86

    Uploaded by

    Ashish Shrivastava
    39 views6 pages
    The document describes an integrated circuit called the 74HC/HCT86 quad 2-input exclusive-OR gate. It contains 4 exclusive-OR gates that provide the exclusive-OR function. The document provides specifications for parameters like propagation delay, input capacitance, power dissipation, and operating temperature ranges. It also includes pin descriptions, logic diagrams, truth tables and AC/DC characteristic specifications.

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    74HC_HCT86

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    The document describes an integrated circuit called the 74HC/HCT86 quad 2-input exclusive-OR gate. It contains 4 exclusive-OR gates that provide the exclusive-OR function. The document provides specifications for parameters like propagation delay, input capacitance, power dissipation, and operating temperature ranges. It also includes pin descriptions, logic diagrams, truth tables and AC/DC characteristic specifications.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    39 views6 pages

    74HC HCT86

    Uploaded by

    Ashish Shrivastava
    The document describes an integrated circuit called the 74HC/HCT86 quad 2-input exclusive-OR gate. It contains 4 exclusive-OR gates that provide the exclusive-OR function. The document provides specifications for parameters like propagation delay, input capacitance, power dissipation, and operating temperature ranges. It also includes pin descriptions, logic diagrams, truth tables and AC/DC characteristic specifications.

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    Attribution Non-Commercial (BY-NC)
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    You are on page 1of 6

    INTEGRATED CIRCUITS

    DATA SHEET
    For a complete data sheet, please also download:

    • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications


    • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
    • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

    74HC/HCT86
    Quad 2-input EXCLUSIVE-OR gate
    Product specification December 1990
    File under Integrated Circuits, IC06
    Philips Semiconductors Product specification

    Quad 2-input EXCLUSIVE-OR gate 74HC/HCT86

    FEATURES GENERAL DESCRIPTION


    • Output capability: standard The 74HC/HCT86 are high-speed Si-gate CMOS devices
    • ICC category: SSI and are pin compatible with low power Schottky TTL
    (LSTTL). They are specified in compliance with JEDEC
    standard no. 7A.
    The 74HC/HCT86 provide the EXCLUSIVE−OR function.

    QUICK REFERENCE DATA


    GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

    TYPICAL
    SYMBOL PARAMETER CONDITIONS UNIT
    HC HCT
    tPHL/ tPLH propagation delay nA, nB to nY CL = 15 pF; VCC = 5 V 11 14 ns
    CI input capacitance 3.5 3.5 pF
    CPD power dissipation capacitance per gate notes 1 and 2 30 30 pF

    Notes
    1. CPD is used to determine the dynamic power dissipation (PD in µW):
    PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
    fi = input frequency in MHz
    fo = output frequency in MHz
    ∑ (CL × VCC2 × fo) = sum of outputs
    CL = output load capacitance in pF
    VCC = supply voltage in V
    2. For HC the condition is VI = GND to VCC
    For HCT the condition is VI = GND to VCC − 1.5 V

    ORDERING INFORMATION
    See “74HC/HCT/HCU/HCMOS Logic Package Information”.

    December 1990 2
    Philips Semiconductors Product specification

    Quad 2-input EXCLUSIVE-OR gate 74HC/HCT86

    PIN DESCRIPTION

    PIN NO. SYMBOL NAME AND FUNCTION


    1, 4, 9, 12 1A to 4A data inputs
    2, 5, 10, 13 1B to 4B data inputs
    3, 6, 8, 11 1Y to 4Y data outputs
    7 GND ground (0 V)
    14 VCC positive supply voltage

    Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

    December 1990 3
    Philips Semiconductors Product specification

    Quad 2-input EXCLUSIVE-OR gate 74HC/HCT86

    Fig.4 Functional diagram. Fig.5 Logic diagram (one gate).

    FUNCTION TABLE

    INPUTS OUTPUTS
    nA nB nY
    L L L
    L H H
    H L H
    H H L

    Notes
    1. H = HIGH voltage level
    L = LOW voltage level

    December 1990 4
    Philips Semiconductors Product specification

    Quad 2-input EXCLUSIVE-OR gate 74HC/HCT86

    DC CHARACTERISTICS FOR 74HC


    For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
    Output capability: standard
    ICC category: SSI

    AC CHARACTERISTICS FOR 74HC


    GND = 0 V; tr = tf = 6 ns; CL = 50 pF

    Tamb (°C) TEST CONDITIONS


    74HC
    SYMBOL PARAMETER UNIT VCC
    +25 −40 to +85 −40 to +125 WAVEFORMS
    (V)
    min. typ. max. min. max. min. max.
    tPHL/ tPLH propagation delay 39 120 150 180 ns 2.0 Fig.6
    nA, nB to nY 14 24 30 36 4.5
    11 20 26 31 6.0
    tTHL/ tTLH output transition time 19 75 95 110 ns 2.0 Fig.6
    7 15 19 22 4.5
    6 13 16 19 6.0

    DC CHARACTERISTICS FOR 74HCT


    For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
    Output capability: standard
    ICC category: SSI

    Notes to HCT types


    The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
    To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

    INPUT UNIT LOAD COEFFICIENT


    nA, nB 1.0

    AC CHARACTERISTICS FOR 74HCT


    GND = 0 V; tr = tf = 6 ns; CL = 50 pF

    Tamb (°C) TEST CONDITIONS


    74HCT
    SYMBOL PARAMETER UNIT VCC
    +25 −40 to +85 −40 to +125 WAVEFORMS
    (V)
    min. typ. max. min. max. min. max.
    tPHL/ tPLH propagation delay 17 32 40 48 ns 4.5 Fig.6
    nA, nB to nY
    tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 Fig.6

    December 1990 5
    Philips Semiconductors Product specification

    Quad 2-input EXCLUSIVE-OR gate 74HC/HCT86

    AC WAVEFORMS

    (1) HC : VM = 50%; VI = GND to VCC.


    HCT: VM = 1.3 V; VI = GND to 3 V.

    Fig.6 Waveforms showing the input (nA, nB) to output (nY) propagation delays and the output transition times.

    PACKAGE OUTLINES
    See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.

    December 1990 6

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