BPI, APC

Project : MT6795 eMMC MSDC0 / eMMC RXD ANT

REF_SCH TOP LEVEL RF IQ

RXD
RxD FEM
micro SD MSDC 4-bit
MSDC1 BSI ctrl

MT6169
+ hot-plug
RX

GPIOs
MSDC2 ABB (LWG+LTG) Main 1 ANT

TX FEM
26M_BB
Side key VTCXO
Keypad CLK Ctrl 26M
JTAG
26M_AUD
Debug JTAG / 26M_NFC
UART
port UART0 & 3

+-LED
KTD3116 LCD LCD IF LCD
BackLight Driver module (MIPI DSI)

KTD2151 +-5V
Camera IF
Bias Driver Camera
I2C Camera I2C_0
Modules I2C
(MIPI CSI) 4-Phase buck
I2C
VDVFS1 MT6312 I2C-1

4-Phase buck i2C_1

Indicator
LED
MT6331
32K_BB
TP INTERFACE I2C
I2C_2 Flash LED

MEMs & ALS/PS

&Gyo&MAG
I2C I2C_3 MT6795 LDOs

VGPU/
LDOs RTC

Vibrator
32K

VIB

(POP)
VCORE1-2/
FIGURE PRINT Module SPI Headset
VIO18
Bucks (HPL, HPR, AU_VIN1)
SIM1 AU_VIN0
SIM1(Mirco) SIM1
AUD I/F AU_VIN2
Audio I/F Audio Compatible design
SIM2 Speech Receiver
SIM2(Mirco) SIM2
SPI
PWRAP I/F SPDT
IR-LED
VSYS
PWM
GPIO I2S0
SPI Audio PA
Connectivity ANT

SD/PCM IF
MSDC3/PCM
BC 1.1 BC1.1
MT6332
MT6630 CONN ctrl
VDVFS2/
VDRAM
Buck Buck VPA /
VRF18
TCXO GPIO / UARTs

VSYS
I2S3 VSYS
Charger /
DPI PP Battery
USB

USB 2.0 micro USB

USB 2.0
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

C C
U1001-E

MT6795-MWFPOP-852P
VCCK DVFS1
[6] VCORE1_PMU VCORE1_PMU J18 DVDD_CORE1 DVDD_DVFS1 U8 DVDD_DVFS1
DVDD_DVFS1 [2,9]
J19 DVDD_CORE1 DVDD_DVFS1 U9
J20 DVDD_CORE1 DVDD_DVFS1 U10
J21 U11 C1001 47uF
DVDD_CORE1 DVDD_DVFS1 C1002
J22 DVDD_CORE1 DVDD_DVFS1 U12 47uF
K18 U13 C1003 47uF
DVDD_CORE1 DVDD_DVFS1
K26 V10 C1026 47uF
C1004 DVDD_CORE1 DVDD_DVFS1
22uF K27 V11
22uF DVDD_CORE1 DVDD_DVFS1 C1006
C1005 L18 V12 22uF
22uF DVDD_CORE1 DVDD_DVFS1
C1007 L27 DVDD_CORE1 DVDD_DVFS1 V13
M18 W9

22uF
DVDD_CORE1 DVDD_DVFS1

C1027
M27 W10 C1028 2.2uF
DVDD_CORE1 DVDD_DVFS1 C1009
N27 W11 2.2uF
DVDD_CORE1 DVDD_DVFS1
P27 DVDD_CORE1 DVDD_DVFS1 W12
C1010 2.2uF R27 W13
C1011 DVDD_CORE1 DVDD_DVFS1
2.2uF T10 W14
C1012 DVDD_CORE1 DVDD_DVFS1 [9]
2.2uF T11 Y10 DVDD_DVFS_1_PMIC_FB
T22
DVDD_CORE1 DVDD_DVFS1
Y13
Note: 10-2
DVDD_CORE1 DVDD_DVFS1 DVDD_DVFS1_GND [9]
T23 DVDD_CORE1 DVDD_DVFS1 Y14
C1013

100nF

T24 DVDD_CORE1 DVDD_DVFS1 AA9

C1014

100nF

T27 DVDD_CORE1 DVDD_DVFS1 AA10

C1015

C1016
NC SH1002 NC
100nF

100nF
U22 DVDD_CORE1 DVDD_DVFS1 AA13 SH1001
0201 0201
C1017

C1018
100nF

100nF
U23 DVDD_CORE1 DVDD_DVFS1 AA17
C1019

C1020
100nF

100nF
U24 DVDD_CORE1 DVDD_DVFS1 AA19
C1021

C1022
100nF

100nF
V23 DVDD_CORE1 DVDD_DVFS1 AB10
C1030

C1031
100nF

100nF
V24 DVDD_CORE1 DVDD_DVFS1 AB11
C1023

C1032
100nF

100nF
W23 DVDD_CORE1 DVDD_DVFS1 AB13
C1024

C1033
100nF

100nF
W24 DVDD_CORE1 DVDD_DVFS1 AB14
C1025

C1034
100nF

100nF
Y23 DVDD_CORE1 DVDD_DVFS1 AB17

C1035

100nF
Y24 DVDD_CORE1 DVDD_DVFS1 AB18

C1036

100nF
Y25 DVDD_CORE1 DVDD_DVFS1 AB19

C1038

100nF
Y26 DVDD_CORE1 DVDD_DVFS1 AB20

C1040

100nF
AA23 DVDD_CORE1 DVDD_DVFS1 AB21

C1042

100nF
AA24 DVDD_CORE1 DVDD_DVFS1 AC9

C1044

100nF
AB23 DVDD_CORE1 DVDD_DVFS1 AC10

C1046

100nF
AB24 DVDD_CORE1 DVDD_DVFS1 AC11

C1048

100nF
AB25 DVDD_CORE1 DVDD_DVFS1 AC12

C1050

100nF
AB26 DVDD_CORE1 DVDD_DVFS1 AC13

C1052

100nF
AC23 DVDD_CORE1 DVDD_DVFS1 AC14

C1054

100nF
AC24 DVDD_CORE1 DVDD_DVFS1 AC17

C1056

100nF
AD23 DVDD_CORE1 DVDD_DVFS1 AC19
AD24 DVDD_CORE1 DVDD_DVFS1 AC20
AD25 DVDD_CORE1 DVDD_DVFS1 AC21
AD26 DVDD_CORE1 DVDD_DVFS1 AD11
AD27 DVDD_CORE1 DVDD_DVFS1 AD12
AE8 DVDD_CORE1 DVDD_DVFS1 AD15
AE9 AD16 GND
DVDD_CORE1 DVDD_DVFS1
AE10 DVDD_CORE1 DVDD_DVFS1 AD17 DVDD_DVFS1
AE11 DVDD_CORE1 DVDD_DVFS1 AD19
AE22 DVDD_CORE1 DVDD_DVFS1 AD20 DVDD_DVFS1 [2,9]
AE23 DVDD_CORE1
AE24 DVDD_CORE1 DVDD_MD [7]
AF11 DVDD_CORE1
AF12 DVDD_CORE1
AF13 DVDD_CORE1 DVDD_MD_PMIC_FB [7]
AF14 DVDD_CORE1 Note: 10-3
GND AF15 [7]
DVDD_CORE1 DVDD_MD_GND
AF16 DVDD_CORE1 MD
AF17 DVDD_CORE1
AF18 DVDD_CORE1 DVDD_MD K21
AF19 K22 SH1003 NC SH1004 NC
DVDD_CORE1 DVDD_MD 0201 0201
AF20 DVDD_CORE1 DVDD_MD L22
AF21 DVDD_CORE1 DVDD_MD L23
AF22 DVDD_CORE1 DVDD_MD M21
AF23 M22 C1065 22uF
Note: 10-1 AF24
DVDD_CORE1 DVDD_MD
M23 C1066 10uF
DVDD_CORE1 DVDD_MD
AF25 DVDD_CORE1 DVDD_MD N22
AG11 DVDD_CORE1 DVDD_MD N23
SH1005
C1069

NC
100nF

[6] VCORE1_PMU_FB 0201 AG13 DVDD_CORE1 DVDD_MD N24

C1070

100nF

AG15 DVDD_CORE1 DVDD_MD N25

C1071

100nF

AG18 DVDD_CORE1 DVDD_MD P21

C1072

100nF

AG25 DVDD_CORE1 DVDD_MD P22

AH11 DVDD_CORE1 DVDD_MD P23
AH13 DVDD_CORE1 DVDD_MD R22
AH15 DVDD_CORE1 DVDD_MD R23
AH18 R24
B B
DVDD_CORE1 DVDD_MD
AH25 DVDD_CORE1 DVDD_MD R25
GND

[3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU NC
R1001 DVDD_DVFS1
0402

VDD1 SRAM 0R
C1079 C1074

DVDD_SRAM1 R1002 VSRAM_VDVFS2_PMU [7]

0402
C1080 C1076

C1075 4.7uF
C1081 C1078

100nF 100nF

B32 VDD1 DVDD_SRAM1 Y15

C1077 4.7uF
100nF

C2 VDD1 DVDD_SRAM1 AA15

100nF

C3 VDD1 DVDD_SRAM1 AB15

M34 VDD1
AH34 VDD1
AM3 VDD1 DVDD_SRAM1 AE19
AP12 VDD1 DVDD_SRAM1 AE20
GND AP28 VDD1

[4,7] VDRAM_PMU VGPU_PMU [6]

VDDQ GPU GND

A7 VDDQ DVDD_GPU J8
VDRAM_PMIC_FB A10 VDDQ DVDD_GPU J9
[7] A13 J10
A16
VDDQ DVDD_GPU
J11
Note: 10-5
[7] DVDD_DRAM_GND Note: 10-4 A19
VDDQ DVDD_GPU
J13
VDDQ DVDD_GPU DVDD_GPU_PMIC_FB [6]
A23 VDDQ DVDD_GPU J15
A26 VDDQ DVDD_GPU K11 DVDD_GPU_GND [6]
SH1006 NC SH1007 NC A32 K13
0201 0201 VDDQ DVDD_GPU
B3 VDDQ DVDD_GPU K15
C1082

C1 VDDQ DVDD_GPU L8
NC
C1084

C34 L9 SH1008 SH1009 NC

VDDQ DVDD_GPU C1083 0201 0201
C1086

J1 L10 22uF
VDDQ DVDD_GPU
C1088

K34 L11 C1085 22uF

VDDQ DVDD_GPU 22uF
C1093 C1089

M1 L12 C1087
VDDQ DVDD_GPU
C1090

P34 VDDQ DVDD_GPU L13

T1 VDDQ DVDD_GPU L14
C1091 2.2uF
100nF

Y34 VDDQ DVDD_GPU L15

C1092
C1094

2.2uF
100nF

AB1 VDDQ DVDD_GPU L16

C1095

C1096
100nF

100nF

AF34 VDDQ DVDD_GPU M11

C1097

C1098
100nF

100nF

AH1 VDDQ DVDD_GPU M12

C1099

C1150
100nF

100nF

AJ34 VDDQ DVDD_GPU M13

C1151

C1152
100nF

100nF

AL1 VDDQ DVDD_GPU M14

C1153

C1154
100nF

100nF

AP3 M15
VDDQ DVDD_GPU
Schematic design notice of "10_BB_POWER_1" page.
C1155

C1156
100nF

100nF

AP6 VDDQ DVDD_GPU M16

C1157

100nF

AP11 VDDQ DVDD_GPU N11

C1158

100nF

AP14 VDDQ DVDD_GPU N12

C1159

100nF

AP17 VDDQ
Note 10-1: VCORE_1 remote sense must be close to
C1160

100nF

AP20 VDDQ
AP24 GND
AP27
VDDQ
VDDQ MT6795¡¦s AG13 ball.
Remote sense trace with GNDshielding to PMIC
GND (Differential)
MT6795W/M

Note 10-2: Differential pair of DVFS1 remote sense must be

close to MT6795¡¦s Y10 ball.

Note 10-3: Differential pair of DVDD_MD remote sense must be

close to MT6795¡¦s K22 ball.

A Note 10-4: VDRAM remote sense must be close to A

MT6795¡¦s A32 ball.

Note 10-5: Differential pair of GPU remote sense

must be close to MT6795¡¦s J8 ball.

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 2OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U1001-G U1001-F

MT6795-MWFPOP-852P MT6795-MWFPOP-852P
6mil [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
GND GND [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU PERI_D AVDD & MD_A
A14 DVSS DVSS V8 D32 VCC28IO_BPI AVDD18_PLLGP U32 6mil VIO18_PMU
A28 DVSS DVSS V9
A31 DVSS DVSS V14 G1 VCC28_EMD
B2 DVSS DVSS V17
B10 DVSS DVSS V18 AVDD18_MD R31 6mil
B33 DVSS DVSS V19 AVDD18_MD R32
C7 DVSS DVSS V20 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 6mil F32 VCC18IO_BPI
C12 V21 C1101 C1102
DVSS DVSS
C C17
C20
D11
DVSS
DVSS
DVSS
DVSS
V22
V25
V26
AM33

N32
VCC18IO_MD1
AVDD18_AP V32
100nF 2.2uF
Note: 11-1 C
DVSS DVSS VCC18IO_BPI_1 [6,10]
D25 DVSS DVSS V27 R33, W31,W32PIN connect to C1101 GND first, Then Connect to MAIN GND
E15 DVSS DVSS W17 AM34 VCC18IO_BPI_2
E30 W18 Y33 GND 6mil GND VTCXO_0_PMU
DVSS DVSS AVDD28_DAC
F26 DVSS DVSS W19
G3 DVSS DVSS W20
G32 W21 C1103
DVSS DVSS
H6 DVSS DVSS W22 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 6mil AC7 VCC18IO_1
J12 DVSS DVSS W25
J14 DVSS DVSS W26 100nF
J16 DVSS DVSS W27 K1 VCC18IO AVSS18_PLLGP P33
J17 DVSS DVSS Y3 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 6mil N6 VCC18IO AVSS18_MD R33
J23 Y9 W31 GND
DVSS DVSS AVSS18_MD
J34 DVSS DVSS Y11 H3 VCC18IO_EINT AVSS18_MD W32
K8 Y12 C1104
DVSS DVSS
K9 DVSS DVSS Y16
K10 DVSS DVSS Y17 F13 VCC18IO_CONN
K12 DVSS DVSS Y18 100nF
K14 DVSS DVSS Y19
K16 DVSS DVSS Y20
K17 Y21 GND
DVSS DVSS [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
K19 DVSS DVSS Y22 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 12mil W5 VCC18IO_MC0 PLL
K20 DVSS DVSS Y27
K23 DVSS DVSS AA11 Note: 11-5 AVDD18_ARMPLL W15 6mil VIO18_PMU
K24 DVSS DVSS AA12 R3 VCC18IO_MC1
M4 DVSS DVSS AA14
L5 DVSS DVSS AA16 [6] VMC_PMU 12mil N1 VCC33IO_MC1 AVDD18_MEMPLLPOP AG26 6mil
L17 DVSS DVSS AA18
L19 DVSS DVSS AA20 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] AVDD18_MEMPLL_A D34 6mil
L20 DVSS DVSS AA21 VIO18_PMU 12mil AP25 VCC18IO_MC2
L21 DVSS DVSS AA22 AVDD18_MEMPLL_B AK1 6mil
L24 DVSS DVSS AA25 AM26 VCC33IO_MC2
L25 AA26 C1108 C1109 C1110
DVSS DVSS
L26 DVSS DVSS AA27
M8 AA33 C11 C1105 C1106 C1107
DVSS DVSS VCC18IO_MC3
M9 DVSS DVSS AB9 100nF 1.0uF 100nF AVSS18_ARMPLL W16
M10 DVSS DVSS AB12 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] AVSS18_MEMPLLPOP AG27
M17 DVSS DVSS AB16 AVSS18_MEMPLL_A C33 100nF 100nF 1.0uF
M19 AB22 VIO18_PMU GND GND GND 12mil AC5 AL2
DVSS DVSS VCC18IO_DPI AVSS18_MEMPLL_B
M20 DVSS DVSS AB27
M24 DVSS DVSS AC6 AF5 VCC18IO_I2S
M25 AC15 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] GND GND GND
DVSS DVSS
M26 DVSS DVSS AC16 VIO18_PMU 6mil AM10 VCC18IO_UART
N8 DVSS DVSS AC18
N9 AC22 GND
DVSS DVSS
N10 DVSS DVSS AC25
N13 DVSS DVSS AC26 Note: 11-4
N14 DVSS DVSS AC27 AM5 VCC18IO_SIM
N15 DVSS DVSS AD1 AM6 VCC18IO_SIM
N16 AD9 GND
DVSS DVSS
N17 DVSS DVSS AD10
N18 AD13 [6,23] VSIM1_PMU AK8
DVSS DVSS VCC33IO_SIM1
N19 DVSS DVSS AD14
N20 DVSS DVSS AD18 VSIM2_PMU AK5 VCC33IO_SIM2
N21 AD21 [6,23]
DVSS DVSS
N26 DVSS DVSS AD22
N33 DVSS DVSS AE12
N34 DVSS DVSS AE13
P6 DVSS DVSS AE14
P8 DVSS DVSS AE15 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
P9 DVSS DVSS AE16
P10 DVSS DVSS AE17
P11 DVSS DVSS AE18 VIO18_PMU 6mil E26 VCC18IO_CMR
P12 DVSS DVSS AE21
P13 DVSS DVSS AE25
P14 DVSS DVSS AE26
P15 DVSS DVSS AE27 Note: 11-2
P16 DVSS DVSS AF26
P17 DVSS DVSS AF27
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
PERI_A / MIPI
P18 DVSS DVSS AF33
P19 DVSS DVSS AG5 VIO18_PMU AN23 AVDD18_MIPITX1
P20 DVSS DVSS AG10 6mil AN19 AVDD18_MIPITX2
P24 DVSS DVSS AG14
P25 DVSS DVSS AG16 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
P26 AG17 VIO18_PMU 6mil C16
DVSS DVSS AVDD18_MIPIRX0
R8 DVSS DVSS AG19 E20 AVDD18_MIPIRX1
R9 DVSS DVSS AG20 E25 AVDD18_MIPIRX2
R10 AG21 C1111 C1112
DVSS DVSS
R11 DVSS DVSS AG22
R12 DVSS DVSS AG23 PIN C23,F19,F24 connect to C1111 GND first,Then connect to MGND
B R13
R14
R15
DVSS
DVSS
DVSS
DVSS
AG24
AH10
AH12
1.0uF 1.0uF AK23
AP18
AVSS18_MIPITX
AVSS18_MIPITX B
DVSS DVSS GND
R16 DVSS DVSS AH14 [6] VUSB10_PMU C23 AVSS18_MIPIRX
R17 DVSS DVSS AH16 E19 AVSS18_MIPIRX
R18 AH17 GND E24
DVSS DVSS C1113 AVSS18_MIPIRX
R19 DVSS DVSS AH24
R20 DVSS DVSS AJ24
R21 DVSS DVSS AK6
1.0uF
PERI_A / USB
R26 DVSS DVSS AK29
T8 DVSS DVSS AK30 6mil B9 AVDD10_SSUSB
T9 DVSS DVSS AL3 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
T12 AL7 GND 6mil A8
DVSS DVSS VIO18_PMU AVDD18_SSUSB
T13 DVSS DVSS AL34
T14 DVSS DVSS AM7
T15 DVSS DVSS AM9 F7 AVDD18_USB_P0
T16 DVSS DVSS AM14
T17 DVSS DVSS AM17 [7] VUSB33_PMU 6mil C6 AVDD33_USB_P0
T18 DVSS DVSS AM20
T19 DVSS DVSS AM23
T20 DVSS DVSS AM27 C5 AVDD18_USB_P1
T21 DVSS DVSS AM30
T25 DVSS DVSS AN2 6mil B4 AVDD33_USB_P1
T26 DVSS DVSS AN9
U6 DVSS DVSS AP5
U14 DVSS
U15 DVSS Note: 11-3
U16 C1114 C1115
DVSS
U17 DVSS
U18 DVSS E9 AVSS10_SSUSB
U19 DVSS 1.0uF 1.0uF E10 AVSS10_SSUSB
U20 GND B7
DVSS AVSS33_USB_P0
U21 DVSS C4 AVSS33_USB_P1
U25 DVSS
U26 GND GND
DVSS
U27 DVSS
GND

GND
Schematic design notice of "11_BB_POWER" page.

Note 11-1: AVDD28_DAC (Y33 ball) must be powered by

MT6795W/M "VTCXO_1_PMU".
MT6795W/M

Note 11-2: Connect VCC18IO_CMR (E26 ball) to

"VIO18_PMU" since I2C-2 I/O power
is powered by VCC18IO_CMR.

Note 11-3: Connect AVDD33_USB_P1 (B4 ball)

to "VSIM1_PMU" for IC-USB / Samrt
card application.
Connect AVDD33_USB_P1 (B4 ball) to
"VUSB33_PMU" for USB application.

A Note 11-4: Reserve 0.1uF decoupling cap in A

VCC18IO_DPI for MHL.

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 3OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U1001-A U1001-B

TP18
MT6795-MWFPOP-852P MT6795-MWFPOP-852P
PMU_IF DRAM_IF SIM ABB_IF
[6] H2 AN14 R1201 240R 1% [23] SIM1_SCLK_6795 AN7 W28
SYSRSTB SYSRSTB ZQ0_A 0201 SIM1_SCLK TDX26M_IN
AN13 R1202 240R 1% [23] SIM1_SIO_6795 AN8
ZQ1_A 0201 SIM1_SIO
[6,7,9] WATCHDOG G4 WATCHDOG [23] SIM1_SRST_6795 AP8 SIM1_SRST
AG33 R1203 240R 1% AH4 V34
ZQ0_B 0201 INT_SIM1 INT_SIM1 TD_TX_BBIP
AH33 R1204 240R 1% [23] SIM2_SCLK_6795
[23] AL6 W33
ZQ1_B 0201 SIM2_SCLK TD_TX_BBIN
[6,7,9,10] ENBB_6169 H5 SRCLKENA0 [23] SIM2_SIO_6795 AN6 SIM2_SIO
AL5 V33
C C
[23] SIM2_SRST_6795 SIM2_SRST TD_TX_BBQP
[6,7] J2 J29 R1205 240R 1% AH3 U33
SRCLKENA1 SRCLKENA1 EXTDN_A 0201 INT_SIM2 INT_SIM2 TD_TX_BBQN
[23]
Note: 12-4 J5 SRCLKENAI GND
BPI - W/G TD_RX_BBIP R30
TD_RX_BBIN P30
[9] R1207 0R H4 H31
EXT_4P_PMU_EN 0201 SRCLKENAI2 BPI_OUT14
TD_RX_BBQP M30
VDRAM_PMU G31 BPI_OUT13 TD_RX_BBQN N30
[6,7] RTC32K1V8 K5 RTC32K_CK
H33 BPI_OUT12
C1201

C1202
10uF [19] LCM_ID0

100nF
[6,7] L3 AH27 G33
[6,7]
PWRAP_SPI0_CSN
PWRAP_SPI0_CK M5
PWRAP_SPI0_CSN
PWRAP_SPI0_CK
DDRVPOP
DDRVPOP AH28 Note: 12-2 [19] LCM_ID1
BPI_OUT11
[6,7] PWRAP_SPI0_MO N5 PWRAP_SPI0_MO DDRVPOP AH29 G34 BPI_OUT10
[6,7] PWRAP_SPI0_MI M6 PWRAP_SPI0_MI
C1203 10uF
C1204

100nF
DDRV_A H24 F34 BPI_BUS9 APC Y31 APC1 [12]
[6] AUD_CLK_MOSI M3 AUD_CLK_MOSI DDRV_A H26
C1205

100nF
[6] AUD_DAT_MOSI_1 L2 AUD_DAT_MOSI DDRV_A H28 [12] BPI_BUS8 F33 BPI_BUS8 APC2 Y32
[6] AUD_DAT_MISO_1 M2 AUD_DAT_MISO DDRV_A J24
DDRV_A J26 [13] BPI_BUS7 E33 BPI_BUS7
[6] AUD_DAT_MOSI_2 K4 ANC_DAT_OUT DDRV_A J28
L4 ANC_DAT_IN D33 BPI_BUS6
[6] AUD_DAT_MISO_2 C1206
C1207

100nF

10uF
DDRV_B AF9 F31 BPI_BUS5
C1208

100nF

[19] DISP_PWM0 K2 DISP_PWM0 DDRV_B AG9

DDRV_B AH9 E31 BPI_BUS4
C1209

100nF

DDRV_B AJ9
DDRV_B AJ10 D31 BPI_BUS3
PLLs Test Pin DDRV_B AJ11 LTEX26M_IN AA28 LTE_LTEX26M_IN [10]
C32 BPI_BUS2
GND C31 AE30 RF_TX_BBIP [10]
BPI_BUS1 LTE_TX_BBIP
V15 TP_ARMPLL LTE_TX_BBIN AD30 RF_TX_BBIN [10]
V16 TN_ARMPLL B31 BPI_BUS0
LTE_TX_BBQP AB30 RF_TX_BBQP [10]
LTE_TX_BBQN AC30 RF_TX_BBQN [10]
RFI_C
AP33 TP_MEMPLLPOP [10] LTE_RFIC0_BSI_EN M33 RFIC0_BSI_EN
AN34 TN_MEMPLLPOP LTE_RX1_BBIP AD34 RF_RX1_BBIP [10]
[10] LTE_RFIC0_BSI_CK L32 RFIC0_BSI_CK LTE_RX1_BBIN AD33 RF_RX1_BBIN [10]

[10] LTE_RFIC0_BSI_D2 M32 RFIC0_BSI_D2 LTE_RX1_BBQP AE32 RF_RX1_BBQP [10]

B34 TP_MEMPLL_A LTE_RX1_BBQN AD32 RF_RX1_BBQN [10]
A33 TN_MEMPLL_A [10] LTE_RFIC0_BSI_D1 L33 RFIC0_BSI_D1
LTE_RX2_BBIP AB32 RF_RX2_BBIP [10]
[10] LTE_RFIC0_BSI_D0 L31 RFIC0_BSI_D0 LTE_RX2_BBIN AC32
RF_RX2_BBIN [10]
AP2 TP_MEMPLL_B LTE_RX2_BBQP AC33
RF_RX2_BBQP [10]
AN1 TN_MEMPLL_B K33 TD_TXBPI LTE_RX2_BBQN AC34
RF_RX2_BBQN [10]

K32 RFIC1_BSI_EN
ET_P AG31
J33 RFIC1_BSI_CK ET_N AG32

GPIO10_MCAM_PD K31 RFIC1_BSI_D2

JTAG VBIASNPOP AH26 K30 RFIC1_BSI_D1

TP1305 AM11 JTRST_B VBIASN1_A K25 J30 RFIC1_BSI_D0

TP1306 AN12 JTCK VBIASN1_B AG12

BPI - L MISC BSI
TP1307 AL11 JTDO
AL12 GND [10] AL33 AH31 MIPI1_SCLK [12]
TP1308 JTDI
Note: 12-3 LTE_TXBPI LTE_TXBPI MISC_BSI_CS0B MIPI1_SCLK
AK13 JTMS AL29 PAVM1 MISC_BSI_CS1B AJ31
TP1309 [21] GPIO91_BOARD_ID0
[15] GPIO90_EN AL30 PAVM0 MISC_BSI_CK AJ33 MIPI0_SCLK [11]
MIPI0_SCLK
Misc VREF_A H30
TUNE_SW1 AP30 BPI_OUT25 MISC_BSI_DO AH32 MIPI0_SDATA MIPI0_SDATA [11]
VGP4_PMU AK24 DVDD18_EFUSE VREF(CA)_A AN18 DDR_VREF [4,7]
TUNE_SW2 AN30 BPI_OUT24 MISC_BSI_DI AK33 MIPI1_SDATA MIPI1_SDATA [12]
VREF(DQ)_A A22
R5 TESTMODE AP31 BPI_OUT23
C1210 C1212 C1213 AN31 BPI_OUT22
C1211
AUX IN
[13] LTE_RF_BPI_OUT21 AM31 BPI_OUT21
100nF 100nF 100nF
B Note: 12-1 1.0uF NC [13] LTE_RF_BPI_BUS20 AN32 BPI_OUT20 AUXIN2
AUXIN1
V31
T31
ADC2_BOARD_ID1
AUX_IN1_NTC
[21]
[11]
B
A1 AK9 GND GND GND [13] AM32 U31
NC VREF_B LTE_RF_BPI_BUS19 BPI_OUT19 AUXIN0 AUX_IN0_NTC [21]
A2 NC
GND A34 AA34 AN33
NC VREF(CA)_B DDR_VREF [4,7] BPI_OUT18
B1 NC REF POWER
AP1 NC VREF(DQ)_B W1 AL32 BPI_OUT17
AP34 NC
[20] GPIO80_FLASH_TX AL31 BPI_OUT16 REFP T34
C1214 C1215 C1216 T33
REFN
[20] GPIO79_SCAM_RST AK31 BPI_OUT15 C1217
GND 100nF 100nF 100nF C1218
C1219
C1230
MT6795W/M MT6795W/M
1.0uF
GND GND GND 0201 0201 0201
100pF100pF100pF Close to BB IC.
GND
GND

A A
Schematic design notice of "11_BB_11" page.
Note 12-1: Apply 1.8V to DVDD18_EFUSE (AK24) for eFuse programming.

Note 12-2: The BPI_BUS0~BPI_BUS9 are capable of 2.8V I/O operation.

<Company Name>
COMPANY:
Note 12-3: The de-coupling cap. of DRAM VREF have to be placed as close to
BB as possible.
TITLE:

Note 12-4: SRCLKENAI2 features watch dog reset output to reset 4-phase buck. DRAWN: DATED:
<Title>
R1207 BOM option: R1207 = 0R when BOM option of U2401 is DA9210. <Drawn By> <Drawn Date>
R1207 = NC when BOM option of U2401 is 2nd source. CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 4OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

MARK1301 MARK1302 MARK1303 MARK1304 Mark

U1001-C U1001-D

MT6795-MWFPOP-852P MT6795-MWFPOP-852P
CSI DSI USB MSDCs
C [20] RCP C19
C18
RCP TCP AL21
AL20
TCP [19]
[22]
[22]
USB_DP_P0 B6
B5
USB_DP_P0 MSDC0_RST_ T2 MSDC0_RST_ [14]
C
[20] RCN RCN TCN TCN [19] USB_DM_P0 USB_DM_P0
MSDC0_CMD U5 MSDC0_CMD [14]
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
B17 AM22 TDP0 [19] VIO18_PMU G10 W3 [14]
[20] RDP0 RDP0 TDP0 [19] SSUSB_TXP MSDC0_CLK MSDC0_CLK

4.7K
[20] RDN0 A17 RDN0 TDN0 AM21 TDN0 F10 SSUSB_TXN MSDC0_DSL U2 MSDC0_DSL [14]

MSDC0_DAT7 AA2 MSDC0_DAT7

B18 AN22 TDP1 [19] D9 Y2 MSDC0_DAT6

0201
[20] RDP1 RDP1 TDP1 [19] SSUSB_RXP MSDC0_DAT6
[20] RDN1 B19 RDN1 TDN1 AP22 TDN1 D10 SSUSB_RXN MSDC0_DAT5 V1 MSDC0_DAT5
V4 MSDC0_DAT4

R1316
MSDC0_DAT4
MSDC0_DAT3 V5 MSDC0_DAT3
D16 AN21 TDP2 [19] W2 MSDC0_DAT2
[20] RDP2 RDP2 TDP2 MSDC0_DAT2
RDN2 D17 RDN2 TDN2 AN20 TDN2 [22] USB_ID A4 USB_DP_P1 MSDC0_DAT1 V2 MSDC0_DAT1
[20] [19] A5 USB_DM_P1 MSDC0_DAT0 W4 MSDC0_DAT0

E18 AM18 TDP3 [19]

[20]
[20]
RDP3
RDN3 D19
RDP3
RDN3
TDP3
TDN3 AM19 TDN3 [19] Note: 13-1
C8 USB_VBUS_P0 MSDC1_CMD R2 MSDC1_CMD

MSDC1_CLK P5
SSUSB_VRT MSDC1_CLK
B21 RCP_A TCP_A AL16 B8 SSUSB_VRT
B22 RCN_A TCN_A AL15 MSDC1_DAT3 N2 MSDC1_DAT3

R1301
USB_VRT_P1 D5 USB_VRT_P1 MSDC1_DAT2 P4 MSDC1_DAT2
MSDC1_DAT1 P2 MSDC1_DAT1

R1302
C21 RDP0_A TDP0_A AL19 D4 IDDIG MSDC1_DAT0 R4 MSDC1_DAT0

0201
C22 AL18
RDN0_A TDN0_A GND Note: 13-2
BC

0201
MSDC2_CMD AL23
ACCL_INT1_N_GPIO105

5.1K
D21 AN16 [21]
RDP1_A TDP1_A [21]
D20 RDN1_A TDN1_A AN17 D6 CHD_DP_P0 MSDC2_CLK AN24 GYRO_INT2_N_GPIO104

5.1K
GND D7 AL24 GPIO103
CHD_DM_P0 MSDC2_DAT3 GPIO103 [9]
A20 RDP2_A TDP2_A AM16 MSDC2_DAT2 AN25 GPIO102_RST [19]
GND GPIO101 GPIO102_RST
B20 RDN2_A TDN2_A AM15 [7] CHD_DP_P0 MSDC2_DAT1 AK25 [16]
GPIO100 GPIO101
MSDC2_DAT0 AK26 [16]
[7] CHD_DM_P0 GPIO100
E22 RDP3_A TDP3_A AN15
D23 RDN3_A TDN3_A AP15 KEYPAD CONN_IF
[7] DRV_VBUS AN3 KPROW2 MSDC3_CMD B12 MSDC3_CMD [16]
LCM_RST AL14 LCM_RST [19] AL4 KPROW1
[20] RCP_B B25 RCP_B AM4 KPROW0 MSDC3_CLK E12
[23] KPROW0 MSDC3_CLK [16]
[20] RCN_B A25 RCN_B DSI_TE AK14 DSI_TE [19]
AJ5 KPCOL2 MSDC3_DAT3 D12 MSDC3_DAT3
[16] GPIO123 AK4 A11 MSDC3_DAT2
KPCOL1 MSDC3_DAT2
[20] RDP0_B B24 RDP0_B [23] KPCOL0 AM2 KPCOL0 MSDC3_DAT1 B11 MSDC3_DAT1
B23 AK22 MIPI_VRT F12 MSDC3_DAT0
[20] RDN0_B RDN0_B VRT MSDC3_DAT0
[5,6,20]
AL17 MIPI_VRT_A VCAM_IO_1P8V R1321 NC C15 [16]
VRT_A 0201 DAISYNC DAISYNC
C24 VIO18_PMU R1303 4.7K D15 [16]
R1304

R1306

[20] RDP1_B RDP1_B 0201 DAICLK DAICLK

[20] C25 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] R1305 4.7K B15 [16]
RDN1_B RDN1_B 0201 DAIPCMOUT DAIPCMOUT
[5,6,20] VCAM_IO_1P8V R1322
0201
NC I2C DAIPCMIN D14 DAIPCMIN [16]
0201

0201

C29 [19,20] MCAM_SCL0 B30 E13

CMPCLK SCL0 PTA_RXD PTA_RXD [16]
[19,20] MCAM_SDA0 D30 E14
SDA0 PTA_TXD PTA_TXD [16]
1.5K

1.5K

CMMCLK D29 CMMCLK

[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU R1307 1K (For camera) GPS_SYNC G15 GPS_SYNC [16]
[20] 0201 1K
R1308 CONN_RST B16 CONN_RST
GND GND 0201 [16]
E28 CM2MCLK
URXD2 B13 URXD2 [16]
E29 [7,9] SCL1 AJ2 B14
[20] CM3MCLK CM3MCLK SCL1 UTXD2 UTXD2 [16]
[7,9] SDA1 AK2 SDA1
PCM (ext MD)
SPI DPI [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU R1309
R1310
0201
4.7K
4.7K
(For Power)
GPIO92_MACM_RST [20]
0201 PCM_CLK AN29
[21] FP_SPI_CLK T3 SPI_CK DPI_DE AA1
PCM_SYNC AN28 GPIO93_SPK_EN [18]
[21] FP_SPI_MISO T4 SPI_MI DPI_CK AB5 [19] B29 SCL2
SCL2
A29 SDA2 PCM_RX AK28 GPIO94_FP_LDO_EN [21]
[19] SDA2
[21] FP_SPI_MOSI T5 SPI_MO DPI_HSYNC Y5
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU R1311 4.7K (For N3D/CTP or Misc. ) PCM_TX AK27 GPIO95_TORCH_EN [20]
0201 4.7K
[21] FP_SPI_CS_N R1 SPI_CS DPI_VSYNC Y4 R1312
0201
GPIO
SI,SOÐèÒ
ªÈ·ÈÏ I2S AB2 [8,15,20,21] SENS_SCL3 AD5
DPI_D11 SCL3
AE5 SDA3
(For Misc.) EINT15 B28 GPIO15_SCAM_PWDN [20]
[8,15,20,21] SENS_SDA3
AJ6 I2S0_MCK DPI_D10 AB4
EINT14 B27 EINT14_INT [15]
AP9 I2S0_BCK DPI_D9 AA5 UART
EINT13 D27 EINT13_HS_DET [18]

B B
AL8 AC2 [22] R1314 1K AN11
I2S0_LRCK DPI_D8 URXD0 0201 URXD0
EINT12 D26 MAG_RST [21]
AH6 AC4 R1315 1K AN10
I2S0_DATA1 DPI_D7 [22] UTXD0 0201 UTXD0
EINT11 C26 EINT11_HALL2 [21]
AG6 I2S0_DATA0 DPI_D6 AC3 [21] GPIO115_FP_RST AL10 URTS0
EINT10 B26 EINT10_HALL1 [21]
DPI_D5 AD2 [20] GPIO116_FLASH_CE AK10 UCTS0
[8] PWM2 AG3 D1 [7]
GPIO131_MOTOR_PWM I2S3_MCK EINT9 INT_FUEL_GAUGE
DPI_D4 AE1
[21] GPIO130_IR_PWM1 PWM1 AG4 I2S3_BCK [20] GPIO96_FLASH_EN AL27 URXD1 EINT8 D2 ALSP_INT_N [21]
DPI_D3 AD3
[21] GPIO129_IR_PWM0 PWM0 AH5 I2S3_LRCK [20] GPIO97_MCAM_AF_EN AN27 UTXD1 EINT7 D3 EINT7_4PHASE_BUCK [9]
DPI_D2 AD4
[19] GPIO135_BL_EN AF4 I2S3_DATA3 [8] GPIO98_HAPTIC_EN AN26 URTS1 EINT6 E2 EINT6_TP [19]
DPI_D1 AF2
[19] GPIO134_P5_EN AG2 I2S3_DATA2 [8] GPIO99_HAPTICS_EN AL26 UCTS1 EINT5 E4 EINT5_WIFI_INT [16]
DPI_D0 AE2
[19] GPIO133_N5_EN AH2 I2S3_DATA1 EINT4 F5 EINT4_BGF_INT [16]

[22] GPIO132_KEYPAD AG1 I2S3_DATA0 EINT3 F1 EINT3_FP_INT [21]

EINT2 F2 [7]
FUEL_SCL4
AN5 URXD3 EINT1 G2 [7]
FUEL_SDA4
AN4 UTXD3 EINT0 G5
BAT_AP_ID

MT6795W/M MT6795W/M 4.7K_NC R1319

0201

4.7K_NC R1318
0201 VIO18_PMU [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]

A A

<Company Name>
COMPANY:

Schematic design notice of "12_BB_2" page.

TITLE:

Note 13-1: Connect USB_VBUS_P0 (C8 ball) pin to GND since USB OTG <Title>
"B-Valid" detection has implemented by MT6332's ADC. DRAWN: DATED:
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
Note 13-2: GPIO103 is dedicated for DA9210 4-phase buck control. <Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 5OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Schematic design notice of "20_POWER_MT6331" page.

Note 20-1: External pull resistor in PMU SPI interface is not allowed.

Note 20-2: PMU_FSOURCE high(DVDD18_DIG)-> EFUSE program.

Note 20-3: Connect MT6331's K9 pin to "VCORE1_PMU" when

VCORE2 is not used.

D D

U2001-A

LESD11LH5.0CT5G
MT6331P/A

PL2001 0.47uH 1.05 2A (0.7-1.31/6.25mV) 75mil VCORE1_PMU [2,6]

CONTROL SIGNAL BUCK OUTPUT
C [23] PWRKEY D4 PWRKEY VDVFS11 P10
4 mil GND trace with C

ESD2001
VDVFS11 R10 good shielding.
[23] HOME_KEY A8 HOMEKEY
VDVFS11_FB K8 VCORE1_PMU_FB
VCORE1_PMU_FB [2]
[4] SYSRSTB D5 RESETB

WATCHDOG C9 WDTRSTB_IN
[4,7,9]
VDVFS12 P8
[4,7,9,10] D8 R8 PL2002 0.47uH 1.05 2A (0.7-1.31/6.25mV)
ENBB_6169 SRCLKEN_IN1 VDVFS12
[4,7] SRCLKENA1 F8 SRCLKEN_IN2
VDVFS12_FB K7 VSYS [6,7,8,9,15,18,19,20,21,22]

[4,7] PWRAP_SPI0_CSN E9 SPI_CSN

P6 PL2003 0.47uH 1.05 2A (0.7-1.31/6.25mV) 75mil VGPU_PMU [2]
Note: 20-1 [4,7] PWRAP_SPI0_CK C10 SPI_CLK
VDVFS13
VDVFS13 R6
4 mil GND trace with
[4,7] PWRAP_SPI0_MO E10 SPI_MOSI good shielding (Differential)
VDVFS13_FB K6 DVDD_GPU_PMIC_FB DVDD_GPU_PMIC_FB [2]
[4,7] PWRAP_SPI0_MI D10 SPI_MISO VDVFS13_GND_FB L7 DVDD_GPU_GND
DVDD_GPU_GND [2]

[7] EXT_PMIC_EN H5 P4 PL2004 0.47uH 1.05 2A (0.7-1.31/6.25mV)

EXT_PMIC_EN VDVFS14
R4
Note: 20-2 [7,15] PMU_CHGIN E5 PMU_CHGIN
VDVFS14

VDVFS14_FB L5 VSYS [6,7,8,9,15,18,19,20,21,22]

C7 FSOURCE
[6,7,8,9,15,18,19,20,21,22]
VSYS Power Path NC N11
E4 PP_EN NC P11
[7] PP_EN
NC R11
[7,11,12,15] VBAT From 6332 power path A3 VBATSNS
100mil 6mil C4 VSYSNS NC L9
GND M9 GND

C2001 C2002 VBAT INPUT VCORE2 P13 Note: 20-3

40mil N9 VBAT_VDVFS11
N10 VBAT_VDVFS11
22uF 22uF
40mil M7 VBAT_VDVFS12 VCORE2_FB K9 VCORE1_PMU [2,6]
N7 VBAT_VDVFS12
N8 VBAT_VDVFS12
GND GND 6mil N5 VBAT_VDVFS13
6mil N6 VBAT_VDVFS13 NC N15
N3 VBAT_VDVFS14 NC P15
15mil N4 VBAT_VDVFS14 NC R15

6mil M11 VBAT_SMPS

M12 VBAT_SMPS NC L10
35mil N12 VBAT_SMPS GND M15 GND

20mil N14 VBAT_VCORE1

[6,7,8,16] VBAT_BUCK 20mil N1 VIO18_SW PL2006 0.68uH 50mil VIO18_PMU [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
VIO18
25mil N13 P1

C2003
VBAT_VCORE2 VIO18
20mil VIO18 P2
M3 VBAT_SMPS
VIO18_FB M5
20mil M1

4.7uF
VBAT_VIO18
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 20mil M2 VBAT_VIO18
6mil N2 VBAT_VIO18
A4 VBAT_LDO1
FBB VDD_VFBB L1
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU A1 GND
VBAT_LDO2
B1 VBAT_LDO2 VFBB L3
C1 VBAT_LDO3 VDD_VFBB_SNS K3 VTCXO_2 reserved for SGLTE RF.
E2 VBAT_LDO4
F1 VBAT_LDO4
F2 VBAT_LDO4
LDO OUTPUT VTCXO_2_PMU L/W = 2800/6
H1 C5 L/W = 2800/6 2.8V 40mA
C2011

C2012

C2017

[3,10]
C2010

C2013
C2008

C2014

VDD_SLDO1 VCTXO1 VTCXO_0_PMU

J1 VDD_SLDO2
C2004
C2007
C2006
C2005 C2009 C2015
C2016 J2 B5
VDD_SLDO2 VCTXO2
IO Power E1 1.2/1.3/1.5.1.8/2.0/2.8/3.0/3.3 L/W = 2800/8 1.8V 150mA
4.7uF

4.7uF
1.0uF

1.0uF

1.0uF

VMIPI
1.0uF

VMIPI_PMU [11]
2.2uF

B9 DVDD18_IO
VSRAM_DVFS1 L2
VDIG D3 2.8V 2.8V 200mA VIO28_PMU [8,21]
B B
VIO28 L/W = 2800/10
L/W = 800/4 DVDD18_DIG G5
GND GND GND GND GND DVDD18_DIG 1.0V 60mA [3]
VUSB10 J3 1.0/1.05/1.1/1.15/1.2/1.25/1.3 L/W = 2800/6 VUSB10_PMU
Close to MT6331
Audio
U2001-B VREF A2 1.8/3.3 L/W = 2800/10 3.3V 200mA VMC_PMU [3]
C2019

MT6331P/A VMC
B3 VREF
H10 C15 C2020 4.7uF B2 3/3.3 L/W = 2800/20 3.3V 800mA VMCH_PMU [21]
[10] MT6169_XO4_CLK CLK26M AU_FLYP1 VMCH
D15 C2022
AU_FLYN1 [14]
D7 C3 C2 3/3.3 L/W = 2800/20 3.3V 800mA VEMC_3V3_PMU
1.0uF

[4] AUD_CLK_MOSI AUD_CLK GND_VREF VEMC33

A7 B15 C2021 4.7uF 100nF E3 1.7/1.8/1.86/2.76/3/3.1 L/W = 2800/8 1.8V 100mA VSIM1_PMU [3,23]
[4] AUD_DAT_MOSI_1 AUD_DAT1_MOSI AU_FLYP2 VSIM1
AU_FLYN2 C14 ISINK
[3,23]
C2023

[4] AUD_DAT_MISO_1 F7 AUD_DAT1_MISO J5 ISINK2 VSIM2 D1 1.7/1.8/1.86/2.76/3/3.1 L/W = 2800/8 1.8V 100mA VSIM2_PMU
GND H4
GND ISINK1 [20]
[4] F6 F11 K4 B4 1.5/1.8/2.5/2.8 L/W = 2800/10 2.8V 250mA VCAMA_2P8V
AUD_DAT_MOSI_2 AUD_DAT2_MOSI AU_FLYP3 ISINK0 VCAMA
AU_FLYN3 F13 [8] CHARGE_LED_B
E6 F4 1.2/1.3/1.5/1.8/2.0/2.8/3.0/3.3 L/W = 2800/10 2.8V 200mA VCAM_AF_PMU [20]
[4] AUD_DAT_MISO_2 AUD_DAT2_MISO [8] CHARGE_LED_G VCAM_AF
AUX ADC
C2024 4.7uF [8] CHARGE_LED_R 1.3V 500mA VCAMD_1P2V [20]
AU_VP B14 A6 ADCGPI VCAMD H2 0.9/1.0/1.1/1.22/1.3/1.5 L/W = 2800/16
[7] BAT_CON_ID
B12 A13 C2025 4.7uF C2026 1.0uF B6 VCAM_IO_1P8V [5,20]
[18] AU_LORP_EXPA AU_LORP AU_VN GND VDD_AUX VCAM_IO K1 1.2/1.3/1.5/1.8 L/W = 2800/10 1.8V 200mA
[18] AU_LORN_EXPA B13 AU_LORN
DDR VBIASN VGP1 F3 1.2/1.3/1.5/1.8/2.0/2.8/3.0/3.3 L/W = 2800/10 2.8V 200mA VGP1_PMU [19]
[7] C11 GND
AU_LOLP AU_LOLP
C12 G1 H3 1.1/1.2/1.35/1.5 L/W = 2800/10 1.2V 10mA VGP2_PMU [7]
[7] AU_LOLN AU_LOLN VBIASN_DDR3 VGP2
K2 1.2/1.3/1.5/1.8 L/W = 2800/10 1.8 200mA VSCAMD_1P2V [20]
VGP3
[18] AU_HSP D11 AU_HSP VBAT_AUD F15 VBAT_BUCK [6,7,8,16] G3 GND_VBIASN
[18] AU_HSN E11 G2 1.6/1.7/1.8/1.9/2.0/2.1/2.2 L/W = 2800/10 2.0 200mA VGP4_PMU [4]
AU_HSN VGP4

AVDD18_AUD E15 VIO18_PMU GND VIBR D2 1.2/1.3/1.5.1.8/2.0/2.8/3.0/3.3 L/W = 2800/10 2.8 200mA VIBR_PMU [8]
[18] CODEC_HPH_L D13 AU_HPL P9 GND_VDVFS11
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
[18] CODEC_HPH_R C13 AU_HPR R9 GND_VDVFS11
AU_V18N F14 P7 GND_VDVFS12
K11 C2027 C2028 R7
[18] ACCDET ACCDET GND_VDVFS12
AVDD32_AUD G13 P5 GND_VDVFS13 VRTC
[18] AU_VIN0_P K15 AU_VIN0_P AVDD32_AUD J12 R5 GND_VDVFS13
[18] AU_VIN0_N K14 AU_VIN0_N 1.0uF 1.0uF P3 GND_VDVFS14
RTC
X2001

L13 R3 A12 VRTC L/W = 800/4 R2043 1K

[18] AU_VIN1_P AU_VIN1_P GND_VDVFS14 AVDD33_RTC 0201
[18] AU_VIN1_N L12 AU_VIN1_N P12 GND_SMPS
J14 GND GND R12 A11 32K_IN
[18] AU_VIN2_P AU_VIN2_P 6331_AU_V18N [7] GND_SMPS XIN
J13 P14 C2029
[18] AU_VIN2_N AU_VIN2_N L/W = 2800/6 GND_SMPS C2037
G12 AU_VIN3_P R14 GND_SMPS XOUT A10 32K_OUT
H12 R13 1 2
AU_VIN3_N GND_VCORE2
H15 AU_VIN4_P AVSS18_AUD A14 R1 GND_VIO18 RTC32K_2V8 B10 RTC32K2V8 100nF
C2030C2031 [16] 22uF
H14 AU_VIN4_N AVSS18_AUD A15 R2 GND_VIO18
AVSS18_AUD D14 F9 GND_LDO RTC32K_1V8_1 D9 RTC32K1V8
D12 E12 F10 [4,7] GND
[18] EARPHONE_GND AU_REFN AGND32_AUD GND_LDO C2032 C2033
AGND32_AUD E13 1.0uF G6 GND_LDO RTC32K_1V8_2 E8
AGND32_AUD E14 G7 GND_LDO
[22] MICBIAS0 K12 AU_MICBIAS0 AGND32_AUD F12 G8 GND_LDO
GND DVSS18_IO B7 0201 0201
L14 G10 GND GND G9 18pF 18pF
[18] MICBIAS1 AU_MICBIAS1 AGND32_AUD GND_LDO DVSS18_IO B8
[18] MICBIAS2 J15 AU_MICBIAS2 AGND32_AUD G11 H6 GND_LDO DVSS18_IO C8
G14 AU_MICBIAS3 AGND32_AUD H11 H7 GND_LDO
AGND32_AUD J10 H8 GND_LDO GND_VFBB J6
C2034 C2035 C2036 J11 H9 D6
AGND32_AUD GND_LDO GND_AUX GND
AGND32_AUD K10 J7 GND_LDO GND_DRV K5
AGND32_AUD L11 J8 GND_LDO GND_SMPS1 L4
1.0uF 1.0uF 1.0uF J9 GND_LDO GND_SMPS1 M13
GND GND_SMPS1
GND_SMPS2
M14
M4 GND
Close to MT6331
GND GND GND GND

Direct to MAIN GND

Close to MT6331

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 6OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

R2107 R2108 R2109 R2110

TPS61280A 0R 0R NC NC
FAN48630 NC NC 0R 0R
[6,7,8,9,15,18,19,20,21,22]
VSYS

U2101
MT6332P/B C2140

Companion DC/DC Converter for VBAT@LV Control Signal Sync BST

PL2110 0.47uH
TPS61280 I2C address: 0X75 (Write:0xEA, Read:0xEB) [6] PP_EN H6 PP_EN SBST_LX A2
A3
SBST_LX
WATCHDOG H3 WDTRSTB_IN SBST_LX B2
[4,6,9]

C [4,6,9,10] ENBB_6169 H2 SRCLKEN_IN1 SBST_VOUT

SBST_VOUT
A1
B1
SBST_VOUT_PMU [7] C
D2105 H1 C2411
[4,6] SRCLKENA1 SRCLKEN_IN2
U2102
SBST_FB D5 10uF
PWRAP_SPI0_CSN G3 SPI_CSN
[6,7,8,9,15,18,19,20,21,22] 75mil PL2102 0.47uH C3 B3 75mil [4,6]
VSYS SW VOUT VBAT_BUCK [6,7,8,16]
C4 SW VOUT B4 PWRAP_SPI0_CK H5 SPI_CLK GND_SBST A4
[4,6] B3
C2104

GND_SBST
PWRAP_SPI0_MO F3 SPI_MOSI GND_SBST B4
A3 C2102 [4,6]
VIN
A4 VIN PWRAP_SPI0_MI G4 SPI_MISO
[4,6] R2102 0R
0201 VGP2_PMU [6]
4.7uF

22uF
H4 EXT_PMIC_EN
BUCK OUTPUT
[6,7,8,9,15,18,19,20,21,22] [6] EXT_PMIC_EN VDRAM_SW PL2103 0.68uH
VDRAM A11 50mil [2,4,7]
[6,7,8,9,15,18,19,20,21,22] GND R2101 2.2K VDRAM_PMU
VSYS B1 VSEL GPIO A2 0201 VSYS RTC32K1V8 G2 32K_IN VDRAM B11
[4,6] 4 mil GND trace with
GND
A1 EN connect to DSI_PWM when use PMU BL Driver good shielding from baseband (Differential)
B5 D10 VDRAM_PMIC_FB [2] ESD2102
PWM_IN VDRAM_FB VDRAM_PMIC_FB
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]VIO18_PMU C1 D2 D11 DVDD_DRAM_GND [2]
NBYP PGND GND_VDRAM_FB DVDD_DRAM_GND
D3 E2 LESD11LH5.0CT5G
PGND [5] DRV_VBUS DRV_VBUS
[5,9] SCL1 R2107 0R B2 D4 A9 VPCA7_SW PL2104 0.68uH 70mil DVDD_MD [2]
0201 AGND PGND VDVFS2
[5] CHD_DP_P0 K11 CHR_DP VDVFS2 B8
[5,9] SDA1 R2108 0R C2 D1 B9
0201 AGND AGND VDVFS2
[5] CHD_DM_P0 K12 CHR_DM 4 mil GND trace with
R2109 0R_NC

USE RT4803A IIC interface

0201 good shielding from baseband (Differential)
RT4803A GND E8 DVDD_MD_PMIC_FB DVDD_MD_PMIC_FB [2] ESD2101
VDVFS2_FB
R2110 0R_NC E9 DVDD_MD_GND [2]
0201 GND_VDVFS2_FB DVDD_MD_GND
GND G5 FSOURCE LESD11LH5.0CT5G
PMU_FSOURCE high(DVDD18_DIG)-> EFUSE program
VBAT INPUT VPA E12
20mil C10 E13 VPA_SW PL2105 2.2uH 40mil VPA_PMU [11]
VBAT_VDRAM VPA
C11 VBAT_VDRAM
[6,7,8,9,15,18,19,20,21,22]
VPA_FB H10
VSYS 75mil 30mil C8 VBAT_VDVFS2
C9 VBAT_VDVFS2
B12 VRF18_1_SW PL2106 2.2uH 15mil VRF18_0_PMU [10]
C2105 VRF18_1
20mil D12 VBAT_VPA
G10

C2107
VRF18_1_FB C2106
15mil A12 VBAT_VRF18
22uF
A13 VBAT_VRF18
GND 10mil H11
VRF18_2 B13
VRF18_2 reserved
VBAT_ALDO

4.7uF
[6,7,8,16] 10mil
VRF18_2_FB E11 for SGLTE RF.
VBAT_BUCK G12 VBAT_DLDO
GND
10mil F13 VDD_SLDO
LDO VSRAM_DVFS2 F12 L/W = 1500/18 1.0125 600mA GND VSRAM_VDVFS2_PMU [2]

[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 6mil G13 L/W = 2800/6 3.3 50mA VUSB33_PMU [3]
VUSB33
IO Power VBIF28 G11 L/W = 800/4 2.8 20mA [7]
VBIF28_PMU
E1 DVDD18_IO
R2122 0R SBST_VOUT_PMU [7]
[6,7,8,9,15,18,19,20,21,22] WLED BST SPEAKER 0402
VSYS C5 VBAT_SMPS VBAT_SPK C3

A6 WBST_LX AVSSN18_AUD D3 6331_AU_V18N [6]

B6 C2142
C2114

C2115

C2116

C2117
C2113

BL Driver WBST_LX
C2112

C2118 C2119 D6 D4 C2122 10uF

WBST_OVP AU_LIP AU_LOLP [6]
AU_LIN C4 AU_LOLN [6]
NC

NC

B7 IWLED1
4.7uF

4.7uF

4.7uF
4.7uF
2.2uF

1.0uF 1.0uF C7 C2 CODEC_SPKP [18]100nF

IWLED0 SPK_P
2.2uF

TP2105 TP2101 D2 CODEC_SPKN [18]

SPK_N
SW CHG
K7 CHR_LX
VDIG DVDD18_DIG F1
[6,7,8,9,15,18,19,20,21,22] 16mil L7 GND
CHR_LX
M6 CHR_LX
GND GND GND GND

C2124
PL2109 1.0uH 60mil CHR_LX

100nF
GND VSYS 75mil M7 CHR_LX
VREF C2125
Close to MT6332
10K / 1%
NC

NC

NC

NC

BATTERY CONNECTOR VIO18_PMU 4.5V J4 AVDD120_BOOT VREF J13

C2123

1.0uF

TP2106
TP2102 TP2104
TP2107 C2126 K9 1.0uF
[6,11,12,15] AVDD45_CS
Battery Connector [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] L9 AVDD45_CS GND_VREF H13
0201

VBAT 10uF 75mil M8 AVDD45_CS

14

13

GND M9
B B
AVDD45_CS GND
R2150

B GND
VSYS
7 6
K10 AVDD45_BAT
DDR VREF
8 90mil 90mil L10 AVDD45_BAT AVDD_DDR F5 8mil [2,4,7]
5 R2103 1K VDRAM_PMU
0201 BAT_THERM [7] M10 AVDD45_BAT
C2127
D2106

R2104 68K/1% J12 F6 C2128 C2129

0201 VBIF28_PMU AVDD45_BATSNS AVSS_DDR
4 1 10uF
BAT_CON_ID [6]
H9 GND 100nF 1.0uF
3 BM25-4S 2 FV2102 FV2103 [7] BAT_THERM BATON
GND
D2101 FV2104 [6,15] PMU_CHGIN R2127 NC K13 E5
0201 AVDD50_DRVCDT VREF_DDR3_AP
C2130 GND GND
12 9 VREF_DDR3_DQ E4
500mW [7] CS_P J10 CS_P
F4
4mil
[4]
11 10 VREF_DDR3_CA DDR_VREF
1.0uF C2131 [7] CS_N J9 CS_N
J1 PVDD300_USB
AUX ADC REF
J2101 60mil
GND GND GND GND 1.0uF J2 PVDD300_USB
GND J3 H12
16

15

PVDD300_USB AVDD33_AUXADC
K1 PVDD300_USB
GND
35V rating C2132
K2
K3
PVDD300_USB
PVDD300_USB
AVSS33_AUXADC G8
C2133
R832 GND GND_WBST A5
[15,22] VBUS_USB_IN 1206 L1
0603 PVDD300_DCIN GND_VDRAM A10
Kelvin connection 0R L2 PVDD300_DCIN GND_VDRAM B10 1.0uF
16mil L3
Rfg M1
PVDD300_DCIN
PVDD300_DCIN GND_VDVFS2 A7
GND 60mil M2 A8 GND
R2105 0.01R WPC_PWROUT PVDD300_DCIN GND_VDVFS2
0805 NC M3 PVDD300_DCIN
Rserved for wireless C12
GND_VRF18_1
TP2103 charger input. SW GND_VRF18_2 C13
K4 PVDD120_CHRIN_SNS GND_VPA D13
зâ×°
SH2102

C1
SH2101

GND GND_SPK
J5 PVDD120_CHRIN GND_SPK D1
PVDD120_CHRIN J6 PVDD120_CHRIN GND_IBST C6
D2103 K5 PVDD120_CHRIN GNDA_SMPS D7
0201

0201

K6 PVDD120_CHRIN GNDA_SMPS D8

CHANGE FOR NEW TYPE

C2134

L4 PVDD120_CHRIN GNDA_SMPS E6
0603

L5 PVDD120_CHRIN GNDA_SMPS E7
NC
NC

L6 PVDD120_CHRIN GNDA_SMPS F7
CS_P [7] M4 PVDD120_CHRIN
25V rating M5 PVDD120_CHRIN GND_LDO F8
F9
CS_N [7] GND_LDO
FLASH GND_LDO F10
GND L12 F11
VDD50_FLASH GND_LDO
L13 VDD50_FLASH GND_LDO G9
DVSS18_IO G6
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] [7] SBST_VOUT_PMU L11 VDD55_TORCH DVSS18_IO G7
GNDA_SWCHR H7
M11 FLASH1 GNDA_SWCHR H8
VIO18_PMU [20] FLASH1
M13 FLASH1
PVSS120_CHRIN J7
[20] FLASH2 M12 FLASH2 PVSS120_CHRIN J8
Read Address 0xC5 K8
100K PVSS120_CHRIN
WriteAddress 0xC4 R2106 J11 L8
10K / 1%

0201 ISET PVSS120_CHRIN GND

GND

U2103 CW2015CSAD
0201

R2120 1K 2 8 FUEL_SDA4 [5]

0201 CELL SDA
R2119

R2121 1 2 100R 3
VDD SCL
7
0201 FUEL_SCL4 [5]
1 5 INT_FUEL_GAUGE [5]
CTG ALRT
QSTRT
GND

EP
4

C2139 C2138

100nF 100nF

A A

R2120 ºÍC2138 ¿ÉÒ

ÔÅä±È£¬ÐèÒ
ªºÍÔ
-³§È·ÈÏ¡£

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 7OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

[6,7,16] VBAT_BUCK

BlinkLED Driver

4
+
I2C Address: 45H

G
RGB LED
LED2301

B
1

3
19-237/R6GHBHW-C01/2T
19-237/R6GHBHW-C01/2T
C2409

100nF

[6,21] VIO28_PMU

CHARGE_LED_R R2323 0R
[6] 0201
CHARGE_LED_G R2324 0R
[6] 0201
CHARGE_LED_B R2325 0R
[6] 0201

U2301 D2408 D2409 D2410

[5,15,20,21] SENS_SCL3 10 1
SCL LED0
[5,15,20,21] SENS_SDA3 9 2
SDA LED1
8 3
NC LED2
7 4
NC INTN
6 5
NC VCC
GND

AW2013DNR C2301
11

100nF GND

C C

MOTOR DRIVER CIRCUIT

WILL 3.3v

U2302

VSYS 4 1 VDD_3.0_HAPTIC
IN OUT 2.2uF [8]
[6,7,9,15,18,19,20,21,22]

C2310
3 C2317
EN
GND

GND

2.2uF
R2301

[5] GPIO98_HAPTIC_EN
2

5
0201
100K

B B

[8] VDD_3.0_HAPTIC MOTOR CONTACT

C2312

1.0uF

J2301 J2302
0R

C2315

100nF

R2314
0201

DSD-XM-TP-007/XM-217-XC-056-SP
DSD-XM-TP-007/XM-217-XC-056-SP U2001-A
TO MTK MT6331
VIBR_PM
B2301
U VIBR_PMU [6]
NC
[8] DRV_DD B2301
6

D2301

NC
VDD

VIH=1.0V VIL=0.4V 1
[5] GPIO99_HAPTICS_EN EN VIBR
8
VDP
R2309 0R GP_CLK_1B
[5] 0201 PWM 2 PWM U2303 VDN
5
GPIO131_MOTOR_PWM
ISA1000
R2307 R2302 Rf FV2302 FV2301
0R 3 4 NC
[8] DRV_DD 0201 MODE GAIN 0201
FV2301 change to 0OHM when NOT USE IC
GND
GND
GND

GND

ERM=GNDR2308 0201 NC
C2313

4.7nF

GND LRA=VDD
FV2301 0欧姆电阻
11
9
10

NC NC
ISA1000

GND GND
GND GND

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 8OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

C 4-Phase Buck C
4-Phase Buck I2C address: 0X68 (Write:0xD0, Read:0xD1)

[2,9] DVDD_DVFS1
U2401
[6,7,8,9,15,18,19,20,21,22] VSYS DA9210-21UK2
100mil
DVDD_DVFS1 [2,9]
LX1 A1
C2401 10uF PL2401 0.47uH
25mil A3 VDD1 LX1 B2 0.72V--1.155V For Core 1.0V
A5 VDD1 LX1 B4
C2402 10uF
25mil J3 VDD2 LX2 J1
J5 H2 PL2402 0.47uH
VDD2 LX2 C2405
LX2 H4
C2403 10uF
25mil A9 VDD3
A11 VDD3 LX3 A13 10uF
B10 PL2403 0.47uH
C2404 10uF LX3
25mil J9 VDD4 LX3 B12 GND
J11 VDD4
LX4 J13
H10 PL2404 0.47uH
GND C2406 1.0uF LX4
6mil H6 VSYS LX4 H12
0201

GND G7 VSS_QUIET

4 mil GND trace with

good shielding from baseband (Differential)
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU R2401 0R
4mil 0201 G13 VDD_IO VOUT_SENSE E1 DVDD_DVFS_1_PMIC_FB [2]
DVDD_DVFS_1_PMIC_FB

VSS_SENSE D2 DVDD_DVFS1_GND [2]

DVDD_DVFS1_GND

[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU R2407 NC

4mil 0201

[4] C13 F2
Note: 24-1 EXT_4P_PMU_EN
Buck EN controlled by SRCLKEN0 or I2C
EN_CHIP VDDCORE
[4,6,7,10] F12 GPIO0
ENBB_6169
TP C7
D12 VERROR/GPIO1 C2407

R2403
E13 IPHASE/GPIO2 220nF
GPIO103

0201
[5] GPIO103 G1 BUCK_CLK/GPIO3 VSS_NOISY C3
VSS_NOISY C5
[4,6,7] R2404 NC B8 G3
WATCHDOG 0201 AC_OK/GPIO4 VSS_NOISY GND

0R
VSS_NOISY G5
EINT7_4PHASE_BUCK C1 OC_PG/NIRQ VSS_NOISY C9
[5] EINT7_4PHASE_BUCK C11
VSS_NOISY GND
VSS_NOISY G9
H8 NCS/SYNC/GPIO5 VSS_NOISY G11

J7 SO/INPUT/GPIO6
[5,7] A7 GND
SCL1 SK/CLK
NC E3
[5,7] B6 SI/DATA NC E11
SDA1

GND R2405 NC 4P_PMU_VFBN

0201

B B
4mil R2406 NC 4P_PMU_VFBP
Note: 24-2
VSYS 0201

Schematic design notice of "24_POWER_EXT_4PHASE_BUCK" page.

Note 24-1: DA9210's GPIO0 = SRCLKENA0 => Buck EN controlled by SRCLKEN0 or I2C.

Note 24-2: BOM option to select which 4-pahse buck be applied? DA9210 or second source.

R2402 R2404 R2405 R2406

DA9210 N/M N/M N/M N/M

2nd source 10K 0R 0R 0R

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 9OF 23
 R3101 62¦¸
1 2

R3102

R3103
RF_TXDET_MT6169 0201 RF_TXDET [12]

1
0201

0201
100R
2

100R
2
GND GND

RF_TX_BBIP [4]
RF_TX_BBIN [4]
RF_TX_BBQN [4]
RF_TX_BBQP [4]
[11] RF_HB2_TX_MT6169 RF_RX1_BBIP [4]
[11] RF_HB1_TX_MT6169 RF_RX1_BBIN [4]
RF_RX1_BBQN [4]
[11] RF_MB2_TX_MT6169 RF_RX1_BBQP [4]
[12] RF_MB1_TX_MT6169
RF_RX2_BBIP [4]
[11] RF_LB4_TX_MT6169 RF_RX2_BBIN [4]
[12] RF_LB3_TX_MT6169 RF_RX2_BBQN [4]
[12] RF_900_PRX_MT6169_RFIP1_LB1 RF_RX2_BBQP [4]
[12] RF_900_PRX_MT6169_RFIN1_LB1

[12] RF_B40B41_PRX_MT6169_RFIP1_HB1
GND
[12] RF_B40B41_PRX_MT6169_RFIN1_HB1

M13

M15
C14

D14

H15

G14

H14
C15

N15

N14

N13

H13
G13

E13
E14
K14
B15

K13

E15
F13
F15

F14

L13

L14
J14

J15

J13
M7

M6

M5

M4
N8

N7

N5

N4
U3101

TST4 H12

RFIN1_LB1

RFIP1_LB1

TX_LB1

TX_LB2

TX_LB3

TX_LB4

TX_MB1

TX_MB2

TX_HB1
RFIN1_HB1

RFIP1_HB1

TX_HB2

TXO_GND
TXDET

TXO_GND
TXO_GND
TX_BBIP

TX_BBQP

RX1_BBIP

RX1_BBQP

RX2_BBIP

RX2_BBIN

RX2_BBQN

RX2_BBQP
TX_BBIN

TX_BBQN

RX1_BBIN

RX1_BBQN

TXO_GND
TXO_GND
TXO_GND
TXO_GND

TXO_GND
TXO_GND
DET_GND
TST3 M12
TXBPI K10 LTE_TXBPI [4]
VRT N10 VRT
TST2 M10
M9 only 5% resistor

1
TMEAS
RF_B34B39_PRX_MT6169_RFIP1_MB1 B14 RFIP1_MB1 BSI_CK K6 LTE_RFIC0_BSI_CK [4]
[12]

0201
BSI_EN J7 LTE_RFIC0_BSI_EN [4] R3105
[12] B13 RFIN1_MB1 BSI_D0 J6
RF_B34B39_PRX_MT6169_RFIN1_MB1 LTE_RFIC0_BSI_D0 [4] 2K,1%
BSI_D1 J5
A15 K4 LTE_RFIC0_BSI_D1 [4]

2
RFIP1_LB2 BSI_D2 LTE_RFIC0_BSI_D2 [4]
A14 RFIN1_LB2 GND
[12] RF_B7_PRX_MT6169_RFIP1_HB2 B12 RFIP1_HB2
GND L12
A12 RFIN1_HB2 GND L11
[12] RF_B7_PRX_MT6169_RFIN1_HB2
GND L10
A11 RFIP1_LB3 GND L9
[12] RF_B5_PRX_MT6169_RFIP1_LB3
GND L8
[12] RF_B5_PRX_MT6169_RFIN1_LB3
B11 RFIN1_LB3 GND L7
GND L6
[12] RF_B2B3_PRX_MT6169_RFIP1_MB2 B10 RFIP1_MB2 GND L3
GND K12
[12] RF_B2B3_PRX_MT6169_RFIN1_MB2 B9 RFIN1_MB2 GND K9
GND K8
A9 K7
[12] RF_B1_PRX_MT6169_RFIP1_HB3 RFIP1_HB3
MT6169 GND
GND K3
A8 RFIN1_HB3 GND J12
[12] RF_B1_PRX_MT6169_RFIN1_HB3 J11
GND
B8 RFIP2_LB1 GND J10
GND J9
B7 RFIN2_LB1 GND J8
GND J4
[13] RF_B41_DRX_MT6169_RFIP2_HB1 B6 RFIP2_HB1 GND J3

[13] RF_B41_DRX_MT6169_RFIN2_HB1 A6 RFIN2_HB1

A5 RFIP2_LB2 GND H11
GND H10
B5 RFIN2_LB2 GND H9
GND H8
[13] RF_B7_DRX_MT6169_RFIP2_HB2 B4 RFIP2_HB2 GND H7
GND H6
B3 RFIN2_HB2 GND H5
[13] RF_B7_DRX_MT6169_RFIN2_HB2
GND H4
[13] A3 RFIP2_MB1 GND H3
RF_B3_DRX_MT6169_RFIP2_MB1
GND G12
A2 RFIN2_MB1 GND G11
[13] RF_B3_DRX_MT6169_RFIN2_MB1
GND G10
A1 RFIP2_LB3 GND G9
GND G8
B1 RFIN2_LB3 GND G7
GND G6
GND G5

VDCXO_DIG
EN_26M_BB
RFIN2_MB2
RFIP2_MB2

RFIN2_HB3
RFIP2_HB3

G4

V28_ESD1
GND

OUT_32K

CLK_SEL

VRXHF2
VRXHF1
G3

32K_EN

XMODE
GND

VTCXO
VTXHF

VRXLF
VTXLF
XTAL2
XTAL1
GND G2

TST1

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
XO3
XO4
XO2
XO1

VIO
GND

F1

F3

G1
H2

F2
H1
M1

K1
K2

L2
N1
N2

C3
C4
C5
C6
C7
C9
C10
C11
C12

D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
C1

C2

D2

E2

32K_EN J2

C8
D13
M11
N11
K11
M8
L4
M3
J1

E1
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12

F4
F5
F6
F7
F8
F9
F10
F11
F12
XMODE

1
R3107

0201
GND
[13] RF_B39_DRX_MT6169_RFIP2_MB2 1 1K
0201 R3108 VTCXO_0_PMU [3,6,10]

2
[13] RF_B39_DRX_MT6169_RFIN2_MB2
1K C3112 C3104
GND VIO18_PMU

[7] VRF18_0_PMU
[13] RF_B40_DRX_MT6169_RFIP2_HB3 C3106 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
2

[13] RF_B40_DRX_MT6169_RFIN2_HB3 100nF 100nF C3102 C3103

C3105
GND C3101 100nF
GND
100nF 100nF
100nF GND100nF
GND
1 C3116
GND
2 2.2uF VIO18_PMU
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]

MT6169_XO3_CLK GND
[6] MT6169_XO4_CLK
Far end Cap. For PMIC stability
CLK_WCN
[4] LTE_LTEX26M_IN

ENBB_6169 [4,6,7,9,10]

ENBB_6169 [4,6,7,9,10]

XTAL2

XTAL1 GND

C3108

100nF

GND

1
VTCXO_0_PMU [3,6,10]

GND

NC

VCC VCON
OUT

NC
U3102 For power VTCXO2 star connection

6
KT2520K26000DCW28QAS R3380
1 2 VTCXO2 [12,13]
0402
1 1 0R
C3109 C3383
NC C3110
C3383 is power
2 1.0uF2 capacitor of PMU.
100nF
GND GND GND
 5 4 3 2 1

B5 TRX
L3217 1.8nH
1 2
[12] RF_B5_PA_DPX RF_B5_PA_PA
1 C3257

1
C3260
9.1nH 1.8pF
2

2
GND
GND

B8 TRX
L3216
1 2
[12] RF_B8_PA_DPX RF_B8_PA_PA
1.8nH
1 C3266

1
D
C3267 D

9.1nH 1.8pF
2

2
GND
GND

B3 TRX

C3207

56pF
RF_B3_PA_PA

2
[12] RF_B3_PA_DPX
1
C3211

1
C3210 2 0201 1pF
3.9nH
GND

2
B2 TRX
GND

L3207
[12] RF_B2_PA_DPX
1 2 RF_B2_PA_PA RFMD and Murata
1
5.6nH
1
have pin to pin products. 4G PA input need LPF for harmonic rejection
NC C3223 Please check latest

3/4G_PAIN_LB
C3222 9.1nH
QVL and matching R3214

20201
0.5pF C3225
2 2 1 2
accordingly RF_LB4_TX_PA

1
RF_LB4_TX_MT6169 [10]
33pF

RF_LB4_TX_1
GND GND 2
3.3pF

B1 TRX
0201 R3226 1
L3206
C3226
1 1 2
[12] RF_B1_PA_DPX RF_B1_PA_PA
1 3.3pF 20201
3.0nH 1
NC C3216
GND GND
C3215

3/4G_PAIN_MB
NC
2 2
L3215

20201
GND GND

16
19
18
17
21
20
RF_MB2_TX_PA 1 2

1
2 RF_MB2_TX_MT6169 [10]
4.7nH

RF_MB2_TX_1
C3217

LB1/B8
LB2/B5
LB3/B20
LB4/B13/B28B
MB1/B3
LB5/B12/B17B28A
0201
[7,11] VPA_PMU 1 C3254
22 15 C3228 33pF
1 1 GND GND 1pF
C3233 C3243 23 MB2/B2 GND 14 02012
24 13 1 1pF
100pF 20201 GND RFIN_L
25 12 GND GND GND
470nF MB3/B1 RFIN_M 60mil VBAT [6,7,12,15]
2 26 MB4/B4 NC 11 2
GND GND 27 10 0201
GND NC
28 9 22pF 1C3249
VCC2_2 NC C3248

L/M/H PA
29 8 C3202
[11] VPA_VCC1 VCC1 VBAT 20201
1 30 VCC2 VIO 7 1
C3244 1 100pF

42 RX2/B41RX/BYPASS/B7
C3245 31 GND SCLK 6 1 0201 2 MIPI0_SCLK [4]
100pF 32 5 R3202 100R 100nF
02012 B34/39 SDATA MIPI0_SDATA [4]
C C

33 4 R3278 GND GND

470nF HB1/B38 NC/TDS/GND 1 2
2 34 GND RFIN_H 3 0201 VMIPI_PMU [6] For power LTE_VMIPI star connection

39 HB4/B41/AXGP
GND GND 35 HB2/B7 2 0R
GND

38 HB3/B40/B30
1C3241 LTE_VMIPI

41 RX1/B40RX
[12]

TDS_PAIN_HB
36 1

RF_B34B39_PA_PA
[7,11] VPA_PMU GND GND L3238

20201
1 1nF
1 20201 1 2 RF_HB2_TX_1
GND

1
C3205 RF_HB2_TX_MT6169

GND
GND
GND
40 GND

GND
GND
GND
GND
GND
GND
C3242 [10]
100pF 20201 4.7nH
470nF C3252 33pF
GND 2 2
2 GND 0201

50
37

48
49
43
44
45
46
47
0201

2.0*1.2
GND GND

SKY77643
U3203
U3216
C3250 C3251
C3276 LF2012-L1R4NAA GND
1pF 1

B34&B39 TRX
1
33pF C3206 1pF
0201

RF_B34B39_PA_LPF_IN GND
3
RF_B34B39_PA_LPF_OUT 1 GND GND
2

1
[12] RF_B34B39_PA_TXM OUT IN

1
0201
GND
39pF

1
3/4G_PAIN_HB
1
1

L3214
L3234 R3230 C3256

0201
L3223 NC
NC

2
NC 2 1 RF_HB1_TX_1

1
RF_HB1_TX_MT6169 [10]

2
2
2

3.3nH
IF B34/B39 reuse TXM, 8.2pF
GND GND GND GND R3201 R3231
this path can be deleted 1 1
0201 0201
GND U3215 2 2
SAFEA2G35MF0F0A This path is no use for Sky77643
1.2pF 1.2pF
G 5

L3210

B40 TRX
GND 3 G GND GND This path is reserved for 3M Co-PCB
C3286 C3288
0201

1 RF_B40_TRX_BAW_IN 2 1 RF_B40_TRX_PA (Change Sky77643 to other vendor's M/H

IN
RF_B40_TRX_1 2 1 RF_B40_TRX_BAW_OUT
4 OUT 1.0nH 1
2

[12] RF_B40_TRX_TXM PA which support B34/B39 and TXM can't

G

2.7nH
12pF 5.1nH C3258 LPF for more support B34/B39 TXM reuse)
1
2

0.5pF
L3221 C3259
NC
margin on Tx

1.4*1.1
GND
L3222 NC spurious
2
1

GND GND
GND GND C3261
RF_B40B41_PRX_PA 1 2
0201 RF_B40B41_PRX_PA_1 [12]
0R

B7 TX
L3209
0201

[12] RF_B7_PA_DPX RF_B7_PA_PA

2

1
C3255 12pF 1 C3289

NC

1.6*0.8
B 2 2 NC B

GND
GND

6 1

Bypass path
GND

GND GND
GND

C3262 L3211
0201

0201

RF_B40B41_TRX_LPF_OUT 5 2 RF_B40B41_TRX_LPF_IN RF_B40B41_TRX_PA_BYPASS

2

[12] RF_B40B41_TRX_TXM_BYPASS OUT IN 1 1

1
C3271 22pF 1 C3264 22pF
4 3 C3265 C3263
GND

GND

GND GND
NC NC
2 2 U3210 NC NC
LF1608-B2R5KCB 2 2
GND GND
GND

B41 TRX
GND
G 5

GND
L3213
GND

C3285 3 G RF_B41_TRX_PA
IN 1 RF_B41_TRX_FBAR_IN2 1
2 1 RF_B41_TRX_FBAR_OUT 4
[12] RF_B41_TRX_TXM OUT 1.5nH
G

1
1.8nH
2
1
2

C3272
U3220 C3273
NC
2

0.5pF GND
L3219 SAFEA2G60MA0F0A NC

1.4*1.1
NC
2

L3218 [2,3,5,6,7,9,10,14,15,16,18,19,20,21,23]
2
1

1 GND VIO18_PMU
GND
GND GND

1
R3232

0201
390K 1%
B9081 port4 is ANT (Pin to Pin DGAH74S03 partial 41 Band)

2
ACPF-8240 port1 is ANT [4] AUX_IN1_NTC

NTC3201
885049 port4 is ANT

1
0201
2
GND

NTC3201 close to PA , and located in the same layer A

VPA_VCC1 and VPA PMU need to be connected after Cap

Thermistor / To sense board level temperature
10mil
R3215
1 2
[11] VPA_VCC1 0201
0R

50mil
[7,11] VPA_PMU VPA_PMU [7,11]
1
C3234

470nF Title
2
32_RF_MT6169_RF_TX
MTK Confidential
Size
GND
A0
Far end Cap. For PMIC stability
5 4 3 2
Date: 1
Friday, November 07, 2014 Sheet 11 of 23
 5 4 3 2 1

B7 TRX 1.8*1.4
[11] RF_B7_PA_DPX

[10] RF_TXDET C3315

20201
VBAT [6,7,11,15] RF_B7_PRX_DPX_RFIP1
RF_B7_PRX_MT6169_RFIP1_HB2 [10]

1
1 U3308
SAYEY2G53CA0F0 2.7pF
C33481 C3317
22uF 1

SP16T
1 2 RF_B7_TRX_DPX 6 3

1
[12] RF_B7_TRX_TXM ANT TX

1
C3339 C3324
02012 RX 1 L3312
U3307 02012 0.6nH

ASM_Main
1nF RX 8 L3316 NC
SKY77916

1
2 1 18nH

G
G
G
G
L3315

2
2
GND GND GND L3318
2.4nH

7
5
4
2
CPL_O 17
16

15
18

14

13
19

12
0.5pF

20201
C3321

2
D
D

GND

GND
GND

GND

GND
NC

GND
10K / 1%
2 1
R3301 GND

1
APC1_TXM 0201 APC1 [4] GND RF_B7_PRX_DPX_RFIN1 RF_B7_PRX_MT6169_RFIN1_HB2 [10]
GND GND 2.7pF
R3305 close to

1
1
CON3303 20 GND GND 11
CON3303

0201
R3302
C3310 GND VBAT C3304 24K/1%

20201
0201
2 C3318 5 6 21 10 NC
GND 3 4
3 1 RF_ANT_TRX_CARKIT RF_ANT_TRX_TXM

B1 TRX
0201

1
GND RF ANT VCC

2
4 2 1 22 9 2
GND

L3322
33pF CON3301 33pF GND GND
NC NC 23 GND VRAMP 8

1
0201 0201 ECT818000163 GND [11]

1.8*1.4
C87P101-00003-H 24 TRX14 VIO 7 LTE_VMIPI
GND
L3317 L3346

2.5*2.5*1.5mm 25 TRX13 SDATA 6 MIPI1_SDATA [4]

2
2.0*2.0*0.6mm

47nH
1
R3303 100R
2
GND GND [12] RF_B1_TRX_TXM 26 TRX12 SCLK 5 0201 MIPI1_SCLK [4] [11] RF_B1_PA_DPX
GND
TRX11 GND C3323

20201
[12] RF_B2_TRX_TXM 27 4 2 1
C3301 RF_B1_PRX_DPX_RFIP1
22pF U3306 [10]

1
[12] RF_B3_TRX_TXM TRX10 RFIN_H 10nF RF_B1_PRX_MT6169_RFIP1_HB3
28 3 02012 SAYEY1G95HA0F0A
GND L3309 2.4pF
[12] RF_B5_TRX_TXM 29 TRX9 RFIN_L 2

1
C3340 1 2 RF_B1_TRX_DPX 6 3 L3310

1
[12] RF_B1_TRX_TXM ANT TX L3308
[12] RF_B7_TRX_TXM 30 TRX8 GND 1 1 1.5nH RX 1 NC NC
GND 8

1
1 RX

TRX1
TRX3

TRX2
TRX6

TRX5

TRX4
TRX7
GND

2
GND
39

G
G
G
G
L3311

2
L3319

20201
C3325
NC 0201 3.0nH RF_B1_PRX_DPX_RFIN1

7
5
4
2
[10]

2
RF_B1_PRX_MT6169_RFIN1_HB3

1
2

36

37
32

33

34

35
31

38
GND 2.4pF
GND GND GND

[12] RF_B34_PRX_TXM
[12] RF_B39_PRX_TXM 2G_PAIN_HB
B5 TRX
[11] RF_B40_TRX_TXM
MT6169 TX Ouput need a DC block(MUST).
[11] RF_B41_TRX_TXM
[11] RF_B40B41_TRX_TXM_BYPASS

20201
R3333
1 2
RF_MB1_TX_1 C3314
[12] RF_900_PRX_TXM [11] RF_B5_PA_DPX

1
0201 RF_MB1_TX_MT6169 [10]
33pF
0R

1
[11] RF_B34B39_PA_TXM
C3327

0201
R3306 U3313 RF_B5_PRX_DPX_RFIP1 1 2 RF_B5_PRX_MT6169_RFIP1_LB3 [10]
NC SAYEY836MCA0F0A 6.2nH
C3330

1
2
1 2

1
RF_B5_TRX_DPX 6 ANT TX 3 L3328
GND [12] RF_B5_TRX_TXM L3329
1
C C

4.3nH RX 15nH
8 NC
RX

2
20201

2
C3335

G
G
G
G
1
R3334 212R
RF_LB3_TX_1 C3334 L3330
RF_LB3_TX_MT6169 [10] 1 2

1
0201 RF_B5_PRX_DPX_RFIN1 RF_B5_PRX_MT6169_RFIN1_LB3

7
5
4
2
8.2nH [10]

1
33pF

2
6.2nH

1
1.8*1.4

0201
R3327 GND

2G_PAIN_LB

0201
R3328
430R 1% GND
430R 1%

2
2
GND GND

B40/B41 PRX
Pi attenuation for LB 8PSK TX in RX band noise

1C3349

20201
RF_B40B41_PRX_BALUN_RFIP1 RF_B40B41_PRX_MT6169_RFIP1_HB1 [10]

GND 1 GND BAL 3

C3352

2
[11] RF_B40B41_PRX_PA_1 1 2 RF_B40B41_PRX_BALUN
2 UNBAL BAL 4 L3343 L3341
3.0nH NC 3.0nH

1C3353
L3344

1
U3323

20201
L3350

1
NC 1pF TFSZ06052460-3310A2
RF_B40B41_PRX_MT6169_RFIN1_HB1 [10]
0201 RF_B40B41_PRX_BALUN_RFIN1

??????????????? GND GND

[11] RF_B3_PA_DPX

B8 TRX
B B3 TRX C3361
U3309
SAYEY1G74BC0B0A
[11] RF_B8_PA_DPX B

SKY13489
20201

1 2 RF_B3_TRX_DPX 6 ANT TX 3
[12] RF_B3_TRX_TXM C3316
4.3nH 1 RF_B3_PRX_DPX C3328
1

RX
RX 8 1.5pF U3322 1
RF_900_PRX_SAW_RFIP1 2 [10]
RF_900_PRX_MT6169_RFIP1_LB1
GND

SAYEY897MCA0B0A
1

6.2nH
G
G
G
G

1 C3331
1

C3362 GND
1

L3347 L3314 L3313 SKY13489

1pF 1 2 RF_900_PRX_SAW 6 3
7
5
4
2

6.2nH 5.6nH [12] RF_900_PRX_TXM ANT TX

1
20201

1.8*1.4
L3333

1
NC 4.3nH 1
GND RX
2

8 15nH L3334

20201
2

C3307 RX
2

B2 GND RF_B2B3_PRX_BALUN_RFIN1 NC

G
G
G
G
RF_B2B3_PRX_MT6169_RFIN1_MB2 [10]

2
GND L3331

2
GND GND U3317 18pF C3336
GND

7
5
4
2
8.2nH 1 2 [10]

1
RF_900_PRX_MT6169_RFIN1_LB1
GND

1 GND BAL 3 RF_900_PRX_SAW_RFIN1

1
A1 L3305 L3335

2
RF1 6.2nH
2 4 NC NC GND

1.8*1.4
A2 UNBAL BAL GND
ANT

2
TFSZ06051897-3317A1

2
20201
A3 RF2 C3311
[10]

1
RF_B2B3_PRX_MT6169_RFIP1_MB2
RF_B2_PRX_SWITCH

[11] RF_B2_PA_DPX RF_B2B3_PRX_BALUN_RFIP1

18pF

B2 TRX
B3 VDD V1 B1

U3301
SAYEY1G88BA0B0A BPI_BUS8
U3302 [4]
20201

C3302

C3303
5.0pF

B34&B39 PRX
RF_B2_TRX_DPX 1
[12] RF_B2_TRX_TXM 6 3
1

ANT TX C3313
1 RF_B2_PRX_DPX
1

8.2pF RX SKY13489 V1 20201 33PF

GND

RX 8
ANT - RF1 0
1

1
G
G
G
G

C3399
1

L3303 ANT--RF2 1
18pF GND
1

GND
7
5
4
2

20201 VTCXO2 GND

3.3nH GND L3302 1C3312
[10,13] GND
2

L3304 U3305

1.8*1.4
NC
2

1
GND

1
3.3nH 20201 L3340 L3332 C3341 2.7pF
2

SAWFD1G90BK0F0A
1UF NC 8.2nH
GND RF_B34B39_PRX_MT6169_RFIP1_MB1 [10]

3.6nH
GND GND

7
8
5

02012
0201

2
GND C3342

GND
GND
GND
1 LCH
RF_B39_PRX_SAW 6

1
20201 2
[12] RF_B39_PRX_TXM BAL_PORT1 L3336
18pF
3.3nH

20201
4 HCH
RF_B34_PRX_SAW 9

L3337
1
[12] RF_B34_PRX_TXM BAL_PORT2
C3343 RF_B34B39_PRX_MT6169_RFIN1_MB1 [10]

1
GND
GND
GND
1
L3342 18pF C3344 2.7pF

1
NC L3338

1.5*1.1

2
3
10
A

6.8nH A

2
GND
GND GND

Title
33_RF_MT6169_RF_PRX
MTK Confidential
Size
A0

Date: Friday, November 07, 2014 Sheet 12 of 23

5 4 3 2 1
 5 4 1

3 2

B3 DRX 1.1*0.9

1C3412

5.6pF
20201
U3406 GND
SAFFB1G84FL0F0A RF_B3_DRX_SAW_RFIP2 RF_B3_DRX_MT6169_RFIP2_MB1 [10]

G 2
C3414 4
OUT
[13] RF_B3_DRX_SWITCH 1 2 RF_B3_DRX_SAW 1 IN L3410 L3409
2.2nH G 3

G
3.0nH NC

1C3416

5.6pF
D
D

20201
5
0201
L3414 GND RF_B3_DRX_SAW_RFIN2 RF_B3_DRX_MT6169_RFIN2_MB1 [10]
1.2pF

DRX ANT: 1805-2690MHz GND

W3402 W3400 W3401

DRX Car Kit SP6T

B7 DRX
RF_B40_DRX_SWITCH[13]

1
1.1*0.9
RF_B39_DRX_SWITCH[13]

U3402 RF_B3_DRX_SWITCH[13]
RF1636
GND C3420

20201
U3408 GND
GND RF_B7_DRX_SAW_RFIP2

10

11

12

1
SAFFB2G65FB0F0A RF_B7_DRX_MT6169_RFIP2_HB2 [10]
GND

G 2
RF1

RF2
GND
4.7pF
L3423

0201
4

1
OUT L3417
0R
RF3 13 RF_B7_DRX_SAW 1 L3416
1

1
0201 [13] RF_B7_DRX_SWITCH IN NC
C3438

20201
R3401 R3400 OUT 3 2.0nH

G
0R GND 14

1
0R 3 4 RF_ANT_DRX_CARKIT 100pF C3418

1
0201 0201 C3419

20201

2
0402
2 1 [4]

5
18pF

L3499
15
47nH2

C3522 EPAD LTE_RF_BPI_OUT21 L3415 RF_B7_DRX_SAW_RFIN2 [10]

1
CON3401 C3499 33pF 9 GND RF_B7_DRX_MT6169_RFIN2_HB2
ANT NC GND

1
L3404

2
C3424 C90P106-00004-H CTL3 4.7pF
0201 0201
NC C3423 LTE_RF_BPI_BUS20
NC

2.0*2.0*0.9mm
NC CTL2 2 0201 GND
C3439 [4]
GND

47nH2
GND GND GND 3
CTL1 100pF
GND

GND

VDD
RF4

RF5

RF6
GND

B39 DRX
LTE_RF_BPI_BUS19 [4]

4
GND

1.1*0.9
0201
[13] C3447
RF_B41B_DRX_SWITCH
100pF
C
C

GND
GND

C3413
[13]

5.0pF
RF_B41A_DRX_SWITCH U3407

???????????????
VTCXO2
SAFFB1G90FB0F0A RF_B39_DRX_SAW_RFIP2
1C3435

2
RF_B7_DRX_SWITCH[13] [10,12,13] RF_B39_DRX_MT6169_RFIP2_MB2 [10]

G 2
20201 C3415 4
OUT
10NF 1 2 RF_B39_DRX_SAW
1 IN L3412
[13] RF_B39_DRX_SWITCH L3413
1.5nH G 3

C3417
3.3nH NC

5.0pF
GND

2
L3411 RF_B39_DRX_MT6169_RFIN2_MB2 [10]
GND RF_B39_DRX_SAW_RFIN2
NC

GND

B1 DRX U3404
GND
1.1*0.9
RF_B40_DRX_BALUN_RFIN2
C3405 4.3pF
RF_B40_DRX_MT6169_RFIN2_HB3 [10]
SAFFB2G14FA0F0A

2
G 5
C3432 3
OUT L3401
1 2 RF_B40_DRX_SAW
1 IN
[13] RF_B40_DRX_SWITCH 2.7nH L3403
OUT 4
1.0nH NC

G
C3401

2
L3402

2
RF_B40_DRX_BALUN_RFIP2 RF_B40_DRX_MT6169_RFIP2_HB3 [10]
NC GND
4.3pF

??????????????? GND

B
??????????????? B

B41B DRX U3412

GND 1.1*0.9 RF1628A VC1 VC2
RF1 - RF2 1 0
???????????????
SAFFB2G60AA1F0A C3436
2.7nH RF1 - RF3 1 1
G 2

C3421 1 2
OUT 4
[13] RF_B41B_DRX_SWITCH RF_B41B_DRX_SAW_IN1 RF_B41B_DRX_SAW_OUT
1

IN
OUT 3
G

6.8pF
1

L3418 L3431 0.5pF

5

3.3nH GND SKY13489

NC
L3441

1C3454
GND
2

20201
U3410
GND B2 GND
GND TFSZ06052460-3310A2 RF_B41_DRX_BALUN_RFIN2 RF_B41_DRX_MT6169_RFIN2_HB1 [10]

NC
GND

GND 1 GND BAL 3

B40 DRX
A1 RF1 L3439

1C3453
2 4 2.7nH

1.1*0.9
A2 UNBAL BAL

20201
ANT

L3440
GND
A3 RF_B41_DRX_BALUN_RFIP2 RF_B41_DRX_MT6169_RFIP2_HB1 [10]
U3411 RF2
SAFFB2G35AA0F0A
C3434
20201
C3433

G 2
3.0pF

BPI_BUS7 [4]
4RF_B41A_DRX_SAW_OUT
1

OUT B3 B1
3.6nH

[13] RF_B41A_DRX_SAW_IN 1 VDD V1

1

RF_B41A_DRX_SWITCH IN
G 3 18pF
G

A
0201 1
C3408
A

L3437 VTCXO2
5

[10,12,13] U3401 20201 33PF

L3429 1C3407
NC
L3430

GND NC GND
20201
GND 1UF
GND
GND
GND

Title
34_RF_MT6169_RF_DRX
MTK Confidential
Size
A0

Date: Friday, November 07, 2014 Sheet 13 of 23

5 4 3 2 1
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

C C

169 ball eMMC R4001

0402
0R
VEMC_3V3_PMU

1 bit mode for eMMC boot

C4001 C4002 C4003

4.7uF
100nF 100nF
U4001
MSDC0_DAT0 H3 DAT0 VCC M6
MSDC0_DAT1 H4 DAT1 VCC N5
MSDC0_DAT2 H5 T10 GND GND GND
DAT2 VCC
MSDC0_DAT3 J2 DAT3 VCC U9
MSDC0_DAT4 J3 DAT4
MSDC0_DAT5 J4 K6 R4002 0R
DAT5 VCCQ 0402 VIO18_PMU
MSDC0_DAT6 J5 DAT6 VCCQ W4
MSDC0_DAT7 J6 DAT7 VCCQ Y4
VCCQ AA3
K2 VDDI VCCQ AA5
C4004 C4005
K4 VSSQ CMD W5 eMMC_CLK
Y2 VSSQ CLK W6
Y5 R5 100nF should star
VSSQ RCLK connect from
AA4 VSSQ RST#_/_NC U5
AA6 L4 MC0CLK
VSSQ A1_INDEX_/_NC
C4006 M7 K7 GND GND
VSS NC
P5 VSS NC K8
R10 VSS NC K9
1.0uF U8 VSS NC K10 [5]
H6 K11 MSDC0_CMD
VSS NC
T5 VSS NC K12 [5]
GND K13 MSDC0_CLK
NC
NC K14
Close to A4
A6
NC
NC
NC
NC
L1
L2
MSDC0_DSL [5]
GND
Memory
A9 NC NC L3
A11 L12 MSDC0_RST_ [5]
NC NC
B2 NC NC L13
B13 NC NC L14
D1 NC NC M1
D14 NC NC M2
H1 NC NC M3
H2 NC NC M12
H8 NC NC M13
H9 NC NC M14
H10 NC NC N1
H11 NC NC N2
H12 NC NC N3
GND H13 N12
Note: 40-1 H14
NC
NC
NC
NC N13
J1 NC NC N14
J7 NC NC P1
J8 NC NC P2
J9 NC NC P12
J10 NC NC P13
J11 P14
Schematic design notice of "40_MEMORY_eMMC" page.
NC NC
J12 NC NC T1
J13 NC NC T2
J14 NC NC T3
K1 T12
Note 40-1: For eMMC 5.0, connect eMMC's H6 & T5 pin to GND. K3
NC
NC
NC
NC T13
R1 NC NC T14
R2 NC NC V1
R3 V2
For eMMC 4.5, check eMMC's H6 & T5 is real no connection (NC). R12
NC
NC
NC
NC V3
R13 NC NC V12
R14 NC NC V13
U1 NC NC V14
U2 NC NC Y1
U3 NC NC Y3
U12 NC NC Y6
U13 NC NC Y7
U14 NC NC Y8

B W1
W2
W3
NC
NC
NC
NC
Y9
Y10
Y11
B
NC NC
W7 NC NC Y12
W8 NC NC Y13
W9 NC NC Y14
W10 NC NC AE1
W11 NC NC AG2
W12 NC NC AH4
W13 NC NC AH6
W14 NC NC AH9
AA1 NC NC AH11
AA2 NC NC AG13
AA8 NC NC AE14
AA9 NC
AA11 NC
AA12 NC
AA13 NC
AA14 NC RFU H7
RFU K5
AA7 RFU RFU M5
AA10 RFU RFU M8
U10 RFU RFU M9
U7 RFU RFU M10
U6 RFU RFU N10
P10 RFU RFU P3

H26M52104FMR/THGBMFG7C2LBAIL

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 14
OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

仪和重⼒力加
速

U802 BQ2425X-QFN
VBUS_USB L802 VS
VBUS_USB_IN 1uH
[7,22] _IN 1 19 YS
VBUS SW VSYS [6,7,8,9,18,19,20,21,22]
24 20
VBUS SW 47nF C804 L/2520H1MM/0.68/UH/3.2A
C801 C802 C803
16V
C 1uF 50V 0201
0201
0402
C806
C

C820

0603
21 10uF
BTST 0402
[2,3,5,6,7,9,10,11,14,16,18,19,20,21,23] 23 10uF
PMID
VIO18_PMU

22 [15]
REGN REGN
3
/PG C807
4
STAT
17 0402
PGND
18 4.7uF
PGND
0201

10K
R805
6 15
[5,8,20,21] SENS_SDA3 SDA SYS
16
SYS
5
[5,8,20,21] SENS_SCL3 SCL
7
[5] EINT14_INT INT
R808 14 VBTT
BAT VBAT [6,7,11,12,15]
8 13
[6,7,11,12,15] VBAT 0201 OTG BAT
10K 9
[4] GPIO90_EN /CE
R811 R813 NC PMU_CHGIN C805
10 0201
ILIM 0201 [6,7]
0201

10K 0R 0402
R804 10uF
R806 R809 11
2
TS1
12 0201 REGN [15]
[15] REGN 0201 PSEL TS2 10K
10K
GND

0201
10K
25

R822

Schematic design notice of "41_MEMORY_SD Card" page.

Note 41-1: The equivalent capacitance of ESD protection device must be <=1pF
-- otherwise it will result in NFC card mode function fail.

Note 41-2: Depends on system design to add ESD protection componemt or not.

B B

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 15
OF 23
 MT6630 WiFi_2.4G_5G (11ac) & BT PALDO_OUTPUT [16]

C5001

1.4*1.2
GND
4.7uF

GND
GND
Placement close to IC

0201

C5002
U5002 NC
885033
L5001 0R L5002 0R U5001-A
4 OUT IN 1 C5003

7.5nH
0201 0201 Share Pad0R

G
G
G
L5003 RF_ION_WBT
NC NC 0201

5
3
2

I/O 1

3
NC A1 WBT_EXT_G
C5015 D2

BP
GND DC
0201 VCO_MONITOR
8.2nH GND C5012
C5014 U5003 C5004

C5013
Share Pad C5006

NC
2.2pF A2

BP
BL1608-05K2450 WB_RFION_G
GND GND DVDDIO_ANTSEL G10 PALDO_OUTPUT [16]
GND GND L5004 0R RF_IOP_WBT F8

4
0201 RFPD2G
NC F7
ANTSEL0
FBAR/BAW Filter Matching network. The values has to be adjusted by PCB. GND F6

1.6*0.8
ANTSEL1
A3 WB_RFIOP_G ANTSEL2 G6
C5005 ANTSEL3 G7
FBAR/BAW Filter Matching network. The values has to be adjusted by PCB. ANTSEL4 G8
GND H7
ANTSEL5
ANTSEL6 H8
ANT5005 ANT5004 R5002 0R L5005 0R A5 H9
ANT5006 0201 0201 AC_RFIO_A ANTSEL7
NC
NC
1

C5008 B5 AC_EXT_A
1

C5007

MT6630 PMU
GND GND
GND

2.0*1.2
5.0pF G4 RFPD5G
2_4G 4
2.0*2.0*0.9mm GND [16] PALDO_OUTPUT
C5009
D3 AVDD33_AC_PA
GND
GND 3 GND GND 5 GND [16] VSYS_6630
C2 AVDD33_WBT_PA AVSS_BALUN_PA A4
0201 AVSS15_WBT_SX_LF B1
L5021

L5022

U5001-D
AVSS15_WBT_TRX B2
C5011
0201

L5008

0201
L5000 B4 R5001
1

C5010 AVSS_AC_PA C5022 4.7uF

3 4 2 L11
50 Ohm 9.1nH COMMON 5G 6 4.7uF AVSS_WBT_AFE C1 GND AVDD45_MISC 1M
2 1 D1 C3
NC 50 Ohm AVDD15_WBT_AFE AVSS_AC_TRX
NC 1pF GND B3
U5010 AVSS33_WBT_PA via to Main GND
47nH2

47nH2

C90P106-00004-H C5000 GND D10 C5 K11 AVSS45_MISC

AVDD15_RF AVSS_AC_SX
C5050 B11 PMUEN H12 GPIO101 [5,16]
C5031 NC AVSS33_PA GPIO101
C5030 NC GND 1 GND GND 7 [16] SMPS1V5 D11 AVDD15_RF
GND C5023 4.7uF M11
GND AVDD45_SMPS
GND AVSS28_ADC J11

NC

NC

NC
1_5G

GND GND C5018 C5019 via to Main GND L10 AVSS45_SMPS

B6

C6

D5
GND GND 1.0uF 10nF MT6630QP/B
AUXIN J12
GND
8

U5008 C5029
K9 AVDD25_V2P5NA

GND
TP2012-A1255BA GND GND VREF K12

C5024
100nF
[16] SMPS1V5 [16] ALDO Imax_30mA 1.0uF
L12 AVDD28_ALDO

GND
LX1 M10
0201 C5025 1.0uF
C5020 C5021 L9
[16] SMPS1V5 Imax_280mA VOUT_VRF
1.0uF 100pF LX2 M9

M8 PL5006 2.2uH
[16] VCORE Imax_420mA VOUT_VCORE
GND GND
C5027 M12

GND
PALDO
C5026 10uF

NC

NC
10uF C5028 Placement close to IC

Imax_450mA
4.7uF

F9

F10
MT6630QP/B

1.1*0.9
GND
GND

U5007 WIFI_PA
[16] PALDO_OUTPUT
1 4 L5010 9.1nH
IN OUT
2 5
GND GND GND
GND

3 C5032
GND

GND
C5033

1.5*1.0
NC
SAFFB1G56KB0F0A-MI NC
GND
MT6630 GPS&TCXO

1
SAFFB1G56KB0F0A GND

RFIN

GND

GND
RDALN16-MI

5
C5048

U5006
4 OUT VCC 6 ALDO [16]

TSENS
1nF 100nF

0201
RFOUT
C5040

VDD
3 1

EN
GND VREF
C5041

EN
4

6
1.0uF
GND
GND

2
[5,16] U5001-C
GPIO100 U5005
50 Ohm KT2520K26000ZAW18TAS
[16] ALDO 0201 L5011 6.2nH A12 GPS_RF_INP
R5004 100nF NC XO C12
0R NC
GND
D12 AVDD28_XO
C5037 C5036 E7 GND
C5035 OSC_EN 0201
R5005 10K / 1%
GND
B12 AVSS_GPS
GND
AGPS_SYNC E6
GPS_SYNC [5,16]
C11 AVSS_XO
R5009 0R GND

NC

NC
NC
[16] ALDO 0402
10pF

F3

F4

F5
C5039 0201 MT6630QP/B

C5038
1.0uF
GND
GND

U5001-E VIO18_PMU

MT6630 Host Interface

[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]

I2S_DATA_IN K3
I2S_WS K2

0201
R5006

????????????
I2S_CLK J2
[5] EINT5_WIFI_INT EINT5 E8 H3 NC
WIFI_INT_B I2S_DATA_OUT R5021 0R
[5,16] EINT4_BGF_INT G3 BGF_INT_B 0201 GPIO123 [5]
F1 SYSRST_B
[5,16] CONN_RST
UART_RX G2 UTXD2 [5,16]
UART_TX G1 URXD2 [5,16]
UART_CTS H1 PTA_RXD [5]
UART_RTS H2
PTA_TXD [5]
[6,16] VRTC G11 AVDD28_32K

C5042 K1
PCM_SYNC DAISYNC [5,16]
F12 RTCCLK_O PCM_CLK L2
DAICLK [5,16]
PCM_IN L1
100nF DAIPCMOUT [5,16]
PCM_OUT M1 GND
DAIPCMIN [5,16]
GND
[6,16] RTC32K2V8 F11 RTCCLK C5046

URXD2
M2 100nF
DVDDIO_SDIO VIO18_PMU [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
[16] VCORE G9 DVDD SDIO_CMD K4
K5 MSDC3_CMD [5]
SDIO_CLK MSDC3_CLK [5]
J3 DVDD SDIO_DAT0 M6
C5043 L6 MSDC3_DAT0 [5]
C5044 SDIO_DAT1 MSDC3_DAT1 [5]
J4 DVSS SDIO_DAT2 M4
L4 MSDC3_DAT2 [5]
SDIO_DAT3 MSDC3_DAT3 [5]
1.0uF H10 DVSS
1.0uF
K6 DVSS
GND
GND DVDDIO J1 VIO18_PMU
GND [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]

NC

NC

NC

NC

NC

NC

NC
U5001-B 100nF
FM_RIN C8

H4

H5

G5

D6

D7

D8

D9
GND

A11 FM_SANT_P MT6630QP/B

C5045
FM_LIN C9
GND

FM_ROUT B8 0201 GND

A10 R5010 10K / 1%
GND AVSS_FM_SANT_N

FM_LOUT A8
R5011
0201
10K / 1%
GND
OFF-PAGE_MT6630 Host Interface
AVDD33_FM B10 PALDO_OUTPUT [16]

L5007 82nH A9
100nF
MT6630 EINT MT6630 Power
[18] FM_ANT FM_LANT_P
C5047
GND

AVSS_FM C10 EINT13_WIFI_INT EINT13_WIFI_INT [16] VRTC VRTC

LANT_P GND
B9
NC

NC

NC

NC

[18] FM_RX_N_6630 AVSS_FM_LANT_N EINT4_BGF_INT EINT4_BGF_INT [5,16]

E4

E5

E9

E10

MT6630QP/B

R5007 VIO18_PMU VIO18_PMU

0201

NC

FM Long Antenna connect to EarPhone Jack

Filtering ISM band interference to prevent FM de-sesne MT6630_BGF_INT_B PIN Codegen.dws Configuration:
GND
1. EINT Setting EINT Var: WIFI
2.GPIO Setting VarName1: GPIO_WIFI_EINT_PIN
VIO18_PMU VIO18_PMU

MT6630 GPIO & RTC & GPS SYNC

MT6630 UART
UTXD2 [13]
UTXD2[5,16] GPIO101 [13]
GPIO101[5,16]
R5008
URXD2 [13]
URXD2[5,16] GPIO100 [13]
GPIO100[5,16] [6,7,8] VBAT_BUCK 0402 VSYS_6630 [16]
0R

CONN_RST [13]
CONN_RST[5,16]
GPS_SYNC [13]
GPS_SYNC[5,16]

GND GND

MT6630 PCM [20]

DAISYNC DAISYNC[5,16][13] RTC32K2V8 RTC32K2V8 [6,16]
DAICLK [13]
DAICLK[5,16]
DAIPCMOUT [13]
DAIPCMOUT[5,16]
DAIPCMIN [13]
DAIPCMIN[5,16] Title
50_CONNECTITIVY_MT6630
MTK Confidential
Size
A0

Date: Tuesday, August 12, 2014 Sheet 16 of 23

1
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

nokia,L-R-MIC-GND

default Iphone,L-R-GND-MIC

SPEAKER
SPEAKER OPTION2

R6013 1 0R
[7] CODEC_SPKP 2 SPKR_OUT_P_R
0402

Earphone Audio R6014 1

0402
2
0R
SPKR_OUT_M_R
[7] CODEC_SPKN
R/0402/0/R/5%-MI

[6,7,8,9,15,19,20,21,22]
[2,3,5,6,7,9,10,11,14,15,16,19,20,21,23] VIO18_PMU VSYS

Note: 60-4 100nF C6048 C6007

R6001
4.7uF

ESD6001
C6049 100nF

0201
CON6001 2.2uF
close to IC GND
AJ010-20342A01D

470K
Route the GND between L/R chanel
close to connector
Note: 60-1 Note: 60-3 R6002 47K
AJ01356326-R C6003
[5] EINT13_HS_DET 0201
GND 2
B6007

100K
VSY
[6] EARPHONE_GND
HPH_R 3
SBJ100505T-182Y-N B6005 S
R6005 0R
[6]

D2

C1
CODEC_HPH_R

B3

A3
0201
5

0201
SBJ100505T-182Y-N
B6013

C1P
VDD

VDD

C1N
GPIO93_SP
PBY160808T-181Y-N 6 HS_DET

R6015
K_EN 0201
R6031 D1
HPH_L 4
B6003 1K C2P
[6] R6003 0R
CODEC_HPH_L 0201

C6005
2.2uF
A4
MIC_IN 1
[18] B6001 HFJ100505T-102Y-N GPIO93_SPK_EN SHDN
[5] GPIO93_SPK B1
HP_MIC C2N

R6006

R6004
Note: 60-2 HFJ100505T-102Y-N B6014 C2N
B2

33nF
_EN

0201
ESD6005
C6004 R6025 3K
C6009 C6010 ESD6003 PBY160808T-181Y-N [6] AU_LORP_EXPA 0201 U6001 B4 L6022 0R [22]
C <= 1pF

0201

0201

C6001
ESD6004 AW8738 VOP 0603 SPKR_OUT_P
AU_LORP_E A2 SPKR_OU
0201 0201 C6002 INN
33pF 33pF XPA C6030 T_P
470R

470R
[22]

ESD6006
0201 L6023 0R SPKR_OUT_M
D4 0603

470nF
1nF 0201 VON SPKR_OU
Single via to A1
INP T_M

33nF
0201
GND C6008
GND plane [6] AU_LORN_EXPA
R6026
0201
3K D3 C6039

C6038
PVDD
C C <= 1pF
C
GND C6040
GND

GND
GND
GND
AU_LORN_E 0201
1nF 0201
GND GND XPA 1nF
Schematic design notice of "60_PERI_AUDIO_IO" page.

4.7uF
C4
C3
C2
L6001 0R
0201

PBY100505T-102Y-N
Note 60-1: Part # of BEAD6002, BEAD6003, BEAD6004 and BEAD6005
needs changed to "BLM18BD102SN1" for high THD FM_ANT [16]

B6012
performance (-90dB) but this BOM change will results in FM
[16]
RSSI 10dB degraded . FM_RX_N_6630

R6007 0R
0201

Note 60-2: optimize headphone pop noise. The recommended value of this resistor is 33R.
To reserve a resistor in HPL and HPR in series connection both in order to
GND

Note 60-3: TO Reduce cross talk, Please route the Earhpone_GND between L/R chanel
C836£ºwhen use AW8145 please use 1uF CAP;when use AW8155 or AW8155A please use 0 ohm res
Note 60-3: To eliminate Plug in and out Recognize issue C6049 should be 100nF

Earphone MICPHONE

Main microphone
[6] MICBIAS1
Analog MIC
R6008

Close to BB Close to MIC Close to CON6001 Close to BB

0201
C6015

100nF

1K

MAIN_MIC_P AU_VIN0_P
[6] C6016 4.7uF [22] [6]

C6023

1.0uF
AU_VIN1_N
AU_VIN1_N1
GND
GND of C6018(10uF) and C6024

C6019 headset should tie 0201

100pF
together and single via to
R6009

0201 MAIN_MIC_N AU_VIN0_N U2001

C6020 33pF [22] [6]
GND plane
C6026

J1809 1.0uF
GND
0201

0201
100pF C6028 C6029
C6021
tie together and single via to
1.5K

0201 0201
GND plane
C6022

33pF 33pF
100nF

0201
33pF
[6] AU_VIN1_P HP_MIC [18]

R6011 1K GND
[6] ACCDET 0201

B B

REC
Secondary MIC CE ÈÏÖ
¤Ê±,Èç¹ûÓ
öµ½
¹¤Æ
µ̧ÉÈÅÍÆ
¼
ö0B4015R-423G-XD9RAC-BD-0MIC

D101
MICBIAS2 [6]
4

SILICON MIC
OUTPUT

VDD
SPH0642HT5H-1

Route as differential pair

Close to MIC
Close to BB B6008
AU_HSN [6]
GND
GND
GND
GND

B6011 C6033 PBY160808T-181Y-N

AU_VIN2_P [6] 2
N B6009
HFJ100505T-102Y-N 1
P 0201
C6011

1.0uF

AU_HSP [6]
5
3
2
1

C6013 100pF PBY160808T-181Y-N

REC6001
0201
GND_MIC B6006 100pF
[6]
AU_VIN2_NU2001
ESD6007 HFJ100505T-102Y-N
C6014

ESD6013
1.0uF

ESD6012 ESD6011
0R

2
N C6034 C6032
1
0201

C6017 C6018 P
C6012 ESD6010
R6027

REC6002 0201 0201

0201 0201 33pF 33pF
33pF 33pF
100nF

GND
GND GND GND GND
GND GND GND

together then single via to main GND

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 18
OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

[6,7,8,9,15,18,19,20,21,22] VSYS

D PL6103 10uH
D
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
VIO18_PMU
Back Light Driver for 12LEDs In 2Series 6 P

R6131
41
100K R6111 Diode Schottky
0201 1 1 [19]
LCM_LED_P

GND
R6114 1K GND
[4] LCM_ID0 ID0 2 2
0201 1K LCM_ID

0201

D6101
[4] LCM_ID1 R6106 ID1 3
0201 LANSEL
[5] 4
LCM_RST RST
5
[5] DSI_TE TE

10R
6 U6102

C2

C3
NC
7
GND
[19] D0P_A 8

SW
VIN
FV6102 FV6101 FV6103 9
D3+ 背光IC使能信号
NC [5] GPIO135_BL_EN A3
C6116 C6117 C6118 [19] D0N_A 10 C1 IFB1 LED_S1 [19]
C6115 D3- EN
11
GND R6103 B1 A2 [19]
0201 0201 0201 [19] 12 0201 0R PWM IFB2 LED_S2
D1P_A D2+

0603
[19] LCD_PWM

100K
33pF 33pF 33pF 0201 13
NC C6123

1uF/50V
33pF 14 B2 A1
[19] D1N_A D2- NC COMP ISET

GND
15 [4] DISP_PWM0 R6101
GND 0201 C6124 C6125 C6130
[19] 16 0201

0201
MIPI_DSI0_CLK_P_LCD CLK+

C6122
change for better layout
17 33pF

0201
NC R6132

B3
18 10uF 0201 0201

R6115
[19] MIPI_DSI0_CLK_N_LCD CLK- 62K
19 1.0uF 330NF
GND
20
[19] D2P_A D1+
21
NC
22
[19] D2N_A D1-
23 GND
GND
[19] 24
D3P_A D0+
25
[19] NC
D3N_A 26
D0-
27
[19] GND
LCM_AVDD +5.5V AVDD 28
[19] NC
LCM_AVEE -5.5V AVEE 29
1.8V VCI
30
IOVCC
VIO18_PMU 31
GND
[19] LCM_LED_P 32
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] LED1+
33
LED2+
[19] LED_S1 34
LED-
35
C6121 C6112 C6111 C6120 [19] LED_S2 LED2-
36
GND
37
[19] LCD_PWM PWM
0201 0201 0201 0201 NC 38 GND
33pF 33pF 1.0uF 33pF NC 39
NC

GND
C6119 C6113 C6114
J6103

40
GND 0201 0201 0201
33pF 33pF 33pF

GND

HTCA5

4 1 D0P_A
[5] TDP0 [19]
[5] TDN0 3 2
D0N_A [19]
EMI6101
[6,7,8,9,15,18,19,20,21,22] VSYS

[5] TDP1 4 1 [19] 15mil PL6101 4.7uH 15mil

D1P_A
[5] TDN1 3 2
D1N_A [19]
EMI6102 C6101

C C
U6101
4.7uF R6112 0R C1 D1
0402 VIN SW
GND
HTCA5 E3 10mil [19]
[5] TDP2 4 1 OUTP 40ma LCM_AVDD
D2P_A [19] [5] B1
[5] TDN2 3 2 GPIO134_P5_EN ENP E2
D2N_A [19] A1 REG C6105
[5] GPIO133_N5_EN ENN D3 4.7uF GND
REG
EMI6104 B2 A2
R6133 0R 10mil 40ma [19]

C6104
[5,20] SCL OUTN LCM_AVEE
MCAM_SCL0 R6134 0201 0R C2
[5,20] MCAM_SDA0 SDA
0201
B3 C3
PGND CFLY1

R6104

R6102
E1 PGND
A3 C6102 C6103
[5] TDP3 4 1 [19] C6106 D2 AGND CFLY2
D3P_A
3 2

0201

0201
[5] TDN3 D3N_A [19]
0201 KTD2151 4.7uF 10V 10uF 10V
EMI6103 1.0uF

100K

100K
NOVTEK/KTD2151EUO-TR
C2313/C2314 and C2317 are
GND GND
GND GND GNDGND suggested to use 10uF for
component de-rating
[5] TCP 4 1 [19]
MIPI_DSI0_CLK_P_LCD consideration.
[5] TCN 3 2 [19]
MIPI_DSI0_CLK_N_LCD
EMI6106

B
CTP(COF) B
T6101

T6102

T6103

T6104

T6105

T6100

T6106
NC

NC

NC

NC

NC

NC

NC
NC
0201
R6116
100K

0201
R6113

1 12
GND
[6] 2
VGP1_PMU VDD 3.3V
3
FT[WAKE]
[5] SDA2 4
SDA
[5] SCL2 5
SCL
[5] 6
EINT6_TP INT
[5] GPIO102_RST 7
RESET
8
1.8V ID
VIO18_PMU 9
ATMEL[IOVCC]
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] 10 11
GND

D6107 J6101
D6103 D6104 D6105 D6106 D6102
1.0uF

0201

10PIN CONN
GND
1.0uF
C6107

C6108

GND

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 19
OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D
Main Camera D

J6201 4 1 [20]
[5] RCP CAM_CLKP_A
DF37NC-30DS-0.4V(51) 3 2
[5] RCN CAM_CLKN_A [20]

B6202 PBY100505T-221Y-N 1 30 EMI6201

[5] CMMCLK MCLK DGND [20]
2 29 CAM_D2P_A
DGND MDP2 [20]
CAM_D0P_A 3 28 CAM_D2N_A
MDP0 MDN2
[20] 4 27
CAM_D0N_A MDN0 DGND [20]
[20] 5 26 CAM_D3N_A
DGND MDN3
CAM_D1N_A 6 25
MDN1 MDP3 CAM_D3P_A [20]
[20] 7 24
CAM_D1P_A MDP1 DGND
[20] 8 23 R6203 NC GPIO97_MCAM_AF_EN [5]
DGND AF_EN
CAM_CLKN_A 9 22 R6205 0201 NC
MCN VPP 0201
[20] 10 21 [5]
CAM_CLKP_A MCP RESET GPIO92_MACM_RST
[20] 11 20 [5,19,20]
DGND SIO_D MCAM_SDA0
2.8V 2.8V 12 19 [5,19,20]
VCAM_AF_PMU AF_POWERSIO_C MCAM_SCL0
13 18
AF_GND DGND
B6203 2.8V 2.8V 14 17 1.8V [20]
AVDD DOVDD VCAM_IO_1P8V_SW [5] RDP3 4 1
[6,20] VCAMA_2P8V 15 16 1.0V [6] CAM_D3P_A [20]
SBJ100505T-182Y-N AGND DVDD VCAMD_1P2V 3 2
[5] RDN3 CAM_D3N_A [20]

C6208
1
DNI DF37NC-30DS-0.4V(51) EMI6202

1.0uF C6213
GND C6211 C6209

2
NC
1.0uF 1.0uF

C6207
GND

C6210

1.0uF
22uF
R6204 0402 0R CAM_D1P_A [20]
[5] RDP1 4 1
3 2 CAM_D1N_A [20]
[5] RDN1
EMI6203

FLASH I2C Address: 0x53

[7]

[7]
FLASH2

FLASH1
[5]
[5]
RDN0
RDP0
4
3
1
2
CAM_D0N_A
CAM_D0P_A
[20]
[20]

EMI6204
[6,7,8,9,15,18,19,21,22] VSYS
C2316

C2318

R6214

R6215
PL2302 0.47uH 3.7A

0603

0603
B1
100nF
10uF

GND GND

SW
A2
IN

0R

0R
U6202
C2320
C1 10uF GND
OUT
[5] GPIO95_TORCH_EN C3
TORCH/TEMP
B2
[5] GPIO96_FLASH_EN STROBE
C2 D3
[5] GPIO116_FLASH_CE HWEN LED1
R6221 0R D2
[4] GPIO80_FLASH_TX 0201 TX
[5] RDN2 4 1 CAM_D2N_A [20]
[5,8,15,21] SENS_SDA3 A3 D1 3 2
SDA LED2 [5] RDP2 CAM_D2P_A [20]
B3
C C
[5,8,15,21] SENS_SCL3 SCL
GND

EMI6205

2
1

1
A1

HL1 HL2
D6201 D6202
0201
0201

0201

R6210
R6211

R6212

100K
100K

100K

EMI6206
[5] RCP_B 3 2 [20]
CAM_CLKP_B
4 1 [20]
[5] RCN_B CAM_CLKN_B

sub Camera 3.3V 250mA

J6202
1
DGND
2
AF_GND
3
[5,19,20] MCAM_SDA0 SIO_D
4
AF_VDD NC
5 EMI6207
[20] VCAM_IO_1P8V_SW DOVDD 1.8V
6 3 2
[5,19,20] MCAM_SCL0 SIO_C [5] RDP0_B CAM_D0P_B [20]
7 4 1
AGND
[5] R6213 NC 8 [5] RDN0_B CAM_D0N_B [20]
GPIO15_SCAM_PWDN 0201 NC/PDN
[6,20] B6205 9
VCAMA_2P8V AVDD 2.8V
[6] VSCAMD_1P2V
[4] GPIO79_SCAM_RST
SBJ100505T-182Y-N 10
11
DVDD 1.2V
RESET NC
Note: 62-1
12
STROBE SGM2578/NCP435FCT2G
B6204 13
DGND U6201 [2,3,5,6,7,9,10,11,14,15,16,18,19,21,23]
14
[5] CM3MCLK MCLK
15 [20] VCAM_IO_1P8V_SW A1 A2 VIO18_PMU
PBY100505T-221Y-N DGND VOUT VIN
16
[20] CAM_D1P_B MDP2 C6201
17
[20] CAM_D1N_B MDN2
18
DGND
[20] CAM_CLKP_B 19 1.0uF B1 GND B2 [5,6]
MCP EN VCAM_IO_1P8V
[20] CAM_CLKN_B 20
MCN
21

C6221
DGND SGM2578
[20] CAM_D0P_B 22

1
MDP1
23 EMI6208
[20] CAM_D0N_B MDN1
24 3 2
DGND [20]
GND
GND

25 [5] RDP1_B 4 1 CAM_D1P_B

DGND [20]
[5] RDN1_B CAM_D1N_B
B B
2
NC
GND
26
27
C6215

C6202 C6214
C6216

C6203

0201 0201
1.0uF 1.0uF
2
10uF

NC
1.0uF
R6202 0402 0R

Schematic design notice of "63_PERI_CAMERA_KEYPAD" page.

Note 62-1: The VCC of I2C_0 is pulled to "VCAM_IO_PMU".

Note 62-2: I2C control interface of front camera (with AF) must be assigned to I2C-2
bus when PIP/VIV feature be supported.

Note 62-3: Reserve a capacitor (27pF) on camera's MCLK and shunt it to GND to prevent GPS de-sense.

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 20
OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Thermister / To sense board level temperature

M-Sensor P_SENSOR
[6,8,21]
M-Sensor I2C Address: 0x0C VIO28_PMU
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]

R6302
VIO18_PMU

R6301
0402
CAD

C6315
100K

0201
[6,7,8,9,15,18,19,20,21,22]

4.7uF
0R
[6,8,21] VIO28_PMU VSYS
0 0X0C

39K 1%
0201
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU
1 0X0D

R6306

8
U6303
VDD
2 3 AUX_IN0_NTC
[5,8,15,20,21] SENS_SDA3 C3 SDA VDD A1 [5] ALSP_INT_N INT LDR [4]
[5,8,15,20,21] SENS_SCL3 B3 SCL VID C1

D D

NTC6301
[5,8,15,20,21] 7 4
SENS_SCL3 SCL LED_K R6305
A2 CAD TST A3
C6309 C6308 1 5 C6306
[5,8,15,20,21] SENS_SDA3 SDA LED_A 0402
0R

0201
[5] MAG_RST C2 RSTN VSS B1

NC
GND
100nF 100nF FV6303

1
1.0uF

10k 1%
YAMAHA/AK09911C C6316
U6302
GND GND
LTR-559ALS_C34 4.7uF

2
C6318
change for H3.4mm PAD 9

[6] VMCH_PMU R6307

0603
0R BOARD_ID
G+Gyro-Sensor INFRA-RED LED

1
IR [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU
C6317
BMI160 I2C address : 0x68

2
LSM6DS3 I2C address : 0x6A 4.7uF
LED6301
IRLED3012/VSMY14940
BMI160: R6314, R6315 = NC
LSM6DS3: R6314, R6315 = 0R [5,8,15,20,21]
SENS_SDA3
[5,8,15,20,21]
SENS_SCL3

10K / 1%

10K
VIO18_PMU

10K / 1%
R6308

0201

0402
PWM 38KHZ
C FV6301

1
FV6302

1
B Q6301

R6313
VIO18_PMU [5] GPIO129_IR_PWM0

R6315
0201

14

13

12
U6305

SDX

SCX

CSB
GND 1 11 R6311 0R [4] GPIO91_BOARD_ID0
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]

R6319
SDO OSDO(GND) [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]

E
0201

2
[4] ADC2_BOARD_ID1

2
R6309 NC 2 10 R6312 0R GND VIO18_PMU
0201 ASDX OSCB(GND) 0201

10K / 1%
0201

10K
R6310 NC 3 9 GYRO_INT2_N_GPIO104 [5]
0201 ASCX INT2
4 8
VDDIO

VIO28_PMU

100K
[5] ACCL_INT1_N_GPIO105 INT1 VDD [6,8,21]

0201

0402
GND

GND

U6304 B

VCC 6
PWM 38KHZ
1 A
GND

R6314
BMI120 Y 4

R6316
5

3 GND
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU [5] GPIO130_IR_PWM1 2 B

5 NC
C6302

100nF
C6304 GND
NC
GND

100nF
GND

C C

FingerPrint-Sensor LESD8L5.0T5G
LESD8L5.0T5G
LESD8L5.0T5G
LESD8L5.0T5G

FV6308 FV6307 FV6306 FV6305

LESD9D5.0T5G
100nF
CON6301
SPI input output becare
FV6304 C6311
[5] EINT3_FP_INT 1 10 [5] WILL 2.8v
IRQ RST_N GPIO115_FP_RST
2 9 FP_SPI_MOSI [5]
GND_HOST MOSI U6306
3 8 FP_SPI_MISO [5]
GND_HOST MISO
[21] VFP_2.8V R6322 NC 4 7 FP_SPI_CS_N
0201 GND_HOST CS_N [5]
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU R6321 0R 5 6
0201 VDD1.8V SCLK FP_SPI_CLK [5] 4 1
[6,7,8,9,15,18,19,20,21,22] VSYS IN OUT VFP_2.8V [21]
[21] VFP_2.8V R6333 NC
0201
NC

3
[5] GPIO94_FP_LDO_EN EN

GND

GND
C2502
0201

R2505

5
C2501 0402
FV6310 2.2uF

0201
R6334

0402
2.2uF
FV6309

100K
LESD9D5.0T5G
C6313
LESD9D5.0T5G
100nF

B B

[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU

100nF
0201 4 1
VDD OUTPUT EINT10_HALL1 [5]
C117
AH1903-FA-7

do not connect anything

NC
[5] 3
EINT11_HALL2 SEL
GND

U6301

USE AS gpio EN
2

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 21
OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

SHIELDING

POPDDR
D SH6401 SH6405
D
SH6403 SH6407

1 SH6410
1
1 1
1
CX861_RF_PA_BASE
U1001-POP
CX861_BB_BUCK_BASE CX861_RF_WIFI_SHIELDING

CX861_BB_CPU_BASE CX861_RF_MAIN_BASE

POPDDR
SH6409

1
SH6406
SH6404

CX861_RF_WIFI_SHIELDING
1 SH6408
1
1

PCB
CX861_RF_PA_COVER
CX861_RF_MAIN_COVER
CX861_RF_MAIN_COVER

PCB1

PCB1

Test Point

[7,15,22]
TP6411 URXD0 [5]
VBUS_USB_IN
TP6401

TP6412

GND
UTXD0 [5]
TP6402
[5,22] USB_DM_P0 TP6413

[5,22] USB_DP_P0
TP6414

[5,22] USB_ID TP6415

C FV6416 C
[6,7,8,9,15,18,19,20,21]
VSYS

[6] MICBIAS0

26

25
13 12
13 12 25
14 11 SPKR_OUT_M [18]
14 11 25
15 10
15 10 SPKR_OUT_P [18]
[18] MAIN_MIC_P 16 9
16 9
[18] MAIN_MIC_N 17 8
17 8
18 7 R6401 0201 0R GPIO132_KEYPAD [5]
18 7
19 6
[5,22] USB_DM_P0 19 6
20 5
[5,22] USB_DP_P0 20 5
21 4
21 4
[5,22] USB_ID 22 3
22 3
23 2
23 2
24 1
24 1
C6401

28

27
FV6411 FV6412 J1809 C6411
0201
1.0uF 33pF

C6412 C6413 C6410

0201 0201 0201

33pF 33pF 33pF

VBUS_USB_IN
FV6410

1
[7,15,22] ESD5661D07-2/TR

2
C6414
VBUS_USB_IN
0201
33pF

B B

A A

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 22
OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21]

VIO18_PMU

SIM1 OUTSIDE

100K
R6501 NC
0201

0201
1
[3,6] VSIM1_PMU VCC1
3

R6511
[4] SIM1_SRST_6795 RST1
5 21 6512 1K
[4] SIM1_SCLK_6795 CLK1 DETECT 0201 INT_SIM1 [4]
4 20
VPP1 GND R6514 1K
J6502 0201 INT_SIM2 [4]
6
[4] SIM1_SIO_6795 IO1
2 ESD6521
GND
7
USB11
R6516 NC 8
0201 USB12

[3,6] VSIM2_PMU 9
ESD6504 VCC2
ESD6501 ESD6505 ESD6503 ESD6502 [4] SIM2_SRST_6795
11
RST2
[4] SIM2_SCLK_6795 13 17
C6501 CLK2 GND
18
GND
12 19
VPP2 GND
0201 22
GND
1.0uF [4] SIM2_SIO_6795 14 23
IO2 GND
24
GND
10 25
GND GND
26

SIM2 INSIDE
GND
15 27
USB21 GND
28
GND
16
USB22
GND GND GND GND
GND GND

ESD6508 ESD6509 ESD6510 ESD6511 ESD6512

C6507

0201
1.0uF

GND GND GND

GND GND GND

C C

B B

Power Key

TP6501
NC

TP6502
NC
TP6503
NC
TP6504
NC

FH34SRJ-6S-0.5SH(50)

1
R6510 1K 2 7
[6] PWRKEY R6507 0201 GND
1K 3
N21078821

0201
N21078897

[6] HOME_KEY R6508 1K 4 8

[5] KPROW0 R6509 0201 GND
1K 5
Note: 65-1 [5] KPCOL0 0201
6

D6503 D6505 D6504 D6506 J6501 GND

Note: 65-2 GND
FH34SRJ-6S-0.5SH(50)

C6506

0201
33pF DNI

GND

A A
Schematic design notice of "65_PERI_Dual_SIM_ICUSB_KEYPAD" page.
Note 65-1: DO NOT put pull-up resistor on PWRKEY

Note 65-2: Volume Up : HOME Key / GND

Volume Down : (KPROW0/KPCOL0) or KPCOL0 / GND

<Company Name>
COMPANY:

TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>

<Code> A0 <Drawing Number><Revision>

QUALITY CONTROL: DATED:
<QC By> <QC Date>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 23
OF 23