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    Salient Features of 80586 (Pentium)

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    Irish Maliban
    The document discusses several key features of the Intel Pentium processor. It has a superscalar, superpipelined architecture with two integer pipelines that enhances integer performance. It also has an on-chip floating-point unit that improves floating-point performance over prior chips. Another feature is separate instruction and data caches unlike prior unified caches. The Pentium uses a superscalar architecture where hardware decides at runtime which instructions to issue concurrently for maximum performance.

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    Salient Features of 80586 (Pentium)

    Uploaded by

    Irish Maliban
    421 views3 pages
    The document discusses several key features of the Intel Pentium processor. It has a superscalar, superpipelined architecture with two integer pipelines that enhances integer performance. It also has an on-chip floating-point unit that improves floating-point performance over prior chips. Another feature is separate instruction and data caches unlike prior unified caches. The Pentium uses a superscalar architecture where hardware decides at runtime which instructions to issue concurrently for maximum performance.

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    OAPER_HW2

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    The document discusses several key features of the Intel Pentium processor. It has a superscalar, superpipelined architecture with two integer pipelines that enhances integer performance. It also has an on-chip floating-point unit that improves floating-point performance over prior chips. Another feature is separate instruction and data caches unlike prior unified caches. The Pentium uses a superscalar architecture where hardware decides at runtime which instructions to issue concurrently for maximum performance.

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    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    421 views3 pages

    Salient Features of 80586 (Pentium)

    Uploaded by

    Irish Maliban
    The document discusses several key features of the Intel Pentium processor. It has a superscalar, superpipelined architecture with two integer pipelines that enhances integer performance. It also has an on-chip floating-point unit that improves floating-point performance over prior chips. Another feature is separate instruction and data caches unlike prior unified caches. The Pentium uses a superscalar architecture where hardware decides at runtime which instructions to issue concurrently for maximum performance.

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    © All Rights Reserved
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    Download as docx, pdf, or txt
    of 3

    Oaper, Glance Vincent S.

    COE128/E02

    HOMEWORK #2

    SALIENT FEATURES OF 80586 (PENTIUM)

    A salient feature of Pentium is its superscalar, superpipelined architecture. It has two


    integer pipelines U and V, where each one is a 4-stage pipeline. This enhances the speed of
    integer arithmetic of Pentium to a large extent. Moreover, it has an on-chip floating-point unit,
    which has increased the floating-point performance manifold compared to the floating- point
    performances of 80386/486 processors.

    Another feature of Pentium is that it contains two separate caches, viz. data cache and instruction
    cache. In 80486 there was a single unified data/instruction cache.

    The Intel CPU architectures up to 80486 issues only one instruction to the execution unit per
    cycle. This obviously leads to a comparatively slow process of decoding and execution. For
    enhancement of processor performance beyond one instruction per cycle, the computer architects
    employ the technique of multiple instruction issue (MII). Thus a microprocessor which is
    capable of issuing more thaw instruction per single processor cycle will be termed as MII
    microprocessor. Obvious executing more than one instruction in a cycle, the microprocessor
    must have more than execution channels. Thus there are two problems, viz. (a) How to issue
    multiple instruct, and (b) How to execute them concurrently. Keeping in view these two issues, I
    architectures may again be redivided in two classes of architectures — (i) Very Long Instruction
    Word (VLIW) architecture and (ii) Superscalar architecture.
    Fig. 5 .1 Pentium CPU Architecture

    In VLIW processors, the compiler reorders the sequential stream of code that is coming from
    memory into a fixed size instruction group and issues them in parallel for execution. On the other
    hand, in superscalar architecture the hardware decides which instructions are to be issued
    concurrently at run time.

    The Pentium CPU is based on superscalar architecture. The hardware, in case of the superscalar
    architecture like Pentium, becomes enormously complex because in such a processor multiple
    instructions have to be issued in each cycle to the execution unit.

    Another important concept involved here is that of pipelining. Pipelining has been implemented
    in all the processors from 8086 onwards, in a limited sense when instructions have been
    prefetched and stored in a queue.

    Superscalar Execution

    The salient feature of Pentium is that it supports superscalar architecture. For execution
    of multiple instructions concurrently, Pentium microprocessor issues two instructions in parallel
    to the two independent integer pipelines known as U and V pipelines. Each of these two
    pipelines has 5 stages, as shown in Fig. 5.2. These pipeline stages are similar to the one in 80486
    CPU. Functions of these pipelines have been presented in brief.

    Fig. 5 .2 Superscalar Organisation

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