Material Science

Paper No. : 09 Semiconductor Materials and Devices

Module: 2.3 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

Development Team
Prof. Vinay Gupta ,Department of Physics and Astrophysics,
Principal Investigator University of Delhi, Delhi

Dr. Monika Tomar ,Physics Department ,Miranda House

Paper Coordinator
University of Delhi, Delhi

Dr. Monika Tomar, Department of Physics, Miranda House University of Delhi, Delhi
Content Writer
Dr. Ayushi Paliwal, Department of Physics, Deshbandhu College, University of Delhi, Delhi

Prof. Vinay Gupta ,Department of Physics and Astrophysics,

Content Reviewer
University of Delhi, Delhi

Semiconductor Materials and Devices

Material Science
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 Description of Module
Subject Name Material Science
Paper Name Semiconductor Materials and Devices
Module Name/Title Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
Module Id 2.3

Semiconductor Materials and Devices

Material Science
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 Contents of this Unit
1. Introduction
2. Type of MOSFETs
3. Enhancement mode (E-MOSFET)
4. Theoretical characteristics of a MOSFET
5. Construction of n and p-channel Depletion mode MOSFET
6. Summary

Learning Objectives:
From this module students may get to know about the following:

• Schematic of enhancement mode MOSFET (E-MOSFET)

• Detailed operation of n-channel MOSFET along with their IV characteristics
• Construction of n and p-channel Depletion mode MOSFET
• Frequency limit for MOSFET

Semiconductor Materials and Devices

Material Science
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 1. Introduction
MOSFET (Metal Oxide Semiconductor Field Effect Transistor is a unipolar transistor acting as a voltage
controlled device where current between the two electrodes ‘Drain’ and ‘Source’ is controlled by the
applied electric field at another electrode (Gate). Here metal Gate is isolated from the semiconductor by
a very thin oxide layer. The characters of metal oxide silicon field effect transistors, or MOSFETs are
quite similar to those of JFETs, although there is a difference in their mechanism of production. A
replacement of gate-channel p-n junction of JFET is done by a metal oxide silicon capacitors that
influences the number of carriers in the channel. The carrier density in the channel is modulated by the
applied gate voltage, whereas the width of the channel is hardly affected. Comparison of MOSFTE and
JFET is given below:

MOSFET JFET

It can be operated in both depletion mode and It can be operated only in depletion mode
enhancement mode

Have high input impedance, thus small input current Relatively low input impedance

MOSFETs have higher speed of operation i.e. they JFETs are relatively slower
respond instantaneously with a small change in gate
voltage

2. Type of MOSFETs

Semiconductor Materials and Devices

Material Science
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 3. Enhancement mode (E-MOSFET)

3.1 Schematic of n-channel E-MOSFET

Figure 1 shows a schematic of a n-channel E-MOSFET. It has “Metal” Gate electrode which is
electrically insulated from semiconductor (n-type or p-type) by very thin layer of oxide material usually
silicon dioxide. A thin layer of silicon dioxide covers the surface of silicon, which performs three
functions: it acts as a protective layer for the silicon surface which ensures stable electrical behavior; it
acts as an insulator for the deposition of conductors on its surface, without making electrical contact to
the semiconductor; it acts as a dielectric for the capacitor formed by the gate electrode and the substrate.
Gate terminal is isolated from current carrying channel, so no current flows into gate.

Source Drain
Gate
-VG SiO2

n+ n+
Channel L
P-silicon

Substrate bias

Figure 1: Schematic of n-channel E-MOSFET

It consists of a p- Si substrate into which 2 heavily doped n+ region have been diffused namely Source
(S) and Drain (D). Metal contact is deposited on oxide layer that covers gap between two n+ diffusion
and serves as Gate (G). Here, L is channel length [distance between two n+ region], Z is channel width,
d is thickness of oxide layer, NA is acceptor doping concentration in p-type Si, Central section of device
corresponds to MOS diode and Source is used as voltage reference.
3.2 Detailed operation of n-channel E-MOSFET

Case I: VG = 0
Source-to-drain electrodes corresponds to two n+- p junctions connected back to back. Device is off,
when VG = 0 as there is no channel between Source and Drain.
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Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 Case II:VG > VT (Inversion condition for MOS)
Large positive gate voltage [VG > VT] has to be applied to induce a channel below oxide i.e. a surface
inversion layer (accumulated electrons) is created. The electron concentration in channel enhances by
increasing VG and hence channel conductance can be modulated by VG.

Gate
VG
VD

Channel Depletion region

(inversion layer)

Figure 2: n-channel E-MOSFET with VG > VT

FOR VG > VT
Case A: For small value of +VD
Electron will flow from S to D through conducting channel. Channel acts as a resistance and ID  VD
(linear region). As long as VD is small, the surface potential will remain almost same throughout channel
(i.e. near source and drain regions). The electron concentration will remain same and channel behaves
as resistor having

Where, Qn < 0, is the space charge per unit area of inversion layer (or channel) and Z is the channel
width.
Case B: For moderate value of +VD
With increase in VD, potential will distribute throughout the channel. Potential difference between G and
inversion layer will be more near S and very less near D. Thus, electron concentration (Qn) in channel
will be relatively less near D, and hence channel resistance increases.  I-V curve will bend downward
from initial linear variation.
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Semiconductor Materials and Devices

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Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 Case C: For large VD If VD further increases (VDsat), the potential drop across oxide near drain will
continue to decrease, and may until it falls below the value required to maintain an inversion layer, i.e.
width of inversion layer xi at y = L reduced to zero [known as Pinch off point]. At this condition, Drain
gets isolated from conducting channel (inversion layer) by a depletion region. The ID will then saturate
to a constant value Idsat at VD = VDsat.
Case D: As VD > VDsat, ID remains as IDsat. The pinch off point P will move towards Source, and effective
channel length (L) will decrease. However, the potential at P will remain at VDsat, and additional voltage
in excess of VDsat will drop across depletion region. Thus, number of carriers arriving at point P from
Source and hence current flowing from D to S remains the constant.

Gate
VG
VD

X=0 L’ L

Figure 3: n-channel MOSFET for VD > VDsat

If VG or VGS increases (For Fixed VD), leads to increases in the inversion layer and thus charge Qn.
Therefore, channel resistance decreases or ID increases for a given VD. The pinch off will occur at a
higher value of VD.
3.3 Study of I-V relationship for n-channel E-MOSFET
Consider ideal condition and following assumptions
1. Ideal MOS structure [no charge in oxide and no difference in work functions of Gate and
Semiconductors, ms = 0]
2. Current flow in one dimention (i.e. in channel only). No current flows from Channel to Gate.
3. Electron mobility in Inversion layer (channel) is constant and is independent of electric field.
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Semiconductor Materials and Devices

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Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 4. Doping in the semiconductor in the channel region is uniform.
5. Reverse-leakage current is negligibly small.
6. Transverse electric field (perpendicular to the current flow) at edge of the depletion region in
channel is much larger than the longitudinal electric field (parallel to current flow).

Figure 4: IV characteristics of MOSFET

4. Theoretical characteristics of a MOSFET

The relationship between voltages applied to the MOSFET electrodes and the current that flows from
source to the drain, is described in this section.
An ideal model of an n-channel MOSFET is shown in figure 5. Let source and substrate are connected.
Consider strong inversion condition [No drain current flow in a MOS so system in thermal equilibrium i.e. VD =
0], the surface potential.

Consider n-channel MOSFET

Total charge induced in semiconductor at y

where Qn is the charge per unit area in inversion region and Qsc is the charge per unit area in depletion
region.
Applied VG is partly divided in oxide layer and semiconductor as

Semiconductor Materials and Devices

Material Science
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 where, Vo is voltage drop across oxide layer.
In case of non ideal MOS capacitor, with flat-band voltage VFB, equation (3) is modified as

Put value of Qs(y) from equation(2) in (3A), we have

Solving for Qn (y) , we have

VG
S G

VD

dx
x X=L
X=0
y P-substrate

Figure 5: Schematic of n-channel MOSFET

At onset of inversion,

Under practical operating condition, space charge region in MOS transistor is not in equilibrium i.e.
when VD > 0, the surface potential will increase with y [due to potential distribution in semiconductor].
If V(y) is channel potential at any point y for a drain voltage VD, then to a good approximation the surface
potential for strong inversion is

Also using depletion approximation, the charge per unit area at strong inversion (as calculated while
discussing MOS diode) is

Semiconductor Materials and Devices

Material Science
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 Since V(y) increases with y, Qsc(y) increases with y from S to D. Put s(y) and Qsc(y) from equation (5)
and (6) in (4), we get,

Consider a small element dy in the channel. For a constant electron mobility (μn), the resistance of small
element dy of channel is (using eqn (1)),

The voltage drop across element of resistance dR due to drain current (ID) is

Using eqn. (8), we have

Substitute, Qn(y) from (7) in (9) and integrating from y = 0 to L and V = 0 to VD

For ideal MOSFET remove the contribution from VFB in equation (10)
Now, discussing above equation (10) in different conditions
(A) LINEAR REGION:
For small VD such that VD << VG - VT or

VD << VG – (VFB + )
Neglecting the contribution from VD2/2

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Semiconductor Materials and Devices

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Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 where,

By plotting ID versus VG (for small VD), VT can be obtained from linear extrapolation to VG axis.
For n-channel MOSFET, VFB is small negative and other two terms of equation (13) are positive, => VT
> 0 (turn- on voltage).
From equation (12) => ID  VD for small VD. In linear region from equation (12) we have
Channel conductance:

Trans conductance:

(B) SATURATION REGION:

When VD >Vsat, then at Drain end the net voltage across MOS is less than or equal to VT i.e. number of
mobile electrons in channel at the Drain are reduced drastically(Pinch off point).
At Source side: V(y) =0 ,Qn(y) = Qn at y = 0
At Drain side: V(y) = VDsat , Qn(y) = 0 at y = L
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Semiconductor Materials and Devices

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Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 Putting source side condition in equation (7) i.e. for Qn (y), we have

where,

Find out VDsat from equation (16) and substitute VD = VDsat in equation (10), we can obtain expression
for ID in saturation region i.e. IDsat.
However, when NA is very low and oxide layer thickness is small (i.e. Co is large), then  << 1 (from
17). Here voltage drop in oxide is negligibly small compared to 2B.
Thus equation (16) becomes

Put value of VD = VDsat in equation (10), we have ID = IDsat as

(For  << 1, second term is neglected and VT = VFB + 2B))

This is square law dependence of ID on VG [same as in JFET], and is valid for all VD > VG –VT . Here ID
is independent of VD.
Channel conductance in saturation region:.

Trans conductance in saturation region:

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Semiconductor Materials and Devices

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Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 Thus Channel conductance (gD) in linear region (eqn. 14) is same as Trans Conductance (gm) in
saturation region (eqn. 20) for MOSFET.

5. Construction of n and p-channel Depletion mode MOSFET

Figure 6 shows the n-channel D-MOSFET. Drain (D) and Source (S) leads connect to the to n+-doped
regions via an n-channel. n-channel is connected to the Gate (G) via a thin insulating layer of SiO2.
The n-doped material lies on a p-doped substrate that may have an additional terminal connection
called SS.

Figure 6: n-channel D-MOSFET

Depletion Mode MOSFET (D-MOSFET) Basic Operation: Figure 7 shows the IV characteristics
of n-channel D-MOSFET

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Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 Figure 7: The transfer characteristics are similar to the JFET

Depletion Mode operation: When VGS = 0V, ID = IDSS (normally ON condition)

When VGS < 0V, ID < IDSS (OFF state)

When VGS > 0V, ID > IDSS

p-Channel Depletion Mode MOSFET

Figure 8: p-channel D-MOSFET

The p-channel Depletion mode MOSFET is similar to the n-channel except that channel is p-type and
the voltage polarities and current directions are reversed
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Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 6. FREQUENCY LIMIT FOR MOSFET
The Small signal ac equivalent circuit for MOSFET is shown in figure 9.

Figure 9: Small signal ac equivalent circuit for MOSFET.

At higher frequency, consider capacitive coupling between device terminals as
CGS -MOS capacitance given by dimensions of oxide layer Z,L,C
Where

and CGS= Co z L
CGD - G-D capacitance provide undesirable feedback between I/O.

Consider, fT = frequency at which ratio of Ioutput to Iinput becomes unity i.e. device can no longer amplify
input signal when output of MOSFET is short circuited

Input current
From the circuit shown above

Where,

From the output of circuit

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Semiconductor Materials and Devices

Material Science
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
 where Io=output current
Here, Im is equal to Io, thus

Neglecting contribution from wCGD

where Cois the capacitance of oxide and d is thickness of oxide layer. Thus, L should be Low for fast
switching.

7. Summary

 Schematic of enhancement mode MOSFET (E-MOSFET)

 Detailed operation of n-channel MOSFET
 Study of IV characteristics for E-MOSFET
 Construction of n and p-channel Depletion mode MOSFET
 Frequency limit for MOSFET

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Semiconductor Materials and Devices

Material Science
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)