Network Analysis (ECE - 2103)
Network Analysis (ECE - 2103)
Network Analysis (ECE - 2103)
1A. For the circuit shown in Fig.Q1A, the variable resistor RL is adjusted until it absorbs maximum
power from the circuit.
(i) Find the value of RL for maximum power transfer.
(ii) Find the maximum power that can be delivered to the load RL.
1B. For the circuit shown in Fig.Q1B, find current I using superposition principle.
1C. Determine V1 and V2 for the circuit shown in Fig. Q1C using nodal analysis.
(5+3+2)
2A. In the network shown in Fig.Q2A, the steady state is reached with switch open. At t = 0, switch is
closed. Calculate the three loop currents at t = 0+.
2B. The network of the Fig.Q2B reaches a steady state when the switch is closed. The switch is opened
at 𝑡 = 0. Solve for 𝑖(𝑡).
2C. In the network shown in Fig.Q2C, 𝑉1 = 𝑒 −𝑡 for 𝑡 ≥ 0 and is zero for all 𝑡 < 0. If the capacitor is
1
initially uncharged, 𝑅1 = 10𝛺, 𝑅2 = 20𝛺 and 𝐶 = 20 𝐹, calculate 𝑉2 (𝑡).
(5+3+2)
3A. A square wave whose peak-to-peak amplitude is 2V extends ±1V with respect to ground. The duration
of the positive section is 0.1s and that of negative section is 0.2s. If this waveform is impressed upon
an RC circuit, which has lower 3-dB frequency 1/π Hz, calculate the steady state maximum and
minimum values of the output and sketch to the scale.
3B. The limited ramp shown in Fig.Q3B is applied to a low pass RC circuit. Draw to scale the output
waveform for the cases: (a) T = RC (b) T = 0.2 RC (c) T = 5 RC
3C. A 10V step is switched on to a 50kΩ resistor in series with 500pF capacitor. Calculate the rise time
of the capacitor voltage, the time for the capacitor to charge to 63.2% of its maximum voltage and the
time required for the capacitor to be completely charged.
(5+3+2)
Fig.Q1A
Fig.Q1B
Fig.Q1C
Fig.Q2A
Fig.Q3B Fig.Q4A
Fig.Q4B Fig.Q4C
Fig.Q5A Fig.Q5B