CoFT EC FDTD Rennings

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FDTD Method

Outline

Basics
• Maxwell‘s Equations
• Spatial discretisation/Time discretisation
• Equivalent Circuit for FDTD
• Stability
• Ports
Simple Examples
Accuracy and Losses
Speedups on modern Computers
Conclusions

Nov-07 © IMST GmbH - All rights reserved


Maxwell‘s Equations
Electric Field

Magnetic Field
Parameters

Excitation
Hyperbolic partial differential equation, initial
boundary value problem
Time domain tracking of the electromagetic field
Passive component analysis

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Spatial FDTD Principle

Port
DUT
Simulation Box

Graded Mesh

Boundary Condition

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FDTD Basics
Maxwell´s Equations Yee cell

Hz Hz

Hx
Hx
Spatial discretization
EyEz Hy
Hy
Ez
Ey
Ex

Ex

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Spatial Discretisation

Hz

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Effective Electric Materials

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Effective Magnetic Materials

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Electric Equivalent Circuit Elements

Kirchhoffsche Knotenregel

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Magnetic Equivalent Circuit Elements

Kirchhoffsche Maschenregel

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3D Equivalent Circuit for FDTD Method

Hz

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Time Discretisation

Time step = Δt

H0 Hn-1 Hn Hn+1

Initial
steady
values ∂ ∂ ∂ ∂
state
∂t ∂t ∂t ∂t

E0

En-1 En En+1 Time t

Time domain tracking of EM field

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Fourier transformation after steady state
Time Iteration

Hz

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Stability (1)

Time Step limited by spatial resolution

⎡ ⎤
⎢ ⎥
⎢ ε 1 ⎥
Δ t ≤ min ⎢ r ⋅ ⎥
2
⎢ c0
2 2
⎛ 1 ⎞ ⎛ 1 ⎞ ⎛ 1 ⎞ ⎥
⎢ ⎜ ⎟ + ⎜⎜ ⎟⎟ + ⎜ ⎟ ⎥
⎣ ⎝ Δx ⎠ ⎝ Δy ⎠ ⎝ Δz ⎠ ⎦

Classical FDTD stability criterion


Small details: long simulation time
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FDTD Equivalent circuit
Equivalent Circuit

Hz

Hx

Ez Hy

Ey
Magnetic Loop
1:1 Inductivity L
Ex Transformer
Electric Node
Capacity C

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Stability (2)

Est. biggest Eigen- 1 4


Frequency
of Equivalent Circuit
ωmax = max ∑
C LL
Limitation of
time 2
stepping Δt ≤
scheme ωmax

Improvement Factor 2...20 in strongly


graded meshes (e.g. to resolve thin
metallisations or nitride sheets)

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Ports in FDTD
Ports
resistive terminated
absorbing Ports

Transmission Wave Guide Concentrated Lumped Ports


Line-Ports Ports Ports

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Absorbing Ports
boundary

source area simulation area

Transmission
Line-Ports

15 cell extension

Ports must be placed at boundary


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Resistive terminated ports

Ports can be placed inside simulation area


Vorlage Nov-07 © IMST GmbH - All rights reserved

Boundaries
Boundary Condition

absorbing hard

PML sheet electric magnetic


PML (Perfectly matched layer):
consists of several lossy layers
which are matched to each other
sheet : resistive sheet with n x 377 Ω
Rsquare, faster than PML, only for
perpendicular waves no reflection

20
Wire example (1)

Magnetic Wall
(open)
Htan= 0 Electric Wall
(short)

Etan= 0
Etan= 0

Lumped Port Thin Wire


(one grid line enclosed)

Wire example (2)


it1
A
1A et

R ut1
V

⎡ ⎛ t − t0 ⎞ 2 ⎤
et = exp⎢ − ⎜ ⎟ ⎥
⎢⎣ ⎝ τ ⎠ ⎥⎦

Equivalent circuit for port


Heavyside transformation for separating incident and
reflected wave
Wire example (3)
Excitation:
Gaussian Pulse
Voltage time series
ut1

Timesteps

Reflections fade out


due to 5000 Ω
T=1000 Resistor at the port

First Reflection
(from short)

Wire example (4)


Discrete Fourier Transformation
Frequency dependent results: impedances, S-parameters, ...

Im{Z1.in}
Linear Range
First
Resonance at
24 GHz

Frequency
F=0 F = 10 GHz

Impedance at port
Inductance L = Im{Z1.in}/(jω) for low frequencies (linear range)
Time Domain Simulation: Digital Pulse

Port 2

voltage in V
5
./sub-1/ut1
./sub-1/ut2
0 ./sub-1/ut3
./sub-1/ut4

Excitation -5

@Port1 -10

-15

-20

-25

-30
0 500 1000 1500 2000 2500 3000 3500 4000
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timesteps

FDTD accuracy (1)


Infinite Microstrip Transmission Line

Absorbing
Boundary
Condition

Current
measurement
Box

Etan= 0

Voltage
Electric Wall Flat Metal measurement
Excitation (GND) (one grid plane enclosed) Boxes

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FDTD accuracy (2)
FDTD accuracy is 2nd order, Error ~ (Δx)2
Flat metallisation makes TEM transmission line parameters
only 1st order accurate, Error ~ Δx

Cell size

1/3 Δx Undersizing is another 1st order Error suitable for


compensation.

Example: width after mapping


flat metal line to be sim. 1/3-2/3 Rule mesh generation: on the grid:

width w

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FDTD accuracy (3)


Char. Impedance Undersized (1/3-2/3)

48

46

44
Nominal width
42

40
5 10 15 20 25 30
MSL width (Cells)

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FDTD loss calculation (1)
Finite Microstrip Transmission Line
h = 635 μm
Skin effect: w = 600 μm
t = 5 μm
1
Rsquare = ε r = 10
2σa
l = 19250 μm
1
a( f ) =
π fμσ

f = 1 GHz
f = 5 GHz
f = 25 GHz

Excitation

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FDTD loss calculation (2)


Modelling of the skin effect:

Discretisation Lines 3 options to take into account


(3 cells) the skin effect:
h

1. Resolve Material
• Fine discretisation.
Transmission Line • Long simu time

2. Sheet: Narrow band model


• Resolve with 0 cells (flat) ☺
• Narrow band

3. Sheet: Broad band model


• Resolve with 0 or 1 cells
Ground (flat) ☺
• Double sided skin effect ☺
• Broad band modell ☺

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FDTD loss calculation (3)
l
R' l = = 0.115Ω
σwt
s 21( f → 0) = −0.02 dB

Resolved Material:

S21 /dB
4 cells 200.000 steps
8 cells 400.000 steps
12 cells 600.000 steps
16 cells 800.000 steps

Sheet: Narrow band model:


0 cell 3.700 steps

Sheet: Broad band model:

0 cell 3.700 steps (cyan)


1 cell 12.000 steps (black)

Excitation frequency / Hz

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Near to far field transformation

Metal dipole

source
≈ λ/2

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Near to far field transformation

Far field Near field Far field

Far field Near field Far field

Near field: local resonance (reactive)


Far field: Waves are relieving (radiation)
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Near to far field transformation


Near field box:
≈ λ/16 Distance to radiator and boundary

Simulation domain: Near field recording:


Open Boundaries E, H is recorded on surface

Near field: local resonance (reactive)


Far field: Waves are relieving (radiation)
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Near to far field transformation

Non-uniform radiation: Certain directions


are preferred (Directivity=D(θ,ϕ)
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Speed Optimization

Usage of the new processors (Pentium IV, Athlon 64, Athlon XP, Xeon) 3D
calculation extensions (SIMD)
multiple floating point operations each processor cycle
usage of multi-level processor cache
Optimized C-code generated for each simulation / structure
only the necessary equations are solved in the specific simulation region
Efficient parallel computing on Multicore CPU’s
Innovative usage of multiple core / CPU cache for parallel FDTD calculations
simulation time reduced by the factor 10 … 20

⇒ Today‘s performance: ~900 Mcells/s @ Xeon-Architecture

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Optimized assembler-code for Pentium 4
Precalculated RAM distance

movaps 239904(field),xmm0 ⎛ n−
1
n− ⎞
1
movaps 240176(field),xmm6 Ex ' nk = Ex ' nk −1 + c k d k ⎜⎜ Δ Hz ' k 2 + Δ Hy ' k 2 ⎟⎟
subps xmm6,xmm0 ⎝ ⎠
movaps 119952(field),xmm1
k = l , l + 1, l + 2, l + 3
movaps 125664(field),xmm7
subps xmm1,xmm7
addps xmm0,xmm7
Sum up 4x4 H-components
movaps 48(coeff ),xmm3
movaps 48(denorm),xmm4
mulps xmm4,xmm3 Denormalize Node Capacities
(less RAM access)
mulps xmm3,xmm7
movaps 359856(field),xmm2
addps xmm7,xmm2
movaps xmm2,359856(field) Update 4 E-components

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Simulation Speed on multicore CPU‘s

Computer Performance

2 x Xeon 5350 2.66 GHz 900e6 cells/s

2 x Xeon 5150 2.66 GHz 500e6 cells/s

1 x Intel Core 2 duo E4500 300e6 cells/s


MEMS SPDT switch
1 x Xeon 5150 2.66 GHz 245e6 cells/s

AMD 64 X2 4200+ 2.2 GHz 136e6 cells/s

Pentium D 2.8 GHz 190e6 cells/s

P4, 3.4 GHz 102e6 cells/s


modern 64 bit PC’s allow problem sizes up to 48 GB
ultra fast parallel FDTD simulation on multicore & multi CPU
PC’s reduces simulation time strongly

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EU-Network of Excellence: ACE – Benchmark
0

-5
s11 / dB
-10
-15
3D farfield
a with -20
ay Antenn
ear Arr -25 s1_1_Measured
trip Lin
Micros
s1_1_EMPIRE
-30
s1_1_FEKO
-35 s1_1_HFSS
Results from ACE benchmark comparison: -40 s1_1_MWS 5
The ACE – Network of Excellence is funded within the 6. Frame Programme of
The European Union. ACE concentrates on Antenna Theory and Technology.
Results of the work are published and disseminated. Please refer for detailed results 5 5.2 5.4 5.6 5.8 6 6.2 6.4
at http://www.antennasvce.org -> Softlab -> Run1) frequency / GHz

Software EMIPRE CST MWS Ansoft FEKO MR/FDTD IETR IMELSI FP-TLM LEAT IE3D
v. 4.2 5 HFSS v. 9 Rennes IETR

Total CPU time 10 min 105 min 1879 min 91 min 222 min 780 min 75min 8 min * * use of
infinite
Simulation Setup 3D 3D 3D 3D 3D 3D 3D 2.5D * dielectric
substrate &
Type of machine Desktop PC Desktop PC Desktop PC Desktop Desktop PC Desktop PC Parallel CPU Desktop PC infinite metal
PC WS planes to
reduce
CPU PIV 3.4 GHz PIV 1.7 GHz PIV 2.4 PIV 3 GHz AMD Athlon PIV 3 GHz 16 x 1.3 GHz PIV 3 GHz simulation
GHz 3500+ time
Method FDTD FITD FEM MOM FDTD FDTD TLM MOM

Used RAM 180 MB 512 MB 143 MB 370 MB 1.3 GB 16 x 466 MB 29 MB

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Conclusions

Maxwell‘s Equations discretized in space and


time
EMPIRE yields an improved Stability Criterion
for strongly graded meshes
Fast & Accurate flat metal simulation with 1/3
cell undersizing
EMPIRE is optimized to efficiently use modern
Computers‘ resources

Nov-07 © IMST GmbH - All rights reserved

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