Real time clock module

I2 C-BUS INTERFACE REAL TIME CLOCK MODULE

RX-8025SA/NB
Product number (please refer to page 2)
Q41 8 0 2 5 5 x x x x x 0 0
Q41 8 0 2 5 9 x x x x x 0 0
• Built-in frequency adjusted 32.768 kHz crystal unit.
• Compliant with I2C high-speed bus specifications. (400 kHz)
• Dual Alarm and Timer IRQ function are Available.
• 32.768 kHz clock frequency output. (FOE, FOUT) RX-8025SA RX-8025NB
• Low backup current : 0.48 µA/3 V (Typ.)
• Wide operating voltage range : 1.7 V to 5.5 V
• Wide timekeeper voltage range : 1.15 V to 5.5 V Actual size

The details are mentioned in the application manual.

http://www.epsondevice.com The I2C-Bus is a trademark of Philips Electronics N.V.

Specifications (characteristics) Terminal connection

Absolute Max. rating
Item Symbol Condition Min. Max.
GND=0V
Unit
RX-8025SA
Supply voltage VDD VDD to GND -0.3 +6.5 #14 #8 No. Pin terminal No. Pin terminal
Input voltage VI SCL,SDA,FOE pins GND-0.3 +6.5 1 N.C 14 N.C
V
VO1 SDA, INT, INTB pins GND-0.3 +6.5 2 SCL 13 SDA
Output voltage 3 FOUT 12 INTB
VO2 FOUT pin GND-0.5 VDD+0.3 4 11
N.C GND
Stored as bare product
Storage temperature Range TSTG after unpacking -55 +125 ˚C 5 TEST 10 INTA
6 VDD 9 N.C

Operating range
7 FOE 8 N.C
#1 #7
GND=0V
Item Symbol Condition Min. Max. Unit
Power voltage
Clock voltage
VDD
VCLK
—
—
1.7
1.15
5.5 V RX-8025NB No. Pin terminal No. Pin terminal
1 FOE 22 N.C
Operating temperature TOPR No condensation -40 +85 ˚C #22 #14 2 VDD 21 N.C
3 N.C 20 N.C

Frequency characteristics
4 TEST 19 N.C
GND=0V 5 FOUT 18 N.C
6 SCL 17 N.C
Item Symbol Condition Range Unit
7 SDA 16 N.C
Frequency tolerance ∆f/f Ta=+25 ˚C, VDD=3.0 V AA : 5 ±5 ∗1 x 10-6 8 INTB 15 N.C
Oscillation start-up time tSTA Ta=+25 ˚C, VDD=3.0 V 3 Max. s 9 GND 14 N.C
#1 #11
10 INTA 13 —
Frequency temperature Ta=-10˚C to +70˚C, +10
Top x 10-6 11 N.C 12 —
characteristics VDD=3.0 V ; Reference at +25˚C -120
Frequency voltage Ta=+25 ˚C, -6
±1 Max.
External dimensions
f/V x 10
characteristics VDD=2.0 V to 5.5 V (Unit: mm)
Aging fa Ta=+25 ˚C, VDD=3.0 V, first year ±5 Max. x 10-6/year
∗1 Equivalent to 15 seconds of monthly deviation (excluding offset.) RX-8025SA (SOP 14-pin)
DC characteristics (GND=0 V, VDD = 1.8 V to 5.5 V, Ta = -40 ˚C to +85 ˚C)
Item Symbol Condition Min. Typ. Max. Unit R8025 B
7.4±0.2
5.0

Standby current IDD2

fSCL=0 Hz, FOE = GND
INTA, INTB = VDD VDD = 3 V 0.48 1.20 µA
E 1234 A
FOUT ; output off ("L" level)
“H” input voltage VIH 0.8 VDD 5.5 10.1±0.2
SCL, SDA, FOE pins V
3.2±0.1

“L” input voltage VIL GND -0.3 0.2 VDD 0° to

3.1

10°
“H” output current IOH FOUT pins, VOH = VDD-0.5 V -0.5
1.27 0.35 0.05 Min.
0.15
IOL1 FOUT pins, VOL = 0.4 V 0.5 0.6
“L” output current IOL2 INTA, INTB pins, VOL = 0.4 V 1.0 mA
IOL3 SDA pin, VOL = 0.4 V 4.0
RX-8025NB (SON 22-pin)
6.3 Max.
Input leakage current IIL SCL pins, VI = 5.5 V or GND -1 1 µA
VDD = 5.5 V
R8025
5.0±0.2
4.8

E 1234A
0.5 0.2
1.3 ±0.1

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 Real time clock module
Register table
Address Register symbol bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
0 Seconds o S40 S20 S10 S8 S4 S2 S1
1 Minutes o M40 M20 M10 M8 M4 M2 M1
2 Hours o o H20 P, A H10 H8 H4 H2 H1
3 Weekdays o o o o o W4 W2 W1
4 Days o o D20 D10 D8 D4 D2 D1
5 Months o o o MO10 MO8 MO4 MO2 MO1
6 Years Y80 Y40 Y20 Y10 Y8 Y4 Y2 Y1
7 Digital Offset o F6 F5 F4 F3 F2 F1 F0
8 Alarm_W ; Minutes o WM40 WM20 WM10 WM8 WM4 WM2 WM1
9 Alarm_W ; Hour o o WH20 WP, A WH10 WH8 WH4 WH2 WH1
A Alarm_W ; Weekday o WW6 WW5 WW4 WW3 WW2 WW1 WW0
B Alarm_D ; Minutes o DM40 DM20 DM10 DM8 DM4 DM2 DM1
C Alarm_D ; Hour o o DH20 DP, A DH10 DH8 DH4 DH2 DH1
D Reserved Reserved
E Control 1 WALE DALE 12, 24 • TEST CT2 CT1 CT0
F Control 2 VDSL VDET XST PON ∗1 • CTFG WAFG DAFG
0 : Always set this bit to “0”.

AC characteristics Block diagram

Item Symbol Min. Typ. Max. Unit
SCL clock frequency fSCL 400 kHz
−
Tolerance spike time on bus tSP 50 ns FOUT 32 kHz Comparator_W
Alarm_W Register
(Min, Hour, Week)
Output Voltage VDD
Start condition set-up time tSU;STA FOE Control Detect
0.6 Alarm_D Register
Comparator_D (Min, Hour)
Start condition Hold time tHD;STA
SCL “L” time tLOW 1.3 Divider
Correc
Time Counter
OSC Div. (Sec, Min, Hour, Week, Day, Month,Year)
-tion
SCL “H” time tHIGH 0.6 µs
SCL and SDA rise time tr
− 0.3 OSC
Address
Decoder
Address
Register SCL
SCL and SDA fall time tf Detect
I/O
Data set-up time tSU;DAT 200 INTA
Control SDA
ns Interrupt Control Shift Register
Data hold time tHD;DAT 0 INTB GND
Stop condition set-up time tSU;STO 0.6
µs
Bus free time tBUF 1.3

Timing chart

Bit0 Stop Start

Start Bit 7 Bit6 ACK
Protocol Condition (s) MSB (A7) (A6)
LSB
(A) Condition (P) Condition (s)
(R/W)
tSU;STA tLOW tHIGH 1/fSCL tSU;STA

SCL
(S) (P) (S)
tBUF
tr tf

SDA
(A)

tHD;STA tSU;DAT tHD;DAT tSP tSU;STO tHD;STA

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