TFT-LCD驅動IC設計

National Chi Nan University

Department of Electrical
Engineering

盧志文
 Outline

z Introduction to Liquid-Crystal Display

z LCD Driving System
z Data Driver of TFT-LCD
z Low-Power Driving Scheme
z Examples of TFT-LCD Drivers

Chih-Wen Lu 2 ICDL/NCNU June, 4, 2004

Introduction to Liquid-Crystal Display

Chih-Wen Lu 3 ICDL/NCNU June, 4, 2004

Introduction to Liquid-Crystal Display (cont’d)

TN-LCD(Twisted Nematic)扭轉向列型

Chih-Wen Lu 4 ICDL/NCNU June, 4, 2004

Introduction to Liquid-Crystal Display (cont’d)

STN-LCD(Super Twisted Nematic)超扭轉式向列型

Chih-Wen Lu 5 ICDL/NCNU June, 4, 2004

Introduction to Liquid-Crystal Display (cont’d)

TFT-LCD

偏光板
濾光片
配向膜

配向膜
偏光板

Chih-Wen Lu 6 ICDL/NCNU June, 4, 2004

Introduction to Liquid-Crystal Display (cont’d)

Gamma Correction

Characteristic of LC Required Characteristic

Chih-Wen Lu 7 ICDL/NCNU June, 4, 2004

Introduction to Liquid-Crystal Display (cont’d)

Output of DAC with Gamma Correction

Chih-Wen Lu 8 ICDL/NCNU June, 4, 2004

LCD System

TFT-LCD Module Type

– Analog type TFT-LCD module

z The analog data (source) drivers

z The analog interface to PC

z Only NEC

– Digital type TFT-LCD module

z The digital data (source) drivers

z The ADC/LVDS/Panel Link/GVIF interface to PC

z Mainstream

Chih-Wen Lu 9 ICDL/NCNU June, 4, 2004

LCD System (cont’d)

The Analog Interface

PC ADC Module TFT-LCD Module

Analog Data Driver

Analog Analog
OSD
RGB RGB
Level

Timing Controller
PreAmp
Shifter

Scan Driver
Graphics
TFT-LCD
Controller
PANEL
Controller PLL
Hs CLK
Vs Hsx
Vsx

CCFL Backlight
Chih-Wen Lu 10 ICDL/NCNU June, 4, 2004
LCD System (cont’d)

The ADC Interface

PC ADC Module TFT-LCD Module

Digital Data Driver

Analog Digital
OSD
RGB RGB

Timing Controller
ADC Buffer

Scan Driver
Graphics
TFT-LCD
Controller
PANEL
Controller PLL
Hs CLK
Vs Hsx
Vsx

Chih-Wen Lu 11 ICDL/NCNU CCFL Backlight

June, 4, 2004
 LCD System (cont’d)
The Digital Interface
PC CABLE TFT-LCD Module

Digital Data Driver

Digital Digital
RGB RGB
LVDS/ LVDS/

Timing Controller

Scan Driver
PanelLink PanelLink
Graphics TFT-LCD
TX RX
Controller PANEL

CLK CLK
Hs Hs
Vs Vs

CCFL Backlight

Chih-Wen Lu 12 ICDL/NCNU June, 4, 2004

Data Driver

Data Driver
Gate Driver

Chih-Wen Lu 13 ICDL/NCNU June, 4, 2004

Data Driver (cont’d) TFT LCDs Driving Method

1 2 3 4 5 1 2 3 4 5 1 2 3 4 5 1 2 3 4 5
1 + + + + + 1 + + + + + 1 + - + - + 1 + - + - +
2 + + + + + 2 - - - - - 2 + - + - + 2 - + - + -
3 + + + + + 3 + + + + + 3 + - + - + 3 + - + - +
4 + + + + + 4 - - - - - 4 + - + - + 4 - + - + -
5 + + + + + 5 + + + + + 5 + - + - + 5 + - + - +

1 2 3 4 5 1 2 3 4 5 1 2 3 4 5 1 2 3 4 5
1 - - - - - 1 - - - - - 1 - + - + - 1 - + - + -
2 - - - - - 2 + + + + + 2 - + - + - 2 + - + - +
3 - - - - - 3 - - - - - 3 - + - + - 3 - + - + -
4 - - - - - 4 + + + + + 4 - + - + - 4 + - + - +
5 - - - - - 5 - - - - - 5 - + - + - 5 - + - + -

Frame Inversion Row Inversion Column Inversion Dot Inversion

Chih-Wen Lu 14 ICDL/NCNU June, 4, 2004
Data Driver (cont’d)

General Data Driver Architecture

SET NCS
CLK
Shift Register

R
G Input Register
B

Load Data Latch

DAC R&P
Voltage Reference

Output Buffer
op1 op2 op3
Chih-Wen Lu 15 Panel ICDL/NCNU
To LCD June, 4, 2004
Data Driver (cont’d)

Design Considerations for Data Driver IC

Low-power Consumption
Low-power Output Buffer Design
Low Dynamic Power Design
High-speed Driving (Output Buffer)
Resolution (6-bit, 8-bit)
Small Area
Chih-Wen Lu 16 ICDL/NCNU June, 4, 2004
Low-Power Driving Scheme

Charge Conservation Method

Chih-Wen Lu 17 ICDL/NCNU June, 4, 2004

Low-Power Driving Scheme (cont’d)

Charge Conservation Method

Chih-Wen Lu 18 ICDL/NCNU June, 4, 2004

Low-Power Driving Scheme (cont’d)

Charge-recycling Technique

Chih-Wen Lu 19 ICDL/NCNU June, 4, 2004

Low-Power Driving Scheme (cont’d)

Multi-level Multi-phase Charge Recycling

Chih-Wen Lu 20 ICDL/NCNU June, 4, 2004

Design Example # 2
A High-Speed Low-Power Rail-to-Rail Data Driver
clk
set Shift Register
reset

pol Inversion Controller

R
G Input Register
B

Data Latch
Latch Enable

Voltage Reference DAC

R&P
Output Buffer

Chih-Wen Lu To
21LCD Panel
ICDL/NCNU June, 4, 2004
Design Example # 2 (cont’d) Driving scheme

June, 4, 2004

Positive polarity
ICDL/NCNU
Input digital
DAC 4 Channel 4
code 4
NMOS
input buffer
Input digital
code 3 DAC 3 Channel 3
PMOS
input buffer
Negative polarity

22
Positive polarity
Input digital
DAC 2 Channel 2
code 2
NMOS
input buffer
Input digital
code 1 DAC 1 Channel 1
PMOS
input buffer
Negative polarity

Chih-Wen Lu
Design Example # 2 (cont’d)
VDD M19
+ VOS -
Buffers - M26
op1 in2 + comp2
+ out_n
- out_p
in1 -
+ op2
+
-
comp1
- VOS +

M10 VSS
M23
MI1
MI2

R&P

out1 out2
Chih-Wen Lu 23 ICDL/NCNU June, 4, 2004
Design Example # 2 (cont’d)
Schematic
of Buffers
VDD
M11 M17 M25
M4 M9
M1 M18 M26
⎛W ⎞ ⎛W ⎞
M5 in1 M19 ⎜ ⎟ =⎜ ⎟
M6 ⎝ L ⎠5 ⎝ L ⎠6
M21 out_n
out_p ⎛W ⎞ ⎛W ⎞ ⎛W ⎞
M12 ⎜ ⎟ = ⎜ ⎟ − ∆⎜ ⎟
M2 ⎝ L ⎠ 21 ⎝ L ⎠ 5 ⎝L⎠
in2
M16 ⎛W ⎞ ⎛W ⎞ ⎛W ⎞
M15 M24 ⎜ ⎟ =⎜ ⎟ =⎜ ⎟
⎝ L ⎠ 7 ⎝ L ⎠ 8 ⎝ L ⎠ 22
M22
M14 M20
M13 ⎛W ⎞ ⎛W ⎞
M3 M7 ⎜ ⎟ =⎜ ⎟
M8 M10 GND ⎝ L ⎠15 ⎝ L ⎠16
M23
MI1 ⎛W ⎞ ⎛W ⎞ ⎛W ⎞
⎜ ⎟ = ⎜ ⎟ − ∆⎜ ⎟
⎝ L ⎠ 24 ⎝ L ⎠15 ⎝L⎠
MI2
⎛W ⎞ ⎛W ⎞ ⎛W ⎞
R&P ⎜ ⎟ =⎜ ⎟ =⎜ ⎟
⎝ L ⎠17 ⎝ L ⎠18 ⎝ L ⎠ 25

out1 out2

Chih-Wen Lu 24 ICDL/NCNU June, 4, 2004

Design Example # 2 (cont’d)

Die Photograph of 6-bit Data driver

(6 channels)

Chih-Wen Lu 25 ICDL/NCNU June, 4, 2004

Design Example # 2 (cont’d)

z The measured waveform of the outputs for two

neighboring channels under dot inversion for
the RGB digital inputs of ‘000000’

Chih-Wen Lu 26 ICDL/NCNU June, 4, 2004

Design Example # 2 (cont’d)

z The measured waveform of the outputs for two

neighboring channels under dot inversion for
the RGB digital inputs of ‘111111’

Chih-Wen Lu 27 ICDL/NCNU June, 4, 2004

Design Example # 2 (cont’d)

z The measured transfer curve of the DAC with

its output buffer
3.5
3
Output voltage (V)

2.5
2
1.5
1
0.5
0
1 12 23 34 45 56 67 78 89 100 111 122 133
Digital input code
Chih-Wen Lu 28 ICDL/NCNU June, 4, 2004
Design Example # 2 (cont’d)

z The measured differential nonlinearity versus

different input codes
0.6
0.5
0.4
0.3
DNL (LSB)

0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
1 12 23 34 45 56 67 78 89 100 111 122 133
Digital input code

Chih-Wen Lu 29 ICDL/NCNU June, 4, 2004

Design Example # 2 (cont’d)

z The measured integral nonlinearity versus

different input codes

0.4
0.3
0.2
0.1
INL (LSB)

0
-0.1
-0.2
-0.3
-0.4
-0.5
1 12 23 34 45 56 67 78 89 100 111 122 133
Digital input code

Chih-Wen Lu 30 ICDL/NCNU June, 4, 2004

Design Example # 2 (cont’d)

Technology 0.35-µm
CMOS
Supply voltage 3.3 V

Clock frequency 162 MHz

Static power consumption 110

(including DAC) µW/channel
input = ‘000000’ 105
input = ‘111111’ µW/channel
Maximum settling time (0.2 %,
CL = 680 pF) 1.2 µs
rising edge 1.4 µs
Chih-Wen Lu falling edge 31 ICDL/NCNU June, 4, 2004
 Conclusions
I have presented
• the Introduction to LCD,
• LCD Driving System,
•Data Driver of TFT-LCD,
• Low-power Driving Scheme, and
• 3 Examples of TFT-LCD Drivers.

Chih-Wen Lu 32 ICDL/NCNU June, 4, 2004

 Thank You!

Chih-Wen Lu 33 ICDL/NCNU June, 4, 2004