[AKD4452-SA]

AKD4452-SA
AK4452 Sound Quality Evaluation Board Rev.2

GENERAL DESCRIPTION
The AKD4452-SA is an evaluation board for the AK4452 (32-bit 2ch DAC) that supports AV-Receiver,
DVD-Audios, Car-Audio Systems. It integrates differential output low pass filters, allowing quick
evaluation with digital audio interface.

 Ordering guide

AKD4452-SA --- Evaluation board for AK4452

（Control software is packed with this board）

FUNCTION

 3 type digital audio interface

- Optical input
- COAX input
- External input
 Low Pass Filters (LPF) for Pre-amplifier Outputs
 2ch Analog outputs
 USB Port for Serial control

GND +12V -12V

Reg Reg
+12V⇒+3.3V +12V⇒+5.0V
+12V

U601
TVDD AVDD
D
3
COAX In .
DIR 3
V VREFH1
AK4118A
Opt In
+12V
AK4452
6x2pin
Header MCLK
(DSP) BICK -12V
Audio
LRCK L1
Signals +12V
SDTI
I
2
C
/ -12V
S R1
D P
USB PIC 3 I
B-TYPE 18F4550 .
3 2nd Order LPF
V

Figure 1.AKD4452-SA Block Diagram

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Board Diagram

 Board Diagram

Figure 2.AKD4452-SA Board Diagram

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 Description

(1) Connector for Power supply

+12V、-12V、GND
Terminals for power supply. Refer to Table1.

(2) AOUTL1/AOUTR1
RCA Jack for analog outputs.

(3) COAX、OPT
Input SPDIF signal to AK4118A.
When using the COAX：R305=0Ω、R306=Open (Default)
When using the OPT：R305=Open、R306=0Ω

(4) AK4118A
AK4118A outputs digital data to AK4452 as DIR.

(5) PORT303
External digital data inputs to AK4452
MCLK、BICK、LRCK/DSDL1、SDTI1/DSDR1、TDMO1
When using the PORT3：R313=R314=R315=R316=Open
R319=R320=R321=R322=51Ω
When using the AK4118A：R313=R314=R315=R316=51Ω (Default)
R319=R320=R321=R322=Open (Default)

(6) USB
USB port. It is possible to set up the registers of AK4452 from PC via the USB port.

(7) PIC18F4550
USB control IC.

(8) SW301
Setting switch for AK4118A.Upside is “Hi”, downside is “Lo”.
Refer to Table2.SW301 setting.

(9) SW401
Setting switch for AK4452.Upside is “Hi”, downside is “Lo”
Refer to Table5.SW401 setting.

(10) SW402
Power down switch for AK4452.Upside is “Hi (on)”, downside is “Lo (off)”

(11) SW403
Mute switch for AK4452.
Push ：AK4452 is mute
Release：AK4452 is unmute

(12) SW404
Power down switch for AK4118A.Upside is “Hi (on)”, downside is “Lo (off)”

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Evaluation Board Manual

■Operation sequence

[1] Set up power supplies

The power should be separated from the source of a power supplier.

Name of Color of
Voltage Use application Comment and attention
connector connector
+12V Red +12V ・Regulator Should always be
・OP-Amp connected.
-12V Blue -12V ・OP-Amp Should always be
connected.
GND Black 0V ・Ground Should always be
connected.
Table 1. Power supply line setting

[2] Switch setting

It should be set to match the mode.

(1) SW301 setting

No. Switch Name Function default
1 DIF2 DIF2-pin of AK4118A Hi
2 DIF1 DIF1-pin of AK4118A Lo
3 DIF0 DIF0-pin of AK4118A Lo
4 OCKS1 OCKS1-pin of AK4118A Hi
5 OCKS0 OCKS0-pin of AK4118A Lo
Table 2. SW301 setting

LRCK BICK
Mode DIF2 pin DIF1 pin DIF0 pin DAUX SDTO
I/O I/O
24bit, Left 16bit, Right
0 0 0 0 H/L O 64fs O
justified justified
24bit, Left 18bit, Right
1 0 0 1 H/L O 64fs O
justified justified
24bit, Left 20bit, Right
2 0 1 0 H/L O 64fs O
justified justified
24bit, Left 24bit, Right
3 0 1 1 H/L O 64fs O
justified justified
24bit, Left 24bit, Left
4 1 0 0 H/L O 64fs O default
justified justified
5 1 0 1 24bit, I2S 24bit, I2S L/H O 64fs O
24bit, Left 24bit, Left
6 1 1 0 H/L I 64-128fs I
justified justified
7 1 1 1 24bit, I2S 24bit, I2S L/H I 64-128fs I
Table 3. AK4118A Audio interface format

OCKS1 pin OCKS0 pin MCKO1 fs (max)

0 0 256fs 96 kHz
0 1 256fs 96 kHz
1 0 512fs 48 kHz default
1 1 128fs 192 kHz
Table 4. AK4118A MCLK setting

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(2) SW401 setting

No. Switch Name Function default
I2C pin of AK4452 Hi
1 I2C H：I2C mode
L：SPI mode
PS pin of AK4452 Hi
2 PS H：Parallel mode
L：Serial mode
DCHAIN pin of AK4452（Parallel mode only） Lo
3 DCHAIN H：DCHAIN mode
L：Normal mode
4 TDM0 TDM0 pin of AK4452（Parallel mode only） Lo
5 TDM1 TDM1 pin of AK4452（Parallel mode only） Lo
DIF pin of AK4452（Parallel mode only） Lo
6 DIF H：32bit I2S compatible
L：32bit LSB justified
7 CAD0-I2C CAD0 pin of AK4452 （I2C mode only） Lo
8 CAD0-SPI CAD0 pin of AK4452（SPI mode only） Lo
9 CAD1 CAD1 pin of AK4452（Serial mode only） Lo
Table 5.SW401 setting

(3) SW402/SW403/SW404 setting

Power down switch for AK4452
Hi：Power up
SW402 AK4452-PDN
Lo：Power down
※Should be “Hi” during operation AK4452.
Mute switch for AK4452（Parallel mode only）
SW403 MUTE Release：Unmute
Push：Mute
Power down switch for AK4118A
Hi：Power up
SW404 AK4118-PDN
Lo：Power down
※Should be “Hi” during operation AK4118A.
Table6.SW402/SW403/SW404 setting

[3] USB connect (Serial mode only)

Connect the board to PC with the USB cable.

[4] Power on
Turn on the power to the board. In case of serial mode, startup AK4452 control software.

[5] Setup the control registers (Serial mode only)

Refer to “Control software manual”.

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Control Software Manual

■ Evaluation Board and Control Software Settings

1. Set an evaluation board properly.
2. Connect a PC (IBM-AT compatible) and the USB cable.
The USB I/F is recognized as HID (Human Interface Device) on the PC.
It is not necessary to install a new driver.
3. Start up the control program.
When the screen does not display “AKUSBIF-B” at bottom left, reconnect the PC and the USB cable, and push the
[Port Reset] button.
4. Proceed evaluation by following the process below.

[Support OS]
Windows XP / Vista / 7

Figure3.Control Software Window

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■ Operation Overview

Function, register map and testing tool can be controlled by this control software. These controls are selected by upper
tabs.

Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching
tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting.

1. [Port Reset]: For when connecting to PC

Click this button after the control software starts up when connecting to PC.

2. [Write Default]: Initializes Registers

When the device is reset by a hardware reset, use this button to initialize the registers.

3. [All Write]: Executes write commands for all registers displayed.

4. [All Read]: Executes read commands for all registers displayed.

5. [Save]: Saves current register settings to a file.

6. [Load]: Executes data write from a saved file.

7. [All Req Write]: Opens “All Req Write” dialog box.

8. [Data R/W]: Opens “Data R/W” dialog box

9. [Sequence]: Opens “Sequence” dialog box.

10. [Sequence (File)]: Opens “Sequence(File)” dialog box.

11. [Read]: Reads current register settings and displays on to the register area (on the right of the main window).
This is different from [All Read] button, it does not reflect to a register map, only displaying register
settings in hexadecimal.

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■ Tab Functions

1. [REG]: Register Map

This tab is for a register writing and reading.

Each bit on the register map is a push-button switch.

Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)

Grayout registers are Read Only registers. They can not be controlled.

The registers which is not defined in the datasheet are indicated as “---”.

Figure4.Window of [ REG ]

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1-1. [Write]: Data Writing Dialog

It is for when changing two or more bits on the same address at the same time.

Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.

When the checkbox is checked, the data will be “H” or “1”. When the checkbox is not checked, the data will be “L”
or “0”. Click [OK] to write setting values to the registers, or click [Cancel] to cancel this setting.

Figure5.Window of [ Register Set ]

1-2. [Read]: Data Read (I2C mode only)

Click [Read] button located on the right of the each corresponded address to execute a register read.

After register reading, the display will be updated regarding to the register status.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)

Please be aware that button statuses will be changed by a Read command.

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2. [Tool]: Testing Tools

Evaluation testing tools are available in this tab.

Click buttons for each testing tool.

Figure 6.Window of [ Tool ]

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2-1.[Repeat Test] : Repeat Test Dialog

Click [Repeat Test] button in the Test tab to open a repeat test dialog shown below.
Repeat writing test can be executed by this dialog.

Figure 7.Window of [ Repeat Test ]

[Start] Button : Starts the repeat test.

A dialog for saving a file of the test result will open when clicking this button.
Name the file.
Test will start after specifying a saving file.
[Close] Button : Closes this dialog and finishes the process.
[Address] Box : Data writing address in hexadecimal numbers.
[Start Data] Box : Start data in hexadecimal numbers.
[End Data] Box : End data in hexadecimal numbers.
[Step] Box : Data write step interval.
[Repeat Count] Box : Repeat count of the test writing.
[Up and Down] Box : Data write flow is changed as below.
• Checked: Writes in step interval from the start data to the end data and turn back from the end data to
the start data.
[Example] Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.
Data flow: [00→01→02→03→04→05→05→04→03→02→01→00] x Repeat Count
Number

• Not checked: Writes in step interval from the start data to the end data and finishes writing.
[Example] Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.
Data flow: [00→01→02→03→04→05] x Repeat Count Number

[Sampling Frequency] Box: Selects sampling frequency 44.1kHz/48kHz

[Count] Box : Indicates the count number during a repeat test.
[Lch Level] Box : Indicates the Lch Level during a repeat test.

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2-2.[Loop Setting] : Loop Dialog

Click [Loop Setting] button in the Tool tab to open loop setting dialog as shown below.
Writing test can be executed.

Figure 8.Window of [ Loop ]

[ OK ] Button : Starts the test.

[ Cancel ] Button : Closes the dialog and finishes the process.
[ Address ] Box : Data writing address in hexadecimal numbers.
[ Start Data ] Box : Start data in hexadecimal numbers.
[ End Data ] Box : End data in hexadecimal numbers.
[ Interval ] Box : Data write interval time.
[ Step ] Box : Data write step interval.
[ Mode Select ] Box : Mode select check box.

• Checked: Writes in step interval from the start data to the end data and turn back from the end data
to the start data.
[Example] Start Data = 00, End Data = 05, Step = 1
Data flow: 00→01→02→03→04→05→05→04→03→02→01→00

• Not Checked: Writes in step interval from the start data to the end data and finishes writing.
[Example] Start Data = 00, End Data = 05, Step = 1
Data flow: 00→01→02→03→04→05

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■ Dialog Boxes
1. [All Reg Write]: All Reg Write dialog box

Click [All Reg Write] button in the main window to open register setting files.
Register setting files saved by [SAVE] button can be applied.

Figure9.Window of [ All Reg Write ]

[Open (left)]: Selects a register setting file (*.akr).

[Write]: Executes register writing by the setting of selected file.
[Write All]: Executes all register writings.
Selected files are executed in descending order.

[Help]: Opens a help window.

[Save]: Saves a register setting file assignment. The file name is “*.mar”.
[Open (right)]: Opens a saved register setting file assignment “*. mar”.
[Close]: Closes the dialog box and finish the process.

~ Operating Suggestions ~

1. Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should
be stored in the same folder.
2. When register settings are changed by [Save] button in the main window, re-read the file to reflect new
register settings.

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2. [Data R/W]: Data R/W Dialog Box

Click the [Data R/W] button in the main window for data read/write dialog box.
Data write is available to specified address.

Figure 10. Window of [ Data R/W ]

[Address] Box: Input data address in hexadecimal numbers for data writing.
[Data] Box : Input data in hexadecimal numbers.
[Mask] Box : Input mask data in hexadecimal numbers.
This is “AND” processed input data.

[Write]: Writs the data generated from Data and Mask values to the address specified by “Address” box.

[Read]: Reads data from the address specified by “Address” box.

The result will be shown in the Read Data Box in hexadecimal numbers.

[Close]: Closes the dialog box and finishes the process.

Data writing can be cancelled by this button instead of executing a write command.

*The register map will be updated after executing [Write] or [Read] commands.

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Measurement Results
・ Measurement unit : Audio Precision SYS-2722 (No.00069)
・ MCKI : 512fs
・ BICK : 64fs
・ fs : 44.1kHz、96kHz、192kHz
・ Bit : 24bit
・ Input Frequency : 1kHz
・ Power Supply : ±12V, GND
AVDD=VREFH=+5.0V (Regulator), TVDD=+3.3V (Regulator)
・ Pass : COAX → AK4118A(DIR) → AK4452 → AOUT
・ Temperature : Room
・ Board Setting : Parallel Mode
・ External OP-AMP : NM2043D

[Measurement Results]

1. fs=44.1kHz, MCLK=512fs, BICK=64fs

Result
Unit
Lch Rch
DAC1 : SDTI1 => DAC1 => L/ROUT1
S/(N+D) fs = 44.1kHz (0dBFS) 105.3 105.4 dB
DR fs = 44.1kHz (-60dBFS, A-Weighted) 114.9 114.7 dB
S/N fs = 44.1kHz (No Inputs, A-weighted) 115.0 114.8 dB

2. fs=96kHz, MCLK=256fs, BICK=64fs

Result
Unit
Lch Rch
DAC1 : SDTI1 => DAC1 => L/ROUT1
S/(N+D) fs = 96kHz (0dBFS) 102.5 102.6 dB
DR fs = 96kHz (-60dBFS, A-Weighted) 114.6 114.3 dB
S/N fs = 96kHz (No Inputs, A-weighted) 114.7 114.5 dB

3. fs=192kHz, MCLK=128fs, BICK=64fs

Result
Unit
Lch Rch
DAC1 : SDTI1 => DAC1 => L/ROUT1
S/(N+D) fs = 192kHz (0dBFS) 102.6 102.3 dB
DR fs = 192kHz (-60dBFS, A-Weighted) 114.5 114.3 dB
S/N fs = 192kHz (No Inputs, A-weighted) 114.6 114.5 dB

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[Plot Data]
1. fs=44.1kHz, MCLK=512fs, BICK=64fs
DAC1 : SDTI1 => DAC1 => L/ROUT1
+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k
Hz

Figure 11.FFT (0dBFS) [fs = 44.1kHz]

+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k
Hz

Figure 12.FFT (-60dBFS) [fs = 44.1kHz]

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+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k
Hz

Figure 13.FFT (No Inputs fs=44.1kHz]

-70

-80

-90

d
-100
B
r
-110
A

-120

-130

-140
-140 -120 -100 -80 -60 -40 -20 +0
dBFS

Figure 14.THD+N vs. Amplitude (Input Level) [fs = 44.1kHz]

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-70

-80

-90

d
-100
B
r
-110
A

-120

-130

-140
20 50 100 200 500 1k 2k 5k 10k 20k
Hz

Figure 15.THD+N vs. Input Frequency [fs = 44.1kHz, 0dBFS Inputs]

+0

-20

-40

d
-60
B
r
-80
A

-100

-120

-140
-140 -120 -100 -80 -60 -40 -20 +0
dBFS

Figure 16.Linearity [fs = 44.1kHz]

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+1

+0.8

+0.6

+0.4

d +0.2
B
r +0

A -0.2

-0.4

-0.6

-0.8

-1
20 50 100 200 500 1k 2k 5k 10k 20k
Hz

Figure 17.Frequency Response [fs = 44.1kHz]

-80
-85

-90
-95

-100

-105
d
-110
B
-115

-120

-125

-130

-135

-140
20 50 100 200 500 1k 2k 5k 10k 20k
Hz

Figure 18.Crosstalk [fs = 44.1kHz]

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[Plot Data]
2. fs=96kHz, MCLK=256fs, BICK=64fs
DAC1 : SDTI1 => DAC1 => L/ROUT1
+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k 40k
Hz

Figure 19.FFT (0dBFS) [fs = 96kHz]

+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k 40k
Hz

Figure 20.FFT (-60dBFS) [fs = 96kHz]

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+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k 40k
Hz

Figure 21.FFT (No Inputs fs=96kHz]

-70

-80

-90

d
-100
B
r
-110
A

-120

-130

-140
-140 -120 -100 -80 -60 -40 -20 +0
dBFS

Figure 22.THD+N vs. Amplitude (Input Level) [fs = 96kHz]

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-70

-80

-90

d
-100
B
r
-110
A

-120

-130

-140
20 50 100 200 500 1k 2k 5k 10k 20k 40k
Hz

Figure 23.THD+N vs. Input Frequency [fs = 96kHz, 0dBFS Inputs]

+0

-20

-40

d
-60
B
r
-80
A

-100

-120

-140
-140 -120 -100 -80 -60 -40 -20 +0
dBFS

Figure 24.Linearity [fs = 96kHz]

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+1

+0.8

+0.6

+0.4

d +0.2
B
r +0

A -0.2

-0.4

-0.6

-0.8

-1
20 50 100 200 500 1k 2k 5k 10k 20k 40k
Hz

Figure 25.Frequency Response [fs = 96kHz]

-80
-85

-90
-95

-100

-105
d
-110
B
-115

-120

-125

-130

-135

-140
20 50 100 200 500 1k 2k 5k 10k 20k 40k
Hz

Figure 26.Crosstalk [fs = 96kHz]

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[Plot Data]
3. fs=192kHz, MCLK=128fs, BICK=64fs
DAC1 : SDTI1 => DAC1 => L/ROUT1
+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k
Hz

Figure 27.FFT (0dBFS) [fs = 192kHz]

+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k
Hz

Figure 28.FFT (-60dBFS) [fs = 192kHz]

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+0

-20

-40

-60
d
B -80
r
-100
A
-120

-140

-160

-180
20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k
Hz

Figure 29.FFT (No Inputs fs=192kHz]

-70

-80

-90

d
-100
B
r
-110
A

-120

-130

-140
-140 -120 -100 -80 -60 -40 -20 +0
dBFS

Figure 30.THD+N vs. Amplitude (Input Level) [fs = 192kHz]

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-70

-80

-90

d
-100
B
r
-110
A

-120

-130

-140
20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k
Hz

Figure 31.THD+N vs. Input Frequency [fs = 192kHz, 0dBFS Inputs]

+0

-20

-40

d
-60
B
r
-80
A

-100

-120

-140
-140 -120 -100 -80 -60 -40 -20 +0
dBFS

Figure 32.Linearity [fs = 192kHz]

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+1

+0.5

+0

-0.5
d
B
r -1

A
-1.5

-2

-2.5

-3
20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k
Hz

Figure 33.Frequency Response [fs = 192kHz]

-70

-80

-90

-100

d
-110
B

-120

-130

-140

-150
20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k
Hz

Figure 34.Crosstalk [fs = 192kHz]

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REVISION HISTORY

Date Manual Board Reason Page Contents

(yy/mm/dd) Revision Revision
14/10/23 KM118700 0 First edition
16/10/12 KM118701 1 Modification Schematic changed
17/02/01 KM118702 1 Modification Update Measurement Results
19/06/26 KM118703 2 Update Board revision update(Rev.1→2)

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IMPORTANT NOTICE

0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information
contained in this document without notice. When you consider any use or application of AKM product
stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized
distributors as to current status of the Products.
1. All information included in this document are provided only to illustrate the operation and application examples
of AKM Products. AKM neither makes warranties or representations with respect to the accuracy or
completeness of the information contained in this document nor grants any license to any intellectual property
rights or any other rights of AKM or any third party with respect to the information in this document. You are
fully responsible for use of such information contained in this document in your product design or applications.
AKM ASSUMES NO LIABILITY FOR ANY LOSSES INCURRED BY YOU OR THIRD PARTIES
ARISING FROM THE USE OF SUCH INFORMATION IN YOUR PRODUCT DESIGN OR
APPLICATIONS.
2. The Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high
levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily
injury, serious property damage or serious public impact, including but not limited to, equipment used in
nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for
automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control
combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and
equipment used in finance-related fields. Do not use Product for the above use unless specifically agreed by
AKM in writing.
3. Though AKM works continually to improve the Product’s quality and reliability, you are responsible for
complying with safety standards and for providing adequate designs and safeguards for your hardware, software
and systems which minimize risk and avoid situations in which a malfunction or failure of the Product could
cause loss of human life, bodily injury or damage to property, including data loss or corruption.
4. Do not use or otherwise make available the Product or related technology or any information contained in this
document for any military purposes, including without limitation, for the design, development, use, stockpiling
or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction
weapons). When exporting the Products or related technology or any information contained in this document,
you should comply with the applicable export control laws and regulations and follow the procedures required
by such laws and regulations. The Products and related technology may not be used for or incorporated into any
products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws
or regulations.
5. Please contact AKM sales representative for details as to environmental matters such as the RoHS compatibility
of the Product. Please use the Product in compliance with all applicable laws and regulations that regulate the
inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. AKM assumes
no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations.
6. Resale of the Product with provisions different from the statement and/or technical features set forth in this
document shall immediately void any warranty granted by AKM for the Product and shall not create or extend
in any manner whatsoever, any liability of AKM.
7. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written
consent of AKM.
Rev.1

[KM118703] - 29- 2019/06

 5 4 3 2 1

DVSS

TVDD
PDN
D D

0
R101
R118 open AOUTR2P

0
R117 open AOUTR2N
C102
C101 open
47u(A)

R102
+
C103

open
C104

+
1u(A)
0.01u(F)

R103
R104 open VREFL2

C105 + C106 R105

open open open

32

31

30

29

28

27

26

25
R106 open VREFH2

PDN

VDD18

DVSS

TVDD

LDOE

TST7

TST6

TST5
C C

MCLK 1 24 AVSS
MCLK TST4

BICK/DCLK 2 23 R116 open AOUTL2N

BICK/DCLK TST3

LRCK/DSDL1 3 22 R115 open AOUTL2P

LRCK/DSDL1 TST2

SDTI1/DSDR1 4 U101 21 AVDD

SDTI1/DSDR1 AVDD
AK4452VN C107 + C108 R107
TST1 5 20 0.01u(F) 47u(A) open
TST1 AVSS
AVSS

TDMO1 6 19 R114 300 AOUTR1P

TDMO1 AOUTR1P

7 18 R113 300 AOUTR1N

DZF/SMUTE DZF/SMUTE AOUTR1N

8 17 R108 short

CAD0_I2C/CSN/DIF0
CAD1/DCHAIN CAD1/DCHAIN VREFH1 VREFH1

CCLK/SCL/TDM1
CDTI/SDA/TDM0

C109 + C110 R109

CAD0_SPI/PS
0.01u(F) 47u(A) open

AOUTL1N
AOUTL1P
B B
R110 short

VREFL1
VREFL1

I2C
9

10

11

12

13

14

15

16
R112 300 AOUTL1N

R111 300 AOUTL1P

C111
0.01u(F)
AVSS
I2C
CAD0_I2C/CSN/DIF

CAD0_SPI/PS
CDTI/SDA/TDM0

CCLK/SCL/TDM1

A A

Title

- 30- Size
A3
<AKD4452-SA>
Document Number
AK4452
Rev
1

Date: Friday, May 12, 2017 Sheet 1 of 6

5 4 3 2 1
 5 4 3 2 1

D D

J201 ROUT1 J204 open

R202 3.6k(DIP) R203 4.7k(DIP) 1 2 R227 open R228 open 1 2

AOUTR1N AOUTR2N
3 3
4 4
5 5
R204 150(DIP) C201 470p(F) R231 open C216 open

AGND AGND

C202
C214
3.3n(F)
opem

R207 3.6k(DIP) R208 150(DIP) R229 open R230 open

AOUTR1P AOUTR2P
-12V -12V

1
C C
R209 C204 U201 R232 C215 U202

V-

+INA

-INA

OUTA

V-

+INA

-INA

OUTA
C205 C217 C218
4.7k(DIP) 470p(F) C203 + open open +
22u(A) open open
0.01u(F)

OUTB

OUTB
+INB

+INB
AVSS AVSS

-INB

-INB
V+

V+
5 AGND open AGND

8
+12V +12V

+ C207 +
C206 C219 C220
22u(A)
R212 3.6k(DIP) R213 4.7k(DIP) 0.01u(F) R222 open R221 open open open
AOUTL1N AOUTL2N

R214 150(DIP) C208 470p(F) AGND R225 open C213 open AGND

C209 C211
3.3n(F) open
J202 LOUT1 J203 open

R217 3.6k(DIP) R218 150(DIP) 1 2 R223 open R224 open 1 2

B AOUTL1P 3 AOUTL2P 3 B
4 4
5 5
R219 C210 R226 C212
4.7k(DIP) 470p(F) open open

AGND AGND
AVSS
AVSS

A A

Title

- 31- Size
A3
<AKD4452-SA>
Document Number
Analog Out
Rev
1

Date: Friday, May 12, 2017 Sheet 2 of 6

5 4 3 2 1
 5 4 3 2 1

PORT301

COAX 2 1 C301 1u R305 10

D 3 D

D3.3V
4
5 R302
75

DVSS2

+
C303 47u(A)

L301 10uH(DIP)
D3.3V C304 0.01u(F)
PORT302
3
VCC 2
OPT GND 1 R307 470 R306 open
OUT
C306 R308
0.01u(F) 10k
C305 + C307
0.01u(F) 10u(A)

DVSS2

48
47
46
45
44
43
42
41
40
39
38
37
RX3
VSS4
RX2
TEST1
RX1
NC
RX0
VSS3
VCOM
R
AVDD
INT1
C C
1 36
D3.3V 2 IPS0 INT0 35 INT0
3 NC OCKS0 34 OCKS0
DIF0 4 DIF0 OCKS1 33 OCKS1 R316 5.1
5 TEST2 U303 CM1 32 MCLK
DIF1 6 DIF1 CM0 31 R313 10
VSS1 AK4118A PDN 4118-PDN BICK/DCLK
7 30
DIF2 8 DIF2 XTI 29 R315 0
9 IPS1 XTO 28 LRCK/DSDL1
10 P/SN DAUX 27 R314 51
11 XTL0 MCKO2 26 SDTI1/DSDR1
12 XTL1 BICK 25 R336 open
VIN SDTO TST1

MCKO1
COUT
UOUT

DVDD
BOUT

VOUT
TVDD

LRCK
VSS2
TDMO1

TX0
TX1
NC

open
open
open
open
51
AK4118A

0
13
14
15
16
17
18
19
20
21
22
23
24

R317
R318
R319
R320
R321
R322
D3.3V C310 0.01u(F) C309 0.01u(F)
10
9
8
7
6

C311 10u(A) +
C312 47u(A)
H SW301

10k

10k
10k
10k
10k
B B
SW DIP-5 PORT303

0
R323

HEADER 6X2
11
9
7
5
3
1
L 0

R324
R325
R326
R327
R328
R329
1
2
3
4
5

12
10
8
6
4
2
OCKS1
OCKS0

OCKS0
DIF2
DIF1
DIF0

D3.3V

D3.3V

OCKS1
DIF0
DIF1
DIF2 1:MCLK 2:GND
10k
10k
10k
10k
10k

3:BICK/DLCLK 4:GND
5:LRCK/DSDL1 6:GND
7:SDTI1/DSDR1 8:GND
9:N.C. 10:GND
R330
R331
R332
R333
R334

11:TDMO1 12:GND

A A

Title
<AKD4452-SA>
- 32- Size
A3
Document Number
DIR
Rev
1

Date: Friday, May 12, 2017 Sheet 3 of 6

5 4 3 2 1
 5 4 3 2 1

S=L : A=B1
S=H : A=B2 S=L : A=B1
S=H : A=B2
DIF
U401
I2C 1 U402
2 S 1
CSN 1B1 S
CAD0-I2C 3 4 R401 51 2
5 1B2 1A 3 1B1 4 R403 51
CAD0-SPI 2B1 1B2 1A CAD0_I2C/CSN/DIF
D PS 6 7 R402 51 5 D
11 2B2 2A 6 2B1 7
10 3B1 9 R404 51 11 2B2 2A
14 3B2 3A 10 3B1 9
13 4B1 12 14 3B2 3A
TVDD 4B2 4A 4B1
13 12
15 4B2 4A
8 OE 16 15
GND VCC TVDD OE
8 16 TVDD
TC7MBL3257 GND VCC

18
17
16
15
14
13
12
11
10
C401 TC7MBL3257
SW401 0.01u(F) C402
SW DIP-9 0.01u(F)

1
2
3
4
5
6
7
8
9
R405 0
R406 0 I2C
R407 0 PS CAD0_SPI/PS
R408 0 DCHAIN S=L : A=B1
R409 0 TDM0 S=H : A=B2
R410 0 TDM1
R411 0 DIF U403
R412 0 CAD0-I2C 1
R413 0 CAD0-SPI 2 S
CAD1 DZF 3 1B1 4
10k
10k
10k
10k
10k
10k
10k
10k
10k

SMUTE R414 51
5 1B2 1A DZF/SMUTE
CAD1 2B1
C
DCHAIN 6 7 R421 51 C
11 2B2 2A CAD1/DCHAIN
CDTI/SDA 3B1
10 9
R415
R416
R417
R418
R419
R420
R422
R423
R424

TDM0 R425 51
14 3B2 3A CDTI/SDA/TDM0
CCLK/SCL 4B1
TDM1 13 12 R426 51
4B2 4A CCLK/SCL/TDM1
15
8 OE 16
GND VCC TVDD

TC7MBL3257
C403
0.01u(F)

D3.3V
D3.3V
K

R427

K
D401 10k R428
U404 D402 10k
A

1 6 U405

A
1A 1Y 1 6
1A 1Y SMUTE
2 5 TVDD
GND VCC 2 5

3
ON : MUTE GND VCC TVDD
L H C404
C405
3

0.01u(F) 3 4 OFF : UNMUTE

2A 2Y PDN 0.01u(F)
3 4
SW402 SN74LVC2G14 SW403 2A 2Y

2
B B
PDN R429 C406 MUTE SN74LVC2G14
2

1k 0.01u(F) C407
0.01u(F)
1

LE401
PDN
2

D3.3V
K

R430
D403 10k
U406 U407 LE402
A

1 6 INT0 1 6 2 1 R431 1k D3.3V

1A 1Y 1A 1Y
INT0
2 5 D3.3V
2 5
GND VCC GND VCC
L H C408 LE403
3

0.01u(F) 3 4 DZF
3 4 2 1 R432 1k
2A 2Y 4118-PDN 2A 2Y
SW404 SN74LVC2G14 SN74LVC2G14 DZF
AK4118-PDN R433 C409 C410
2

1k 0.01u(F) 0.01u(F)

A A
1

LE404
4118-PDN
2

Title

- 33- Size
A3
<AKD4452-SA>
Document Number
LOGIC
Rev
1

Date: Friday, May 12, 2017 Sheet 4 of 6

5 4 3 2 1
 5 4 3 2 1

D D

R501
100k TVDD

C501 0.01u(F)
R502 4.7k

10k

10k

10k

10k
U501 PCA9306DP1
R506 R507
8 1 10k 10k
EN GND C502
0.01u(F)
7 2

R503

R504

R505

R519
VREF2 VREF1

SCL 6 3 R508 51 SCL CCLK/SCL

SCL2 SCL1

SDA 5 4 R509 51 SDA

SDA2 SDA1 CDTI/SDA
C503 C504
10u(A) 10u(A)

+
C
C505 C506 C
0.1u 0.1u

JP501
29

28

7
1
VSS1

VDD1

VSS0

VDD0
2
3 R510
4 18 100k
5 17 MCLR_N/Vpp/RE3
16 RB7/KBI3/PGD C507 R511 C508 0.01u(F) TVDD
1:VDD 15 RB6/KBI2/PGC 0.1u 100k
RB5/KBI1/PGM
2:MCLR 14
RB4/AN11/KBI0/CSSPP NC/ICCK/ICPGC
12
3:PGD 11 13
10 RB3/AN9/CPP2/VPO NC/ICDT/ICPGD 33 U503 PCA9306DP1
4:PGC 9 RB2/AN8/INT2/VMO NC/ICRST_N/ICVpp 34 R512 R520
5:GND 8 RB1/AN10/INT1/SCK/SCL NC/ICPORTS 8 1 10k 10k
RB0/AN12/INT0/FLT0/SDI/SDA C509 22p EN GND C510
0.01u(F)
30 XTI 7 2
38 OSC1/CLKI 31 X501 VREF2 VREF1
RD0/SPP0 PIC18F4550 OSC2/CLKO/RA6 XTO 20MHz
39
40 RD1/SPP1 TQFP 44-PIN C511 22p
6 3 R513 51
41 RD2/SPP2 25 SCL2 SCL1 CSN
2 RD3/SPP3 RE0/AN5/CK1SPP 26
3
4
RD4/SPP4
RD5/SPP5/P1B
U502 RE1/AN6/CK2SPP
RE2/AN7/OESPP
27 5
SDA2 SDA1
4
B 5 RD6/SPP6/P1C B
RD7/SPP7/P1D 37 C512 0.47u
VUSB
32
35 RC0/T1OSO/T13CKI
36 RC1/T1OSI/CCP2/UOE_N 19 R514 51
RC2/CCP1/P1A RA0/AN0 CSN
PORT501 20 R515 51 CCLK/SCL
RA1/AN1 21 R516 51
RA2/AN2/Vref-/CVref CDTI/SDA
1 22
VUSB 2 R517 0 42 RA3/AN3/Vref+ 23
D- 3 R518 0 43 RC4/D-/VM RA4/T0CKI/C1OUT/RCV 24
D+ 4 44 RC5/D+/VP RA5/AN4/SS_N/HLVDIN/C2OUT
GND 1 RC6/TX/CK
RC7/RX/DT/SDO
USB(B type)

PIC18F4550

A A

Title
<AKD4452-SA>
- 34- Size
A3
Document Number
PC-IF
Rev
1

Date: Friday, May 12, 2017 Sheet 5 of 6

5 4 3 2 1
 5 4 3 2 1

D D

J601
J602 J603
+12V
-12V GND

1
R601 short
-12V
R602 short
+12V AVSS
C601 + DVSS
+ C602
470u(A) DVSS2
470u(A)

AGND ANGD AGND

+12V-->+5V
T601 R604 short
AVDD
NJM78M05FA
C C
R612 3k(DIP) R605 short

GND
IN OUT VREFH1
+ +
C603 C604 C605 C606
47u(A) 0.01u(F) 0.01u(F) 47u(A)

1
+
C618 C615 U601

V-

+INA

-INA

OUTA
100u(A) 0.01u(F) AGND

OUTB
AGND

+INB

-INB

V+
AGND

8
R606 open
VREFH2

+12V

+
C616 C617
0.01u(F) 10u(A)

VREFL1

VREFL2

B B
AGND

+12V-->+3.3V
T603
uPC29M33HF

R608 short
GND

IN OUT TVDD

+ +
C611 C612 C613 C614 R609 short
D3.3V
47u(A) 0.01u(F) 0.01u(F) 47u(A)

DVSS

A A

Title

- 35- Size
A3
<AKD4452-SA>
Document Number
POWER
Rev
1

Date: Friday, May 12, 2017 Sheet 6 of 6

5 4 3 2 1