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DLD Lab Final: Submitted By: Adnan Haider REG NO: SP20-BSE-037 Section: Bse 2B DATE: 3-01-2020

DLD LAB FINAL SUBMITTED BY ADNAN HAIDER REG NO: SP20-BSE-037 SECTION: BSE 2B DATE: 3-01-2020 The document contains Adnan Haider's digital logic design lab final. It includes 3 questions - implementing a boolean function with NOR gates, implementing a full adder with a decoder and NAND gates, and implementing a boolean function with a multiplexer using the first 3 outputs as a roll number. Screenshots and diagrams were included for questions 2 and 3.

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Adnan Aadi
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0% found this document useful (0 votes)
19 views

DLD Lab Final: Submitted By: Adnan Haider REG NO: SP20-BSE-037 Section: Bse 2B DATE: 3-01-2020

DLD LAB FINAL SUBMITTED BY ADNAN HAIDER REG NO: SP20-BSE-037 SECTION: BSE 2B DATE: 3-01-2020 The document contains Adnan Haider's digital logic design lab final. It includes 3 questions - implementing a boolean function with NOR gates, implementing a full adder with a decoder and NAND gates, and implementing a boolean function with a multiplexer using the first 3 outputs as a roll number. Screenshots and diagrams were included for questions 2 and 3.

Uploaded by

Adnan Aadi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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DLD LAB FINAL

SUBMITTED BY: ADNAN HAIDER


REG NO: SP20-BSE-037
SECTION: BSE 2B
DATE: 3-01-2020
Q1: Implement a boolean function in EWB with NOR GATE using logic
converter ?
F = (B'C + C' ) + BC'
Ans:

Q2 : Implement a Full Adder using Decoder and Nand gate ?


NOTE ** circuit screenshots are attached with truthtable and boolean
expression.
Ans:
Q3: Implemebt a boolean function given below where first 3 function output
are your Roll no rest is given , using appropiate multiplexer Ic on EWB and draw
a truth table and logic diagram ?
F = (A ,B ,C, D) = £ ( --, --, -- , 10 , 11,14 ).

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