CIGRE Bench Mark Model
CIGRE Bench Mark Model
CIGRE Bench Mark Model
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Hamidreza Zareipour
The University of Calgary
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Abstract—This paper proposes a 60 Hz equivalent to the during disturbances, where both AC systems are operating
CIGRE benchmark model (CBM) for HVDC control stud- at 60 Hz instead of 50 Hz. The required modeling changes
ies. Component configuration and system impedances of the are discussed in detail in this paper. The PSCAD/EMTDC
PSCAD/EMTDC implementation of the CBM are modified to
arrive at the 60 Hz equivalent model. These parameter changes implementation of the CBM is used for all simulations.
are discussed and validation is given. Simulations are conducted Section II discusses the parameter changes required of the
in steady state and compared to that of the CBM. The response CBM to modify it for application at 60 Hz. The impedance
of the proposed equivalent to a current order step-response and changes made to the CBM are validated in Section III with the
AC faults are compared to that of the CBM. The performance aid of harmonic impedance analysis. Section IV compares both
comparisons match closely and this paper concludes that the
proposed 60 Hz equivalent is adequate for use when running models via steady state simulations. Section V further validates
simulations that require an HVDC benchmark model be con- the modified CBM by comparing the response of both models
nected to a representation of a 60 Hz AC network. to disturbances including current order step response, balanced
AC faults, and unbalanced AC faults. Section VI discusses
I. I NTRODUCTION the adequacy of the proposed 60 Hz equivalent as a means of
The CIGRE benchmark model (CBM) for line commutated representing the performance the original CBM.
converter (LCC) HVDC systems is well documented [1], [2]
II. CBM PARAMETER M ODIFICATIONS
and widely used in power system literature. The CBM is used
for a variety of studies including the following: 1) comparing The proposed parameter changes in the original CBM con-
simulation algorithms across different software platforms [3], sist of two types: 1) PSCAD component configuration values
[4], 2) studying interactions between AC and DC systems referring to fundamental frequency and 2) impedances in AC
including commutation failure [5]–[11], 3) investigating new and DC systems. The component configuration modifications
HVDC control strategies [12]–[16], and 4) investigating new are achieved by simply changing the fundamental frequency
HVDC converter topologies [17]. from 50 Hz to 60 Hz in the following components of the
The CBM represents an HVDC cable system which con- PSCAD implementation of the CBM:
nects two asynchronous, 50 Hz, AC systems. Therefore the • Three-phase voltage source models (2)
components of the AC and DC systems are designed for 50 • Three-phase, two-winding transformer models (4)
Hz operation. Using the CBM in the analysis of 60 Hz AC • Six-pulse thyristor bridge models (4)
systems, such as the large interconnections in North America, • Inverter minimum gamma over one cycle (1)
frequency. The impedance changes are more involved and are summa-
The motivation for a 60 Hz compatible version of the rized below:
CBM is simple, i.e., to have a convenient tool which can • AC source impedances; refer to Section II-A for details.
be connected to 60 Hz AC systems or components under • AC filter and shunt capacitor impedances; refer to Section
study which are modeled in electromagnetic transient (EMT) II-B for details.
software and then being able to simulate the integrated system. • Smoothing reactor and HVDC cable impedances; refer to
Having a 60 Hz equivalent CBM would avoid AC network II-C for details
conversion from 60 Hz to 50 Hz for the sole reason of being The converter transformer impedances are entered in per-
able to use an HVDC benchmark model, as experienced by unit and therefore do not require modification. The nominal
the authors of [6]. voltages of the AC sources and converter transformers are not
Reference [18] appears to use a 60 Hz CBM for the study of modified. Non-linear saturation of the converter transformers
harmonic impedance at inter-harmonics but does not provide is enabled for all simulations. No scaling of the saturation
details of the model changes. parameters is performed because the data is entered in per-unit
This paper proposes modeling changes to the CBM to arrive based on air core reactance, knee voltage, and magnetizing
at a 60 Hz equivalent. The goal with the proposed equivalent current. The following subsections discuss the AC and DC
is to have similar HVDC link performance in steady state and system impedance modifications in detail.
A. AC Source Impedances 500
450
original CBM (50 Hz)
The values of short-circuit ratio (SCR) and damping angles modified CBM (60 Hz)
specified in [1] should be maintained in the modified CBM so 400
|Z+| [Ω]
250
SCM V A V2 2
Vrated 200
SCR = = rated = p (1) 150
Pd Pd |Zth | 2
Pd Rth + (ω1 Lth )2
100
fundamental frequency required for the modified CBM: original CBM (50 Hz)
80
modified CBM (60 Hz)
70
|Z+| [Ω]
50
0
The reader should note that some of the variables in Table 0 5 10 15 20 25
I are not truly constant during steady state. For example, the number of cycles after current order increase request
1 1
0 0
−1 −1
0 5 10 15 20 25 0 5 10 15 20 25
40 50
20
0 0
0 5 10 15 20 25 0 5 10 15 20 25
number of cycles after current order increase request number of cycles after fault application
Fig. 4. Inverter channels during current order step-response Fig. 6. Inverter channels during a 3-phase, 4-cycle, AC rectifier fault
(a) direct current measured at rectifier (a) direct current measured at rectifier
2 2
CMR_50Hz [pu]
1.5 CMR_60Hz [pu]
1
1
0
CMR_50Hz [pu] 0.5
CMR_60Hz [pu]
−1 0
0 5 10 15 20 25 0 5 10 15 20 25
50
0 0
0 5 10 15 20 25 0 5 10 15 20 25
number of cycles after fault application number of cycles after fault application
Fig. 5. Rectifier channels during a 3-phase, 4-cycle, AC rectifier fault Fig. 7. Rectifier channels during a 3-phase, 4-cycle, AC inverter fault
angle, µinv , which results in γinv continuously reducing until shown by γinv reaching zero in Fig. 6b. After this occurs, the
CF occurs as shown in Fig. 4b at approximately 1 cycle. response of both models is the same but the channels from
The reader should recall that the sum of angles for a given the original CBM are advanced from those of the modified
converter must be 180◦ at any time [5], i.e., α+µ+γ = 180◦ . CBM. The reason why CF occurs faster in the original CBM
The important point to note from the comparisons in Fig. is attributed to the controller parameters not being changed in
3 and Fig. 4 is that the output channels are similar and they the modified CBM, i.e., time-constants and gains used in the
reach the same values for the new steady state. inverter CEA and CC controllers. Despite this transient shift
B. Rectifier Balanced AC Fault in the output channels for a few cycles, both models reach the
same Id values with the same duration, i.e., approximately 20
A 3-phase, 4-cycle, rectifier AC fault is applied to both
cycles after fault application, as shown by Fig. 5a and Fig. 6a.
models with Id = 1.0pu. The rectifier and inverter channels
for both models are shown in Fig. 5 and Fig. 6, respectively.
After fault clearing, HVDC recovery begins and CF occurs
C. Inverter Balanced AC Fault
at approximately 12.5 cycles after fault application: γinv is
observed to drop to zero when the inverter control switches A 3-phase, 4-cycle, inverter AC fault is applied to both
from CC to CEA mode. This CF resolves itself and the HVDC models with Id = 1.0pu. The rectifier and inverter channels
begins recovery to the pre-fault current order of 1.0 pu. for both models are shown in Fig. 7 and Fig. 8, respectively.
The comparison of the channels from both models match The inverter balanced AC fault causes the AC and DC
until approximately 12.5 cycles after fault application. CF voltage to drop to zero and the inverter experiences CF.
occurs faster in the original CBM than the modified CBM, as After the AC fault is cleared, both models start recovery and
(a) direct current measured at inverter (a) direct current measured at inverter
3 1.5
CMI_50Hz [pu]
2 CMI_60Hz [pu]
1
1
0.5
0 CMI_50Hz [pu]
CMI_60Hz [pu]
−1 0
0 5 10 15 20 25 0 5 10 15 20 25
20 20
GAMA_INV_50Hz [°]
GAMA_INV_60Hz [°]
0 0
0 5 10 15 20 25 0 5 10 15 20 25
number of cycles after fault application number of cycles after fault application
Fig. 8. Inverter channels during a 3-phase, 4-cycle, AC inverter fault Fig. 10. Inverter channels during a 1-phase, 4-cycle, AC rectifier fault