M74HC4051

Single 8-channel
analog multiplexer/demultiplexer

Features
■ Low power dissipation:
– ICC = 4 μA(max) at TA= 25 °C
■ Logic level translation to enable 5 V logic signal
to communicate with ± 5 V analog signal
PDIP-16 SOP-16
■ Low ON resistance:
70 Ω typ (VCC - VEE = 4.5 V)
50 Ω typ (VCC - VEE = 9 V)
■ Wide analog input voltage range : ± 6 V
■ Fast switching:
tpd = 15 ns (typ) at TA = 25 °C
TSSOP-16
■ Low crosstalk between switches
■ High ON/OFF output voltage ratio
■ Wide operating supply voltage range Description
(VCC - VEE) = 2 to 12 V
The M74HC4051 is a single 8-channel analog
■ Low sine wave distortion:
multiplexer/demultiplexer fabricated with silicon
0.02% at VCC - VEE = 9 V
gate C2MOS technology, pin-to-pin compatible
■ High noise immunity: with the equivalent metal gate CMOS4000B
VNIH = VNIL = 28 % VCC (min) series. It contains 8 bidirectional and digitally
■ Pin and function compatible with controlled analog switches.
74 series 4051 A built-in level shifting is included to allow an input
range up to ± 6 V (peak) for an analog signal with
digital control signal of 0 to 6 V.
The VEE supply pin is provided for analog input
signals. It has an inhibit (INH) input terminal to
disable all the switches when is at high level. For
operation as a digital multiplexer/demultiplexer,
VEE is connected to GND.
A, B and C control inputs select one channel out
of eight. All inputs are equipped with protection
circuits against static discharge and transient
excess voltage.
Table 1. Device summary
Order code Package Packaging

M74HC4051RM13TR SOP-16 Tape and reel

M74HC4051TTR TSSOP-16 Tape and reel

April 2008 Rev 4 1/17

www.st.com 17
Pin connection and IEC logic symbols M74HC4051

1 Pin connection and IEC logic symbols

Figure 1. Pin connection

Figure 2. IEC logic symbols

1.1 Pin description

Table 2. Pin description
Pin number Symbol Name and function

COM
3 Common output/input
OUT/IN
6 INH Inhibit input
7 VEE Negative supply voltage
11, 10, 9 A, B, C Select inputs
13, 14, 15, 12, 1, 5, 2, 4 0 to 7 Independent input/outputs
8 GND Ground (0 V)
16 VCC Positive supply voltage

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M74HC4051 Pin connection and IEC logic symbols

Figure 3. Control input equivalent circuit

Figure 4. I/O equivalent circuit

Table 3. Truth table

Input state
ON channel
INH C B A

L L L L 0
L L L H 1
L L H L 2
L L H H 3
L H L L 4
L H L H 5
L H H L 6
L H H H 7
H X X X NONE

x: Don’t care

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Pin connection and IEC logic symbols M74HC4051

Figure 5. Functional diagram

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M74HC4051 Maximum ratings

2 Maximum ratings

Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

VCC Supply voltage -0.5 to +7 V

VCC - VEE Supply voltage -0.5 to +13 V
VI Control input voltage -0.5 to VCC + 0.5 V
VEE -0.5 to VCC +
VI/O Switch I/O voltage V
0.5
ICK Control input diode current ± 20 mA
IIOK I/O diode current ± 20 mA
IT Switch through current ± 25 mA
ICC or IGND DC VCC or ground current ± 50 mA
DIP-16 500(1) mW
PD Power dissipation SOP-16 and mW
180
TSSOP-16
Tstg Storage temperature -65 to +150 °C
TL Lead temperature (10 sec) 300 °C
1. 500 mW at 65 °C; derate to 300 mW by 10 mW/×C from 65 °C to 85 °C

Table 5. Recommended operating conditions

Symbol Parameter Value Unit

VCC Supply voltage 2 to 6 V

VEE Supply voltage -6 to 0 V
VCC - VEE Supply voltage 2 to 12 V
VI Input voltage 0 to VCC V
VI/O I/O voltage VEE to VCC V
Top Operating temperature -55 to 125 °C
VCC = 2.0 V 0 to 1000
tr, tf Input rise and fall time VCC = 4.5 V 0 to 500 ns
VCC = 6.0 V 0 to 400

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Maximum ratings M74HC4051

Table 6. DC electrical specifications

Test condition Value

Symbo -40 to -55 to

Parameter TA = 25 °C Unit
l VCC VEE 85 °C 125 °C
(V) (V)
Min Typ Max Min Max Min Max

2.0 1.5 1.5 1.5

High level input
VIHC 4.5 3.15 3.15 3.15 V
voltage
6.0 4.2 4.2 4.2
2.0 0.5 0.5 0.5
Low level input
VILC 4.5 1.35 1.35 1.35 V
voltage
6.0 1.8 1.8 1.8
4.5 GND 85 180 225 270
VI = VIHC or VILC
4.5 -4.5 VI/O = VCC to VEE 55 120 150 180
II/O ≤2mA
6.0 -6.0 50 100 125 150
RON ON resistance 2.0 GND 150 W
4.5 GND VI = VIHC or VILC 70 150 190 230
VI/O = VCC or VEE
4.5 -4.5 I ≤2 mA 50 100 125 150
I/O
6.0 -6.0 45 80 100 120
Difference of ON 4.5 GND 10 30 35 45
VI = VIHC or VILC
resistance
ΔRON 4.5 -4.5 VI/O = VCC or VEE 5 12 15 18 W
between
II/O ≤2 mA
switches 6.0 -6.0 5 10 12 15
Input/output 6.0 GND VOS = VCC or GND ±0.06 ± 0.6 ± 1.2
IOFF leakage current VIS = GND or VCC μA
(switch off) 6.0 -6.0 V = V ± 0.1 ±1 ±2
I ILC or VIHC

Switch input 6.0 GND ±0.06 ± 0.6 ± 1.2

leakage current VOS = VCC or GND
IIZ μA
(switch on, 6.0 -6.0 VI = VIHC or VILC ± 0.1 ±1 ±2
output open)
Input leakage
II 6.0 GND VI = VCC or GND ± 0.1 ± 0.1 ±1 μA
current

Quiescent supply 6.0 GND 4 40 80

ICC VI = VCC or GND μA
current 6.0 -6.0 8 80 160

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M74HC4051 Maximum ratings

Table 7. AC electrical characteristics (CL = 50 pF, Input tr = tf = 6ns)

Test condition Value

-55 to
Symbol Parameter TA = 25°C -40 to 85°C Unit
VCC VEE 125°C
(V) (V)
Min. Typ Max Min Max Min Max

2.0 GND 25 60 75 90
Phase difference 4.5 GND 6 12 15 18
ΦI/O between input ns
and output 6.0 GND 5 10 13 15
4.5 -4.5 4
2.0 GND 64 225 280 340

tPZL Output enable 4.5 GND 18 45 56 68

RL = 1 KΩ ns
tPZH time 6.0 GND 15 38 48 58
4.5 -4.5 18
2.0 GND 100 250 315 375

tPLZ Output disable 4.5 GND 33 50 63 70

RL = 1 KΩ ns
tPHZ time 6.0 GND 28 43 54 64
4.5 -4.5 29

Table 8. Capacitive characteristics

Test condition Value

-40 to -55 to
Symbol Parameter TA = 25 °C Unit
VCC VEE 85 °C 125 °C
(V) (V)
Min Typ Max Min Max Min Max

CIN Input capacitance 5.0 5 10 10 10 pF

Common terminal
CI/O 5.0 -5.0 36 70 70 70 pF
capacitance
Switch terminal
CI/O 5.0 -5.0 7 15 15 15 pF
capacitance
Feed through
CIOS 5.0 -5.0 0.95 2 2 2 pF
capacitance
Power dissipation
CPD capacitance 5.0 GND 70 pF
(1)

1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current
consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation.
ICC(opr) = CPD x VCC x fIN + ICC .

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Maximum ratings M74HC4051

Table 9. Analog switch characteristics (GND = 0 V; TA = 25°C)

Test condition Value Unit
Symbo
Parameter
l VCC VEE VIN
Typ
(V) (V) (Vp-p)

2.25 -2.25 4 0.025

Sine wave
4.5 -4.5 8 fIN = 1 KHz RL = 10 KΩ CL = 50 pF 0.020 %
distortion
6.0 -6.0 11 0.018
2.25 -2.25 120
Frequency Adjust fIN voltage to obtain 0 dBm at VOS.
fMAX response 4.5 -4.5 Increase fIN Frequency until dB meter reads -3dB 190 MHz
(Switch on)(1) RL = 50 Ω, CL = 10 pF, fIN = 1 KHz sine wave
6.0 -6.0 200
2.25 -2.25 45
Frequency Adjust fIN voltage to obtain 0 dBm at VOS.
fMAX response 4.5 -4.5 Increase fIN Frequency until dB meter reads -3dB 70 MHz
(switch on)(2) RL = 50Ω, CL = 10 pF, fIN = 1KHz sine wave
6.0 -6.0 85
2.25 -2.25 -50
Feed through VIN is centered at (VCC - VEE)/2
attenuation 4.5 -4.5 Adjust input for 0 dBm -50 dB
(switch off) RL = 600 Ω, CL = 50 pF, fIN = 1 KHz sine wave
6.0 -6.0 -50
2.25 -2.25 60
Crosstalk
Adjust RL at set up so that IS = 0A.
(control input to 4.5 -4.5 140 mV
RL = 600 Ω, CL = 50 pF, fIN = 1 KHz square wave
signal output)
6.0 -6.0 200
2.25 -2.25 -50
Crosstalk
Adjust VIN to obtain 0d Bm at input
(between any 4.5 -4.5 -50 dB
RL = 600 Ω, CL = 50 pF, fIN = 1 KHz sine wave
two switches)
6.0 -6.0 -50
1. Input common terminal, and measured at switch terminal.
2. Input switch terminal, and measured at common terminal.
These characteristics are determined by the design of the device.

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M74HC4051 Maximum ratings

2.1 Switching characteristics test circuit

Figure 6. Output enable/disable time Figure 7. Crosstalk (control to output)

Figure 8. Bandwidth and feedthrough Figure 9. Crosstalk between any two

attenuation switches

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Maximum ratings M74HC4051

Figure 10. Common terminal capacitance (CI-O, CI/O)

Figure 11. Switching caracteristics waveform

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M74HC4051 Maximum ratings

Figure 12. Channel resistance (RON) Figure 13. Quiescent supply current - ICC (opr)

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Package mechanical data M74HC4051

3 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK®

packages. These packages have a Lead-free second level interconnect . The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.

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M74HC4051 Package mechanical data

Figure 14. Plastic DIP-16 (0.25) package information

Plastic DIP-16 (0.25) MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 0.77 1.65 0.030 0.065

b 0.5 0.020

b1 0.25 0.010

D 20 0.787

E 8.5 0.335

e 2.54 0.100

e3 17.78 0.700

F 7.1 0.280

I 5.1 0.201

L 3.3 0.130

Z 1.27 0.050

P001C

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Package mechanical data M74HC4051

Figure 15. SO-16 package information

SO-16 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.25 0.004 0.010
a2 1.64 0.063
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45° (typ.)
D 9.8 10 0.385 0.393
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 8.89 0.350
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.62 0.024
S 8° (max.)

0016020D

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M74HC4051 Package mechanical data

Figure 16. TSSOP16 package information

TSSOP16 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

A 1.2 0.047

A1 0.05 0.15 0.002 0.004 0.006

A2 0.8 1 1.05 0.031 0.039 0.041

b 0.19 0.30 0.007 0.012

c 0.09 0.20 0.004 0.0079

D 4.9 5 5.1 0.193 0.197 0.201

E 6.2 6.4 6.6 0.244 0.252 0.260

E1 4.3 4.4 4.48 0.169 0.173 0.176

e 0.65 BSC 0.0256 BSC

K 0° 8° 0° 8°

L 0.45 0.60 0.75 0.018 0.024 0.030

A A2
K L
A1 b e
c E

E1

PIN 1 IDENTIFICATION
1
0080338D

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Revision history M74HC4051

4 Revision history

Table 10. Document revision history

Date Revision Changes

01-Jul-2001 1 Initial release.

21-June-2004 2 Document internal migration, no content change.
Document restructured and converted to new ST template, updated
10-Mar-2008 3
Table 4 on page 5 , removed tube packing info.
Replaced M74HC4051M13TR with M74HC4051RM13TR in Table 1
21-Apr-2008 4
on page 1.

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M74HC4051

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