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2D Materials
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2D Mater. 8 (2021) 012002 https://doi.org/10.1088/2053-1583/abc187
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Electrical characterization of 2D materials-based field-effect
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transistors
15 October 2020
Sekhar Babu Mitta1,4, Min Sup Choi1,2,4, Ankur Nipane3,4, Fida Ali1, Changsik Kim1, James T Teherani3,
PUBLISHED
19 November 2020 James Hone2 and Won Jong Yoo1
1
SKKU Advanced Institute of Nano-Technology (SAINT), Sungkyunkwan University, 2066, Seobu-ro, Jangan-gu,
Suwon, Gyeonggi-do 16419, Korea
2
Original content from this Department of Mechanical Engineering, Columbia University, New York, NY 10027, United States of America
3
work may be used under Department of Electrical Engineering, Columbia University, New York, NY 10027, United States of America
the terms of the Creative 4
These authors contributed equally to this work
Commons Attribution 4.0
licence. E-mail: yoowj@skku.edu and jh2228@columbia.edu
Any further distribution of
this work must maintain Keywords: two-dimensional materials, electrical characterization, field effect transistor, carrier density, mobility, contact resistivity,
attribution to the trapped charges
author(s) and the title of
the work, journal citation
and DOI.
Abstract
Two-dimensional (2D) materials hold great promise for future nanoelectronics as conventional
semiconductor technologies face serious limitations in performance and power dissipation for
future technology nodes. The atomic thinness of 2D materials enables highly scaled field-effect
transistors (FETs) with reduced short-channel effects while maintaining high carrier mobility,
essential for high-performance, low-voltage device operations. The richness of their electronic
band structure opens up the possibility of using these materials in novel electronic and
optoelectronic devices. These applications are strongly dependent on the electrical properties of 2D
materials-based FETs. Thus, accurate characterization of important properties such as
conductivity, carrier density, mobility, contact resistance, interface trap density, etc is vital for
progress in the field. However, electrical characterization methods for 2D devices, particularly
FET-related measurement techniques, must be revisited since conventional characterization
methods for bulk semiconductor materials often fail in the limit of ultrathin 2D materials. In this
paper, we review the common electrical characterization techniques for 2D FETs and the related
issues arising from adapting the techniques for use on 2D materials.
1. Introduction inspired experimental research in the fields of con-

densed matter physics, semiconductor nanoelectron-
Two-dimensional (2D) van der Waals materials or ics, photonics, and energy storage [6–8].
layered materials are characterized by materials with In addition to graphene, other 2D materials have
an anisotropic electronic and chemical structure of been investigated with great intensity for future elec-
strong covalent bonds along the in-plane direction tronic and optoelectronic applications [9–14], as
and weak van der Waals bonds along the out-of- these materials offer a range of bandgaps with high
plane direction. Among such materials, graphene carrier mobility and efficient electrostatic control.
has been studied most extensively, due to its high These properties, combined with mechanical flex-
mobility, widely tunable carrier concentration, and ibility [15–18] and tunability of electronic prop-
the occurrence of phenomena such as the quantum erties, make 2D materials especially promising as
Hall effect in atomically thin samples prepared by a a channel material in high-performance 2D field-
simple Scotch tape exfoliation method [1–3]. Sub- effect transistors (FETs), which could be oper-
sequently, the development of large-scale chem- ated in emerging future mobile and IoT environ-
ical vapor deposition (CVD) graphene synthesis ment [19–23]. In light of this, accurate character-
has enabled the fabrication of wafer-scale electronic ization of 2D FETs and extraction of important
and photonic devices [4, 5]. Meanwhile, theoret- device parameters, such as resistivity, carrier density,
ical studies on carrier transport in graphene have mobility, contact resistance, charge trap densities,
© 2020 The Publishing

2020 IOP Author(s).Ltd
Published by IOP Publishing Ltd
2D Mater. 8 (2021) 012002 S B Mitta et al
dielectric permittivity, and anisotropy in carrier 2. 2D devices

transport, are essential to explore 2D materials and
to correlate them with the performance of 2D FETs 2.1. 2D FETs
[24–27]. The basic structure of a FET comprises of a metal-
A mainstay of 2D materials-based semicon- lic gate, a semiconductor channel between the source
ductor device research focuses on developing FETs and drain electrodes, and an insulating gate oxide
with high ON/OFF ratios, high conductivity, high (the barrier between the channel and gate). The cur-
carrier mobility, and low power consumption rent flow in the semiconductor channel (drain cur-
[24, 25, 28–30]. It is critically important to under- rent, ID ) is established by the source–drain voltage
stand the electrical properties of such devices, since (VDS ) and is modulated by the applied gate voltage
the use of conventional electrical characterization (VGS ) by changing the conductivity of the channel
methods can produce unreliable results when applied region. Figure 2(a) shows schematic and circuit dia-
to ultra-thin 2D layered materials. For example, grams of a typical back-gated 2D FET with metal-
room-temperature electrical conductivity in a bulk lic source and drain contacts and hexagonal boron
semiconductor is directly related to charge carrier nitride (hBN) encapsulation [36]. Unlike conven-
density. However, conventional implanted substitutional bulk semiconductor FETs, the presence of
tional doping cannot be performed on 2D materials metallic electrodes at the source–drain junctions res-
due to their atomic thinness. Instead, different meth- ults in Schottky contacts due to a lack of efficient
ods, such as charge transfer doping, are predomin- doping techniques. Moreover, back-gated 2D FETs
antly used to generate electron and hole carriers in currently in the research stage consist of thick gate-
2D materials [31–33], and in few-layer materials, the oxides (e.g. ~300 nm) that require large gate voltages
charge density falls off rapidly away from the sur- (e.g. >10 V) to switch the device from the OFF to
face, rather than being uniform as in conventional ON states. Besides, back gating affects both the chan-
semiconductor materials. nel and contact regions in a convoluted manner that
Furthermore, the pristine surface of 2D materi- complicates the gating characteristics of 2D FETs. In
als forms weak van der Waals bonds with adjacent this section, we discuss the output and transfer char-
materials and presents challenges to the creation of acteristics of back-gated 2D FETs and provide insights
low-resistance contacts, by introducing a tunnel bar- into the extraction of fundamental device parameters.
rier for charge carrier transport, whereas the form-
ation of stronger bonds requires disruption of the 2.2. Current–voltage characterization
2D crystal structure, which introduces defect states. I–V measurement is the fundamental electrical char-
Therefore, it is important to accurately characterize acterization technique for understanding the work-
the properties of metal contacts, e.g., contact resist- ing principle of FETs. Also, I–V measurements allow
ance and metal-semiconductor Schottky barrier [34]. for qualitative and quantitative understanding of
Interfaces between 2D semiconductors and metals are intrinsic semiconductor properties such as mobility
subject to Fermi level pinning due to the tunnel bar- and carrier density, along with external properties
rier at the interface, defect-induced interface states, such as interface states and contact resistance. Here,
and orbital overlap between adjacent heterogeneous we discuss typical I–V measurement of a 2D FET; the
materials, requiring precise characterization of the performance of the FET is characterized primarily by
Schottky barrier and Fermi level pinning, which could measuring the output (ID as a function of VDS ) and
severely increase the contact resistance at the inter- transfer (ID as a function of VGS ) characteristics.
faces [35].
In this review, conductivity, carrier density, 2.2.1. Output characteristics
mobility, Schottky barrier height (SBH), contact res- To measure the output characteristics of a FET, the
istance (RC ) and trapped charges are discussed as drain current is measured as a function of VDS at
key parameters for the electrical characterization of different VGS . The output characteristics with a small
2D devices, constituting the main sections below. VDS (figure 2(b)) allow the extraction of important
Figure 1 illustrates the representative parameters that FET parameters as the device acts as a linear resistor in
can be extracted by various electrical characteriza- this region. Assuming channel-dominated behavior,
tion methods, including current–voltage (I–V), Hall the ID for an n-type 2D FET in the linear regime can
effect, capacitance–voltage (C–V), and 4-point probe be expressed as
(4PP) measurements, as well as the transmission line
method (TLM). Moreover, we also address the cor- µn WCox
relation between these macroscopic device paramet- ID = [(VGS − VTH ) VDS ] , (1)
L
ers and the nanoscale properties of 2D materials,
visualized using scanning probe microscopy (SPM) where L, W, µn , Cox , and VTH are the channel
techniques. length, channel width, channel electron mobility,
2
Figure 1. Key parameters of 2D FETs and relevant electrical characterization methods.
oxide capacitance, and the threshold voltage, respect- presence of a global back gate (VBG ) in 2D FETs results
ively. We discuss the use of equation (1) to extract the in simultaneous gating of the contact region, mak-
channel mobility and carrier density in the following ing RC , a function of VGS and VDS . Thus, the linearity
sections. of the output characteristics can be used as a simple
In the presence of RC , only a portion of VDS drops yet important check to determine the effect of con-
across the channel; thus, equation (1) needs to be fur- tact resistance on FET performance. Note that, due to
ther modified to address this issue. The effect of RC the simultaneous gating of the contact and channel
can be included straightforwardly by replacing VDS regions, contacts can show different behavior (Ohmic
with or Schottky) at different gate voltages. However, the
linear behavior does not provide any information
µn WCox
ID = [(VGS − VTH ) (VDS − ID · 2RC )] (2) regarding the mechanism behind the Ohmic nature
L
of contacts as doped (gated) Schottky contacts can
Here, 2RC refers to the contact resistance for the resemble Ohmic characteristics due to enhancement
source and drain junction at small VDS . However, the of the tunneling component at the source junction
3
[37]. Thus, proper extraction of µn , VTH , and RC is efficiency of tuning the energy barrier at the source
essential to understanding current flow in 2D FETs. terminal. A small SS over a wide range of current is
The extraction of these parameters is discussed in the required to achieve, since it indicates a large ION /IOFF
following sections. ratio for small supply voltages.
For use of 2D FET in analog, digital, and high In the subthreshold regime or OFF state
power applications, observations of current satura- (VGS < VTH ), the subthreshold current is limited by
tion over a large VDS window is crucial [39, 40]. The thermal injection of carriers at the source junction
current saturation region is characterized by a con- and can be expressed as:
stant ID independent of VDS , as shown in figure 2(c); q(VGS −VTH )
ID initially increases linearly with VDS (linear regime) ID ∼ e kB T
(3)
and then saturates at higher VDS . Although several
reports have demonstrated current saturation in vari- where q is the elementary charge, kB is Boltzmann’s
ous transition metal dichalcogenide (TMDC) (e.g. constant, and T is temperature. The SS can be
MoS2 , WSe2 , WS2 ) FETs [28, 41–44], obtaining sat- obtained from (3), as follows:
uration in 2D devices at desirable values of VDS
dVGS kB T CCH
still remains elusive due to large contact resistance, SS = = ln (10) 1+ (4)
d (logID ) q Cox
low channel mobility, and high-field scattering. The
application of high electric field without those effects where kBqT is the thermal voltage, CCH is the channel
was realized by employing ionic gated transistors capacitance and Cox is the oxide capacitance. For an
[45, 46], although it is difficult to use the ionic tran- ideal 2D FET, CCH ≪ Cox in the subthreshold region
sistors for practical purposes. Lack of bandgap, weak and thus SS is ~60 mV/decade at room temperat-
electrostatic control, and interfacial phonon scatter- ure. However, most 2D FETs are fabricated on thick
ing in graphene are responsible for the poor cur- SiO2 substratewith large interface trap density, yield-
rent saturation seen in graphene FETs (shown in fig- ing large SS values (> a few hundred mV/decade).
ure 2(d)), which limits their usability in radio fre- Although unrealistic in practical applications, large
quency applications [38, 47, 48]. Cox can be realized by using ionic gated transistors
that results in SS values very close to 60 mV dec−1
2.2.2. Transfer characteristics despite using 2D Schottky devices [46, 50] and also
The other way to assess the electrical performance of a mobility values close to the limitation by phonon
FET is by utilizing the transfer characteristics that can scattering [51], making the ionic transistors efficient
be obtained by measuring ID as a function of VGS at to quantitatively characterize the electronic proper-
constant VDS , as illustrated in figure 2(e). These char- ties of 2D materials. The interfacial traps between
acteristics are used to extract the parameters, such 2D channels and SiO2 also induce unwanted hys-
dID
as transconductance (gm = dV GS
), threshold voltage teresis in the transfer characteristics [52, 53]. This
(VTH —the gate voltage at which the FET turns on), can be improved by stacking or encapsulating of the
and subthreshold swing (SS—the value indicating the 2D materials with an insulating 2D material such as
sharpness of switching behavior of the 2D FET), as hBN [54–58]. Moreover, a sub-thermionic transistor
shown in figure 2(f). For an n-channel FET (n-FET), mechanism such as quantum mechanical band-to-
the transfer characteristics display ON-state current band tunneling can exhibit a steep turn-on with low
(ION ) for VGS = VDD > VTH (VDD is the maximum SS values far below the thermionic limit [59, 60].
voltage supplied to the device) and OFF-state cur-
rent (IOFF ) for VGS < VTH , and vice versa for a p-FET. 3. Conductivity (resistivity)
Various methods are employed to extract the VTH
from the transfer characteristics, such as linear region 3.1. Conductivity in 2D materials and devices
extrapolation, transconductance linear extrapolation In an isotropic three-dimensional (3D) material, the
(VGS versus gm ), second-derivative of transconduct- electrical resistivity (ρ) and conductivity (σ) are
ance, and Ghibaudo’s method (intercept of VGS versus defined as ρ = σ1 = R × AL [Ω·cm], where R, A,
ID /g0m.5 ) [49]. The right y-axis in figure 2(f) displays and L are the total resistance, cross-sectional area
the gm curve as a function of VGS . (= W × t, where W is the width and t is the thickness
Scaling down the power supply voltage is critical of the material), and distance between the measur-
for energy-efficient electronics, and one of the most ing points, respectively. Conductivity measurements
effective ways to control the power density is to lower in bulk semiconductors can be made without fab-
the supply voltage. To reduce power consumption, ricating any electrical contacts using standard mul-
it is necessary to overcome the abruptness (thermi- tipoint resistance measurements; however, the very
onic limit of 60 mV/decade) that originates from the nature of 2D materials necessitates the formation of
thermal carrier injection mechanism, i.e., thermionic electrical contacts in 2D devices to determine res-
emission (TE). The abruptness of a FET is measured istivity or conductivity [61]. Several studies on thick
by SS, which is defined as the inverse of the slope of 2D materials-based devices have demonstrated super-
log(ID ) versus VGS curve. The SS determines the gate linear behavior (σ ∝ t−k ) of electrical conductivity as
4
Figure 2. (a) Schematic diagram of a typical back-gated bilayer WSe2 device with Pt transferred via contacts (TVCs). (b) 2-probe
output characteristics measured at different gate voltages. The linear trend indicates the presence of Ohmic contacts at higher gate
voltages [36]. (c) Illustration of the ideal output characteristics (with increasing VGS ) of an n-type FET displaying drain current
saturation. (d) ID as a function of VDS for top gate voltage (VTG ) = − 0.3 V, − 0.8 V, − 1.3 V, − 1.8 V, − 2.3 V, and − 2.8 V at
VBG = − 40 V for the graphene FET shown in the inset [38]. (e) Transfer characteristics of the WSe2 device showing good
subthreshold swing and low drain-induced barrier lowering [36]. (f) Transfer curve (left) and transconductance (gm ) (right)
characteristics of an ideal n-type FET with respect to VGS . For a better FET switch-on characteristic, the slope in the subthreshold
region (VGS < VTH ) should be sharp. The transistor is switched on when VGS is equal to the maximum voltage supplied to the
device, VDD .
a function of sample thickness [62, 63]. The super- applied by the same terminals. Over time, 2PP meas-
linear behavior in such structures is attributed to the urement has become a standard method of obtain-
non-uniform current distribution in thick 2D mater- ing the output and transfer characteristics of a 2D
ials that results from gate-dependent carrier density FET. Figure 3(a) displays the individual compon-
profile and interlayer resistance [37]. This is further ents of the total resistances (RTotal ) in a ReS2 -based
accentuated at the limit of 2D materials (~10 layers in 2D FET; the corresponding 2PP output character-
the study cited here) where conductivity is observed istics at different VGS are illustrated in figure 3(b)
to exhibit non-monotonic thickness dependence due [69]. Assuming RCH > RC along with linear ID vs. VDS
to the interplay between mobility and carrier dens- characteristics, RCH , RSH , and σ can be determined by
ity [64]. Besides, conductivity in 2D materials also using the following relationship:
shows a large degree of inter-sample variation due
to unintentional doping from substrate , ambient
L 1 L
surroundings, and sample preparation methods [65– RCH = RSH = (5)
W σ tCH W
68]. Therefore, the conductivity/resistivity of few-
layer 2D devices is determined in terms of chan- where tCH refers to the thickness of the 2D semicon-
nel resistance (RCH ) or sheet resistance (RSH ), which ducting channel. The presence of back gate results in
is a more straightforward way to evaluate current gate voltage-dependent RCH values indicating the gat-
flow in 2D materials. Typically, RCH and RSH can ing behavior of channel conductivity. Similar results
be determined by fabricating 2D FETs and measur- can also be obtained from the transfer characteristics,
ing the output/transfer characteristics at varying VGS which provide gate-dependent RCH at constant VDS .
using either a 2-point probe (2PP) or 4PP technique, However, in many cases, the contact resistance in
as discussed in the following sections. back-gated 2D FETs is either comparable to or higher
than the channel resistance, resulting in significant
errors in the RCH value extracted using 2PP measure-
3.2. 2-point probe measurements ments [72]. This issue can be resolved by using 4PP
Standard 2PP measurements refer to measurements method, which can deconvolute the effect of RC on
in which the current and voltage are assessed and the extracted RCH and RSH values [73, 74].
5
Figure 3. Differences between 2PP and 4PP measurements. (a) Schematic illustration of the RTotal in the 2D transistors, which
consists of the RSH , RC , and resistance of the metal (Rm ). (b), (c) Comparison between 2PP and 4PP measurements, respectively,
of ID as a function of the VDS for a few-layered ReS2 -FET device [69]. (d) Schematic of a monolayer MoS2 device with 4PP contact
configuration. (e) 2PP and 4PP conductance, which shows different VTH readings due to differences in channel and contact
gating. (f) Higher mobility in 4PP measurements illustrating the impact of contact resistance [70]. (g) Schematic of a multilayer
MoS2 device with van der Pauw contact configuration [71]. (h), (i) Different van der Pauw configurations for measuring the sheet
resistance of the same MoS2 device at different gate voltages.
3.3. 4-point probe measurements 3.3.1. 4PP measurements with hall bar geometry
As discussed above, 2D devices suffer from large con- Generally, 4PP measurements in 2D materials-based
tact resistances, which make it difficult to explore devices are done on devices in which the contacts
channel-dominated behavior and result in wrong and channel region are patterned in a Hall bar geo-
inferences. Here, 4PP measurements are used to metry, as shown in figure 3(d) [70]. In this struc-
measure RCH independent of RC . Figure 3(c) shows ture, the voltage probes (other than the source and
the output characteristics of a ReS2 device obtained drain contacts) minimally affect the current flow in
using 4PP measurements, which reveal a higher the channel material and thus act like perfect volt-
device current at the same VDS when compared to meters. The source and drain (S/D) probes are used
2PP measurements. The inset in figure 3(c) illus- to source/measure ID , and V1 and V2 between S/D are
trates the schematic and equivalent circuit of the 4PP used to sense the voltage difference (V12 = |V2 − V1 |);
structure used for the measurement. Accurate con- in turn, these measurements are used to evaluate
ductivity measurements using the 4PP method are the intrinsic transport properties of 2D materials by
typically enabled by the Hall bar and van der Pauw deconvoluting the effects of RC . Compared to the 2PP
geometry, as addressed below, which can be exten- measurements, the 4PP measurements result in smal-
ded further to determine carrier density and mobility ler RCH as only a portion of applied VDS drops across
from magneto-transport measurements. the channel region. Here, RCH can be extracted from
6
the 4PP I–V characteristics by using the following resistances:

relation: V34 V43
Set A (horizontal): R12,34 = , R21,43 = ,
V12 L I12 I21
RCH = (6)
ID L12 V12 V21
R34,12 = , R43,21 =
I34 I43
(7)
where L12 is the distance between voltage probes in V24 V42
Set B (vertical) : R13,24 = , R31,42 = ,
the middle of the device. Consequently, RC -corrected I13 I31
RSH and σ values can be calculated from equations (5) V13 V31
R24,13 = , R42,31 =
and (6). Finally, the 4PP characteristics can also be I24 I42
used to calculate RC by subtracting the extracted RCH
Then, an average resistance is calculated for sets A
value from RTotal . Thus, 4PP measurements provide
and B, which can be expressed as:
an easy and efficient means of extracting both RCH
and RC . (R12,34 + R21,43 + R34,12 + R43,21 )
RA = ,
The 2PP and 4PP measurements of the trans- 4 (8)
fer characteristics of a 1L-MoS2 device are shown (R13,24 + R31,42 + R24,13 + R42,31 )
RB = .
in figure 3(e). These measurements provide differ- 4
ent values of VTH (using the linear extrapolation Finally, sheet resistance and conductivity are calcu-
method), which implies different gating properties lated using the following relation:
of the channel and the contact regions due to dif-
1
ferences in the band movements in the channel and e−πRA /RSH + e−πRB /RSH = 1 and σ = (9)
contact regions [75]. Figure 3(f) shows higher 4PP- RSH · tCH
than 2PP-mobility due to the presence of substantial Similar expressions can be obtained for other chan-
contact resistance. The results show that 4PP meas- nel shapes [77]. Since contact resistance is usually
urements are necessary to accurately calculate the large in TMDC 2D FETs, accurate extraction of RCH
intrinsic conductivity, unveiling true channel mobil- and RC using van der Pauw measurements becomes
ity, carrier density, and contact resistance as discussed highly difficult even after reshaping the flakes in regu-
in later sections. lar forms. Thus, the 4PP measurements using Hall bar
geometry are more prevalent in the 2D community.
3.3.2. 4PP measurements with van der Pauw geometry
Because exfoliated 2D materials come in irregular 3.4. Challenges of 4PP measurements
shapes, 4PP measurements with Hall bar geometry Although 4PP measurements are a powerful tool for
generally require reshaping of the channel material; the electrical characterization of 2D materials-based
this involves fabrication steps that could alter their devices (electrical conductivity in this section), cer-
intrinsic properties as 2D materials are highly sens- tain experimental considerations need to be satisfied
itive to surface treatments. In this respect, the van to ensure accurate measurements and data extraction.
der Pauw method is advantageous for measuring the
sheet resistance of graphene and 2D materials as it (i) Accurate 4PP measurements require the chan-
does not require channel patterning in regular shapes nel region to be patterned (reshaped) in a way
[76]. that avoids the impact of voltage probes on the
In van der Pauw measurements, four contacts current flow in the channel region, e.g. Hall bar
are placed at the edges (periphery) of a flake as or van der Pauw (square, circle, cloverleaf, etc)
shown in figures 3(g)–(i); a constant current flows structures [78]. This requirement is especially
between adjacent pair of contacts (1–2 or 2–4), and critical for few-layer 2D devices, where the pres-
the voltage drops are measured between another adja- ence of voltage probes directly on the channel
cent pair of contacts (3–4 or 1–3). Although van (as in the case of TLM) can severely affect the
der Pauw measurements for bulk semiconductors do current flow in the underlying channel. Sim-
not require channel reshaping, typical Van der Pauw ilarly, in 4PP measurements with a non-Hall
measurements for 2D materials often utilize regular- bar patterned channel, the intrusion of voltage
shaped flakes (or flakes patterned in regular shapes, probes into the channel region affects the local
e.g. square, rectangular, or circular shapes) due to the electric field and current flow in the channel
convenience in analyzing experimental results. For a region and thus can result in erroneous extrac-
square channel geometry, two sets of measurements tion of RCH , RSH , and RC [79].
are performed to include vertical and horizontal con- (ii) Another consideration in measuring a 2D FET
duction in the flake , resulting in the following sets of using differential measurements (such as lock-
7
in amplifier-based measurements) is under- solid solubility, thickness, and binding energy of the
standing the role of the common-mode rejec- 2D materials [85]. For example, although a high sub-
tion ratio (CMRR) [80]. In 4PP measurements, stitutional Nb dopant concentration up to 1014 cm−2
the drain voltage is often biased at high drain (10% Nb concentration) has been achieved in mono-
bias (VDS > 1 V) compared to the source, which layer CVD grown WS2 , the estimated active dopant
is often held at ground voltage. In the pres- density according to the electrical properties was only
ence of large RC , this leaves the middle voltage ~6 × 1012 cm−2 (approximately 0.06 charges induced
probes measuring a small differential voltage on per dopant), as evidenced by non-degenerate beha-
top of a large background common voltage of vior of transfer curves [86]. Furthermore, charge
VDS
2 . Thus, the rejection of this common voltage transfer doping of 2D materials, which is based on
is crucial for accurate 4PP measurements. This their interaction with adlayers, atoms, or molecules,
limits the utility of the 4PP measurements in 2D has also been widely studied as an alternative [31–33,
devices biased at low gate voltages. For example, 41, 44, 87–96].
a typical CMRR of 100 dB with VDS = 1 V results Generally, in conventional semiconductors,
in ±5 µV of common mode voltage. This lim- the doping concentration at room temperature is
its the voltage range for the middle probes to, at assumed to be the same as the free carrier concen-
minimum, ±100 µV to achieve >95% accuracy. tration, because free carriers such as electrons or
(iii) A logical yet often ignored consideration in 4PP holes are generated from fully ionized dopant atoms,
measurements is the extremely small magnitude which are embedded in the semiconductors by an
of the voltage drops across the voltage probes ion implantation process followed by an activation
due to the presence of large RC at the source and process using high-temperature annealing. There-
drain junctions, especially when the device is fore, doping concentration in bulk semiconductors
in the OFF state. In the OFF state, both source can be estimated by various methods, e.g. secondary
and drain regions are completely depleted and ion mass spectroscopy, X-ray photoelectron spectro-
thus the contact resistance is substantially high. scopy, and I−V (C−V) characterization. By contrast,
Almost all of the source–drain bias is dropped doping density in 2D materials is either induced by
across the source and drain regions, so the electrostatic gating or charge transfer, which directly
voltage probes have to measure extremely small modulates the free carrier density in the material and
voltages. These voltages are difficult to measure therefore is primarily determined by electrical char-
with most standard source measuring units. As acterization.
a result, contact and channel resistance meas-
urements in the OFF state are often erroneous. 4.2. Doping density from current–voltage
(iv) Since Ohmic contacts are essential for calcu- characterization
lating accurate sheet resistance using van der The carrier density of a semiconductor can be mod-
Pauw measurements, a reciprocity check needs ulated by electrostatic gating in a FET configuration.
to be conducted to ensure proper van der Pauw In this configuration, the two metal electrodes (source
measurements in the case of 2D Schottky con- and drain, S/D) are used to monitor its conductivity,
tact devices. The RRAB ratio is often calculated to while the third electrode (gate, G) induces free car-
determine the reliability of van der Pauw meas- riers in the channel material across a gate dielectric
urements [81, 82]. material. Here, the carrier density above VTH can be
estimated by
4. Carrier (doping) density
VGS − VTH
n = Cox , (10)
4.1. Doping in 2D materials and devices q
Electrical conductivity is further related to extracting
charge carrier density using the relation σ = 1/qnµ, where Cox is the oxide gate capacitance per area (for
where q is the elementary charge, µ is the carrier example, 11.5 nF cm−2 with 300 nm SiO2 [84]).
mobility, and n is the carrier density. Carrier dens- Note that equation (10) assumes that the device
ity in a semiconductor can be tuned with substitu- is channel-dominated for VGS > VTH ; however, it
tional doping; however, substitutional doping is very is not operated in a quantum-capacitance domin-
difficult in 2D materials due to their nanometer-scale ated regime. For a channel-dominated WSe2 device
thickness. Despite this limitation, there have been a with low RC , good linearity in the transfer curve for
few reports on substitutional doping in 2D materials. a WSe2 FET is observed for VGS > VTH and thus
For example, group-V elements such as niobium and the carrier density extracted from the equation at
group-VII elements such as rhenium can be substi- high VGS (1.6–4.3 × 1012 cm−2 ) is in good agree-
tutionally incorporated during growth into the crys- ment with that measured using the Hall effect (1–
tal lattice of group-VI TMDCs, yielding p-type and 6 × 1012 cm−2 ) [36]. For 2D materials, the dop-
n-type semiconductors, respectively [83, 84]. How- ing density is nearly equal to the free carrier dens-
ever, the doping density is significantly limited by the ity, since it is mainly induced by the application of
8
Figure 4. Hall effect measurements of a bridge-type Hall bar structure. (a) Illustration of the Hall effect of an electron. (b) Circuit
configuration of a typical bridge-type Hall bar structure device. (c) VH versus B-field of a graphene device dependent on VGS . (d)
SdH effect in graphene showing oscillatory behavior of ρxx and σxx in the presence of B-fields [3].
gate biases without external doping. When the dop- measurement of 2D materials. ASTM International
ing is generated by external processing instead of gate provided a guideline for the device geometry of a six-
biasing, the induced doping density can be determ- contact device: L ≥ 5 W, W ≥ 3 a, b ≥ 2 W [100].
ined by the shift in charge-neutral points (CNPs) or It requires that 1.0 ≤ L2p ≤ 1.5 cm, although it is
threshold voltages in the transfer curve according to very difficult to achieve a centimeter-sized device with
∆n = Cox (∆VCNP or TH ) /q [97, 98]. good uniformity when working with 2D materials.
Hall effect measurements are usually conducted
4.3. Hall effect measurements with a sinusoidal AC or DC drain current, ID , flow-
Hall effect measurements are widely carried out to ing through the channel of the device (figure 4(b)),
extract the intrinsic material properties of a semi- and VH is measured while B-field is swept at a fixed
conductor such as carrier density, type, and mobil- VGS , as shown in figure 4(c). It should be noted that
ity. Figure 4(a) illustrates how an electron moves in a the use of AC measurement with lock-in amplifiers
conductive channel under applied longitudinal elec- often has a significant advantage over the DC meas-
tric and perpendicular magnetic fields. The underly- urement, since VH is usually in the range of 1–10 µV
ing principle of the Hall effect is based on the Lorentz with a current of 100 nA and a B-field of 1 T, which
force [99]. An electron flows (in the opposite direc- cannot be observed with conventional DC source
tion to the current) along the channel in the presence measuring units. To make the DC measurements pos-
of an electric field Ex with drift velocity υ. When a sible, a higher current is required at the same B-field,
perpendicular magnetic field Bz is applied, the elec- which in turn results in many unfavorable effects
tron experiences Lorentz force, resulting in a voltage due to threshold voltage shift, Joule heating-induced
difference (Hall voltage, VH ) transverse to the flow of breakdown, and phase transition [101–103]. Further-
the electron. The sign of VH depends on carrier type more, the sheet carrier density is calculated from the
(electron or hole), and the value of VH varies depend- following equation:
ing on the carrier density, current, and magnetic field.
ID ∆Bz
Two typical device structures are used for Hall n2D = . (11)
q ∆VH
effect measurements: (1) van der Pauw structure
(see figures 3(g)–(i)), and (2) Hall bar structure. This is a simplified equation by taking the Hall
Figure 4(b) shows a typical bridge-type Hall bar scattering factor (r, generally between 1 and 2) as
structure device, which is widely used for Hall unity; it should be multiplied by r to the equation
9
depending on the type of scattering (see section 5.2) other hand, comes in many flavors—effective mobil-
[30]. It should be noted that n2D can also be determ- ity, field-effect mobility, and saturation mobility—
ined from the van der Pauw structure by measur- depending on how it is extracted. Its main advant-
ing differential voltages along diagonal direction (e.g. age is that MOSFET mobility is extracted in a region
V 14 and V 23 in figures 3(h) and (i)) under the pres- of operation that more closely resembles true device
ence of a magnetic field. Without the Hall scattering operation; however, much care must be taken to
factor, the extracted n2D for undoped 2D semicon- ensure that the model used for mobility extraction
ductors typically ranges from 0.5–6 × 1012 cm-2 with correctly models the device current and the carrier
back gate voltages applied across 300 nm SiO2 at room density of the channel.
temperature [36, 104]. The advantage of this method
is that any geometric non-uniformity in the devices 5.1. Hall effect mobility
can be eliminated by extracting the inverse of the The standard procedure to measure the µH is to pat-
slope of a linear curve. As shown in figure 4(c), non- tern the semiconductor into a Hall bar structure with
zero VH at zero B-field due to the non-symmetric geo- contacts placed on the fingers, as shown in figure 4(b).
metry, carrier inhomogeneity, and contact resistance In the typical approach for measuring the µH in 2D
can be observed in typical measurements, which can devices, a constant current is flowed between the
vary depending on the applied VGS . The RSH and Hall source and drain contacts, while a magnetic field is
mobility (µH ) values extracted from the Hall effect applied normal to the plane of the semiconductor.
measurements are described in section 5.1 below. Hall effect mobility measurements benefit from the
Apart from Hall effect measurements, the carrier independent extraction of the carrier concentration
density in 2D materials can also be determined by in the channel. In quasi-equilibrium, zero current
observing the Shubnikov-de Hass (SdH) effect where flows along the width of the device. Therefore, the
the oscillatory behavior of ρxx is observed in the pres- total force along the width must be zero, satisfied
ence of magnetic fields, as shown in figure 4(d). For when the Lorentz force is zero, which gives Ey = υx Bz ,
2D devices with moderate electron/hole mobilities, where x is along the length, y is along the width,
SdH oscillations are usually observed at ultra-low and z is perpendicular to the 2D semiconductor
temperatures (a few kelvins) and in the presence of channel. The general expression for current flow is
a large magnetic field [2, 3]. Over the years, tech- given by ID = qWυx n2D . By defining the Hall voltage
niques such as van der Waals-based assembly [105], as VH ≡ Ey W, we find that VH = qn ID Bz
2D
, (see equation
full device encapsulation, and clean contact fabric- (11) for n2D ). From the measurement of Vxx shown in
ation have enabled the observation of SdH oscil- figure 4(b), the RSH of the channel can be determined
lations at moderate magnetic fields (<5 T) from by
graphene [106, 107] and other 2D semiconductor-
based devices [108, 109]. In this regard, the SdH Vxx W
RSH = . (12)
effect has become an important measurement tool ID L4p
to determine important material parameters: (i) 1
Quantum mobility (µq ) from the relation, µq ≈ B1q Using RSH = qµn n2D , we find the Hall effect mobil-
ity to be
where Bq is the magnetic field referring to the onset of
SdH oscillation [57]; and (ii) carrier (electron) dens- VH L4p 1
ity from the slope of 1/B versus index of SdH minima µH = , (13)
Vxx W Bz
by the relation n = h∆ 2q 1 , where Bm is the magnetic
( Bm )
field at minimum ρxx and h is Planck’s constant. Thus, where the value of n2D is given by equation (11) and
the Hall effect measurement along with SdH oscilla- µn = µH is assumed (which is only valid for a Hall
tion is a very powerful and effective technique to char- scattering factor of 1). This assumption is further dis-
acterize carrier density in 2D materials. cussed in the following section. As discussed in the
previous section, the quantum mobility can also be
obtained from the onset of SdH oscillations by Hall
5. Mobility effect measurements (e.g. the onset of SdH oscillation
occurs at B = 1 T, µq = 10 000 cm2 V·s−1 ) [57].
Two forms of mobility are typically extracted in 2D
devices—Hall effect mobility and MOSFET mobility. 5.2. Challenges of Hall effect measurement
Both extraction techniques have their pros and cons. In principle, the measurement of µH is straightfor-
µH extraction has an advantage in that it independ- ward, but in practice, several difficulties arise, com-
ently measures both resistivity and carrier concentra- plicating the measurement on 2D materials. The
tion. Its key disadvantage is that it requires a special- first challenge is that the Hall effect measurement
ized Hall bar structure (or other suitable geometries requires a specialized structure, ideally following the
with small contacts at the edges of the structure) and guidelines of ASTM Standard F76 [100]. The struc-
the Hall scattering factor (r), is often unknown and ture should be designed such that the contacts lie as
simply assumed to be one. MOSFET mobility, on the close to the edge of the sample as possible. The flakes
10
can be etched into the desired geometry, but doing measurement is a powerful technique to measure car-
so has a negative consequence that the lithography rier mobility in 2D materials; however, the technique
and etch process may adversely decrease the mobil- is not without challenges and complications.
ity from its value in a pristine state. This is espe-
cially concerning for the mobility measurement of 5.3. MOSFET mobility
ultra-thin samples, where surface contamination can In contrast to µH , MOSFET mobilities can be extrac-
greatly affect the material’s mobility. ted from the measured transistor characteristics.
Another practical challenge for measuring Hall MOSFET mobilities come in two flavors: effective
mobility in 2D materials is that VH can be quite mobility and field-effect mobility. Figure 5 illus-
small, making measurement difficult. VH is propor- trates the MoS2 MOSFET characteristics employed to
tional to current per unit width, which is often less extract the effective and field-effect mobilities [114].
than 1 µA µm−1 for ultra-thin samples. VH can have
an offset (i.e. VH ̸= 0 for ⃗B = 0 as shown in figure 4(c)) 5.3.1. Effective and field-effect mobilities
due to asymmetry in a Hall bar geometry so the dif- Effective mobility is extracted from the drain con-
ference in Hall voltage at different B-fields must be ductance of a MOSFET biased in the linear regime. A
used instead of a single B-field measurement. A spe- general expression for the drain current of a MOSFET
cialized probe station is typically required to obtain with a negligible diffusive current at small VDS can be
a large B-field, often involving the use of a cryostat written as
with a cryogenic superconducting magnet. The AC
Hall effect measurements, where a coil is used to gen- W
ID ≈ µeff Qn VDS , for VGS > VTH and
erate the AC magnetic field, which is advantageous L
over DC measurement as it enables fast and low field VDS ≪ (VGS − VTH ), (16)
measurements <0.1 T, can also be used [110].
Although it is not often done for 2D materi- where Qn = Cox (VGS − VTH ) is the sheet charge
als, the sample (mostly graphene) can also be meas- density of the channel, µeff is the effective mobility,
ured while placed atop a permanent magnet that and kT is the thermal energy. Ideally, Qn is determ-
is flipped between measurements to give a positive ined through independent capacitance or Hall effect
and negative B-field [111, 112]. Unfortunately, many measurements of the MOSFET structure; however,
back-gated devices that are pervasive across the 2D- given the small size of many exfoliated samples, the
materials community show significant hysteresis [52, capacitance of 2D MOSFETs is not typically meas-
113] (or even worse, device degradation) from measured as the signal is much too small and complex to
urement to measurement, which makes the differ- reliably detect using conventional techniques. For an
ential extraction between the positive and negative ideal device, effective mobility is then given by
B-field measurements prone to hysteretic error. A
gd L
solution to overcoming this problem is to perform µeff = , (17)
repeated measurements, switching back and forth Qn W
between +Bz and -Bz , to verify that the data is stable.
where gd is the drain conductance given by gd ≡
∂ ID
Another, often overlooked, error in the measure-
ment of µH arises from the assumption of energy- ∂ VDS , as shown in figure 5(a). If the out-
constant VGS
independent scattering in the semiconductor, which put characteristics do not exhibit a linear dependence
is generally only valid at very high magnetic fields on VDS around the bias point for which the mobil-
(≫1 T) or for neutral impurity scattering. Energy- ity is extracted, the extracted mobility is suspect since
dependent scattering is captured in the Hall scattering the device characteristics do not follow equation (16)
⟨τ 2 ⟩ from which µeff is derived. Similarly, if the transfer
factor, r = ⟨τ ⟩2 (1 < r < 2), where τ is the mean time
characteristics do not exhibit a linear dependence on
between carrier collisions and ⟨τ ⟩ is the average over
VGS around the bias point for which the mobility is
energy. The Hall scattering factor can be determined
extracted, the use of the equation to determine Qn is
at a specific B-field by r = RHR(BHz(= Bz )
∞) . Including this highly suspect since the device behavior does not fit
factor, the carrier concentration becomes the charge model.
Field-effect mobility is derived from the
ID B z
n2D = r , (14) transconductance gm = ∂∂VIDGS of a MOSFET
qVH constant VDS
biased in the linear regime as shown in figure 5(b),
and the conductivity mobility equals which is given by
µH gm L
µn = . (15) µFE = . (18)
r Cox VDS W
Therefore, the µH can over-predict the conductivity For conventional MOSFETs, extracted µFE is often
mobility by up to a factor of 2. All in all, Hall effect less than the µeff due to effective-field dependence of
11
Figure 5. Effective mobility and field-effect mobility. (a) Effective mobility is extracted from the drain conductance near the
origin of the output characteristics. For both mobility extraction techniques, both the transfer and output characteristics should
show linear behavior around the extraction bias point. (b) Field-effect mobility extracted from the transconductance of a
MOSFET, biased in the linear regime [114].
the mobility. When considering this dependence, the structures similar to those used for Hall effect meas-
transconductance becomes urements as shown in figure 4(b). In such a structure,
the voltage drop between the middle contacts is meas-
W ∂µeff
gm = Cox VDS µeff + (VGS − VTH ) . (19) ured (Vxx ), while VDS is applied between the source
L ∂VGS
and drain contacts. This four-probe
drain conduct-
∗ ∂ ID
Since µeff decreases with increasing effective field, ance is defined as gd = ∂ Vxx . The measured
∂µeff constant VGS
∂ VGS is negative and the measured transconductance potential is changed by varying the applied VDS . In
is less than what would ideally be expected. The this way, the effect of the contacts is removed from
dependence of the µeff on VGS is often expressed in the extraction procedure.
terms of the effective vertical field, The measured potential across the channel may
µo be quite small and perturbation of potential distribu-
µeff = , (20)
1 + αεeff γ tion due to the device geometry (e.g. size of voltage
sensing probes [115]) may affect the ability to accur-
where µo , α, and γ are constants, and εeff is the ately determine the modified drain conductance. The
effective (vertical) field in the semiconductor channel. dual-gate structure makes it more complicated due
However, the change in µeff with VGS is proportional to the contact turn-on effect tending to overestimate
to the change in εeff with VGS , which is small for back- mobility unless thorough characterization to minim-
gated 2D devices with thick oxides. Furthermore, for ize measurement artifacts and systematic simulation
ultra-thin few-layer 2D MOSFETs, the majority of are considered [116]. Nevertheless, due to the often
the channel charge is already present near the chan- large and variable RC in 2D MOSFETs, four-probe
nel surface [37], which further suggests that the gate- measurement presents the best technique to accur-
dependence of µeff will be less than that of conven- ately determine channel mobility for both Hall effect
tional devices. and MOSFET mobility measurements.
5.3.2. Errors due to contact resistance

Large contact resistance is a common problem in 2D 6. Contact resistance (RC ) and Schottky
devices that limits the accurate extraction of MOS- barriers
FET mobilities. In conventional MOSFETs, RC is often
determined from TLM structures, and the extrac- 6.1. Contact resistance in 2D devices
ted mobilities can be corrected for degradation due Lack of simple, efficient, and controllable doping
to RC . In principle, the same TLM can be applied to techniques for 2D materials results in large RC at the
2D MOSFETs; however, often large device-to-device metal-semiconductor junction. RC depends on the
variations make it difficult to achieve reliable and nature of the barrier, i.e., its width and height, since
trustworthy results when applied to 2D materials. barrier sensitively affects carrier transport across it.
Moreover, the mobility extraction from the contact- For the conventional semiconductors, e.g. Si and
limited devices can be problematic since VTH is not GaAs, RC is known to approach near the quantum
the onset voltage where the channel is depleted which mechanical limit [117]. Also, there was an early-stage
gives inaccurate charge density Qn . One way to cir- experimental report on RC in graphene devices by
cumvent the problem of RC is to fabricate four-probe varying contact lengths, in which RC much larger
12
than quantum limit was consistently obtained from Equation (22) is the fundamental relationship that is
various device configurations including 2PP and 4PP used to extract RC in TLM. Note that the term RC W
measurements [118]. However, 2D semiconducting is sometimes used to refer to RC in literature, where it
materials with a sizable bandgap in the range of represents width-normalized RC . Several 2-probe res-
0.5 ~ 2 eV, e.g., TMDCs, show very high RC >10 times istance measurements are made between an adjacent
that of the conventional semiconductor materials pair of contacts with different channel lengths and
[117, 119]. The large RC at the metal-semiconductor RTotal is plotted as a function of channel length. Fig-
interface is attributable to the formation of Schottky ure 6(b) shows a typical plot of RTotal versus L from
barriers due to mid-gap Fermi level pinning arising which RC can be extracted by finding the y-intercept
from intrinsic material defects and processing con- using a linear fit. Other relevant parameters are also
ditions [36, 120]. These Schottky barriers not only highlighted in the plot. Furthermore, low source–
limit the ON current of the 2D FETs, but also determ- drain voltages (< 1 V) are recommended for accurate
ine their polarity [121, 122]. Moreover, weak Van der TLM to avoid Joule heating [103] and impact ioniza-
Waals bonding between high work function metals tion [129] in channel 2D materials.
such as gold (Au) and palladium (Pd) and 2D materi- Figure 6(c) shows a schematic of a typical TLM
als results in additional tunnel resistance and there- structure with a 2D material as the channel material
fore higher RC . In addition, typical back-gated 2D and conventional back-gated geometry. Unlike bulk
devices allow simultaneous gating of contact and semiconductors, 2D materials generally do not con-
channel regions, which convolutes the underlying duct well without gating due to large RC . Thus, equa-
physics. Since RC in 2D devices is often much lar- tion (22) needs to be modified to show the effect of
ger than RCH , the output and transfer characterist- global back gating, in which case both the channel and
ics of such FET devices represent contact properties contact regions are modified simultaneously, i.e.
rather than channel properties, as discussed in the
conductivity section [61, 123–127]. This limits the RTotal (VGS ) W = RSH (VGS ) L + 2RC (VGS ) W (23)
performance of scaled 2D FETs and affects extrac-
tion of important device parameters such as field- Figure 6(d) illustrates the use of TLM to extract
effect mobility and VTH , as discussed in the previous contact resistance for Au contacts on a bilayer MoS2
sections. Thus, accurate estimation of RC is critical where the channel length was varied from 200
for understanding, improving, and benchmarking 2D to 1000 nm [130]. The measured total resistance
devices. (RTotal W) was plotted as a function of channel length;
In this section, we discuss the widely employed the corresponding y-intercept provides the contact
TLM technique used to estimate contact resistance resistance (RC W). As discussed earlier, the contact
in 2D FETs. We discuss the advantages and dis- resistance shows clear gate voltage dependence (high-
advantages of the method and highlight important lighted by carrier density in the channel using equa-
considerations that should be taken into account tion (10)), as contact resistance decreases with an
when applying it to 2D materials. We also discuss increase in gate voltage.
the temperature-dependent Arrhenius method for
extracting SBHs in 2D devices. 6.2.1. Transfer length and contact resistivity extraction
TLM also provides a simple way to study the scal-
6.2. Transmission line method ing properties of contacts, which is crucial to determ-
The TLM/transfer length method is conventionally ine the fundamental limits to scaling of 2D materials-
used to determine RC for metal contacts on bulk based FETs. As the channel length is scaled to enable
semiconductors, such as Si and Ge [78, 128]. In this better electrostatics and achieve higher device dens-
method, multiple devices are fabricated with TLM ity, a large portion of total resistance corresponds to
geometry (shown in figure 6(a)), where the chan- the contact resistance resulting in contact-dominated
nel length/spacing (denoted by L1, L2, etc) is varied behavior of scaled devices. Using a distributed res-
between different contacts, while the contact length istive network model for the contact region (fig-
is kept constant. As shown in the inset of figure 6(a), ure 7(a)), analytical expressions for contact resistance
RTotal between any two contacts can be expressed as can be obtained in terms of specific contact resistivity
a linear combination of RC and the length-dependent (ρc ), sheet resistance under contact (RSK ), and trans-
RCH of the semiconductor in between the contacts, i.e. fer length (LT ):

RTotal = RCH (L) + 2RC (21) p LC
RC W = ρc RSK coth ; (24)
LT
which, using equation (5), can be further rewritten as
p
RTotal W = RSH L + 2RC W. (22) LT = ρc /RSK . (25)
13
Figure 6. (a) Top view of the TLM configuration showing different channel lengths (L1 , L2 , . . .). The enlarged view shows the
distribution of total resistance in terms of RC and RCH . (b) A linear fit of the plot of RTotal versus channel length giving rise to
RC , RSH , and LT . (c) Schematic of a MoS2 -based TLM device with back gating through SiO2 . (d) Schematic of a bilayer MoS2
device and the TLM plot for the device showing the linear trend of RTotal versus channel length as a function of carrier density
(gate voltage). The inset shows the extracted RC values as a function of carrier density, demonstrating contact region
gating [130].
Figure 7. Extraction of RC and LT . (a) Side view showing the resistive network used to calculate LT . (b, c) Extracted ρc and LT in a
bilayer MoS2 as a function of carrier density (gate voltage) at different temperatures [130].
Here, LC is the physical contact length and Experimentally, these parameters are extracted from
LT represents the current crowding at the metal- TLM by assuming that RSK = RSH and LC ≫ LT
semiconductor junction and is defined as the effective which allows us to extract LT by finding the x–
length over which a majority of charge transfer/cur- intercept of the curve of RTotal versus L. Once LT is
rent transport occurs beginning at the edge of the determined, ρc can be determined by either equations
junction (x = 0). Further insight can be gained by (26) or (27). Figures 7(b) and (c) show the extracted
considering two limiting cases: ρc and LT values, respectively, for the device presented
p in figure 6(d).
(i) LC ≫ LT : RC W = ρc RSK = LT RSK (26)
6.3. Challenges with TLM
Over time, the TLM has become the most commonly
ρc employed method of determining RC and RSH in 2D
(ii) LC ≪ LT : RC W = (27)
LC materials-based devices due to the ease of device fab-
14
rication and straightforward nature of the analysis. 6.4. Schottky barrier heights and Fermi level
Moreover, the method is generally material agnostic; pinning
it does not require any prior knowledge of effective As discussed above, the large contact resistance in 2D
mass, dielectric constant, bandgap, etc.. Furthermore, devices can be attributed to the presence of Schottky
the TLM has an advantage over 4PP as current trans- junctions at the metal-2D semiconductor interfaces.
port is not disrupted by the presence of inner elec- Schottky junctions are characterized by SBHs, the rel-
trodes, which are used as voltage probes in typical 4- ative values of which determine the current trans-
probe measurements, as discussed in the previous sec- port at the metal-semiconductor interface affecting
tions [115, 131, 132]. However, a few potential pitfalls the polarity, magnitude, and switching characterist-
must be considered when applying TLM to 2D FET ics of the injected charge carriers. Figure 8(a) shows
analysis: the SBH and conceptual band diagram of a metal-2D
semiconductor interface. For an ideal metal-2D semi-
(i) Reliable TLM requires linear dependence of conductor junction, the SBH for n-type (ϕBn ) or p-
channel resistance on channel length and low type (ϕBp ) semiconductors is given by:
spatial variation of contact resistance. Fabric-
ation issues such as irregular device geometry For n - type: ϕBn = ϕm − χ, (28)
due to non-patterned 2D flakes, inhomogen-
eous non-laminar current flow due to poly-
For p - type: ϕBp = χ + Eg − ϕm , (29)
mer contamination, lithography-induced dam-
age, and unknown contributions from sample where ϕm is the work function of a metal, χ is the elec-
edges, can cause deviation from linear scaling of tron affinity and Eg is the 2D semiconductor bandgap.
channel resistance and therefore result in erro- For such ideal systems, the SBH for electrons increases
neous contact resistance measurements [120]. linearly with the metal work function, thus satisfy-
(ii) TLM is also problematic when contact resist- ing the Schottky–Mott rule as shown in figure 8(b).
ance is substantially higher than channel res- However, non-ideal states such as interface and gap
istance, since a small amount of inter-device states at the metal-semiconductor interface can cause
variation in contact resistance can cause large severe deviation from the Schottky–Mott rule, mak-
errors in the linear fit. Moreover, for Schot- ing it difficult to control electron/hole SBH by vary-
tky contacts with non-linear I–V characterist- ing the metal work function. Quantitatively, we can
ics, RC becomes bias-dependent, which needs interpret this deviation by introducing a pinning
to be carefully considered when examining scal- factor (S) and charge neutrality level (CNL, ϕCNL )
ing behavior. The impact of non-linearity in the [134, 135]:
plot of RTotal versus L is severe when the extrac-
ted transfer lengths are small. TLM is most suc- n − type: ϕBn = S (ϕm − ϕCNL ) + (ϕCNL − χ)
cessful at high back gate voltages, where the = Sϕm + b, (30)
channel resistance is substantially larger than
the contact resistance and it is clear that total
p − type: ϕBp = S (ϕCNL − ϕm ) + Eg + χ − ϕCNL
resistance scales linearly with channel length (31)
[130].
(iii) Extracting transfer length and specific contact Here, S is defined as the slope S = ∂ϕ∂ϕm and can be
Bn
resistivity requires that RSK = RSH holds true, calculated from the linear fit of ϕBn versus ϕm plot.
which is hard to justify for few-layer devices. S = 1 represents an ideal metal-semiconductor inter-
Unlike conventional semiconductors, in which face whereas S = 0 represents almost no variation
lateral transport occurs far (~10–100 nm) from in SBH with a change in the metal work function,
the metal-semiconductor interface, transport indicating a completely pinned interface at the charge
in 2D materials occurs right at the interface neutrality level. The CNL for n-type can be estimated
and the material properties are substantially by the relation
changed by the metal contacts (e.g. contact dop-
χ+b
ing, fabrication-induced damage, and change ϕCNL = . (32)
in bandgap). Recent studies have shown signi- 1−S
ficant differences in RSK and RSH , which calls For S < 1, the semiconductor Fermi level is fixed
for use of complementary methods for accurate near the CNL, which results in similar SBHs for
extraction of LT , ρC and RSK such as contact-end different metal contacts, that is, ‘Fermi level pin-
and cross-Kelvin bridge methods [133]. Future ning’, as shown in figure 8(c). Fermi level pinning is
work on modeling and analysis of metal con- often attributed to metal-induced gap states (MIGS)
tacts on 2D materials needs to take this into and defect-induced gap states (DIGS); however, the
consideration, helping to come up with accur- exact physical mechanism still remains an open
ate methods of extracting LT , ρC and RSK . question.
15
Figure 8. Schottky barrier height and Fermi level pinning. (a) Band diagram of a metal-semiconductor junction. (b) SBH versus
metal work function showing the Schottky–Mott rule and Fermi level pinning. (c) Schematic image of Fermi level pinning [35].
6.4.1. SBH extraction in 2D devices due to its exponential dependence on these paramet-
Accurate extraction of SBH for any metal-2D semi- ers. At a certain gate voltage, termed flat-band voltage
conductor junction is essential for understanding (VFB ), the conduction band is perfectly aligned with
the underlying physics of 2D devices and dedu- the SBH at the source end, i.e. ϕB, eff = ϕBn . For VGS >
cing the pinning factor and CNL. Generally, for VFB , the tunneling current starts to dominate the
bulk semiconductors, SBH is determined by fab- overall current transport resulting in weaker tem-
ricating Schottky diodes with different metal con- perature dependence. Thus, the actual barrier height
tacts; however, the large contact resistance at the can be extracted by identifying the effective barrier
metal-2D semiconductor interface makes it almost corresponding to the flat band voltage by analyzing
impossible to construct a proper Schottky diode . For the temperature-dependent transfer characteristics as
this reason, the standard back-gated FET structure shown in figure 9(b).
is more commonly used to extract SBH. The most To extract the SBH, the temperature-dependent
prevalent method of determining SBH is the Arrhe- transfer characteristics are modeled with the thermi-
nius technique, which depends upon analyzing the onic current equation and replotted in an Arrhenius
temperature-dependent transfer or output character- manner, shown in figure 9(c). From here, the effect-
istics of a back-gated 2D FET [34, 61]. ive barrier for current flow can be extracted by linearly
As shown in figure 9(a), current transport at the fitting the Arrhenius curves, and can be expressed as
reverse-biased source junction of a 2D FET consists  3

of two distinct components: (i) TE, where charge kB  ∆ ln I D (V GS ) /T 2
ϕB,eff (VGS ) =  . (34)

injection occurs over the barrier, and (ii, iii) tun- q ∆T−1
neling transport, where the charge injection occurs
through the barrier [136, 137]. Tunneling transport Finally, as shown in figure 9(d), ϕB,eff is plotted
can be further divided into thermionic field emission as a function of applied gate bias, and the actual
(TFE) and field emission (FE), where TFE denotes SBH (ϕBn ) can be determined by identifying the gate
tunneling at an energy level higher than the source voltage at which the curve of ϕB,eff versus VGS deviates
Fermi level and vice-versa. The relative contribution from its initial linear slope [34, 61]. This gate voltage
of these three components can be tuned by changing corresponds to the flat band voltage and the corres-
the applied gate bias. In the OFF state, the conduction ponding ϕB,eff is recognized as ϕBn .
band edge is higher than the actual SBH and is com-
pletely dominated by TE. In this regime, the current 6.5. Challenges with the Arrhenius method of SBH
can be expressed as extraction
Even though the Arrhenius method is widely used to
∗ 3 qϕB, eff (VGS )
I2D (VGS ) = WA2D T exp −
2 extract SBH in 2D materials, its applicability is often
kB T questioned, because it requires several assumptions

−qVDS that are not generally satisfied in 2D devices. Here,
1 − exp (33)
kB T we discuss the assumptions and their impact on the
extracted SBH.
where ϕB, eff (VGS ) is the gate voltage-dependent
√
∗ q 8π m∗ k3B
effective barrier height, A2D = h2 is the mod- (i) Need for a clear transition from the thermionic
ified Richardson constant, T is temperature and m∗ regime to the tunneling regime: Since the
is the effective mass. In TE regime the current is Arrhenius method depends upon proper
strongly influenced by temperature and gate voltage identification of the flat band voltage, the device
16
Figure 9. Extraction of SBH from a temperature-dependent transfer curve. (a) Different transport regimes at the source contact
as a function of gate voltage. Thermionic emission dominates in the OFF state (VGS < VFB ), and tunneling current begins to
dominate in the ON state. Here, qϕB0 is equivalent to the n-type SBH (qϕBn ) at flat-band condition [61]. (b) Transfer curve of
monolayer MoS2 with a 1 L-hBN/Co contact in the temperature range from 100 K to 240 K. (c) Richardson plot (ln I/T1.5 versus
1000/T) of (b). (d) SBH as a function of gate voltage [104].
needs to show a clear transition from a ther- materials involves temperatures below 100 K.
mionically dominated regime to a tunneling At such temperatures, the thermionic com-
regime. However, this transition is often poorly ponent is substantially smaller than the
defined in 2D devices due to the presence of usual leakage floor for any considerable SBH
non-idealities such as traps, non-homogenous (ϕBn > 100 meV). For example, a contact-
doping due to surface contaminants, and van dominated 2D FET with an SBH of 0.3 eV
der Waals gap [138–140]. Moreover, for doped should result in a maximum thermionic cur-
contacts, devices with thick (>2 nm) tunnel bar- rent of 6 nA at flat band condition at 300 K,
riers, and few-layer (>5) devices, the assump- which is reduced to less than 1 fA for T < 77 K.
tion of pure thermionic current is difficult to Thus, it is extremely difficult to measure any
verify due to the high tunneling current arising thermionic current at low temperatures below
from the channel region underneath the contact 100 K. This means that the currents observed
[121, 137, 141–144]. at such temperatures usually come from TFE
(ii) Weaker thermionic current at lower tem- or FE components that show weak temperature
peratures: More often than not, the Arrhe- dependence [35, 145] and therefore leading to
nius method for SBH extraction in 2D erroneous SBH extraction.
17
Figure 10. (a) Schematic illustration of a 2D MOS capacitor. (b) Ideal C–V characteristics of a MOS capacitor at low and high
frequencies indicating different regimes (accumulation, depletion, and inversion).
7. Trapped charges and dielectric constant is often used to mechanically exfoliate the 2D crys-
tals and to transfer them to desirable substrate. But
7.1. Capacitance–voltage characterization the polymer residues from PDMS stamp degrade the
C–V measurement is a robust electrical characteriza- properties of transferred 2D materials via the form-
tion method used to assess the properties of defects ation of interfacial bubbles and wrinkles, which res-
in insulating and semiconducting materials and to ults in contaminants trapped at the interface between
probe the variation in the space charge distribution in the substrate and the 2D material. To avoid and min-
a semiconductor with applied gate voltage. It can be imize the formation of residues at the interface dur-
used to measure various parameters, such as insulator ing the stacking of such materials, alternative poly-
capacitance (Ci ) or oxide capacitance (Cox ), flat band mers, such as poly(propylene) carbonate, can be used
voltage, dopant concentration, interface traps, and [146]. Afterfabricating clean 2D MOS capacitors, the
dielectric border traps, which are typically analyzed electrical measurements are conducted using a semi-
from metal-oxide-semiconductor (MOS) or metal- conductor parameter analyzer and an LCR meter.
insulator-semiconductor (MIS) structures. The basic Care should be taken to ensure that the instruments
structure of a MOS capacitor consists of metal, oxide, are used with the lowest possible external impedance
and a 2D semiconductor material (n- or p-type) as to minimize the parasitic capacitances. Although 2D
shown in figure 10(a). When performing the C–V materials have attracted a great deal of interest for
measurements of 2D materials, a large gated area (i.e. advanced electronic applications due to their tunable
channel area) with high signal-to-noise ratio and low bandgaps and high surface-to-volume ratios [147–
parasitic resistances is required to ensure the reliabil- 149], the device performance is strongly affected by
ity of the measurements and analysis. From a device various 2D materials-related processing issues, such
perspective, a 2D material-based MOS capacitor has as the adsorption of H2 O molecules from the envir-
two distinct interfaces: metal/semiconductor inter- onment, structural defects (vacancies, grain bound-
face (top) and semiconductor/oxide interface (bot- aries, dislocations, etc.), and the interface charge traps
tom). Both interfaces are crucial to examine as they due to the interactions with dielectric materials (e.g.
are coupled to each other. The ideal C–V curve of dif- SiO2 , Al2 O3 , HfO2 ), which results in hysteresis in C–V
ferent regions of a MOS capacitor is illustrated in fig- (I–V) characteristics and degradation of electron and
ure 10(b). The working condition of a MOS capacitor hole mobilities [150–154]. Zhu et al studied the inter-
depends on the applied VGS and can be divided into facial properties of a HfO2 /monolayer MoS2 using C–
three different regimes: (i) accumulation, in which V measurements and observed a double-hump fea-
majority carriers (electrons) are accumulated near the ture in the C–V curve characterized to different gate
2D semiconductor-dielectric interface; (ii) depletion, voltages and frequencies, revealing traps in CVD-
in which majority carriers become depleted at the grown MoS2 [155].
interface; and (iii) inversion, in which the density of When working with 2D materials, due to their
majority carriers continues to decrease while that of inert surfaces and the absence of dangling bonds, it is
minority carriers increases. difficult to form a uniform and high-quality dielectric
When attempting to fabricate the 2D MOS film, but this goal can be realized with proper surface
(or MIS) vertical capacitors, various issues can be functionalization [156, 157]. Pretreatment of the 2D
encountered. For vertical stacking of 2D materials, material surface (e.g. MoS2 ) with oxygen plasma (O2 )
a polymer, e.g. polydimethylsiloxane (PDMS) stamp or ultraviolet/ozone (UV/O3 ) has been considered
18
−1 −1
to enhance reactivity before high-k deposition to 1 1 1 1
Cit = − − − , (35)
decrease the density of interface traps [158–161]. Pre- CLF Cox CHF Cox
viously, the quartz substrates were used for the fab-
rication of MIS capacitors to eliminate the parasitic Cit
capacitances between the metal pads and the sub- Dit = , (36)
q
strates [162]; the C–V measurements of intermedi-
ate (WSe2 , 1.2 eV) and narrow bandgap (black phos- where Cit is the capacitance of interface traps when
phorus, ~0.3 eV) materials showed high-frequency all the traps react with AC signal at low frequency,
(unipolar) and low-frequency (ambipolar) behavior, and CLF and CHF are the capacitances measured at
respectively. low and high frequencies, respectively [158, 172].
Liu et al evaluated Dit (1013 cm−2 eV−1 ) in BP and
7.2. Trapped charges in 2D materials WSe2 -based MIS capacitors with Al2 O3 as a dielectric
High-quality interfaces are crucial for high- using the parallel conductance (Gp ), which is extrac-
performance 2D devices due to the large surface- ted from capacitance and conductance measurements
to-volume ratio of 2D materials [163–166]. Charges [162], given as
trapped in the interface, either positive or negative,
ω 2 Gm C2ox
originate from structurally induced defects at the Gp = 2, (37)
gate-dielectric and dielectric-semiconductor inter- G2m + ω 2 (Cox − Cm )
faces that are capable of trapping and de-trapping where ω is the measurement frequency, Cm is the
charge carriers. The trapped charges in 2D device capacitance of the device, and Gm is the conductance.
structures have been quantitatively analyzed using Dit is calculated using [155, 162, 170],
the capacitance and AC conductance measurements
[155, 163, 167]. The density of interface traps can be 2.5 Gp
Dit = . (38)
determined by Dit = ∂Nit /∂E (cm−2 eV−1 ), where q ω peak
Dit is the interface trap density, Nit is the number
A significant decrease in Dit was reported in a 2D hBN
of interface traps per unit area, and E is the energy.
capacitor [162]. A low-temperature high-k depos-
Figure 11(a) illustrates various origins of interface
ition method led to the formation of traps associated
states in a high-k/MoS2 /oxide structure [168].
with the dielectric known as border traps or near-
Researchers have employed different methods for
interfacial oxide traps [173]. These defects responded
interface analysis and extracted different types of
to a change in VGS in the gate dielectric at some dis-
trapped charges, such as interface trapped charges
tance from the interface, and therefore induce hys-
and dielectric border trapped charges (or oxide
teresis in C–V measurements and are responsible for
charges) [158, 161, 168–170]. For example, the
the frequency dispersion in the accumulation region.
band diagrams of the interface and border traps in
There have also been studies that determined the
HfO2 /MoS2 are shown in figure 11(b). The inter-
density of border traps, as distinct from interface
face traps in MoS2 bandgap dominate the C–V
traps, using multi-frequency C–V characteristics of
response in the depletion region, whereas the border
HfO2 /MoS2 and HfO2 -Al2 O3 /MoS2 top-gate stacks
traps in HfO2 dominate in the accumulation region.
(figure 11(d)) [159, 160].
The interface traps were investigated and the Dit was
extracted using frequency-dependent C–V measure- 7.3. Dielectric constants of 2D materials
ments. The typical mid-gap Dit at the SiO2 gate The dielectric constant (ε) of a material is a fun-
dielectrics/Si interface is ~1010 cm−2 eV−1 , while the damental electrostatic property that can be used to
Dit of the high-k dielectric/Si interface ranges from determine the capacitance, charge screening, and
1011 to 1012 cm−2 eV−1 [171]. One study examined energy storage capacity of electronic devices. ε also
the density distribution and dynamics of trap states plays a significant role in defining the active inter-
in CVD-grown MoS2 using capacitance measure- actions that take place between charged particles in
ments; the traps were shown to colonize the mid-gap the material and contains information about the col-
(Type M trap) and band edge (Type B trap) regions lective oscillations of electron gas, plasmons, excitons,
(figure 11(c)) [155]. and quasiparticle band structures [174, 175]. The
The influence of high interface state density Dit on unique structure of 2D layered materials leads to
high-k/2D device characteristics has inspired extens- anisotropic physical properties between the in-plane
ive research on passivation of the high-k/2D interface and out-of-plane directions, e.g. inhomogeneous
to reduce Dit [158–161]. Dit most likely originates dielectric strength and Coulomb interaction strength
from the oxygen atoms that fill the sulfur vacan- characterized by ε; this is unlike conventional iso-
cies during UV/O3 functionalization treatment [160]. tropic materials such as silicon. The theoretical dielec-
Dit can be calculated with the conventional high-low tric property of 2D materials such as graphene and
frequency and multi-frequency methods using the MoS2 is anisotropic owing to the different nature
following equations of bonds in the in-pane and out-of-plane directions
19
Figure 11. Interface and border trapped charges. (a) Representation of various origins of interface states in a high-k/MoS2 /oxide
structure, where VS is sulfur vacancies. (b) Schematic illustration of the energy band diagrams of interface and border traps
distributed in HfO2 /MoS2 . (c) Dit and time constant of trap states (τit ) as a function of VGS of CVD-grown MoS2 on a SiO2 /Si
substrate [155]. (d) Comparison of high-low frequency and multi-frequency methods of measuring border trap density (Nbt )
and Dit . The difference in trap density shown between 0 and 0.5 V is caused by the border trap response at lower frequencies. The
left and right inset figures show the equivalent circuit including Cit and the extracted τit , respectively [159].
(ε|| and ε⊥ ) [176–178]. Chen et al experimentally time-domain reflectometry, where the ε of hBN
extracted the ε of MoS2 from C–V measurements decreases with an increase in frequency (figures 12(b)
based on vertical MIS capacitor structures by using and (c)) [180]. The confined nature of atomically thin
the following relation: 2D crystals associated with the anisotropic dielectric
screening has created long-term debates whether the
dMoS2
εMoS2 =
1 , (39) dielectric constant truly represents the dielectric fea-
Cmin − C−
−1
g tures of such low-dimensional systems. The ε values
accounted for by both theoretical and experimental
−1 approaches vary by more than an order of magnitude
dMoS2 1 [181]. Therefore, future developments that allow reli-
Cmin = + (40)
εMoS2 Cg able and precise measurements of ε are needed.
where Cmin is the minimum capacitance measured at
VGS < 0 V, dMoS2 is the thickness
of MoS2 , εMoS2 is the 8. Correlating device parameters to
−1 nanoscale material properties
1 1
dielectric constant of MoS2 , Cg = CBN + Cin
is the geometric capacitance, CBN is the geomet- Until this section, we have described the extraction of
ric capacitance of hBN, and Cin is the interlayer electrical parameters in the macroscopic transport of
capacitance originating from the interlayer spacing 2D devices, mainly focusing on FET structures. The
between hBN and MoS2 (figure 12(a)) [179]. device properties and performance are largely affected
The ε as a function of the frequency (dielectric by both intrinsic (vacancies, anti-sites, substitutions,
dispersion) of an hBN-based metal-insulator- and grain boundaries in polycrystalline samples)
metal (MIM) capacitor was demonstrated using and extrinsic (strains due to surface roughness
20
Figure 12. Extraction of the dielectric constants (ε). (a) The ε of MoS2 (εMoS2 ) with (blue dots) and without (green dots)
counting the interlayer capacitance as a function of MoS2 thickness (dMoS2 ) [179]. (b) A schematic illustration (top) and an optical
microscope (OM) image (bottom) of a 32 nm-thick hBN-based MIM capacitor (scale bar of in the OM image: 20 µm). (c) The
extracted ε of hBN as a function of applied frequency. ε remains stable at low frequencies (region I), whereas ε appears smaller at
higher frequencies (region II) since the charges are allowed less time to orient themselves in the direction of the alternating field.
The inset shows the dispersion characteristics of hBN flakes with different thicknesses [180].
and ripples, electron-hole puddles caused by charge density can be calculated using the following equa-
impurities in a SiO2 substrate, chemical adsorbates, 2
tion, n = π1 ℏvEF
, where ℏ is the reduced Planck
polymer residues, etc) disorder [105]. For example, F
the grain boundary in a graphene device can affect the constant, and vF is the Fermi velocity of graphene
sheet resistance depending on the grain size accord- [191, 192]. A space charge region in a 2D semicon-
ing to the equation RSH = RGSH + ρlGB , where RGSH is the ductor, which can be capacitively coupled with the air
G
average sheet resistance of the graphene grains, ρGB is gap between the tip and sample, should be carefully
the average grain boundary resistivity, and lG is the considered for the measurements. Scanning capacit-
average grain diameter [182]. The charge inhomo- ance microscopy, which measures local differential
geneity induced by the SiO2 substrate gives rise to car- capacitance, allows for mapping of the carrier (dop-
rier density fluctuation of up to ~4.5 × 1011 #/cm2 ing) density and polarity profile, as well as the meas-
at the sub-10 nanometer-scale length, as shown in urement of trapped charges and quantum capacitance
figure 13(a) [183, 184]. Mechanical and surface mor- [187, 193, 194].
phology (e.g. a crested substrate)-induced strain can Scanning tunneling microscopy (STM) has
engineer the local bandgap and mobility of 2D mater- become a core technique for exploring the emer-
ials [185, 186]. The influences of the disorder are very gent physics of newly discovered materials. Since the
difficult to characterize solely by macroscopic trans- discovery of 2D materials, this technique has been
port unless nanoscale characterization techniques are widely employed to locally map the atomic struc-
utilized. In this section, we introduce various SPM ture and electronic properties of various 2D materi-
techniques as supporting methods that enable local als [198–200]. Due to the wide application of STM,
characterization of 2D materials correlated with the it has become an ideal tool to reveal the intrinsic
electrical parameters discussed in the previous sec- atomic defects in 2D materials due to the low energy
tions. Detailed reviews on SPMs of nanomaterials and of the tunneling electron, which should leave the
nanoelectronics are also provided in [187, 188]. intrinsic defect structure to remain unaffected. Fig-
Kelvin probe force microscopy (KPFM) is a widely ure 13(d) shows the basic working principle of the
used SPM technique for nanomaterials and nano- STM technique, in which the STM tip (platinum-
electronics. KPFM measures contact potential differ- iridium blend) scans the surface of a sample and
ences (VCPD ) to provide a quantitative measure of measures the tunneling current as a function of the
the work function difference between a sample and distance (d) between the tip and the surface of the
a probe tip. Figure 13(b) shows a schematic illus- sample. The equation of governing√tunneling cur-
2d 2m∆ϕ
tration of a KPFM measurement setup for graphene rent is written as I (d) ∝ eVb × e− ℏ , where m
in which AC (VAC ) voltage generates oscillating elec- is the electron mass, ∆ϕ is the work function dif-
trical forces and DC (VDC ) voltage is applied to nul- ference, ℏ is the reduced Planck constant and V b is
lify the oscillating electric forces when VDC = VCPD the offset bias voltage. The STM imaging technique
[189, 190]. The ∆VCPD (contact potential difference has been applied on various 2D materials, includ-
between electrode and sample) is used to obtain the ing graphene, black phosphorus and TMDCs, to
work function of graphene, which is correlated with reveal the electronic nature of intrinsic defects such
the Fermi energy (EF ) of graphene, a relative energy as point defects, surface defects, dopant impurities,
level with respect to the charge neutral point (CNP), dislocation, and grain boundaries in bulk as well as in
as shown in figure 13(c). For graphene, the carrier atomically thin monolayers [201–206]. An example of
21
Figure 13. (a) Charge density map obtained from an STM dI/dV spectrum revealing charge fluctuation in graphene induced by a
SiO2 substrate [183]. (b) Schematic illustration of KPFM measurement setup and (c) the extracted EF of graphene depending on
the applied gate voltages [189]. (d) Schematic model of the working principle of the STM system. (e) Atomically resolved STM
image of intrinsic tungsten (W) vacancies in multilayer WSe2 . Inset shows an enlarged image. (f) Logarithmic dI/dV spectra for
K/Wvac (red) and intrinsic Wvac (black) in multilayer WSe2 [195]. (g, h) Device schematic and resistance distribution in the
CAFM measurement of the local conductivity of graphene on SiC due to differences in SiC topography [196]. (i) SBH
measurement of metal-MoS2 contacts using the CAFM technique. The technique allows nanoscale mapping of SBH [197].
an STM image of WSe2 is given in figure 13(e) and the of epitaxial graphene on a SiC substrate [196]. The
corresponding dV/dI spectra showing the bandgap device structure is shown in figure 13(g); epitaxial
and defect-induced mid-gap states are depicted in graphene was grown on a 4H-SiC substrate using
figure 13(f). sublimation and then scanned with a Pt-coated Si
Another important surface and electrical charac- tip. The local current in this device differs on the
terization methodology used in the field of 2D mater- (1 1 2̄ n) facets compared to the (0 0 0 1) basal plane
ials is conductive atomic force microscopy (CAFM). terraces, which indicates that the local conductivity
The lateral resolution of CAFM sits right between that of graphene can vary significantly depending on the
of STM and conventional electrical probes. CAFM facets of SiC, as shown in figure 13(h). Another novel
uses an ultrasharp conductive tip to apply electrical application of CAFM is to investigate current trans-
stress on the sample of interest. Typical CAFM sys- port at nanoscale metal-TMDC interfaces, as shown
tems can provide a lateral resolution of ~10 nm, in figure 13(i) [197]. The CAFM tip makes small area
which is adequate for characterizing small chan- contacts with TMDCs such as MoS2 , the surface of
nel (sub-100 nm) 2D devices. In the field of 2D which can be then scanned on the surface to produce
materials, CAFM is generally used to map the lat- a map of the nanoscale contact resistance and SBHs.
eral inhomogeneity in current transport that arises Given the difficulty in fabricating high-quality con-
from several intrinsic and extrinsic factors, such as tacts in 2D materials, CAFM offers a simpler means
charge puddles, polymer residues, grain boundar- of characterizing current transport at the metal-2D
ies, and trap states. Giannazzo et al used CAFM material interface and has the additional advantage of
to determine the substrate-dependent conductivity producing area scans [207].
22
9. Outlook and conclusion funded by the National Research Foundation of Korea

(NRF).
Electrical characterization methods for atomically
thin 2D electronic devices must be revisited since the ORCID iDs
techniques used for conventional 3D-based semicon-
ductors do not properly model 2D devices. Also, chal- Min Sup Choi  https://orcid.org/0000-0002-8448-
lenges remain concerning the characterization of the 4043
electrical properties of anisotropic 2D layered mater- Won Jong Yoo  https://orcid.org/0000-0002-3767-
ials, which show different carrier transport beha- 7969
vior between the in-plane and out-of-plane direc-
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2D Materials

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