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ECE 274 - Digital Logic Digital Design: Lecture 9 - Adders

This document discusses adders used in digital logic design. It describes half adders, full adders, and carry-ripple adders used to add binary numbers. A carry-ripple adder chains together full adders to add multi-bit numbers, but exhibits temporary incorrect results until the carry bits fully propagate. The document also mentions compensating scales that can adjust a reported weight by a user-specified amount.

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0% found this document useful (0 votes)
46 views

ECE 274 - Digital Logic Digital Design: Lecture 9 - Adders

This document discusses adders used in digital logic design. It describes half adders, full adders, and carry-ripple adders used to add binary numbers. A carry-ripple adder chains together full adders to add multi-bit numbers, but exhibits temporary incorrect results until the carry bits fully propagate. The document also mentions compensating scales that can adjust a reported weight by a user-specified amount.

Uploaded by

prabhat atha
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ECE 274 - Digital Logic Digital Design

Lecture 9 Datapath Components: Adders: 2-bit adder

„ Functional Requirements:
„ Lecture 9 - Adders „ Design a circuit that will add two 2-bit binary numbers
„ Half-adders „ Input: A1A0, B1B0
„ Full-adders „ Output: S1S0: sum of inputs
C: carry bit
„ Carry-ripple Adder

1 2

Digital Design Digital Design


Datapath Components: Adders: 2-bit Adder: Truth Table Datapath Components: Adders: 16-bit Adder: Truth Table

a15a14a13a12a11a10a9a8a7a6a5a4a3a2a1a0b15b14b13b12b11b10b9b8b7b6b5b4b3b2b1b0 s15s14s13s12s11s10s9s8s7s6s5s4s3s2s1s0 c

000000000000000000000000000000 0000000000000000

…. ….

16-bit Adder: 16-bits * 2-operands = 32 inputs

Over 4,000,000,000 rows

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Digital Design Digital Design


Datapath Components: Adders: Exponential Growth Datapath Components: Adders: Carry-Ripple

Exponential Growth for Two-Level „ Functional Requirements:


Adder Implementation „ Design a circuit that will add two bits
„ Input: A, B
„ Output: S: sum of inputs
C: carry bit

5 6
Digital Design Digital Design
Datapath Components: Adders: Carry-Ripple Datapath Components: Adders: Carry-Ripple

„ Functional Requirements: Input: A, B


„ Design a circuit that will add two bits Output: S: sum of inputs
„ Input: A, B C: carry bit
„ Output: S: sum of inputs
C: carry bit

C2 C1 C0

A3 A2 A1 A0

B3 B2 B1 B0

S3 S2 S1 S0

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Digital Design Digital Design


Datapath Components: Adders: Carry-Ripple: Half-Adder Datapath Components: Adders: Carry-Ripple: ½ Adder

2) Convert to Equations

1) Capture the Function


co = ab
s = a’b + ab’ = a xor b

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Digital Design Digital Design


Datapath Components: Adders: Carry-Ripple: ½ Adder Datapath Components: Adders: Carry-Ripple: Full Adder

„ Functional Requirements:
„ Design a circuit that will add three bits
„ Input: A, B, Cin
Output: S: sum of inputs
3) Create the Circuit „

C: carry bit

co = ab
s = a’b + ab’ = a xor b

11 12
Digital Design Digital Design
Datapath Components: Adders: Carry-Ripple: Full Adder Datapath Components: Adders: Carry-Ripple: Full Adder

Input: A, B, Cin
Output: S: sum of inputs 2) Convert to Equations
1) Capture the Function
C: carry bit

co = bc + ac + ab
s = a xor b xor c

13 14

Digital Design Digital Design


Datapath Components: Adders: Carry-Ripple: Full Adder Datapath Components: Adders: Carry-Ripple: Full Adder

3) Create the Circuit 4-bit Adder:


Inputs (8-bits): a3a2a1a0, b3b2b1b0
Outputs (5-bits): c0, s3s2s1s0

co = bc + ac + ab
.3ns .3ns .3ns
s = a xor b xor c .8ns

.6ns

For a 4-bit adder composed of full adders, what


would be the soonest time you could expect a
result? A) .9 ns B) 2.3 ns C) 3.6 ns
15 16

Digital Design Digital Design


Datapath Components: Adders: Carry-Ripple: Full Adder Datapath Components: Adders: Carry-Ripple: Full Adder

4-bit Adder:
Inputs (9-bits): a3a2a1a0, b3b2b1b0, cin
Outputs (5-bits): c0, s3s2s1s0

NOTE: Adder will exhibit temporarily incorrect (spurious) results


until the carry bit from the rightmost bit has had a chance to
propagate (ripple) all the way through to the leftmost bit.

17 18
Digital Design Digital Design
Datapath Components: Adders: Carry-Ripple Datapath Components: Adders: Compensating Scale

19 20

Digital Design Digital Design


Datapath Components: Adders: Compensating Scale Datapath Components: Adders: Compensating Scale

„ Functional Requirements:
„ Design a circuit that will weigh an object, and add an
adjustment from a user Adjustment
„ Input: 8-bit Weight Reported by Sensor Knob
3-bit User Adjustment
„ Output: S7..0: sum of inputs

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Digital Design Digital Design


Datapath Components: Adders: Carry-Ripple Datapath Components: Adders

8-bit Carry-Ripple Adder: „ 8-bit Calculator Functional Requirements:


Inputs (16-bits): a7a6a5a4a3a2a1a0, b7b6b5b4b3b2b1b0 „ Design a circuit that will add two eight-bit inputs controlled
Outputs (5-bits): c0, s3s2s1s0 by DIP switches and output the result using eight LEDs
„ Input: A (8-bits), B (8-bits)
„ Output: S (8-bits): sum of inputs

23 24
Digital Design Digital Design
Datapath Components: Adders Datapath Components: Adders

„ 8-bit Calculator Functional Requirements:


„ Design a circuit that will add two eight-bit inputs controlled
by DIP switches and output the result using eight LEDs. The
output should only be updated with the user presses a
calculate button
„ Input: A (8-bits), B (8-bits),
e: input from calculate button
„ Output: S (8-bits): sum of inputs

8-bit DIP switch based adding calculator. The addition 2+3=5 is shown.

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Digital Design
Datapath Components: Adders

8-bit DIP switch-based adding calculator, using a register to block spurious LED outputs.
The LEDs only get updated after the button is pressed, which loads the output register.

27

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