FXi60 FXi250 Exciter Instruction Manual
FXi60 FXi250 Exciter Instruction Manual
FXi60 FXi250 Exciter Instruction Manual
4100 North 24th Street, Quincy, Illinois 62305 USA • Phone (217) 224-9600 • Fax (217) 224-9607 • www.bdcast.com • bdcast@bdcast.com
The information in this publication is subject to improvement and change without notice. Although
every effort is made to ensure the accuracy of the information in this manual, Broadcast Electronics
accepts no responsibility for any errors or omissions. Broadcast Electronics reserves the right to
modify and improve the design and specifications of the equipment in this manual without notice.
Any modifications shall not adversely affect performance of the equipment so modified.
Proprietary Notice
This document contains proprietary data of Broadcast Electronics Inc. No part of this publication may
be reproduced, transmitted, transcribed, stored in a retrieval system, translated into any other
language in any form or by any means, electronic or mechanical, including photocopying or
recording, for any purpose, without the express written permission of Broadcast Electronics.
Trademarks
Broadcast Electronics and the BE logo are registered trademarks of Broadcast Electronics.
Broadcast Electronics
Product Warranty (Two-Year Limited)
BE hereby warrants all new products manufactured by BE against any defects in material or
workmanship at the time of delivery thereof, or that develop under normal use within a period of
two (2) years from the date of shipment.
BE reserves the right to repair equipment under warranty wit h new or refurbished equipment or
parts. BE’s sole responsibility with respect to any equipment or parts not conforming to this
warranty is to replace or repair such equipment upon the return thereof F.O.B. to BE’s factory in
Quincy, Illinois, U.S.A. In the event of replacement pursuant to the foregoing warranty, only the
unexpired portion of the warranty from the time of the original purchase will remain in effect for
any such replacement.
This warranty shall exclude the following products, component parts and/or assemblies:
(a) IPA unit power output tubes shall only carry the original manufacturers’ or suppliers’
standard warranty in effect on their original shipment date.
(b) All computers, computer peripherals, cables, hard disk drives, etc., shall only carry the
manufacturers’ or suppliers’ standard warranty in effect on their original shipment date.
(c) “Components”, defined as separate and individual parts (e.g. transistors, integrated
circuits, capacitors, resistors, inductors, fans, etc), resold by BE from another manufacturer
or supplier, shall only carry a 90 day warranty, effective the date of shipment. Any such
‘Components’ being returned for warranty claim must be (1) returned in their original
packaging and (2) must be in new, unused condition.
BE is unable to process or resolve component defects or performance concerns on
components that have been soldered, installed, wired or in any way altered from their new
condition.
(d) “Resale Equipment”, defined as equipment purchased from another manufacturer or
supplier, then resold by BE, shall only carry such manufacturers’ or suppliers’ standard
warranty in effect as of the original shipment date. All warranty claims against any and all
‘resale equipment’ sold by BE must be filed directly with the original equipment
manufacturer. BE is unable to process or resolve equipment defects or performance
concerns on products or services not manufactured by BE.
This warranty shall not extend to claims resulting from any acts of God, terrorism, war, defects or
failures caused by Purchaser or user abuse or misuse, operator error, or unauthorized attempts to
repair or alter the equipment in any way.
EXCEPT AS SET FORTH HEREIN, AS TO TITLE AND AS SPECIFICALLY REQUIRED BY LAW, THERE ARE
NO OTHER WARRANTIES, OR ANY AFFIRMATIONS OF FACT OR PROMISES BY BE, WITH REFERENCE
TO THE EQUIPMENT, OR TO MERCHANTABILITY, FITNESS FOR A PARTICULAR APPLICATION,
SIGNAL COVERAGE, INFRINGEMENT, OR OTHERWISE, WHICH EXTEND BEYOND THE DESCRIPTION
OF THE EQUIPMENT ON THE FACE HEREOF.
IMPORTANT INFORMATION
RF TECHNICAL SERVICES -
Telephone: +1 (217) 224-9617
E-Mail: rfservice@bdcast.com
Fax: +1 (217) 224-6258
FACILITY CONTACTS -
Broadcast Electronics, Quincy Facility
4100 N. 24th St. P.O. BOX 3606
Quincy, Illinois 62305
Telephone: +1 (217) 224-9600
Fax: +1 (217) 224-6258
General E-Mail: bdcast@bdcast.com
Web Site: www.bdcast.com
PARTS -
Telephone: +1 (217) 224-9617
E-Mail: parts@bdcast.com
MODIFICATIONS -
Broadcast Electronics, reserves the right to modify the design and specifications of the equipment
in this manual without notice. Any modifications shall not adversely affect performance of the
equipment so modified.
SAFETY PRECAUTIONS
ALL PERSONS WHO WORK WITH OR ARE EXPOSED TO POWER TUBES, POWER
TRANSISTORS, OR EQUIPMENT WHICH UTILIZES SUCH DEVICES MUST TAKE
PRECAUTIONS TO PROTECT THEMSELVES AGAINST POSSIBLE SERIOUS BODILY INJURY.
EXERCISE EXTREME CARE AROUND SUCH PRODUCTS. UNINFORMED OR CARELESS
OPERATION OF THESE DEVICES CAN RESULT IN POOR PERFORMANCE, DAMAGE TO THE
DEVICE OR PROPERTY, SERIOUS BODILY INJURY, AND POSSIBLY DEATH.
C. HOT SURFACES Surfaces of air-cooled radiators and other parts of tubes can reach
temperatures of several hundred degrees centigrade and cause serious burns if
touched. Additional information follows.
D. RF BURNS Circuit boards with RF power transistors contain high RF potentials. Do not
operate an RF power module with the cover removed.
Many power circuits operate at voltages high enough to kill through electrocution. Personnel
should always break the primary AC Power when accessing the inside of the IPA unit.
HOT SURFACES –
The power components in the IPA unit are cooled by forced-air and natural convection. When
handling any components of the IPA unit after it has been in operation, caution must always be
taken to ensure that the component is cool enough to handle without injury.
Table of Contents
1 OVERVIEW........................................................................................................................................ 1
1.1 EQUIPMENT DESCRIPTION. ............................................................................................................ 1
1.2 APPLICATIONS. .............................................................................................................................. 4
1.3 EXCITER CONFIGURATIONS, OPTIONS, AND ACCESSORIES. ............................................................ 5
1.4 EQUIPMENT SPECIFICATIONS. ........................................................................................................ 6
2 INSTALLATION ................................................................................................................................ 11
2.1 UNPACKING. ............................................................................................................................... 11
2.2 SHIPMENT – EXCITER RE–INSTALLATION....................................................................................... 11
2.3 INSTALLATION. ............................................................................................................................ 11
2.4 ENVIRONMENTAL CONSIDERATIONS............................................................................................ 11
2.5 PLACEMENT. ............................................................................................................................... 11
2.6 CONNECTIONS. ........................................................................................................................... 12
2.7 INITIAL CHECKOUT. ..................................................................................................................... 23
2.8 INITIAL SETUP. ............................................................................................................................. 24
2.9 INITIAL PROGRAMMING. ............................................................................................................. 24
2.10 INSTALLATION ADJUSTMENTS – CALIBRATION. ............................................................................ 25
2.11 INSTALLATION ADJUSTMENTS – AUDIO FOR INTERNAL SCA. ........................................................ 25
2.12 OPTIONAL EXGINE UPGRADE. ...................................................................................................... 25
2.13 INTERNAL RBDS/RDS DATA ENTRY. ............................................................................................... 25
3 OPERATION. ................................................................................................................................... 26
3.1 CONTROLS AND INDICATORS. ...................................................................................................... 26
3.2 OPERATION. ................................................................................................................................ 26
3.3 FXi USER INTERFACE. ................................................................................................................... 28
3.4 MAIN MENU – DESCRIPTION. ....................................................................................................... 29
3.5 INITIAL FXi PROGRAMMING. ........................................................................................................ 29
3.6 LOG IN.. ...................................................................................................................................... 31
3.7 CARRIER FREQUENCY PROGRAMMING. ........................................................................................ 31
3.8 INTERNAL/EXTERNAL REFERENCE SELECT...................................................................................... 33
3.9 MODULATION PROGRAMMING. .................................................................................................. 34
3.10 PRE-EMPHASIS PROGRAMMING. .................................................................................................. 35
3.11 OPERATING MODE PROGRAMMING............................................................................................. 36
3.12 PILOT PROGRAMMING. ................................................................................................................ 36
3.13 IBOC MODE PROGRAMMING. ...................................................................................................... 38
3.14 COMPRESSOR/LIMITER PROGRAMMING. ...................................................................................... 38
3.15 INTERNAL SCA1 PROGRAMMING. ................................................................................................ 43
1 OVERVIEW
Information presented by this section provides a description of the FXi digital FM/IBOC exciter features and lists
equipment specifications.
IBOC Compatible. With the installation of a plug-in Exgine board and the connection of an XPi-10/XPi-
10 esp Signal Exporter, the FXi exciter will transmit an IBOC signal for digital broadcasting applications.
Operational modes include: 1) FM only, 2) IBOC only, and 3) FM and IBOC.
DTC (Direct–To–Channel). The exciter uses DSP technology to generate an RF carrier on-channel. The
unit is not equipped with a conventional analog RF up-converter stage.
Digital/Analog/Composite Audio Inputs. The FXi audio inputs include: 1) AES/EBU wire, 2) AES/EBU
optical, 3) left and right analog, and 4) composite. These inputs provide the interfacing required for
almost any installation application.
SCA/RBDS – Internal And External. The FXi is equipped with two internal SCA generators and one
RBS/RBDS generator. The operating frequency, deviation, level, and pre-emphasis from each generator
can be programmed from the user interface. The exciter is also equipped with an input for an external
RF SCA/RBDS input for external SCA/RBDS applications.
Color Graphical User Interface. A color graphical interface is used to program and operate the exciter.
The interface is user-friendly and provides programming screens, operating data, and troubleshooting
information. Data is entered into the interface using 11 front-panel soft-keys.
Compressor/Limiter. The FXi is equipped with an internal compressor and limiter. The compressor can
be programmed to provide specific attack times, release times, and threshold of operation. The limiter
can also be programmed for a specific threshold of operation. These features allow the user to
configure the exciter to provide the desired compression and limiting to prevent over-modulation
conditions.
Security. The FXi is equipped with a login system. This prevents unauthorized access to programming
and set-up commands.
Automatic Switching To Backup Source. The FXi is equipped with the ability to switch to a backup
audio source in the event of a failure in the primary audio source. Primary audio source options include
AES/EBU, composite, and analog left/right. Backup audio source options include AES/ EBU, composite,
analog left/right, and none. This allows the FXi to maintain on-air operation during failure periods. In
addition, the FXi allows the switch time for switching back to primary from secondary to be set from 1
second up to 120 seconds via the serial port on the rear of unit.
The FXi circuitry is divided into several assemblies. The assemblies include: 1) a DTC DSP digital exciter circuit
board, 2) a controller circuit board, 3) a 60 or 250 watt RF power amplifier module, 5) a power supply circuit
board, 6) an oscillator/filter circuit board, and 7) a front-panel switch circuit board.
1.1.2 AES/EBU.
AES/EBU is a serial digital audio data format standard used for the transfer of digital data between audio
sources, consoles, and transmitting equipment (refer to Figure 1-2). The signal can be transmitted using RS-422
circuitry and a twisted pair conductor or an optical interface.
An AES/EBU signal can be one of two formats: 1) AES/EBU professional and 2) AES/EBU consumer. The FXi is
designed with the AES/EBU professional format. The AES/EBU professional signal is constructed using a frame.
Each frame consists of two sub-frames. The sub-frames contain digital information for 2 channels. Each sub-
frame consists of: 1) a 4-bit synchronization preamble, 2) 4-bits of auxiliary data, 3) 20 bits of audio data, 4) a
parity bit, 5) a validity bit, 6) a user bit, and 7) a channel status bit.
The AES/EBU signal must be uncompressed and can consist of several different sample rates. The rates range
from 32 kHz to 96 kHz. A typical sample rate is 44.1 kHz. If compression such as MPEG is used at any location
in the audio chain from the cut recording to the input to the exciter, deviation overshoot would occur if the
signal were uncompressed and remained in the digital format. To preclude the overshoot, the exciter is
equipped with a limiter circuit which removes the overshoot to maintain optimum audio signal quality.
1. Receives information from the user interface and programs the exciter operating frequency, frequency
deviation, output power, and many other control functions.
2. Monitors and displays the status of system operating parameters consisting of system voltages,
operating configurations, and power indications.
3. Performs automatic power control operations. The controller will automatically fold back power in
response to high PA current, reflected power, and temperature conditions.
4. Mutes the exciter RF output.
The controller circuit board is equipped with a Motorola Coldfire MCF5272 microprocessor. Data is entered into
the user interface from 11 soft-keys. The controller circuit board also communicates with: 1) an optional N+1
circuit board allows the exciter to be automatically programmed for any one of 8 different frequencies and 2)
an optional IBOC interface circuit board.
1.2 APPLICATIONS.
The FXi is extremely versatile. The following text presents some typical FXi applications.
1.2.1 FM EXCITER.
The primary application for the FXi is an exciter in an FM broadcast transmitter. The FXi provides excellent audio
performance and provides automatic switching to a backup source in the event of a failure in the main audio
source.
909-9250 FXi-250 250 Watt FM Only Digital Exciter, 90V to 264V 50/60 Hz ac
Operation.
PARAMETER SPECIFICATIONS
GENERAL
RF POWER
OUTPUT
FREQUENCY
REFERENCE
Internal Source Stability 10 MHz, +300 Hz, +14˚F to +122˚F (-10˚C to +50˚C).
(TCXO)
External Source Can be locked to an external 10 MHz source such as GPS (global
positioning system). Accuracy is dependent on the reference
source.
AUDIO INPUTS AES/EBU wire and optical, Left & Right analog, one balanced
composite, one unbalanced composite, one SCA/RBDS/RDS
external generator input, and 2 SCA audio inputs.
MODULATION CAPABILITY 75 kHz nominal. +300 kHz maximum. Adjustable from front
panel.
MODULATION INDICATION Digital peak reading, color-coded, LCD display with baseband
over-modulation indicators. 2.5% accuracy on normal scale.
0.25% accuracy on 10% scale.
COMPOSITE INPUT
COMPOSITE INPUT LEVEL 3.5 Vp-p nominal for 100% modulation into 10k ohms. Range: 1
Vp-p to 4.0 Vp-p
INPUT LEVEL +10 dBm nominal for 100% modulation into 600 ohms. Range:
0 dBm to +11 dBm.
CONNECTOR XLR
STEREO SEPARATION 65 dB or better from 20 Hz to 15 kHz. Left into right or right into
left.
AES/EBU INPUT
INPUT LEVEL -2 dBfs for 100% modulation. Up to 96 kHz, 16-24 bits (32,
44.1, or 48 kHz typical sample rates for AES/EBU devices). Range:
0 dBfs to
-30 dBfs.
STEREO SEPARATION 70 dB or better from 20 Hz to 15 kHz. Right into left or left into
right.
STEREO OPERATION
LINEAR CROSSTALK 70 dB below 100% modulation, Main to Sub and Sub to Main.
MONAURAL OPERATION
INPUT LEVEL +10 dBm nominal for 10% deviation into 600 ohms. Range: 0
dBm to +11 dBm.
RBDS/RDS OPERATION –
INTERNAL
FREQUENCY 57 kHz.
INPUT LEVEL 3.5 Vp-p nominal for 10% deviation. Range: 1 Vp-p to 4.0 Vp-p.
CONNECTOR BNC
NOTE
All specifications measured using the Broadcast Electronics FXi digital exciter, a Belar FMSA-1 Precision
Digital FM stereo modulation analyzer, a Belar FMM-2 FM demodulator, and Audio Precisioin APWin
software version 2.14.
PARAMETER SPECIFICATION
PHYSICAL
WEIGHT:
DIMENSIONS:
ENVIRONMENTAL
2 INSTALLATION
This section contains information required for installation and preliminary checkout of the Broadcast Electronics
FXi digital FM/IBOC exciter.
2.1 UNPACKING.
The equipment becomes the property of the customer when the equipment is delivered to the carrier. Carefully
unpack the exciter. Perform a visual inspection to determine that no apparent damage has been incurred during
shipment. All shipping materials should be retained until it is determined that the unit has not been damaged.
Claims for damaged equipment must be promptly filed with the carrier or the carrier may not accept the claim.
The contents of the shipment should be as indicated on the packing list. If the contents are incomplete, or if the
unit is damaged electrically or mechanically, notify both the carrier and Broadcast Electronics.
2.3 INSTALLATION.
Each exciter is assembled, operated, tested, and inspected at the factory prior to shipment and is ready for
installation when received. Prior to installation, this publication should be studied to obtain a thorough
understanding of the operation, circuitry, nomenclature, and installation requirements.
2.5 PLACEMENT.
The FXi may be installed in any convenient location in a 19 inch (48.3 cm) rack within reach of signal and power
cables (refer to Figure 2-1). The unit requires 7 inches (17.78 cm) of vertical space in a 19 inch rack. The exciter
should not be installed directly above or below heat generating equipment. If the unit is to be installed in an
existing BEI transmitter, refer to Appendix A for placement and installation information. Once a rack location is
determined, mount the chassis in the rack using 4 screws.
WARNING
ENSURE ALL PRIMARY POWER IS DISCONNECTED BEFORE
PROCEEDING.
WARNING
2.6 CONNECTIONS.
AUDIO INPUT. The FXi is equipped with several audio inputs. Refer to the following text to connect audio to the
desired FXi audio input.
AES/EBU. AES/EBU audio is interfaced to the AES/EBU connectors on the FXi rear-panel. The signal can be
applied to the exciter using wire or fiber optic cable (refer to Figure 2-2). Refer to Figure 2-2 and connect the
AES/EBU audio to the exciter as shown.
Analog Left/Right. Analog left/right audio is interfaced to LEFT/MONO and RIGHT XLR connectors on the FXi
rear-panel. Refer to Figure 2-3 and connect analog left/right audio to the exciter as shown.
Composite. BAL COMP and UNBAL COMP BNC connectors are provided to interface composite audio to the
FXi. Refer to Figure 2-4 and connect composite audio to the exciter as shown. Typically, the composite signal is
connected to the UNBAL COMP connector. The BAL COMP connector is used if a ground loop problem is
encountered.
SCA1 and SCA2 Audio For Internal SCA Generators. Audio for the internal SCA1 and SCA2 generators are
interfaced to the exciter at the SCA AUDIO J19 connector (refer to Figure 2-5). Refer to Figure 2-5 and connect
SCA audio to the exciter as shown.
External SCA Input. The SCA/RBDS BNC connector is provided to interface SCA information from an external
SCA generator (refer to Figure 2-6). If an external SCA generator is to be used, refer to Figure 2-6 and connect
the SCA signal to the SCA/RBDS connector as shown.
External RBDS/RDS Input. The SCA/RBDS BNC connector can also be used to interface RBDS/RDS information
from an external RBDS/RDS generator (refer to Figure 2-6). The 19 kHz OUT connector provides the 19 kHz
reference signal for the RBDS/RDS encoder unit. If an external RBDS/RDS generator is to be used, refer to Figure
2-6 and: 1) connect the 19 kHz OUT connector to the reference input of the RBDS/RDS encoder and 2) the
output of the generator to the SCA/RBDS connector. An input level of 3.5V P-P (1.24 VRMS) will modulate the
FM carrier at 10% modulation.
RF OUTPUT. The FXi is equipped with a Type - N RF output connector. Refer to Figure 2-1 and connect a coaxial
cable between the RF OUTPUT connector on the exciter rear-panel and the transmitter RF input. For initial
operation, connect the output of the exciter to a 50 Ohm load capable of dissipating the output of the exciter.
WARNING
ENSURE THE EXCITER CHASSIS IS
CONNECTED TO EARTH GROUND.
WARNING
GROUND. Refer to Figure 2-1. The FXi is equipped with a chassis ground terminal. Connect the terminal to
earth ground using braided 18 gauge wire or a copper strap.
RF SAMPLE RECEPTACLE. Figure 2-1 presents the location of the RF sample receptacle. The receptacle is
designed for the connection of a modulation monitor or test equipment. The receptacle will provide a zero dBm
signal at 60 watts for 60 watt modules and a zero dBm signal at 250 watts for 250 watt modules. Connect the
desired equipment to the receptacle as required.
REMOTE CONTROL AND INDICATIONS. Refer to Figure 2-7. The FXi is designed for remote control/indication
operation. Remote control interfacing is provided at 25-pin D-type connector REMOTE J3 on the exciter rear-
panel. J3 pin out information is screened on the rear panel of the FXi. Some older FXi chassis may have
outdated silk screens of REMOTE functions. Refer to Figure 2-7. The exciter will interface with almost any
remote control unit or panel.
The following text presents a description of the remote control and indicator functions.
AFC Relay. An AFC (automatic frequency control) relay is provided to connect to a transmitter AFC input or
control equipment external to the unit. When the FXi is used as an exciter in a transmitter system, the relay
connects to the transmitter controller AFC input. When the FXi is operating as an independent unit, the relay
can be used to control an external alarm. The relay contacts are rated at 125V @ 0.5 ampere and are accessible
at REMOTE J3-1 through J3-3. When an AFC fault occurs, the relay will open. For Broadcast Electronics C-Series,
S-Series, and T-Series transmitters, connect the AFC control line to the normally open terminal. Connect a
ground to the common terminal. The relay is active unless any of the following conditions occur.
1. When a power supply fault occurs.
2. When the PLL circuitry on the DSP board is not locked.
SELECTING POSITIVE OR NEGATIVE REMOTE CONTROL. Refer to Figure 2-7. Jumper J17 on the controller circuit
board (mounted on the left wall of the exciter chassis) provides the appropriate common for positive or
negative remote control operation. The factory default is position 2-3, which provides a ground to the
common. This configures remote control operation for positive control (voltage required to activate a
command). Position 1-2 provides +5V to the common. This is for negative remote control operation (uses a
ground to activate a command). If the jumper is installed, do not connect any wires to the common at J3-5.
If wire is to be connected at J3-5, remove P17. Connect the common to J3-25 (ground) for positive control.
Connect the common to J3-6 (+12V) for negative control.
+12V. +12V dc (100 mA max) is located at J3-6 and J3-7. The +12V dc is used for remote control and
indicator connections.
Temperature Fault Indicator. The remote temperature fault indicator provides a signal to indicate when the RF
amplifier heat sink temperature exceeds the threshold. The temperature fault indicator is located at J3-8. The
indicator will be enabled (logic Low) to indicate the presence of an RF amplifier heat sink temperature fault
condition.
Remote Forward Power Meter Indications. The remote forward power meter indications are located at J3-9.
This forward power output will be 2 volts for a FXi 60 at 60W output. The FXi 250 will output 4 volts at 250W
output when TX type is selected as T-Series and 4 volts for all other types. This voltage will change in a
logarithmic fashion when the TX type is selected as a T-Series and linearly for all other types for both the FXi 60
and 250.
Remote Reflected Power Meter Indications. The remote reflected power meter indications are located at J3-10.
The reflected power meter indication will output a +2 volt dc signal when the reflected power is 3 watts for 60
watt units or 12 watts for 250 watt units.
Raise Power Level Control. The raise power level control is located at J3-11. The function can be activated using
positive or negative control. Positive control requires the use of a momentary or sustained contact to a +5 volt
to +15 volt dc signal to raise the FXi power level. Negative control requires the use of a momentary or
sustained contact to ground to raise the FXi power level. Also refer to SELECTING POSITIVE OR NEGATIVE
REMOTE CONTROL above.
Lower Power Level Control. The lower power level control is located at J3-12. The function can be activated
using positive or negative control. Positive control requires the use of a momentary or sustained contact to a +5
volt to +15 volt dc signal to lower the FXi power level. Negative control requires the use of a momentary or
sustained contact to ground to lower the FXi power level. Also refer to SELECTING POSITIVE OR NEGATIVE
REMOTE CONTROL above.
Fault Reset Control. The fault reset control is located at J3-13. The function can be activated using positive or
negative control. Positive control requires the use of a momentary or sustained contact to a +5 volt to +15 volt
dc signal to reset a fault condition. Negative control requires the use of a momentary or sustained contact to
ground to reset a fault condition. Also refer to SELECTING POSITIVE OR NEGATIVE REMOTE CONTROL above.
MUTE. The mute control input is used to enable/disable exciter operation. The control is located at J3-14. The
control can be activated using positive or negative control. Positive control requires the use of a sustained
contact to a +5 volt to +15 volt dc signal to enable exciter operation. Negative control requires the use of a
sustained contact to ground to en able exciter operation. For BEI T-Series and C-Series transmitters, use positive
control. For BEI S-Series transmitters, use negative control. Also refer to SELECTING POSITIVE OR NEGATIVE
REMOTE CONTROL above.
VSWR Fault Indicator. The remote VSWR fault indicator provides a signal to indicate when a 1.5: 1 or greater
VSWR condition is present at the FXi RF power output. The VSWR fault indicator is located at J3-16. The
indicator will be enabled (logic Low) to indicate the presence of a VSWR fault condition.
Power Supply Fault Indicator. The power supply fault indicator provides a signal to indicate when a power
supply fault has occurred. The fault will be enabled when: 1) the ±16V, +8V, +24V, or +48V supply is out of
tolerance, 2) the heat sink temperature is above the threshold, or 3) the bulk supply is less than 350V. The
power supply fault indicator is located at J3-17.
Total PA Current Meter Indications. Total PA current meter indications are located at J3-18. The PA current
meter will output a +2 volt dc signal when the PA current is 12 Amperes for 250W models or 4 Amperes for
60W models.
PAV (+48) Volt Power Supply Sample. A sample of the PAV (+48) volt power supply is located at J3-19. The
supply sample will output a +2 volt dc signal when the PAV voltage is at +48 volts.
Remote Bypass Operation. For operation in IBOC mode the FXi has two outputs for controller external audio
bypass equipment. Channel 1 is located at J3-15 and channel 2 is located at J3-20. If there are no major faults
in the FXi or FSI/XPi 10 channel 1 will toggle high and low and channel 2 will be held high. If a major fault
occurs in the FXi or FSI/XPi 10 channel 1 will be held high and channel 2 will toggle high and low.
Primary Audio Input Select Control. The primary audio input select control is located at J3-21. The function
allows the primary audio source to be placed on-the-air. The function can be activated using positive or
negative control. Positive control requires the use of a +5 volt to +15 volt dc signal to select the primary audio
input source. Negative control requires the use of a contact to ground to select the primary audio input source.
A sustained contact is required to select and maintain the primary audio source. When the contact is released:
1) the primary audio source will remain selected and 2) automatic switching will be enabled. For operation with
remote control devices such as a Burk, use a latching relay to perform this task.
Backup Audio Input Select Control. The backup audio input select control is located at J3-22. The function
allows the backup audio source to be placed on-the-air. The function can be activated using positive or negative
control. Positive control requires the use of a +5 volt to +15 volt dc signal to select the backup audio input
source. Negative control requires the use of a ground to select the backup audio input source. A sustained
contact is required to select and maintain the backup audio source. When the contact is released: 1) the backup
audio source will remain selected and 2) automatic switching will be enabled. For operation with remote
control devices such as a Burk, use a latching relay to perform this task. Also refer to SELECTING POSITIVE OR
NEGATIVE REMOTE CONTROL above.
Ground. Circuit ground located at J3-23 through J3-25. The ground is used for remote control and indicator
connections.
FSI Status. The FSI status is located at J3-4 and is used only when the FXi is configured for IBOC operation. The
input is enabled (logic Low) when a fault occurs in the FSI IBOC signal generator. The input connects to the
audio bypass 13 + terminal on the FSI.
EXTERNAL 10 MHz INPUT. Refer to Figure 2-1. The FXi is equipped with an external 10 MHz REFERENCE input.
The input is designed for the connection of a 10 MHz source such as from the output of a GPS receiver. If an
external source is connected: 1) the source provides backup operation for the internal source and 2) allows the
user to lock the unit to the external source. The input impedance is 50 Ohms. Ensure the source has a level
between 0.3V to 1V peak-to-peak (+1 to +10 dBm).
USB PORT. The FXi is equipped with USB port J12. The port is provided for future use.
SERIAL PORT. The FXi is equipped with serial port J10. The port is used to enter RBDS/RDS data into the internal
FXi generator. Refer to RBDS/RDS PROGRAMMING in SECTION III, OPERATION to enter data into the internal
RBDS/RDS generator.
AC POWER CONNECTIONS.
The FXi is equipped with a switching power supply circuit board. The power supply automatically switches
between 117V and 220V operation. AC line overload protection is provided by a built-in ac on/off/circuit
breaker ac input module. Connect the FXi to any 90V to 264V 50/60 Hz ac power source.
The procedures to calibrate the FXi audio sources is presented in SECTION III, OPERATION. Refer to AUDIO
INPUT - SETUP/SELECTION/CALIBRATION to setup and calibrate the FXi audio sources, Figure 3-31.
3 OPERATION
This section identifies all controls and indicators associated with the FXi digital FM/IBOC exciter and provides
standard operating procedures.
3 LCD Panel This is the primary user interface for displaying internal
conditions and for controlling operation. The adjacent
soft-keys are the input for menus.
4 FXi Soft-Keys Buttons The FXi is equipped with 11 front-panel soft-keys. Soft-
keys are keys that change functionality with the type of
menu being displayed on the LCD panel. The keys are
part of a graphical interface that is used to program and
operate the exciter. The buttons are labeled by the
adjacent test.
6 Power Supply Diagnostic Several LEDs indicate the status of power supply
Indicators voltages. Refer to paragraph 5-26.
3.2 OPERATION.
INTERNAL SCA2 Menu. Internal SCA2 setup parameters are presented by the Internal SCA2 menu. The menu
controls parameters such as operating mode, frequency, deviation, injection level, and pre-emphasis.
INTERNAL RBDS Menu. Internal RBDS/RDS setup parameters are presented by the Internal RBDS menu. The
menu controls parameters such as operating mode and injection level.
DIAG Menu. The Diagnostics Menu presents the exciter fault and troubleshooting information. The menu is
equipped with raise/lower power buttons, a 10 MHz reference status display, PA current and temperature
display, a display containing all the system dc voltages, and a display providing troubleshooting information. A
fault reset button allows a fault condition to be cleared.
AUDIO INPUT Menu. The Audio Input Menu contains several displays and allows audio inputs to be calibrated.
A 30 segment color coded audio meter automatically switches to the active source (either AES/EBU, composite,
or analog left/right) and presents the level. An active audio input display presents which audio input is being
used by the exciter. An AES/EBU sample display presents the sampling rate at the AES/EBU receptacle. This can
be from: 1) the studio for non-IBOC applications or 2) the IBOC circuit board if installed. If an IBOC circuit board
is installed, the rate will be 44.1 kHz. A primary/backup button allows audio sources to be assigned as the
primary and the backup. Several calibration buttons allow the input audio sources such as the AES/EBU source
to be calibrated. An EXT SCA/RBDS setup button allows the external SCA to be enabled and programmed for
the appropriate level.
LOG IN Menu. The FXi is equipped with a security system. The system is equipped several programmable
parameters. The parameters are programmed using the Log In menu. The parameters include automatic/manual
log out and enable/disable the security system.
NOMENCLATURE DESCRIPTION
GENERAL FAULT Illuminates to indicate a VSWR FAULT, TEMP FAULT, PWR SUPPLY
FAULT, or FREQ UNLOCK fault condition. In addition, the indicator
will illuminate to indicate any of the following fault conditions: 1)
PA RF input high/low, 2) RF output low, 3) loss of AES/EBU, 4) loss
of the 44.1 kHz clock, (IBOC circuit board only), 5) final 1, final 2,
IPA, or driver current out-of-tolerance, 6) +16V, +12.5V, +5V,
+3.3V, +1.8V, +1.5V, +7.5V out-of-tolerance, 7) DSP
communication fault, 8) loss of composite, and 9) A/D and sample
rate converter clock errors.
PWR SUP FAULT Illuminates to indicate one of the following conditions on the
power supply circuit board: 1) +16V out-of-tolerance, 2) +7.5V
out-of-tolerance, 3) +24V out-of-tolerance, 4) PAV (+48V) out-
of-tolerance, 5) the heatsink temp is above the threshold, 6) the
bulk supply is below 350 volts.
FWD PWR Forward power display. Displays the exciter forward power output
in watts.
RFL PWR Reflected power display. Displays the exciter reflected power in
watts.
The pilot can be enabled/disabled and configured for the desired injection level using the Operating Mode
Menu. The default pilot mode is ON. The default pilot level is 10.0%. If composite is the active source, the pilot
is automatically set to off. To determine the audio input, from Main Menu, press AUDIO INPUT. The ACTIVE
AUDIO INPUT status display shows the active input. To set up the pilot operating parameters, proceed as
follows:
1. Refer to Figure 3-9.On the Main Menu, depress OPERating MODE. The Operating Mode Menu will
appear.
2. Depress PILOT ON to enable the pilot or PILOT OFF to disable the pilot. Modulation is automatically
adjusted to maintain the desired deviation when the pilot is operated to on or off. If PILOT ON or PILOT
OFF are grayed out, the audio source is not compatible with an internally generated pilot tone.
3. To enter the desired pilot injection level, proceed as follows:
A. Depress PILOT LEVEL. The Pilot Level Menu will appear (refer to Figure 3-10).
1. On the Main Menu, depress INTERNAL SCA1. The Internal SCA1 Menu will appear (refer to Figure 3-17).
2. To enable SCA1, depress SCA1 ON. To disable SCA1, depress SCA1 OFF. The SCA1 operating mode will
appear in the SCA1 Operating Mode status display.
3. To program the SCA1 frequency, proceed as follows:
A. Depress SCA1 FREQ. The Internal SCA1 Frequency Menu will appear (refer to Figure 3-18).
B. Select 67 kHz FREQ for 67 kHz operation or 92 kHz FREQ for 92 kHz operation. The selected SCA1
frequency will appear in the SCA1 Frequency status display.
C. If a custom frequency is desired, proceed as follows:
1. Select CUSTOM FREQ. The Internal SCA1 Custom Frequency Menu will appear (refer to Figure 3-19).
2. Using the menu numeric keys, enter the desired frequency. The frequency can be from 20 kHz to 99
kHz. If a data entry error occurs, depress ENTER at any time to back up to the previous menu. The
data will not be saved until 2 digits are entered and the ENTER button is depressed.
3. When finished, depress ENTER. Press BACK or MAIN for more menus.
1. On the Main Menu, depress INTERNAL SCA2. The Internal SCA2 Menu will appear (refer to Figure 3-23).
2. To enable SCA2, depress SCA2 ON. To disable SCA2, depress SCA2 OFF. The selected SCA2 operating mode
will appear in the SCA2 Operating Mode status display.
3. To program the SCA2 frequency, proceed as follows:
A. Depress SCA2 FREQ. The Internal Program SCA2 Frequency Menu will appear (refer to Figure 3-24).
B. Select 67 kHz FREQ for 67 kHz operation or 92 kHz FREQ or 92 kHz operation. The selected SCA2
frequency will appear in the SCA2 Frequency status display.
C. If a custom frequency is desired, proceed as follows:
1. Select CUSTOM FREQ. The Internal SCA2 Custom Frequency Menu will appear (refer to Figure 3-25).
2. Using the menu numeric keys, enter the desired frequency. The frequency can be from 20 kHz to 99
kHz. If a data entry error occurs, depress ENTER at any time to back up to the previous menu. The
data will not be saved until 2 digits are entered and the ENTER button is depressed.
3. When finished, depress ENTER. Press BACK or MAIN for more menus. The selected SCA2 frequency
will appear in the SCA2 Frequency status display.
2. Using the menu numeric keys, enter the desired deviation. The deviation can be from 2.5 kHz to 10
kHz. If a data entry error occurs, depress ENTER at any time to back up to the previous menu. The
data will not be saved until the correct number of digits (2 for deviations below 9.9 kHz and 3 for
10.0 kHz) are entered and the ENTER button is depressed. The selected SCA2 deviation will appear
in the SCA2 deviation status display.
3. When finished, depress ENTER. Depress MAIN or BACK for more menus.
5. To program the SCA2 level, proceed as follows:
A. From SCA2 menu depress SCA2 LEVEL. The Internal Program SCA2 Level Menu will appear (refer to
Figure 3-28).
B. Using the menu numeric keys, enter the desired level. The level can be from 2% to 15% in 0.1%
increments. If a data entry error occurs, depress ENTER at any time to back up to the previous menu.
The data will not be saved until the correct number of digits (2 for levels below 9.9% and 3 for levels
above 10%) are entered and the ENTER button is depressed.
C. When finished, depress ENTER. The selected SCA2 level appears in the SCA2 LEVEL status display.
6. To program the SCA2 pre-emphasis, select 50 μS PREEMP for 50 μS operation, 75 μS PREEMP for 75 μS
operation, or 150 μS PREEMP for 150 μS operation. The selected SCA2 pre-emphasis will appear in the
SCA2 Pre-emphasis status display.
7. When finished, depress BACK.
NOMENCLATURE DESCRIPTION
AUDIO INPUT METER A 30 segment color coded bargraph display presenting the audio
source input level. The range is from 0 to 150% in 5%
increments.
AES/EBU SAMPLE The AES/EBU sample display is a status display presenting two
parameters. The FM display presents the sampling rate from the
studio in non-IBOC installations or the sampling rate from the
IBOC interface circuit board. With the IBOC interface circuit board
installed, the rate will be 44.4 kHz.
PRI/BACK SETUP Used to assign the primary and backup audio sources.
AES/EBU CAL Selects a menu used to select the AES/EBU source (either wire or
optical) and calibrates the AES/EBU audio input level.
L&R CAL Selects a menu used to calibrate the analog left/right audio input
level.
SCA/RBDS SETUP This button accesses the internal SCA menu and internal RBDS
menu. In-addition, the button accesses an external SCA/RBDS
setup menu and an external SCA/RBDS calibration menu.
COMP CAL Selects a menu used to calibrate the composite input level.
2. To assign the primary audio source, depress: 1) PRIMARY AES/EBU to assign AES/EBU as the primary source,
2) PRIMARY COMP to assign composite as the primary source, or 3) PRIMARY LEFT/RGT to assign analog
left/right as the primary source. A source cannot be assigned as both the primary and backup. If analog
LEFT/RIGHT is selected, the backup will automatically be configured to NONE. If COMPOSITE is selected as
the primary or backup source and COMPOSITE is active, the pilot is automatically set to off. No pilot will
appear on the modulation meter. The selected source will appear in the PRIMARY AUDIO INPUT status
display.
3. To assign the backup audio source, depress: 1) BACKUP AES/EBU to assign AES/EBU as the backup source,
2) BACKUP COMP to assign composite as the backup source, 3) BACKUP LEFT/RGT to assign analog
left/right as the backup source, or 4) NO BACKUP for systems with no backup audio source. A source
cannot be assigned as both the primary and backup. The selected source will appear in the BACKUP AUDIO
INPUT status display.
4. When finished, depress BACK.
Enter the return–to primary delay time. The new time is effective immediately. Remove the serial connection
from the rear of the FXi when done
Audio Level For Internal SCA Figure 2-5 Nominal – +10 dBm
(No calibration required) Range – 0 dBm to +11 dBm
3.18.3 PRE–CALIBRATION.
Prior to calibrating any audio input signal, the modulation deviation must be assigned. Ensure the
modulation is assigned before proceeding by performing the MODULATION PROGRAMMING in the
preceding text.
Prior to calibrating the AES/EBU signal, the desired modulation deviation must be assigned. If the
modulation deviation has not been assigned, access the menu by using the MOD SETUP button on the
Audio Input Menu and assign the desired modulation deviation.
1. The AES/EBU source can be calibrated using two methods. One method is to select AES/EBU as the
primary source. This allows the level to be viewed and remain on the meter during the entire
calibration process. The second method is to not select the AES/EBU source as the primary. In this
case, the unit will automatically switch and select the AES/EBU source as the primary. The levels will
appear on the meter only during the actual calibration process. When the calibration process is
finished, the unit will automatically return to the selected primary source.
2. Ensure the exciter is off–the–air and depress AES/EBU CAL. The AES/EBU Setup/Cal Menu will appear.
3. Depress AES/EBU WIRE to select the XLR wire input or AES/EBU OPTICAL to select the TOSLINK
optical input.
1. The left/right source can be calibrated using two methods. One method is to select left/right as the primary
source. This allows the level to be viewed and remain on the meter during the entire calibration process.
The second method is to not select the left/right source as the primary. In this case, the unit will
automatically switch and select the left/right source as the primary. The levels will appear on the meter only
during the actual calibration process. When the calibration process is finished, the unit will automatically
return to the selected primary source.
2. Ensure the exciter is off the air and from Audio Input Menu depress L&R CAL. The Analog Left/Right
Calibration Menu will appear.
3. Prior to calibrating the analog left/right signal, the desired modulation deviation must be assigned. If the
modulation deviation has not been assigned, access the menu by using the MOD SETUP button on the
Audio Input Menu and assign the desired modulation deviation.
4. Ensure all internal and external SCA/RBDS signals are disabled.
5. Refer to Figure 2-3. Apply the analog left/right audio source to the FXi at a nominal level of +10 dBm. The
input level range is from 0 dBm to +11 dBm.
6. Depress CAL L&R. A Calibrating Now message will appear during the calibration process. The level will
appear on the meter.
7. If desired, the level can be adjusted manually by pressing the LEFT CH LOWER, LEFT CH RAISE, RIGHT CH
LOWER, and RIGHT CH RAISE so that the indicated level on both bars is 100. If an exact meter indication is
not obtained, adjust the input level from the external source slightly to achieve the desired meter indication.
8. When finished, depress BACK.
1. Refer to Figure 2-4, Figure 2-2, and Figure 2-3 for input locations. The main–channel audio source
(COMPOSITE, AES/EBU, or LEFT/RIGHT) input source must be disconnected during the SCA/RBDS calibration
process. If these sources are used, temporarily disconnect the sources.
2. Ensure the exciter is off–the–air and, from the Audio Input Menu, depress SCA/ RBDS SETUP. The SCA/RBDS
Setup/Cal Menu will appear (refer to Figure 3-35).
3. To enable external SCA/RBDS operation, depress EXT SCA/RBDS ON. To disable RBDS operation, depress EXT
SCA/RBDS OFF. The selected external SCA/RBDS operating mode will appear in the EXTERNAL SCA/RBDS
status display.
4. To program the external SCA/RBDS level, proceed as follows:
A. Depress EXT SCA/RBDS LVL. The External SCA/ RBDS Level Menu will appear (refer to Figure 3-36).
B. Using the menu numeric keys, enter the desired level. The level can be from 2% to 15% in 0.1%
increments. If a data entry error occurs, depress ENTER at any time to back up to the previous
menu. The data will not be saved until the correct number of digits (2 for levels below 9.9% and 3
for levels above 10%) are entered and the ENTER button is depressed. Example – 2.5 or 10.5.
C. When finished, depress ENTER. The selected level appears in the EXTERNAL SCA/RBDS LEVEL status
display. Prior to calibrating the external SCA/RBDS signal, the desired modulation deviation must be
assigned. If the modulation deviation has not been assigned, access the MOD menu and assign the
desired modulation deviation.
5. Ensure all internal SCA/RBDS signals are disabled.
6. Refer to Figure 2-6. Apply the external SCA/RBDS source to the FXi at a nominal level of 3.5 volts peak–to–
peak. The input level range is from 1.0 to 4.0 volts peak–to–peak.
7. Depress CAL EXT SCA/RBDS. A CALIBRATING NOW message will appear during the calibration process. The
level will appear on the meter.
8. If desired, the level can be adjusted manually by pressing the EXT SCA LOWER and EXT SCA RAISE so that
the indicated level is the same as the selected level which is displayed in the EXTERNAL SCA/RBDS LEVEL
status display (typically 10.0%). If an exact meter indication is not obtained, adjust the input level from the
external source slightly to achieve the desired meter indication.
9. The internal SCA and RBDS menus can be accessed from the External SCA/ RBDS Setup/Cal Menu if desired.
Depress: 1) INT SCA1 SETUP to configure SCA1, 2) INT SCA2 SETUP to configure SCA2, or 3) INT RBDS
SETUP to configure the internal RBDS source.
10. When finished, depress BACK. Reconnect the sources which were disconnected in step 1.
1. The composite source can be calibrated using two methods. One method is to select composite as the
primary source. This allows the level to be viewed and remain on the meter during the entire calibration
process. The second method is to not select the composite source as the primary. In this case, the unit will
automatically switch and select the composite source as the primary. The levels will appear on the meter
only during the actual calibration process. When the calibration process is finished, the unit will
automatically return to the selected primary source.
2. Refer to Figure 2-6. The external SCA/RBDS input source if used must be connected and calibrated prior to
composite calibration. If the external SCA/RBDS input is used, ensure the source is calibrated and enabled.
3. Ensure the exciter is off the air and, from the Audio Input Menu, depress COMP CAL. The Composite
Calibration Menu will appear (refer to Figure 3-37).
4. Prior to calibrating the composite signal, the desired modulation deviation must be assigned. If the
modulation deviation has not been assigned, access the menu by using the MOD SETUP button on the
Audio Input Menu and assign the desired modulation deviation.
5. Ensure all internal SCA/RBDS signals are disabled.
6. Refer to Figure 2-4. Connect the composite source to the BAL COMP or UNBAL COMP connector. Apply the
composite audio source to the FXi at a nominal level of 3.5 volts peak–to–peak. The input level range is
from 1.0 to 4.0 volts peak–to–peak.
7. If the source is connected to the BAL COMP connector, depress CAL BAL. If the source is connected to the
UNBAL COMP connector, depress CAL UNBAL. A CALIBRATING NOW message will appear during the
calibration process. The level will appear on the meter.
8. If desired, the level can be adjusted manually by pressing the BAL LOWER, BAL RAISE, UNBAL LOWER, and
UNBAL RAISE so that the indicated level on both bars is 100. If an exact meter indication is not obtained,
adjust the input level from the external source slightly to achieve the desired meter indication.
9. When finished, depress BACK. Reconnect the SCA/RBDS input, if used.
3. To lower the output power, depress LOWER POWER to decrease the output power. The exciter forward
power will be presented on the FWD PWR display. The exciter reflected power will be presented on the RFL
PWR display.
LOG OUT
BUTTON
The following procedure assumes that PC communications have been established. To enter rbds/rda data,
proceed as follows:
1. Depress Enter. The RBDS/RDS data entry menu will appear (refer to Figure 3-45).
2. The PI (Program Identification) code is the station identification (call letters in the U.S.). For U.S. RBDS
stations with 4 character identification, the code is calculated by the software using the entered call letters
for the station. For U.S. RBDS systems with 3 character call letters, the code is determined by Table 3-5 and
the h command detailed below section B. For European RDS systems utilize the h command detailed below
in section B.
A. For U.S. RBDS stations with 4 character identification (call letters), proceed as follows:
1. Depress c. The PI call letter menu will appear (refer to Figure 3-46).
2. Enter the station identification (call letters). The letters can be either upper or lower case. The
menu will display all upper case letters.
In order to continue you must know the program type codes for the station which you are programming.
3. Enter the program type as follows:
A. For RDS systems, refer to Table 3-6 and Table 3-7 and select the program type code. For RDS
systems, refer to Table 3-8 and Table 3-9 and select the program type code. Select the code that
matches the program material to be broadcast.
B. Depress t. The PTY code entry menu will appear (refer to Figure 3-48).
C. Enter the code. For codes 1 thru 3, depress Enter.
17 Soft Rhythm And Blues Rhythm and blues with a generally soft
tempo.
people.
4. In order to continue you must know the frequencies of seven or fewer alternate broadcast stations.
Typically, these are frequencies of related stations with similar material that the listener can tune to if the
current station cannot be received. Enter the frequencies in the following format: 89.9 or 102.9.
A. Depress 1 to enter a frequency; enter 0 to erase a frequency. The alternate frequency entry menu will
appear (refer to Figure 3-49).
B. Enter the frequency.
C. Repeat the procedure for up to 7 frequencies which will be retained.
4 BLOCK DIAGRAMS
This section presents the block diagrams for the FXi digital FM/IBOC exciter.
5 MAINTENANCE
This section provides general maintenance information, electrical adjustment procedures, and troubleshooting
information for the FXi digital FM exciter.
Low voltages are used throughout the exciter circuitry with the exception of the power supply circuit board, the
rear-mounted AC on/off switch, and the front-panel switch circuit board. The power supply circuit board and
the front-panel switch circuit board contain hazardous voltages and must not be accessed when power is
energized. Hazardous voltages on the power supply circuit board are present for approximately 5 minutes after
ac power is disconnected. Never remove the side-panel and apply ac power. Maintenance with power energized
is always considered hazardous and caution should be observed.
WARNING
ENSURE ALL PRIMARY POWER IS DISCONNECT FROM THE
EXCITER BEFORE ATTEMPTING EQUIPMENT MAINTENANCE.
WARNING
5.4 ADJUSTMENTS.
5.4.1 CONTROLLER CIRCUIT BOARD.
FORWARD POWER CALIBRATION. The forward power circuit on the controller circuit board is calibrated by
adjusting forward power calibration control R40 (refer to Figure 5-1). This control is to be adjusted only when
the exciter PA module is replaced. To calibrate the forward power circuitry, proceed as follows:
Required Equipment. The following tools and equipment are required for the adjustment procedures.
A. Insulated adjustment tool.
B. FXi–60: Non–inductive, 100 watt, 50 Ohm test load. FXi – 250: Non–inductive, 300 watt, 50 Ohm test
load.
C. Coaxial Type–N Accessory Cable.
D. Calibrated 50 Ohm in–line wattmeter.
Procedure. To adjust forward power calibration control R40, proceed as follows:
WARNING
DISCONNECT THE EXCITER PRIMARY POWER BEFORE
PROCEEDING.
WARNING
WARNING
DO NOT TOUCH ANY COMPONENT WITHIN THE EXCITER
WITH POWER APPLIED.
WARNING
5. Refer to Figure 5-1 and adjust forward power calibration control R40 to adjust the output power on the
wattmeter to equal the value displayed on the Main Menu FWD PWR display (Figure 5-2).
WARNING
DISCONNECT THE EXCITER PRIMARY POWER BEFORE
PROCEEDING.
WARNING
NOMENCLATURE DESCRIPTION
GENERAL FAULT Illuminates to indicate a VSWR FAULT, TEMP FAULT, PWR SUPPLY
FAULT, or FREQ UNLOCK fault condition. In addition, the indicator
will illuminate to indicate any of the following fault conditions: 1) PA
RF input high/low, 2) RF output low, 3) loss of AES/EBU, 4) loss of the
44.1 kHz clock, (IBOC circuit board only) 5) final 1, final 2, IPA, or
driver current out-of-tolerance, 6) +16V, +12.5V, +5V, +3.3V,
+1.8V, +1.5V, +7.5V out-of-tolerance, 7) DSP communication fault,
8) loss of composite, and 9) A/D and sample rate converter clock
errors.
PWR SUP FAULT Illuminates to indicate one of the following conditions on the power
supply circuit board: 1) +16V out-of-tolerance, 2) +7.5V out-of-
tolerance, 3) +24V out-of-tolerance, 4) PAV (+48V) out-of-tolerance,
5) the heatsink temp is above the threshold, 6) the bulk supply is
below 350 volts.
NOMENCLATURE DESCRIPTION
GENERAL FAULT Illuminates to indicate a VSWR FAULT, TEMP FAULT, PWR SUPPLY
FAULT, or FREQ UNLOCK fault condition. In addition, the indicator
will illuminate to indicate any of the following fault conditions: 1) PA
RF input high/low, 2) RF output low, 3) loss of AES/EBU, 4) loss of the
44.1 kHz clock, (IBOC circuit board only) 5) final 1, final 2, IPA, or
driver current out-of-tolerance, 6) +16V, +12.5V, +5V, +3.3V,
+1.8V, +1.5V, +7.5V out-of-tolerance, 7) DSP communication fault,
8) loss of composite, and 9) A/D and sample rate converter clock
errors.
PWR SUP FAULT Illuminates to indicate one of the following conditions on the power
supply circuit board: 1) +16V out-of-tolerance, 2) +7.5V out-of-
tolerance, 3) +24V out-of-tolerance, 4) PAV (+48V) out-of-tolerance,
5) the heatsink temp is above the threshold, 6) the bulk supply is
below 350 volts.
FWD PWR Forward power display. Displays the exciter forward power output in
watts.
RFL PWR Reflected power display. Displays the exciter reflected power in watts.
The display will illuminate red when the FXi is in a VSWR foldback or
VSWR shutdown condition. Foldback is a response to a VSWR
condition between 1.5:1 and 1.9:1. Shutdown is a response to a
VSWR condition greater than 2.0:1.
10 MHz STATUS Displays the status of the 10 MHz reference. The display will present
either INTERNAL or EXTERNAL. The display will illuminate red when
the FXi detects a fault in the selected reference and will automatically
switch the other reference if present.
ACTIVE AUDIO INPUT Audio input status display. The display will present the active on-air
audio input. The options are AES/EBU, composite, or analog left/right.
The display will illuminate and remain red when the exciter switches
to the backup audio input if selected.
PA CURRENTS & TEMP Presents the status of the power amplifier module: 1) final 1 current,
2) final 2 current, 3) IPA current, 4) driver current, and 5)
temperature. Each individual display will illuminate and remain red
when the parameter is out-of-tolerance.
SYSTEM VOLTAGES Presents the status of the system power supply voltages. The voltages
include: 1) PAV, 2) +16 volts, 3) -16 volts, 4) +12.5 volts, 5) -12.5
volts, 6) +7.5 volts, 7) +5 volts, 8) -5 volts, 9) +3.3 volts, 10) +1.8
volts, and 11) +1.5 volts. Each individual display will illuminate and
remain red when the parameter is out-of-tolerance.
FAULT ANALYSIS Presents a detailed description of the fault and the most likely
trouble-shooting remedy.
RAISE POWER Button Increases the FXi forward power when depressed using a Button two-
speed control function. When depressed and released, the power will
increase in small increments. When depressed and held, the power
will increase rapidly.
LOWER POWER Button Decrease the FXi forward power when depressed.
The FXi will only switch to the backup audio input source. Backup SCA or RBDS input configurations are not
supported. For example, if the internal SCA/RBDS generators are enabled and the primary audio input source
faults, the FXi will switch to the backup source and the SCA/RBDS generators will continue to operate. If
Composite with SCA/ RBDS included in the composite signal is the primary source and a fault is encountered,
the unit will automatically switch to the backup source. With the fault in the composite signal, SCA/RBDS
operation will be disabled. The internal SCA/RBDS generators can be manually enabled if desired.
If AES/EBU is selected as the primary source and a fault is encountered, the FXi will switch to the backup source
if selected. When the AES/EBU signal returns, the FXi will automatically switch back to the primary AES/EBU
signal. Automatic switching back to the primary source is only possible with the AES/EBU signal.
OVERALL
POWER On
INDICATOR
FAULT Off
INDICATOR
MAIN MENU
Forward Power
FXi-60 5W to 60W
Reflected Power
FXi-60 1W to 2W
DIAGNOSTIC
MENU
Forward Power
FXi-60 5W to 60W
Reflected Power
FXi-60 1W to 2W
FXi-250 2W to 6W
FXi-60
Final 1 0.5A to 1.5A
FXi-250
Final 1 3.5A to 6.5A
PAV Power adjust voltage. Varies with output power. For FXi-60 –
30 volts to 40 volts for an output power from 30 W to 60
W. For FXi-250 – 35 volts to 45 volts for an output power
from 125 W to 250 W.
WARNING
DISCONNECT POWER PRIOR TO SERVICING.
WARNING
5.10 TROUBLESHOOTING.
The FXi troubleshooting philosophy consists of isolating a problem to a specific circuit board. Typical indications
are presented in Table 5-3. Figure 5-6 presents the FXi component locations. Table 5-5 presents the FXi
troubleshooting information. Use the information, the diagnostics menu, and the indicators to isolate the
problem to a specific circuit board. Table 5-5 presents the factory default jumper programming for all the FXi
circuit boards.
Press m to retrieve metering statistics. Text similar to the following command-line message appears on the
terminal:
BFXi exciter, (c)2003 Broadcast Electronics Inc.
Metering
Forward: 238 Reflected: 0
Final1 current: 5.3 Final2 current: 5.3
IPA current: 1.0 Driver current: 0.1
PAV: 40.7 +7.5V: 7.4
+16V: 16.0 +12.5V: 12.3
–16V: –16.2 –12.5V: –12.4
+3.3V: 3.3 +5V: 5.0
+1.8V: 1.8 –5V: –5.0
+1.5V: 1.5 Temp: 49
Status
Frequency: 98.10 Transmitter type: S
10 MHz ref: internal Software version: 02.15.00
Deviation: 75 Pre-emphasis: 2
SCA 1
Frequency: 67 Deviation: 5.0
Level: off Pre-emphasis: 150
SCA 2
Frequency: 92 Deviation: 5.0
Level: off Pre-emphasis: 150
Compressor/Limiter
Compressor level: off Compressor attack: 1
Limiter level: off Compressor release: 100
Inputs selections
Primary: AES/EBU Back up: Composite
Active: AES/EBU IBOC mode: FM only
N Plus 1 frequencies:
1: 97.10 5: 97.90
2: 97.30 6: 98.10
3: 97.50 7: 98.30
4: 97.70 8: 98.50
This information may be printed or saved to a file.
OVERALL
POWER On
INDICATOR
FAULT Off
INDICATOR
MAIN MENU
Forward Power
FXi-60 5W to 60W
Reflected Power
FXi-60 1W to 2W
DIAGNOSTIC
MENU
Forward Power
FXi-60 5W to 60W
Reflected Power
FXi-60 1W to 2W
FXi-250 2W to 6W
FXi-60
Final 1 0.5A to 1.5A
FXi-250
Final 1 3.5A to 6.5A
PAV Power adjust voltage. Varies with output power. For FXi-60 –
30 volts to 40 volts for an output power from 30 W to 60
W. For FXi-250 – 35 volts to 45 volts for an output power
from 125 W to 250 W.
1. FRONT-PANEL POWER INDICATOR NOT 1. Ensure the AC power switch is operated to ON.
ILLUMINATED.
2. On/Off switch/circuit breaker may have tripped. Reset
by operating the On/Off switch to Off then On.
3. Check fuse F3 on the power supply circuit board.
Check fuse F10 on the power supply circuit board.
Check fuse F9 on the power supply circuit board.
4. Check fuse F10 on the power supply circuit board.
5. Check fuse F9 on the power supply circuit board.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the +1.8V circuitry on the DSP circuit board.
RED. SYSTEM VOLTAGES +1.8V RED.
2. FAULT ANALYSIS – A +1.8V power supply fault
has occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the +3.3V circuitry on the DSP circuit board.
RED. SYSTEM VOLTAGES +3.3V RED.
2. FAULT ANALYSIS – A +3.3V power supply fault
has occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the +5V circuitry on the DSP circuit board.
RED. SYSTEM VOLTAGES +5V RED.
2. FAULT ANALYSIS – A +5V power supply fault has
occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the -5V circuitry on the DSP circuit board.
RED. SYSTEM VOLTAGES -5V RED.
2. FAULT ANALYSIS – A -5V power supply fault has
occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the +7.5V circuitry on the DSP circuit board.
RED. SYSTEM VOLTAGES +7.5V RED.
2. FAULT ANALYSIS – A +7.5V power supply fault h
as occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the +12.5V circuitry on the DSP circuit board.
RED. SYSTEM VOLTAGES +12.5V RED.
2. FAULT ANALYSIS – A +12.5V power supply fault
has occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the -12.5V circuitry on the DSP circuit board.
RED. SYSTEM VOLTAGES -12.5V RED.
2. FAULT ANALYSIS – A -12.5V power supply fault
has occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the +16V circuitry on the power supply circuit
RED. SYSTEM VOLTAGES +16V RED. board.
2. FAULT ANALYSIS – A +16V power supply fault has
occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the -16V circuitry on the power supply circuit
RED. SYSTEM VOLTAGES -16V RED. board.
2. FAULT ANALYSIS – A -16V power supply fault has
occurred.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. Check the PAV (+48V) circuitry on the power supply
RED. SYSTEM VOLTAGES PAV RED. circuit board.
2. FAULT ANALYSIS – The PAV (+48V) power supply
control voltage is out of tolerance.
1. GENERAL AND POWER SUP FAULT INDICATORS 1. The unit will wait 5 seconds and attempt operation.
RED. Two additional restart attempts will occur at 5
2. FAULT ANALYSIS – The power supply has shut second intervals. If the fault remains, the unit will
down due to a fault. remain shutdown. If 60 seconds of continuous
operation is detected following the re-start, the fault
counter will reset. The possible failures on the power
supply circuit board include: 1) the +24V supply, 2)
high heatsink temperature, or 3) the bulk supply is
below 350 volts. Depress FAULT RESET to clear the
fault display.
OPERATING
PARAMETER FEATURE COMPONENT LOCATION FACTORY DEFAULT JUMPER POSITION
DSP1 Memory
Programming JP19- DSP ---- Install
DSP2 Memory
Programming JP27- DSP ---- Install
Right Channel
Impedance J506- DSP 600 Ohms In Position 1-2
Left Channel
Impedance J509- DSP 600 Ohms In Position 1-2
Balanced Composite
Impedance J515- DSP 50 Ohms In Position 1-2
Internal/External 10
MHz Reference J530- DSP Internal On In Position 1-2
Internal/External 10
MHz Reference Relay J529- DSP Internal On In Position 1-2
Oscillator
Normal/Dowload J6- Osc/Filter Normal In Position 2-3
In Position 2-3
Momentary 1-2 To
Oscillator Reset J7- Osc/Filter Normal Reset
N+1 Remote
Common J5- N+1 Negative Control In Position 1-2
2. (if necessary) Attach power connections between LCD display and L–shaped board, red wire to
positive (+) on underside of L–shaped board and black to negative (–). Run power connections
around to front of board as shown in Figure 5-11 and fasten with ty raps.
3. Place L–shaped board so that mounting holes in circuit board are aligned with threaded posts on FXi
chassis. Use Phillips screws to fasten circuit board down. Do not tighten screws firmly. Once all
screws are in, tighten all screws firmly.
4. Place LCD display against chassis so that mounting holes on corners match threaded standoffs and
fasten with Phillips screws. Do not tighten hardware firmly. Once all hardware is in, tighten all
hardware firmly.
5. When all FXi maintenance has been performed, reattach top cover.
(Sheet 1 of 2)
Figure 5-12. The LED board contains two LEDs which are visible from the front and is attached to the inside
front of the chassis. The exciter must be removed from the rack and safely resting on a flat surface before the
procedures are performed. All input power to the FXi must be removed.
Removing LED Board
1. Use a Phillips screwdriver to remove screws which hold top cover. Remove top cover and set aside.
Retain all hardware.
2. Remove connector from LED board.
3. Retain all hardware. Use Phillips screwdriver to remove screws from top and bottom of LED board.
Follow precautions to prepare board for return.
Reinstalling LED Board
1. Place LED board so that mounting holes in circuit board are aligned with threaded posts on FXi
chassis. The board fits the chassis only one way. Use Phillips screws to fasten circuit board down.
Do not tighten screws firmly. Once all screws are in, tighten all screws firmly.
2. Replace connector on LED board.
3. When all FXi maintenance has been performed, reattach top cover.
Figure 5-14. The fan is mounted is mounted in the largest chassis compartment. The exciter must be removed
from the rack and safely resting on a flat surface before the procedures are performed. All input power to the
FXi must be removed.
Removing Fan
1. Use a Phillips screwdriver to remove screws which hold top cover. Remove top cover and set aside.
Retain all hardware.
2. From inside of FXi chassis note 2 power lugs with wires under top left (toward rear of chassis) corner
of fan. Remove lugs.
3. Use Phillips screwdriver and pliers to remove 4 screws from corners of fan. Fan is disconnected.
5-95. Reinstalling Fan
1. Place fan so that it is in its proper location and that power lugs are under upper left corner. Make
certain that mounting holes are aligned.
2. Attach screws and kep–nuts as shown in
3.
4.
5. Figure 5-14.
6. Attach power lugs under upper left corner of fan: red wire to +, black wire to –.
7. When all FXi maintenance has been performed, reattach top cover.
6 BE PART NUMBERS
This section provides parts lists for the FXi60/250 Exciter. The parts lists provide descriptions and part
numbers of electrical components, assemblies, and selected mechanical parts required for maintenance.
Each parts list entry in this section is indexed by reference designators appearing on the applicable
schematic diagrams.
This bill of material uses an indented structure to show relationships of parts into sub assemblies.
Example; all BOM LEVEL 2 parts are contained in the BOM LEVEL 1 part immediately above it.
....2 102-3832 RES, CHIP, 38.3 KOHMS, 1/10W, 1%, SMD 3 R82, R83, R91
....2 224-2210 IC, PAL, 22LV10, LOW V, SMD 3 U17, U18, U20
....2 224-6245 IC, 16 BIT TRANSCEIVER, SMD 4 U7, U8, U9, U21
....2 224-6373 IC, 16 BIT LATCH, LV, SMD 4 U30, U31, U32, U40
....2 417-0200 CONN,HEADER 20 PIN 1.5 J8, J9, J11, J13, J14,
J15, J16, J17, J20,
J24
....2 007-0010 CHIP CERAMIC 10pF 50V 5% 0603 SMD 4 C255, C256, C257,
C258
....2 070-0220 Cap,Tantalum Chip 220uF 10V 10% 7343H 2 C68, C332
SMD
....2 105-1010 RES, CHIP, 100 OHM, 1W, 5%, 2512, SMD 1 R913
....2 204-0130 SCHOTTKY BARRIER RECTIFIER 1 AMP 30V 4 D518, D520, D522,
CASE 403A SMD D524
....2 221-2134-001 RAIL TO RAIL I/O OPAMP DUAL SO8 2 U503, U528
....2 226-4701 Res Network, 4.7K ohm, 8 pin, SMD 2 RN2, RN3
....2 227-1576 VR, LT1576IS8, SWITCHER, 1.5A, SMD 4 U522, U523, U524,
U525
....2 375-0020 TRANSFORMER, RF, 1:1, 0.3-200MHZ, SM- 3 T1, T2, T502
22 PACKAGE
....2 413-0603 Chip,Test Point 0603 SMD 192 TP1, TP2, TP3, TP4,
TP6, TP7, TP8, TP9,
TP10, TP11, TP12,
TP13, TP14, TP15,
TP16, TP17, TP19,
TP20, TP21, TP22,
TP42, TP43, TP44,
TP45, TP46, TP47,
TP48, TP49, TP50,
TP51, TP52, TP53,
TP54, TP55, TP56,
TP58, TP59, TP60,
TP61, TP62, TP65,
TP66, TP67, TP68,
TP69, TP70, TP71,
TP72, TP73, TP75,
TP76, TP78, TP
....2 417-0506 6 pin single row header .1 center 4 JP3, JP4, JP31,
JP32
....2 417-1701 STRAIGHT JACK RECEPTACLE,SMB PCB 4 J2, J3, J527, J510
MOUNT 50 OHM
....2 340-0206 SWITCH, MOM, DPDT, CHROME CAP 11 S1, S2, S3, S4, S5,
S6, S7, S8, S9, S10,
S11
....2 091-0315 CAP, TRIMMER, 3-15 PF, NPO, 50V, SMD 3 C77, C112, C118
....2 102-2000 RES,CHIP,200 OHM,1/10 W,1% SMD 4 R86, R87, R88, R89
....2 350-025 INDUCTOR, 1.5 - 3 UH WITH SHIELD CAN 4 L3, L5, L30, L35
#47271-021
....2 360-9160 INDUCTOR, VAR, 160 NH, 6%, SHIELDED 2 L4, L32
....2 366-0022-001 IND, 22 NH, AIR, 16 MM, 5%, SMD 2 L47, L48
....2 366-0169 Air Core Inductor 169nH 12 Turns SMD 4 L2, L6, L29, L36
....2 366-0491 Air Core Inductor,491nH,2%,19 Turns,SMD 4 L1, L7, L28, L37
....2 417-1701 STRAIGHT JACK RECEPTACLE,SMB PCB 4 J1, J2, J10, J11
MOUNT 50 OHM
......3 007-1044-200 CAP, CHIP, .1UF, 200V, 20%, SMD 3 C3, C46, C134
......3 007-1203-500 CAP, CER, 1200 PF, 50V, 5%, SMD 1 C10
......3 007-3314 CAP, CER, 3300PF, 50V, 5%, SMD 2 C31, C48
......3 007-4744-050 CAP, CER, .47UF, 50V, -20% TO +80% 7 C16, C35, C53, C62,
C66, C70, C74
......3 101-3013 RES, 301K, 1/8W, 1%, SMD 5 R6, R7, R8, R30,
R31
......3 111-0002 .02 OHM 3W CURRENT SENSE RES, SMT 3 R3, R4, R5
......3 204-4005 DIODE, 1A, 600V, 4005, SMD 9 D17, D18, D26, D27,
D28, D38, D39, D83,
D84
......3 320-0011 LED,R.ANGLE PCB RED 5300E1 1D1 11 DS1, DS5, DS6,
DS7, DS8, DS9,
DS10, DS11, DS12,
DS13, DS14
....2 565-0001 COUPLER, 3DB, 600W, 70-110 MHZ, PCB MT 2 HY1, HY2
......3 003-0105 CAP, CER, 1UF, 100V, 1812, 20%, SMD 2 C44, C50
......3 007-1044-200 CAP, CHIP, .1UF, 200V, 20%, SMD 13 C2, C3, C4, C6, C8,
C9, C10, C11, C12,
C13, C93, C94, C95
......3 101-0150 Resistor,150 ohm 1/2W 5% SMD 2010 3 R97, R98, R99
......3 102-3010 RES, CHIP, 301 OHMS, 1/10W, 1%, SMD 5 R34, R71, R72,
R116, R119
......3 104-0301 RES, CHIP, 301 OHM, 1%, 1/2W, 2010, SMD 4 R96, R100, R104,
R110
......3 105-0010 RES, CHIP, 10 OHM, 1W, 1%, 2512 3 R103, R105, R164
......3 105-0062 RES, CHIP, 62 OHM, 1W, 5%, 2512 2 R148, R149
......3 105-0075-001 RES, CHIP, 75 OHM, 1%, 1/2W, 2010, SMD 1 R102
......3 105-1010 RES, CHIP, 100 OHM, 1W, 5%, 2512, SMD 3 R78, R79, R80
......3 111-0001 .01 OHM 2W CURRENT SENSE RES SMT 3 R28, R29, R30
......3 185-103 Resistor, 10K ohm 1/8 watt 1% chip Dale 3 R74, R75, R76
CRCW1206-10K
......3 210-1000 DIODE, ZENER, 10V, 225MW, SMD, SOT23 3 D6, D13, D14
......3 210-1150 DIODE, ZENER, SMT, 15V, 3W, D0-214AA 3 D4, D7, D9
......3 210-3310 P CHAN ENH MODE FET 60V SOT23 4 Q1, Q2, Q3, Q4
......3 350-188 INDUCTOR, 1210 1uH CHIP 4 L1, L7, L10, L11
....2 102-3832 RES, CHIP, 38.3 KOHMS, 1/10W, 1%, SMD 3 R82, R83, R91
....2 224-2210 IC, PAL, 22LV10, LOW V, SMD 3 U17, U18, U20
....2 224-6245 IC, 16 BIT TRANSCEIVER, SMD 4 U7, U8, U9, U21
....2 224-6373 IC, 16 BIT LATCH, LV, SMD 4 U30, U31, U32, U40
....2 417-0200 CONN,HEADER 20 PIN 1.5 J8, J9, J11, J13, J14,
J15, J16, J17, J20,
J24
....2 007-0010 CHIP CERAMIC 10pF 50V 5% 0603 SMD 4 C255, C256, C257,
C258
....2 070-0220 Cap,Tantalum Chip 220uF 10V 10% 7343H 2 C68, C332
SMD
....2 105-1010 RES, CHIP, 100 OHM, 1W, 5%, 2512, SMD 1 R913
....2 204-0130 SCHOTTKY BARRIER RECTIFIER 1 AMP 30V 4 D518, D520, D522,
CASE 403A SMD D524
....2 221-2134-001 RAIL TO RAIL I/O OPAMP DUAL SO8 2 U503, U528
....2 226-4701 Res Network, 4.7K ohm, 8 pin, SMD 2 RN2, RN3
....2 227-1576 VR, LT1576IS8, SWITCHER, 1.5A, SMD 4 U522, U523, U524,
U525
....2 375-0020 TRANSFORMER, RF, 1:1, 0.3-200MHZ, SM- 3 T1, T2, T502
22 PACKAGE
....2 413-0603 Chip,Test Point 0603 SMD 192 TP1, TP2, TP3, TP4,
TP6, TP7, TP8, TP9,
TP10, TP11, TP12,
TP13, TP14, TP15,
TP16, TP17, TP19,
TP20, TP21, TP22,
TP42, TP43, TP44,
TP45, TP46, TP47,
TP48, TP49, TP50,
TP51, TP52, TP53,
TP54, TP55, TP56,
TP58, TP59, TP60,
TP61, TP62, TP65,
TP66, TP67, TP68,
TP69, TP70, TP71,
TP72, TP73, TP75,
TP76, TP78, TP
....2 417-0506 6 pin single row header .1 center 4 JP3, JP4, JP31,
JP32
....2 417-1701 STRAIGHT JACK RECEPTACLE,SMB PCB 4 J2, J3, J527, J510
MOUNT 50 OHM
....2 340-0206 SWITCH, MOM, DPDT, CHROME CAP 11 S1, S2, S3, S4, S5,
S6, S7, S8, S9, S10,
S11
....2 091-0315 CAP, TRIMMER, 3-15 PF, NPO, 50V, SMD 3 C77, C112, C118
....2 102-2000 RES,CHIP,200 OHM,1/10 W,1% SMD 4 R86, R87, R88, R89
....2 350-025 INDUCTOR, 1.5 - 3 UH WITH SHIELD CAN 4 L3, L5, L30, L35
#47271-021
....2 360-9160 INDUCTOR, VAR, 160 NH, 6%, SHIELDED 2 L4, L32
....2 366-0022-001 IND, 22 NH, AIR, 16 MM, 5%, SMD 2 L47, L48
....2 366-0169 Air Core Inductor 169nH 12 Turns SMD 4 L2, L6, L29, L36
....2 366-0491 Air Core Inductor,491nH,2%,19 Turns,SMD 4 L1, L7, L28, L37
....2 417-1701 STRAIGHT JACK RECEPTACLE,SMB PCB 4 J1, J2, J10, J11
MOUNT 50 OHM
......3 007-1044-200 CAP, CHIP, .1UF, 200V, 20%, SMD 3 C3, C46, C134
......3 007-1203-500 CAP, CER, 1200 PF, 50V, 5%, SMD 1 C10
......3 007-3314 CAP, CER, 3300PF, 50V, 5%, SMD 2 C31, C48
......3 007-4744-050 CAP, CER, .47UF, 50V, -20% TO +80% 7 C16, C35, C53, C62,
C66, C70, C74
......3 101-3013 RES, 301K, 1/8W, 1%, SMD 5 R6, R7, R8, R30,
R31
......3 111-0002 .02 OHM 3W CURRENT SENSE RES, SMT 3 R3, R4, R5
......3 204-4005 DIODE, 1A, 600V, 4005, SMD 9 D17, D18, D26, D27,
D28, D38, D39, D83,
D84
......3 320-0011 LED,R.ANGLE PCB RED 5300E1 1D1 11 DS1, DS5, DS6,
DS7, DS8, DS9,
DS10, DS11, DS12,
DS13, DS14
....2 565-0001 COUPLER, 3DB, 600W, 70-110 MHZ, PCB MT 2 HY1, HY2
......3 003-0105 CAP, CER, 1UF, 100V, 1812, 20%, SMD 2 C44, C49
......3 007-1044-200 CAP, CHIP, .1UF, 200V, 20%, SMD 13 C2, C3, C4, C6, C8,
C9, C10, C11, C12,
C13, C94, C95, C99
......3 102-3010 RES, CHIP, 301 OHMS, 1/10W, 1%, SMD 5 R34, R71, R72,
R116, R119
......3 104-0301 RES, CHIP, 301 OHM, 1%, 1/2W, 2010, SMD 1 R148
......3 105-0010 RES, CHIP, 10 OHM, 1W, 1%, 2512 3 R103, R105, R164
......3 105-0120 RES, CHIP, 120 OHM, 1W, 5%, 2512 2 R78, R80
......3 111-0001 .01 OHM 2W CURRENT SENSE RES SMT 3 R28, R29, R30
......3 185-103 Resistor, 10K ohm 1/8 watt 1% chip Dale 3 R74, R75, R76
CRCW1206-10K
......3 210-1000 DIODE, ZENER, 10V, 225MW, SMD, SOT23 3 D6, D13, D14
......3 210-1150 DIODE, ZENER, SMT, 15V, 3W, D0-214AA 3 D4, D7, D9
......3 210-3310 P CHAN ENH MODE FET 60V SOT23 4 Q1, Q2, Q3, Q4
......3 350-188 INDUCTOR, 1210 1uH CHIP 4 L1, L7, L10, L11
FILLER,DAUGHTER
..1 471-5365 CARD,EXGINE,FXi60/250 1
CAP,TANALUM
....2 009-0202 CHIP,100UF,POLAR,10%,6V,SMD 3 C54, C252, C253
....2 102-503 POT, 50K OHM 3/8 SQUARE, 1/2W, 10%" 1 R516
....2 104-4222 RES CHIP, 42.2K, 1%, 1/16W, 0603, SMD 1 R326
....2 104-4991 RES, CHIP, 4.99K, 1%, 1/16W, 0603, SMD 3 R31, R32, R325
DIODE,RECTIFIER,SCHOTTKY,MBRS340T3,
....2 204-0340 403-03 CASE,SMD 2 D1, D9
DIODE,SWITCHING,LL4150,MINIMELF
....2 204-4150 CASE,SMD 1 D2
VR,LT1374HVCS8,SWITCHING,4.5A,SO-
....2 231-1374 8,SMD 1 U9
....2 360-0103 FILTER EMI CHIP, 10000pF 50V 20% SMD 1 FL1
FERRITE, 600 OHMS, 1.5 AMP, 100MHz,1206 L15, L16, L20, L21,
....2 366-3100 SMD 6 L23, L24
IND,POWER,SHIELDED,6.8 uH,20%,DT3316
....2 366-6825 CASE,SMD 4 L1, L2, L3, L28
....2 408-0901 CONN, SOCKET, 9 POS, 1 ROW, 2MM 4 J4, J5, J6, J7
CONN,BNC,JACK,THREADED,PC EDGE
....2 417-0265 MOUNT,LOW PROFILE 3 J20, J23, J30
ASSY,CABLE,ETHERNET TO EXGINE
..1 949-0611 (SBCM) 1
ASSY,CABLE,10MHz IN/OUT,FXi/EXGINE
..1 949-0613 (SBCM) 1
8 DRAWINGS
The following pages present the FXi Exciter drawings.
AES+
In_SPDIF+Optical DAC_AD9772A
AES-
AES_CK
AESDATA_I AES_CK AES_CK DB[0..13] DB[0..13]
AES_FS
44.1KHZ_PLL_LOCK AES_SCLK_I AES_FS AES_FS
AES_DT Reset_9772
RESET AES_SLR_I AES_DT AES_DT Reset_9772 Reset_9772
CK_Out
CK_Out CK_Out
QSPI_DOUT QSPI_DOUT
Rst1896
QSPICLK QSPICLK Rst1896 Rst1896
Mclk1896 DAC_AD9772A.Sch
QSPI_DIN QSPI_DIN Mclk1896 Mclk1896
Virtex2
IBOC_INSTALLED NC
In_SPDIF+Optical.Sch FPGA[0..63] IBQ_FS
FPGA[0..63] FPGA[0..63] IBQ_FS
IBQ_FS
IBQ_FS
IBQ_CK
IBQ_CK
Ck_Virtex2 IBQ_CK
Ck_Virtex2 Ck_Virtex2 IBQ_CK
-CLK_PLL_CS -CLK_PLL_CS
IBQ_DT
IBQ_DT
IBQ_DT
IBQ_DT
DSP2
-441_PLL_CS -441_PLL_CS
AUX32
-VCO_PLL_CS -VCO_PLL_CS AUX32
AUX33 ED0_DSP2 0542S5
AUX33 ED0_DSP2 ED0_DSP2 SFS2
AUX34 ED1_DSP2 0542S5.Sch
AUX34 ED1_DSP2 ED1_DSP2 SCK2
AUX35 ED2_DSP2
AUX35 ED2_DSP2 ED2_DSP2 SDIN2
AUX36 ED3_DSP2
PLL_D PLL_D AUX36 ED3_DSP2 ED3_DSP2 SDOUT2
AUX37 ED4_DSP2
PLL_LE PLL_LE AUX37 ED4_DSP2 ED4_DSP2
AUX38 ED5_DSP2
AUX38 ED5_DSP2 ED5_DSP2 Fpga2_Done
AUX39 ED6_DSP2
AUX39 ED6_DSP2 ED6_DSP2 Reset_Virtex2
AUX40 ED7_DSP2
Y0_CS Y0_CS AUX40 ED7_DSP2 ED7_DSP2 Reset_FF2
AUX41 ED8_DSP2 PowerSupply
Y1_CS Y1_CS AUX41 ED8_DSP2 ED8_DSP2
AUX42 ED9_DSP2
Y2_CS Y2_CS AUX42 ED9_DSP2 ED9_DSP2
AUX43 ED10_DSP2
Y3_CS Y3_CS AUX43 ED10_DSP2 ED10_DSP2 AUX[32..49]
AUX44 ED11_DSP2
Y4_CS Y4_CS AUX44 ED11_DSP2 ED11_DSP2
AUX45 ED12_DSP2
Y5_CS Y5_CS AUX45 ED12_DSP2 ED12_DSP2
AUX46 ED13_DSP2
Y6_CS Y6_CS AUX46 ED13_DSP2 ED13_DSP2
AUX47 ED14_DSP2 PowerSupply.Sch
Y7_CS Y7_CS AUX47 ED14_DSP2 ED14_DSP2 Virtex2.Sch
AUX48 Total_CLOCK ED15_DSP2
AUX48 ED15_DSP2 ED15_DSP2
AUX49 ED16_DSP2
AUX6 AUX49 PLL_MUXOUT ED16_DSP2 ED16_DSP2
PLL_CLC Ck_30.72MHz ED17_DSP2
AUX1OUT LVDS6 PLL_CLC Ck_30.72MHz Ck_30.72MHz ED17_DSP2 ED17_DSP2
PLL_DATA ED18_DSP2
RERR RERR LVDS5 PLL_DATA ED18_DSP2 ED18_DSP2
PLL_LE RefCK ED19_DSP2
AUX1IN AUX1IN LVDS4 PLL_LE RefCK RefCK ED19_DSP2 ED19_DSP2
ED20_DSP2
AUX2IN AUX2IN LVDS3 ED20_DSP2 ED20_DSP2
AUX[32..49]
Total_CLOCK.Sch ED21_DSP2
IBOC_INSTALLED IBOC_INSTALLED LVDS2 ED21_DSP2 ED21_DSP2
ED22_DSP2
LVDS1 ED22_DSP2 ED22_DSP2
Microcontroller ED23_DSP2
MICRO RESET ED23_DSP2 ED23_DSP2 EndBoot_DSP2
Microcontroller.Sch ED24_DSP2
ED24_DSP2 ED24_DSP2 CK_DSP2
TX ED25_DSP2
RESET_VIRTEX TX PLL_LE ED25_DSP2 ED25_DSP2 Reset_DSP2
RX ED26_DSP2
AUX[32..49]
Virtex.Sch
Reset_FF2
Reset_FF2
Reset_Virtex2
Reset_Virtex2
Fpga2_Done
Fpga2_Done
SDOUT2
TX SDOUT2
SDIN2
RX SDIN2
SCK2
SCK2
SFS2
SFS2
A A
COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC.
DWN. BY MATERIAL R
PROPRIETARY RIGHTS are included in
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC.
this document nor the information dis- DESIGNER(S)
closed herein shall be reproduced or trans- 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
ferred to other documents or used or dis-
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
ELECTRONICS, INC.
FXI EXCITER
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S D
.x + .030 .xxx + .005
COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC. NONE
.xx + .015 ANGLES + 1 MODEL SCALE SHEET 1 OF 18
1 2 3 4 5 6 7 8
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
A 9-6-02 Model Release with Changes EG ----
B 11-07-02 Add Notes EG 10821
C 2-4-03 Change R608, R2 Values; Make R683 Not Placed; Update Notes EG ----
+3.3VD Between Pins 1-3 U1
D 5-14-03 No Changes to This Sheet EG 10969
E 3-1-04 Update Notes EG 11111
C19 + C51 C52 Between Pins 5-6 U1
+5VA +3.3VD
10u-10V .1uF .1uF TP1 CML
TP100
TP101
TP102
TP103
TP104
TP73
TP75
TP76
TP87
TP88
TP89
TP90
TP91
TP92
TP93
TP98
TP99
C48
.1uF U1
C49 4 3
C50 AVDD DVDD
44 6
.1uF AVDD DRVDD
.1uF + 28 24
AVDD (MSB) Bit1 bit1 (MSB)
C21 39 23
CML Bit2 bit2
3 RN1B 4 10u-10V 37 22
CapT Bit3 bit3
1K C54 36 21
CapB Bit4 bit4
.1uF 20
C53 R19 2.21K 35
Bit5
19
bit5
TP69 Bias Bit6 bit6
.1uF Mode=8x 34 18
+5VA Mode Bit7 bit7
3
2
U2 17
R8 Bit8 bit8
In_MPX 1 RN1A 2 8 5 16
In_MPX Bit9 bit9
1K 49.9 VinA 41 15
R9 C597 VinA Bit10 bit10
1 4 VinB 42 14
VinB Bit11 bit11
3
CW AD8138 1800pF 13
49.9 Bit12 bit12
6
R1
* R608 Vref=2.5V 32 12
6
+12VA -12VA
R122 + C7
bias = 2.32V 1.5K C218 C8
+
sgn. = 1.6Vpp 22pF 10u-25V 10u-25V
TP11 R103 R20
-12VA C74
+12VA
19KHz PILOT
+5VD 1K 2.21K
.1uF
TP181 J520
4
C214
TP10 Vref2.7V TP182
8
68pF 2 U9A
1 R124 5
U9B COAX
R101 3 7 Out19KHz R137
10K 604
100mills OPA2227UA 6 100
C75 + C33 C215 C222 C3
8
CKX1_DSP1 .1uF 68pF 2200pF 0.01uF
10u-10V C76 OPA2227UA
4
FSX1_DSP1 R126 R129
+5VD U10 +5VA
DTX1_DSP1 R131
28 18 1K 2.21K
DVDD AVDD 47.5K
25 +12VA .1uF
TP12 L/RCLK R128
26 14 -12VA
TP13 BCLK FILTR 1.5K C220
27
TP14 SDATA 22pF
SCI 3 12 OutR+
TP16 CLATCH OUTR+ TP15
4 13 OutR-
CCLK OUTR-
5 Pag.14 AD1852
CDATA
ON = +3.3V 24 17 AD826 pin compatibile with OPA2227
Reset_DAC PD/RST OUTL+
2 16
MCLK OUTL-
INT 4X 10
96/48
INT 2X 7 8
192/48 ZEROR
22
ZEROL
Mode0 21 6
IPDM0 NC
Mode1 20 19 flt 3.125V
IPDM1 FILTB
C34
9 C78 +
DEEMP
23 11 .1uF
MUTE AGND
1 15 10u-10V
DGND AGND
AD1852
CK_1852
24.576MHz COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC.
TP17
DWN. BY MATERIAL R
R98 PROPRIETARY RIGHTS are included in
Not Mount information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC.
this document nor the information dis- DESIGNER( S)
closed herein shall be reproduced or trans- 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
ferred to other documents or used or dis-
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
ELECTRONICS, INC.
19KHz OUT
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S B
.x + .030 .xxx + .005
.xx + .015 ANGLES + 1 MODEL SCALE NONE SHEET 3 OF 18
1 2 3 4
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
A 9-6-02 Model Release with Changes EG ----
B 11-07-02 Delete R47 R48 R52 R53, Add R47 R48 R52 R53 EG 10821
C 2-4-03 Rename SCA lines EG ----
D D 5-14-03 No Changes to This Sheet EG 10969 D
E 3-1-04 No Changes to This Sheet EG 11111
TP42
R105 R106
1K 1K Input SCA
Vref1
+12VA
TP43
C C
4
U6C
10
8 R160
OPA4227UA 9 475
C130 TP183
11
39pF
TP46 LRCLK
L25 -12VA
R45 R48 R107 R110 TP47 SCLK
SCA2- -12VA
SCA2- 4.7uH TP48 DOUT
4.75K 1K 1K 1K
-12VA
SCAR
C236
11
11
1000pF
R93 R44 6 U6B U5D 13
604 7 R108 R111 14
4.75K 5 12
1K 1K
OPA4227UA +12VA OPA4227UA
TP44
4
4
U6D
4
U21
R46 OPA4227UA
SCA2+ L26 +12VA 12 475 In_Rigth+ 27 16
SCA2+ +12VA R161 AINRP LRCLK
4.75K 14 In_Rigth- 28 14
4.7uH R47 AINRM SCLK
13 +3.3VD 13 +3.3VD
1K R164 SDOUT
12 R14 1K
C131 39pF SDIN
In_Left+ 2
11
1K 1K AINLP
C41 + R113 + C42 In_Left- 1 25
AINLM VCOM
-12VA
R109 R112 10u-10V 10u-10V
R10 49.9 15 +3.3VD
1K 1K MCLK
+12VA -12VA +12VA -12VA +12VA -12VA 20 17
PDN_RSTB DVdd
1K C115
C11 + C12 C13 + C14 +3.3VD R15 21
C112 C113 SPDMODE .1uF
10 22
10u-25V
+
10u-25V 10u-25V
+
10u-25V .1uF .1uF MOD0 TEST
9 11
MOD1 DVss
8 L20 +3.3VD
MOD2
23 AVDD2
11
-12VA AVdd
+12VA -12VA U5C C116 C44 + 22uH
9 18
R114 R118 DEM0 .1uF 10u-10V
8 C119 19 7
C117 C118 DEM1 AVss
1K 1K 10 Vr=1.65V
.1uF .1uF +12VA 3
VREFP
OPA4227UA +3.3VD
4
4
1000pF
R94 R49 2 U6A
604 1 R116 R117
4.75K 3 1K 1K
OPA4227UA +12VA
4
U5B
SCA1+ L28 R51 +12VA 5
SCA1+ R163
4.75K 7 green wire
4.7uH R53 rstU19
6 475
1K
C133 39pF OPA4227UA
11
TP51 12.228MHz
CK_AD57 TP52
-12VA
R120 R121
1K 1K
A
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC. A
this document nor the information dis- DESIGNER( S)
closed herein shall be reproduced or trans- 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
ferred to other documents or used or dis-
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
ELECTRONICS, INC.
SCA 1/SCA 2 INTERFACE
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S C
.x + .030 .xxx + .005
.xx + .015 ANGLES + 1 MODEL SCALE NONE SHEET 4 OF 18
1 2 3 4
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
A 9-6-02 Model Release with Changes EG ----
B 11-07-02 No Changes to This Sheet EG 10821
C 2-4-03 No Changes to This Sheet EG ----
D D 5-14-03 No Changes to This Sheet EG 10969 D
E 3-1-04 No Changes to This Sheet EG 11111
U22
Tout1_DSP1 F1 Y20
TP55 TP53 TOUT1 RSV5
Tinp1_DSP1 F2 N2 +3.3VD
Not Mount TP54 TINP1 RSV4
G1 D3
EndBoot_DSP1 TOUT0 RSV3
+3.3VD Tinp0_DSP1 G2 A5
R142 R143 R144 R165 22.1K TP56 TINP0 RSV2
D12 R166
RSV1 22.1K
C12
Not Mount RSV0
TO 19 KHz L3 J18 HOLDA_DSP1
Not Mount CKX1_DSP1 CLKX1 HOLDA
L1 J17
FSX1_DSP1 FSX1 HOLD
L2 J19 BUSREQ_DSP1
DTX1_DSP1 DX1 BUSREQ
CKR1_DSP1 M1 +3.3VD
TP58 FSR1_DSP1 M3
CLKR1
Y11 R147 4.75K
TP59 FSR1 ECLKIN
DR1_DSP1 M2 Y10 ECkOut1
TP62 DR1 ECLKOUT TP78
JP26 HEADER CKS1_DSP1 E1 Y5 Ardy_DSP1
CKS1_DSP1 CLKS1 ARDY ARDY_DSP1
+3.3VD 9 V12 Awe_DSP1
TCK_RET TP57 AWE/SDWE/SSWE AWE_DSP1
5 11 Tck2_DSP1 A6 W10 Aoe_DSP1
VCC TCK TCLK AOE/SDRAS/SSOE TP79
3 Tdi2_DSP1 A7 V11 Are_DSP1
TDI TDI ARE/SDCAS/SSADS
1 Tms2_DSP1 B7
TMS TMS
12 7 Tdo2_DSP1 A8 N3
GND TDO TDO ED31 ED31_DSP1
10 2 Trst2_DSP1 B6 P3
GND TRST TRST ED30 ED30_DSP1
8 13 Em0_DSP1 D9 P2
GND EMU0 EMU0 ED29 ED29_DSP1
4 14 Em1_DSP1 B9 P1
GND EMU1 EMU1 ED28 ED28_DSP1
D10 R2
R77 22.1K EMU2 ED27 ED27_DSP1
B10 R3
R78 22.1K EMU3 ED26 ED26_DSP1
C11 T2
EMU4 ED25 ED25_DSP1
B12 T1
C +3.3VD TP61 R146
Not Mount
A3
EMU5 ED24
ED23
U3
U1
ED24_DSP1
ED23_DSP1 C
CK_DSP1 CLKIN ED22 ED22_DSP1
CkInx4_DSP1 D7 U2
TP81 CLKOUT1 ED21 ED21_DSP1
CkInx2_DSP1 Y12 V1
TP82 CLKOUT2 ED20 ED20_DSP1
Pllx4_DSP1 C4 V2
+3.3VD 1K CLKMODE0 ED19 ED19_DSP1
+3.3VD L29 L30 Y3
R79 ED18 ED18_DSP1
PllV2_DSP1 A4 W4
PLLV ED17 ED17_DSP1
1.5uH 1.5uH R169 PllF2_DSP1 B5 V4
C121 C240 C243 PLLF ED16 ED16_DSP1
+ 60.4 T19
C239 C46 ED15 ED15_DSP1
T20
.1uF .027uF 560pF ED14 ED14_DSP1
.027uF 10u-10V T18
ED13 ED13_DSP1
PllG2_DSP1 C6 R20
TP60 PLLG ED12 ED12_DSP1
R19
ED11 ED11_DSP1
A13 P20
Reset_DSP1 RESET ED10 ED10_DSP1
C13 P18
NMI ED9 ED9_DSP1
1K E3 N20
R145 EXT_INT7 ED8 ED8_DSP1
D2 N19 ED7_DSP1 ED7_DSP1
EXT_INT6 ED7 ED7_DSP1
C1 N18 ED6_DSP1 ED6_DSP1
EXT_INT5 ED6 ED6_DSP1
Internal pull-up/down C2 M20 ED5_DSP1 ED5_DSP1
EXT_INT4 ED5 ED5_DSP1
M19 ED4_DSP1 ED4_DSP1
ED4 ED4_DSP1
HINT_DSP1 J20 L19 ED3_DSP1 ED3_DSP1
HINT ED3 ED3_DSP1
HCNTL1_DSP1 HCNTL1_DSP1 G19 L18 ED2_DSP1 ED2_DSP1
HCNTL1_DSP1 HCNTL1 ED2 ED2_DSP1
HCNTL0_DSP1 HCNTL0_DSP1 G18 K19 ED1_DSP1 ED1_DSP1
HCNTL0_DSP1 HCNTL0 ED1 ED1_DSP1
HHWIL_DSP1 HHWIL_DSP1 H20 K18 ED0_DSP1 ED0_DSP1
HHWIL_DSP1 HHWIL ED0 ED0_DSP1
HR/W_DSP1 HR/W_DSP1 G20
HR/W_DSP1
HD15_DSP1 HD15_DSP1 B14
HR/W
U18 Ad21 R175 1K
HD15_DSP1 HD15 EA21 TP83
HD14_DSP1 HD14_DSP1 C14 Y18 Ad20 U24 16
HD14_DSP1 HD14 EA20 TP84 GND
HD13_DSP1 HD13_DSP1 A15 W17 Ad19
HD13_DSP1 HD13 EA19 TP85 JP19
HD12_DSP1 HD12_DSP1 C15 Y16 Ad18 +3.3VD 2
HD12_DSP1 HD12 EA18 TP86 A16
HD11_DSP1 HD11_DSP1 A16 V16 Ad17 Jumper on 3 22
HD11_DSP1 HD11 EA17 A15 CE
+3.3VD HD10_DSP1 HD10_DSP1 B16 Y15 Ad16 29 24
1K HD10_DSP1 HD10 EA16 A14 OE
R54 HD8_DSP1 HD9_DSP1 HD9_DSP1 C16 W15 Ad15 28 31
HD9_DSP1 HD9 EA15 A13 WE
HD8_DSP1 HD8_DSP1 B17 Y14 Ad14 4 4.75K
R55 1K HD8_DSP1 HD8 EA14 A12
HD3_DSP1 HD7_DSP1 HD7_DSP1 A18 W14 Ad13 25 R27 +3.3VD
HD7_DSP1 HD7 EA13 A11
HD6_DSP1 HD6_DSP1 C17 V14 Ad12 23 21 ED7_DSP1
1K HD6_DSP1 HD6 EA12 A10 DQ7
R172 HD4_DSP1 HD5_DSP1 HD5_DSP1 B18 W13 Ad11 26 20 ED6_DSP1
HD5_DSP1 HD5 EA11 A9 DQ6
HD4_DSP1 HD4_DSP1 C19 V10 Ad10 27 19 ED5_DSP1
R171 Not Mount HHWIL_DSP1 HD4_DSP1 HD4 EA10 A8 DQ5
HD3_DSP1 HD3_DSP1 C20 Y9 Ad9 5 18 ED4_DSP1
HD3_DSP1 HD3 EA9 A7 DQ4
HD2_DSP1 HD2_DSP1 D18 V9 Ad8 6 17 ED3_DSP1
HD2_DSP1 HD2 EA8 A6 DQ3
HD1_DSP1 HD1_DSP1 D20 Y8 Ad7 7 15 ED2_DSP1
HD1_DSP1 HD1 EA7 A5 DQ2
HD0_DSP1 HD0_DSP1 E20 W8 Ad6 8 14 ED1_DSP1
HD0_DSP1 4.75K HD0 EA6 A4 DQ1
E18 V8 Ad5 9 13 ED0_DSP1
B R56
+3.3VD
F20
E19
HAS
HCS
EA5
EA4
W7
V7
Ad4
Ad3
10
11
A3
A2
DQ0
+3.3VD C122
B
HDS1 EA3 A1
F18 Y6 Ad2 12 32
HDS1_DSP1 HDS2 EA2 A0 +3.3V
HRDY_DSP1 H19
HRDY
V20 BE0_DSP1 AM29LV010B .1uF
BE0
G3 U19 BE1_DSP1
CKX0_DSP1 CLKX0 BE1
40KHz H1 Y4 BE2_DSP1
FSX0_DSP1 FSX0 BE2
H2 V5 BE3_DSP1
DTX0_DSP1 DX0 BE3
H3 V17 CE0_DSP1
DSPCK_DSP1 CLKR0 CE0
J3 W18 CE1_DSP1
TP45 DSPFS_DSP1 FSR0 CE1 TP95
J1 W6 CE2_DSP1
TP67 DSPDT_DSP1 DR0 CE2
K3 V6 CE3_DSP1
TP68 CKS0_DSP1 CLKS0 CE3
R148 R149 R150
TP63
TMS320C6711BGFN150
Not Mount
Not Mount
Not Mount
+3.3VD +1.8VD
C144 C146 C148 C150 C152 C154 C156 C158 C160 C162 C164 C166 C168 C170 C172 C174 C145 C147 C149 C151 C153 C155 C157 C159 C161 C163 C165 C167 C169 C171 C173 C175
.1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF
A
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC. A
this document nor the information dis- DESIGNER( S)
closed herein shall be reproduced or trans- 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
ferred to other documents or used or dis-
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
ELECTRONICS, INC.
DSP1
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S C
.x + .030 .xxx + .005
.xx + .015 ANGLES + 1 MODEL SCALE NONE SHEET 5 OF 18
1 2 3 4
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
A 9-6-02 Model Release with Changes EG ----
B 11-07-02 No Changes to This Sheet EG 10821
C 2-4-03 No Changes to This Sheet EG ----
D D 5-14-03 No Changes to This Sheet EG 10969 D
E 3-1-04 No Changes to This Sheet EG 11111
U23
Tout1_DSP2 F1 Y20
TP35 TP36 TOUT1 RSV5
Tinp1_DSP2 F2 N2 +3.3VD
TP37 TINP1 RSV4
G1 D3
EndBoot_DSP2 TOUT0 RSV3
+3.3VD Tinp0_DSP2 G2 A5
R180 22.1K TP38 TINP0 RSV2
D12 R181
RSV1 22.1K
C12
RSV0
L3 J18 HOLDA_DSP2 +3.3VD
CLKX1 HOLDA
L1 J17
FSX1 HOLD
L2 J19 BUSREQ_DSP2
DX1 BUSREQ R57
M1
CLKR1 4.75K
M3 Y11
FSR1 ECLKIN
M2 Y10 ECkOut2
DR1 ECLKOUT
JP25 HEADER E1 Y5 Ardy_DSP2
CLKS1 ARDY ARDY_DSP2
+3.3VD 9 V12 Awe_DSP2
TCK_RET AWE/SDWE/SSWE AWE_DSP2
5 11 Tck2_DSP2 A6 W10 Aoe_DSP2
VCC TCK TCLK AOE/SDRAS/SSOE Aoe_DSP2
3 Tdi2_DSP2 A7 V11 Are_DSP2
TDI TDI ARE/SDCAS/SSADS Are_DSP2
1 Tms2_DSP2 B7
TMS TMS
12 7 Tdo2_DSP2 A8 N3
GND TDO TDO ED31 ED31_DSP2
10 2 Trst2_DSP2 B6 P3
C 8
GND TRST
13 Em0_DSP2 D9
TRST ED30
P2
ED30_DSP2
C
TP25
TP26
TP41
TP64
GND EMU0 EMU0 ED29 ED29_DSP2
4 14 Em1_DSP2 B9 P1
GND EMU1 EMU1 ED28 ED28_DSP2
D10 R2
R182 22.1K EMU2 ED27 ED27_DSP2
B10 R3
R183 22.1K EMU3 ED26 ED26_DSP2
C11 T2
EMU4 ED25 ED25_DSP2
B12 T1
+3.3VD TP39 R156 Not Mount EMU5 ED24
U3
ED24_DSP2
ED23 ED23_DSP2
A3 U1
CK_DSP2 CLKIN ED22 ED22_DSP2
CkInx4_DSP2 D7 U2
TP24 CLKOUT1 ED21 ED21_DSP2
CkInx2_DSP2 Y12 V1
TP23 CLKOUT2 ED20 ED20_DSP2
Pllx4_DSP2 C4 V2
+3.3VD CLKMODE0 ED19 ED19_DSP2
+3.3VD L2 L3 R59 1K Y3
ED18 ED18_DSP2
PllV2_DSP2 A4 W4
PLLV ED17 ED17_DSP2
1.5uH 1.5uH R184 PllF2_DSP2 B5 V4
C6 C199 C200 PLLF ED16 ED16_DSP2
+ 60R4 T19
C198 C5 ED15 ED15_DSP2
T20
.1uF .027uF 560pF ED14 ED14_DSP2
.027uF 10u-10V T18
ED13 ED13_DSP2
PllG2_DSP2 C6 R20
TP40 PLLG ED12 ED12_DSP2
R19
ED11 ED11_DSP2
A13 P20
Reset_DSP2 RESET ED10 ED10_DSP2
C13 P18
NMI ED9 ED9_DSP2
Not Mount E3 N20
R157 EXT_INT7 ED8 ED8_DSP2
D2 N19 ED7_DSP2 ED7_DSP2
EXT_INT6 ED7 ED7_DSP2
C1 N18 ED6_DSP2 ED6_DSP2
EXT_INT5 ED6 ED6_DSP2
Internal pull-up/down C2 M20 ED5_DSP2 ED5_DSP2
EXT_INT4 ED5 ED5_DSP2
M19 ED4_DSP2 ED4_DSP2
ED4 ED4_DSP2
HINT_DSP2 J20 L19 ED3_DSP2 ED3_DSP2
HINT ED3 ED3_DSP2
HCNTL1_DSP2 G19 L18 ED2_DSP2 ED2_DSP2
HCNTL1 ED2 ED2_DSP2
HCNTL0_DSP2 G18 K19 ED1_DSP2 ED1_DSP2
R159Not Mount HCNTL0 ED1 ED1_DSP2
HHWIL_DSP2 H20 K18 ED0_DSP2 ED0_DSP2
HHWIL ED0 ED0_DSP2
HR/W_DSP2 G20
HD15_DSP2 B14
HR/W
U18 EA21 R80 1K
HD15 EA21
HD14_DSP2 C14 Y18 EA20 U25 16
HD14 EA20 GND
HD13_DSP2 A15 W17 EA19
HD13 EA19 JP27
HD12_DSP2 C15 Y16 EA18 +3.3VD 2
HD12 EA18 A16
HD11_DSP2 A16 V16 EA17 3 22
HD11 EA17 A15 CE
HD10_DSP2 B16 Y15 EA16 29 24
HD10 EA16 A14 OE
+3.3VD HD9_DSP2 C16 W15 EA15 28 31
HD9 EA15 A13 WE
R158Not Mount HD8_DSP2 B17 Y14 EA14 4 4.75K
HD8 EA14 A12
HD7_DSP2 A18 W14 EA13 25 R28 +3.3VD
HD7 EA13 A11
HD6_DSP2 C17 V14 EA12 23 21 ED7_DSP2
HD6 EA12 A10 DQ7
R167 HD5_DSP2 B18 W13 EA11 26 20 ED6_DSP2
B Not Mount HD4_DSP2
HD3_DSP2
C19
C20
HD5
HD4
EA11
EA10
V10
Y9
EA10
EA9
27
5
A9
A8
DQ6
DQ5
19
18
ED5_DSP2
ED4_DSP2
B
HD3 EA9 A7 DQ4
HD2_DSP2 D18 V9 EA8 6 17 ED3_DSP2
R168Not Mount HD2 EA8 A6 DQ3
+3.3VD HD1_DSP2 D20 Y8 EA7 7 15 ED2_DSP2
HD1 EA7 A5 DQ2
HD0_DSP2 E20 W8 EA6 8 14 ED1_DSP2
HD0 EA6 A4 DQ1
4.75K E18 V8 EA5 9 13 ED0_DSP2
R58 HAS EA5 A3 DQ0
F20 W7 EA4 10
HCS EA4 A2
+3.3VD E19 V7 EA3 11 +3.3VD C32
HDS1 EA3 A1
F18 Y6 EA2 12 32
HDS2_DSP2 HDS2 EA2 A0 +3.3V
HRDY_DSP2 H19
HRDY
V20 BE0_DSP2 AM29LV010B .1uF
BE0
Not Mount R170 CKX0_DSP2 G3 U19 BE1_DSP2
CLKX0 BE1
Not Mount R173 FSX0_DSP2 H1 Y4 BE2_DSP2
FSX0 BE2
Not Mount R174 DTX0_DSP2 H2 V5 BE3_DSP2
DX0 BE3
Not Mount R176 DSPCK_DSP2 H3 V17 CE0_DSP2
CLKR0 CE0
Not Mount R177 DSPFS_DSP2 J3 W18 CE1_DSP2
FSR0 CE1 TP27
Not Mount R178 DSPDT_DSP2 J1 W6 CE2_DSP2
DR0 CE2 CE2_DSP2
Not Mount R179 CKS0_DSP2 K3 V6 CE3_DSP2
CLKS0 CE3
TMS320C6711BGFN150
TP28
TP29
TP30
TP31
TP32
TP33
TP34
+3.3VD +1.8VD
C43 C47 C69 C70 C71 C103 C114 C120 C123 C124 C176 C177 C178 C179 C180 C181 C182 C183 C184 C185 C186 C187 C188 C189 C190 C191 C192 C193 C194 C195 C196 C197
.1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF
A
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC. A
this document nor the information dis- DESIGNER( S)
closed herein shall be reproduced or trans- 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
ferred to other documents or used or dis-
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
ELECTRONICS, INC.
DSP2
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S C
.x + .030 .xxx + .005
.xx + .015 ANGLES + 1 MODEL SCALE NONE SHEET 6 OF 18
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
A 9-6-02 Model Release with Changes EG ----
B 11-07-02 No Changes to This Sheet EG 10821
C 2-4-03 No Changes to This Sheet EG ----
D 5-14-03 No Changes to This Sheet EG 10969
E 3-1-04 No Changes to This Sheet EG 11111
TP110 TP19 TP111 U18 Both Serial Ports are in Slave Mode
Not Mount 1 28 TP20TP21TP22
GrpDlys Mmode2
R139 2 27
Mclk_I Mmode1
3 26
Mclk_O Mmode0
AESdata_I 4 25 2.56MHz
AESDATA_I Sdata_I Sclk_O AES_CK
AESclk_I 5 24 40KHz
AES_SCLK_I Sclk_I LRclk_O AES_FS
AESlr_I 6 23 AES_DT
AES_SLR_I LRclk_I Sdata_O AES_DT
7
+5VD VDD
+5VD 9 20 +5VD
4.75K Bypass TDM_Data_in
R40 10 19 R41 4.75K
Smode_in0 Smode_out0
11 18 I2S_Mode
Smode_in1 Smode_out1
input format=I2S 12 17
Smode_in2 WLnght_out0
13 16 24bit
Reset WLngth_out1
14 15
Mute_I Mute_O
AD1896 Mute1
+5VD +3.3VD
Rst1896
MCLK1896
TP113
4 13
VB SDA DI
+5VA
R626 5 12
A0 CE DIG_POT_CS
CCW
10K
CW
W0 W
R31 * 1 3
6 11
R36
0
5K
* TP553 7 L0 H1 10
R681 4 RN2B 3 2 RN2A 1
Right-
0 4.7K 4.7K 8 H0 L1 9
+12VA TP190
11 -12VA DS1808 C628 -12VA
+5VA
2 U4A
11
1
3 R624 R625 10uF U3B 6
R87
10K
OPA4227UA R60 R62
15.8K 15.8K C629 7 OPA4227UA 100mills
4
+12VA 1K 1K 5 +2.5Vl
5 RN2C 6 +12VA
4
Right+ C27 + C63 R88
7
4
4.7K
8
3 TP186 3 U3A 10K
RN2D 0.01uF OPA4227UA 1 +12VA 10u-10V .1uF
C 4.7K
MBI SDI U511A 1
2 TP108 C
8
11
-12VA
OP275 R61 R63 R83 CAL_CS5397
2
2
* *3
4
R33 1K 1K 100
1
C630 R64 R67
TP107
TP105
TP106
TP109
R30 TP185 C208 4.7nF
0 CCW CW
5K 1K 1K
R682 +12VA
1 RN3A 3 RN3B
4
2 4 C209
Left-
4.7K 4.7K
0.01uF 12 U3D +5VD
0 R84
OPA4227UA 14 4.7nF
C631 13 100
AinL+ 4
U7
19 Normal_operation R11 1K R17
11
11
-12VA AinL- CDIN/DFS
9 U3C 17 I2S Slave R13 1K
R65 R68 CCLK/(S/M)
8 10uF AinR+ 27
AinR+ CAL
10
10 1K 1K AinR- 26
OPA4227UA -12VA AinR- R16
+5VA 16
Sdata1 SDATA
R627 15
4
4
RN3D R95 11 7
4.7K
* R628 5
OPA4227UA
U4B
7 10
0.82uH + C693
10uF 12
Vd MCLKa
MCLKd
20
DGND
1K 6 9
8
11
-12VA AGND C66 C68 C332 TP49
28 1
R70 R72 R86 AGND Vref TP96
22 2 + +
LGND Vcom TP97
1K 1K 100 +
.1uF 220uF 10V
CS5397
R71 R73 C210 4.7nF C36 C67 220uF 10V
5 TP552 .1uF 100u 6V
1K 1K
+12VA
4
C211
U511B 7 10 U4C
R85 CK_CS5397
OPA4227UA 8 4.7nF
OP275 9 100
R97
6 Not Mount
B B
11
-12VA
R74 R75
R629 1K 1K
-12VA
11
0 U4D 13
* R630 14 OPA4227UA
12
1K
4
+12VA
A
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC. A
this document nor the information dis- DESIGNER( S)
closed herein shall be reproduced or trans- 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
ferred to other documents or used or dis-
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
ELECTRONICS, INC.
LEFT/RIGHT INTERFACE
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S C
.x + .030 .xxx + .005
.xx + .015 ANGLES + 1 MODEL SCALE NONE SHEET 8 OF 18
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
A 9-6-02 Model Release with Changes EG ----
B 11-07-02 No Changes to This Sheet EG 10821
C 2-4-03 No Changes to This Sheet EG ----
D 5-14-03 No Changes to This Sheet EG 10969
E 3-1-04 Add R914; Change R208, R212; Move L9 to +5VD EG 11111
+5VD
+
C249 C201
10u-25V .1uF +3.3VD
+ C260
C255 C202 C204 C257
10pF .1uF 10u-10V .1uF 10pF
+5VD
Vdd < Vp < 6V
L9 +5VD + C261
C256 C203 C205 C258
22u TP189 10pF .1uF 10u-10V .1uF 10pF
19
20
1
2
U30
11
U29A
Vdd_2
Vdd_1
Vp_2
Vp_1
U27 ~3V OP491GS 3 R201 IFpump 18 3 RFpump
CP_if CP_rf TP65
4 1 IFVc 1 3.32K
+5V Vc R204
2 C250
R914 3 2 8.25K C254
Ck_30.72MHz OUT GND 4.7nF
6.8nF C253 10
4
178 +5VD MUXOUT PLL_MUXOUT
VCO 30.72MHz
C235 R195 16 5 inRF
.1uF IF_in_A RF_in_A
0 .047uF 15 6
IF_in_B RF_in_B
R196 11
CLK
DGND_rf
AGND_rf
DGND_if
DGND_if
AGND_if
8 12
Not Mount C269 REF_in DATA
13 C270
LE
4
C272 U29B U29C U29D
R208 IF=+4/-10dBm inIF 100pF 100pF 6 9 13
ADF4216 7 8 14
9
7
17
14
100
1000pF 5 10 12
R212 10 OP491GS
TP187 OP491GS OP491GS
Vref = +/-0.3Vmax
11
11
11
10KHz
R190 R191 R192
1K 1K 1K
PLL_CLC
PLL_DATA
PLL_LE
C242 TP188
.1uF
RefCK
4
+5VD U13
C 2-4-03 No Changes to This Sheet EG ----
Out
C18
CK_Out
.1uF
D 5-14-03 No Changes to This Sheet EG 10969
in
in
DB[0..13]
DB[0..13]
DB13 R21 22 DDB13 3
U12
32
+3.3CKV+3.3AV
SN74AHCT1G00 +5VD
E 3-1-04 No Changes to This Sheet EG 11111
2
DB13 (MSB) CLKVDD
DB12 R23 22 DDB12 4 46
DB12 AVDD
DB11 R24 22 DDB11 5 45 J2
DB11 AVDD
DB10 R25 22 DDB10 6 SMA
DB10
DB9 R32 22 DDB9 7 25 ClkOut_1x_if_PLL=off IF_Out 1
DB8 R35 22 DDB8 8
DB9
DB8
PLLLOCK
1 T1 5 RF OUT
DB7 R42 22 DDB7 9 43 IoutA
2
DB7 IoutA
DB6 R43 22 DDB6 10 42 IoutB 2
DB6 IoutB
DB5 R76 22 DDB5 11
DB5
DB4 R81 22 DDB4 12 40 FSAdj R104 3 4
DB4 FSADJ
DB3 R82 22 DDB3 13 2.21K
DB3
DB2 R89 22 DDB2 14
DB2
DB1 R90 22 DDB1 15 ETC1-1T
DB1
DB0 R91 22 DDB0 16
DB0 (LSB)
C35
+3.3VD RefIO .1uF
R96 Mod0 17 39
MOD0 REFIO TP5
4.75K Mod1 18 38 0
MOD1 REFLO
Div0 28 29 R123
DIV0 CLK+
Div1 27 30
DIV1 CLK-
+3.3CKV
34 H=PLLon R136 C206 1
PLLVDD H = PLL on
35 LPF
LPF
1.21K
26 33 .33uF 2
RESET PLLCOM
31
CLKCOM
SLEEP
36
37 3
P4
R99 R100 R102 AGND
41
0 0 0 AGND
44
AD9772A
AGND
J4
+3.3CKV
Reset_9772 TP6
R132
332 R133
J3 1K
SMA
1 CLK_9772 153.6MHz Vck > 0.5Vpp (+7 dBm) T2 DAC_CLK- R130
49.9
2
DAC_CLK+
ETC1-1T
MASTER CLOCK IN R134 C37
1K .1uF
DIGITAL TO ANALOG CONVERSION
15
13
11
9
7
5
3
1
FPGA0
TP7 JP5 JP6 JP7 HEADER
15
13
11
15
13
11
15
13
11
9
7
5
3
1
9
7
5
3
1
9
7
5
3
1
FPGA1
TP8 HEADER HEADER HEADER
D TP70
FPGA2
D
16
14
12
10
FPGA3
8
6
4
2
TP71
16
14
12
10
16
14
12
10
16
14
12
10
FPGA4
8
6
4
2
8
6
4
2
8
6
4
2
TP114
FPGA5 U11 +3.3VD
FPGA4
FPGA2
FPGA1
FPGA0
TP115
FPGA6 CFG_D0_2 2 42
TP116 D0 Vcco
FPGA7 35 32
AUX63
AUX62
AUX61
AUX60
AUX59
AUX58
AUX57
AUX56
AUX55
AUX54
AUX53
AUX52
AUX51
AUX50
AUX30
AUX31
AUX15
AUX14
AUX13
AUX12
AUX11
AUX10
TP117 D1 Vcco
AUX9
AUX8
FPGA8 4 22
AUX7
AUX6
AUX5
AUX4
AUX3
AUX2
AUX1
AUX0
TP118 D2 Vcco
FPGA9 33 14
TP119 +3.3VD D3 Vcco
FPGA10 15
TP120 D4
FPGA11 31
TP121 D5
FPGA12 R18 20
TP122 D6
FPGA13 25 +3.3VD JP3
W1
W2
M1
M2
M3
M4
M5
M6
D2
D1
G5
G4
G3
G2
G1
H5
H4
H3
H2
H1
K5
K6
K4
K3
K2
K1
N1
N2
N3
N4
N5
N6
U1
U2
V1
V2
U3
U4
V3
V4
Y1
Y2
U5
V5
C2
C1
R1
R2
R3
R4
R5
E6
E5
E4
E3
E2
E1
L6
L5
L4
L3
L2
T1
T2
T3
T4
T5
F5
F4
F3
F2
F1
P1
P2
P3
P4
P5
P6
TP123 332 D7
J6
J4
J3
J2
J1
J5
FPGA14 U8 TP174 27
TP124 CF CEO 6
FPGA15 16 13 TCK2
IO_L01N_7
IO_L03N_7
IO_L04N_7
IO_L06N_7
IO_L19N_7
IO_L21N_7
IO_L22N_7
IO_L24N_7
IO_L43N_7
IO_L45N_7
IO_L46N_7
IO_L48N_7
IO_L49N_7
IO_L51N_7
IO_L52N_7
IO_L54N_7
IO_L91N_7
IO_L93N_7
IO_L94N_7
IO_L96N_7
IO_L96N_6
IO_L94N_6
IO_L91N_6
IO_L54N_6
IO_L52N_6
IO_L49N_6
IO_L48N_6
IO_L46N_6
IO_L43N_6
IO_L24N_6
IO_L22N_6
IO_L19N_6
IO_L06N_6
IO_L04N_6
IO_L01N_6
IO_L21P_7VREF_7
IO_L93N_6/VREF_6
IO_L51N_6/VREF_6
IO_L45N_6/VREF_6
IO_L21N_6/VREF_6
IO_L03N_6/VREF_6
IO_L01P_7
IO_L04P_7
IO_L06P_7
IO_L19P_7
IO_L22P_7
IO_L24P_7
IO_L43P_7
IO_L46P_7
IO_L48P_7
IO_L49P_7
IO_L52P_7
IO_L54P_7
IO_L91P_7
IO_L94P_7
IO_L96P_7
IO_L96P_6
IO_L94P_6
IO_L93P_6
IO_L91P_6
IO_L54P_6
IO_L52P_6
IO_L51P_6
IO_L49P_6
IO_L48P_6
IO_L46P_6
IO_L45P_6
IO_L43P_6
IO_L24P_6
IO_L22P_6
IO_L21P_6
IO_L19P_6
IO_L06P_6
IO_L04P_6
IO_L03P_6
IO_L01P_6
IO_L02N_7/VRP_7
IO_L02P_7/VRN_7
IO_L03P_7/VREF_7
IO_L45P_7/VREF_7
IO_L51P_7/VREF_7
IO_L93P_7/VREF_7
IO_L02N_6/VRP_6
IO_L02P_6/VRN_6
TP125 CF TCK 5
FPGA16 Fpga2_Done INIT_B_2 19 9 TDI2
TP126 OE/Reset TDI 4
FPGA17 CCLK2 5 11 TMS2
TP127 CLK TMS 3
FPGA18 +3.3VD AB20 DONE_Virtex2 21 37 TDO2
TP128 DONE CE TDO 2
FPGA19 A2
TP129 PROGR_B Reset_Virtex2 1
FPGA20 AB2 Y19 XC18V04PC44C
TP130 R5 M0 CCLK
FPGA21 W3 C19 TCK_VIRT2 +3.3VD HEADER
TP131 M1 TCK
FPGA22 AB3 D3 TDI_VIRT2
TP132 TP178 HSWAP_En2 M2 TDI
VCCO_7
VCCO_7
VCCO_7
VCCO_7
VCCO_7
VCCO_6
VCCO_6
VCCO_6
VCCO_6
VCCO_6
FPGA23 4.75K B3 D20 TDO_VIRT2 C128 C129 C136 C139
TP133 HSWAP_EN TDO
FPGA24 AB21 B20 TMS_VIRT2
TP134 PWRDWN_B TMS .1uF .1uF .1uF .1uF
FPGA25 D5 AA3
TP135 DXN IO_L01P_5/CS_B
FPGA26 A3 Y4
TP136 DXP IO_L01N_5/RDWR_B
FPGA27 A21 AA4
L7
K7
H6
G6
T6
N7
J7
R6
P7
M7
TP137 VBATT IO_L02P_5/D7
FPGA28 A20 +3.3VD +3.3VD AB4
TP138 RSVD IO_L02N_5/D6
FPGA29 FPGA3 B4 W5
TP139 IO_L01N_0 IO_L03P_5/D5/ALT_VRN_5
FPGA30 FPGA6 A4 Y5
TP140 IO_L01P_0 IO_L03N_5/D4/ALT_VRP_5
FPGA31 FPGA8 C4 AA5 +3.3VD JP4
TP141 IO_L02N_0 IO_L04P_5/VREF_5
FPGA32 FPGA5 C5 AB5
TP142 IO_L02P_0 IO_L04N_5 6
FPGA33 FPGA7 B5 V6
TP143 IO_L03N_0/VRP_0 IO_L05P_5/VRN_5 5
FPGA34 FPGA10 A5 V7
TP144 IO_L03P_0/VRN_0 IO_L05N_5/VRP_5 4
FPGA35 FPGA9 D6 W6
TP145 IO_L04N_0/VREF_0 IO_L06P_5 3
FPGA36 FPGA13 C6 Y6
TP146 IO_L04P_0 IO_L06N_5 2
FPGA37 FPGA11 B6 AA6
TP147 IO_L05N_0 IO_L19P_5 1
FPGA38 FPGA14 A6 AB6
TP148 IO_L05P_0 IO_L19N_5
FPGA39 E7 +3.3VD W7 HEADER
TP149 IO_L06N_0 IO_L21P_5
FPGA40 E8 Y7
TP150 IO_L06P_0 IO_L21N_5/VREF_5
FPGA41 FPGA17 D7 +3.3VD AA7
TP151 IO_L21N_0 IO_L22P_5
FPGA42 FPGA12 C7 U8 AB7
TP152 IO_L21P_0/VREF_0 VCCO_5 IO_L22N_5
C TP153
TP154
FPGA43
FPGA44
FPGA15
FPGA16
B7
A7
IO_L22N_0
IO_L22P_0 VCCO_0
G11
U7
T11
VCCO_5 IO_L24P_5
VCCO_5 IO_L24N_5
V8
U9 C
FPGA45 FPGA20 D8 G10 T10 W8
TP155 IO_L24N_0 VCCO_0 VCCO_5 IO_L49P_5
FPGA46 FPGA21 C8 G9 T9 Y8
TP156 IO_L24P_0 VCCO_0 VCCO_5 IO_L49N_5
FPGA47 FPGA19 B8 F8 AA8
TP157 IO_L49N_0 VCCO_0 IO_L51P_5 IBQ_FS
FPGA48 FPGA18 A8 F7 AB8 TP196
TP158 IO_L49P_0 VCCO_0 IO_L51N_5/VREF_5 R187
FPGA49 E9 W9
TP159 IO_L51N_0 IO_L52P_5 100
FPGA50 F9 Y9
TP160 IO_L51P_0/VREF_0 IO_L52N_5
FPGA51 FPGA24 D9 AA9 IBQ_FS
TP161 IO_L52N_0 IO_L54P_5
FPGA52 FPGA25 C9 AB9 IBQ_FS
TP162 IO_L52P_0 IO_L54N_5 IBQ_FS
FPGA53 FPGA23 B9 V9
TP163 IO_L54N_0 IO_L91P_5/VREF_5
FPGA54 FPGA22 A9 V10
TP164 IO_L54P_0 IO_L91N_5 TP194
FPGA55 E10 W10 TP192 IBQ_DT
TP165 IO_L91N_0/VREF_0 IO_L92P_5
FPGA56 F10 Y10 R188
TP166 IO_L91P_0 IO_L92N_5
FPGA57 FPGA28 D10 AA10 IBQ_DT 100
TP167 IO_L92N_0 IO_L93P_5
FPGA58 FPGA29 C10 Xilinx XC2V1000-4FG456CES AB10 IBQ_DT
TP168 IO_L92P_0 IO_L93N_5
FPGA59 FPGA27 B10 U10
TP169 IO_L39N_0 IO_L94P_5VREF_5 TP191
FPGA60 FPGA26 A10 U11 TP195 IBQ_DT
TP170 IO_L93P_0 IO_L94N_5
FPGA61 E11 V11 IBQ_CK
TP171 IO_L94N_0/VREF_0 IO_L95P_5/GCLK4P IBQ_CK
FPGA62 F11 W11 IBQ_CK
TP172 IO_L94P_0 IO_L95N_5/GCLK5S R189
FPGA63 FPGA32 D11 XC2V1000-4FG456CES Y11
TP173 IO_L95N_0/GCLK7P IO_L96P_5GCLK6P 100
FPGA33 C11 AA11
IO_L95P_0/GCLK6S IO_L96N_5/GCLK7S
FPGA31 B11 AB12 TP193
IO_L96N_0/GCLK5P IO_L96P_4/GCLK0P
FPGA30 A11 AA12
IO_L96P_0/GCLK4S IO_L96N_4GCLK1S IBQ_CK
F12 Y12 Ck_Virtex2
IO_L96N_1/GCLK3P IO_L95P_4/GCLK2P Ck_Virtex2
F13 W12
IO_L96P_1/GCLK2S IO_L95N_4/GCLK3S R6
FPGA34 E12 V12
IO_L95N_1/GCLK1P IO_L94P_4 Not Mount
FPGA36 D12 U12
IO_L95P_1/GCLK0S IO_L94N_4/VREF_4
FPGA37 C12 AB13
IO_L94N_1 IO_L93P_4
FPGA35 B12 AA13
IO_L94P_1/VREF_1 IO_L93N_4
FPGA38 A13 Y13
IO_L93N_1 IO_L92P_4
FPGA39 B13 W13
IO_L93P_1 IO_L92N_4
FPGA41 C13 V13
IO_L92N_1 IO_L91P_4
FPGA40 D13 U13
IO_L92P_1 IO_L91N_4/VREF_4
E13 AB14
IO_L91N_1 IO_L54P_4
E14 +3.3VD AA14
IO_L91P_1/VREF_1 IO_L54N_4
FPGA42 A14 Y14
IO_L54N_1 IO_L52P_4 AUX[32..49]
FPGA43 B14 W14 AUX[32..49]
IO_L54P_1 IO_L52N_4
FPGA44 C14 V14
IO_L52N_1 IO_L51P_4 AUX32
FPGA45 D14 +3.3VD U16 U14
IO_L52P_1 VCCO_4 IO_L51N_4 AUX33
FPGA46 A15 U15 AB15
IO_L51N_1/VREF_1 VCCO_4 IO_L49P_4 AUX34
FPGA47 B15 T14 AA15
IO_L51P_1 VCCO_4 IO_L49N_4 AUX35
B FPGA48
FPGA49
C15
D15
IO_L49N_1 VCCO_1
IO_L49P_1 VCCO_1
G14
G13
T13
T12
VCCO_4 IO_L24P_4
VCCO_4 IO_L24N_4
Y15
W15
AUX36
AUX37
B
F14 G12 AB16
IO_L24N_1 VCCO_1 IO_L22P_4 AUX38
E15 F16 AA16
IO_L24P_1 VCCO_1 IO_L22N_4 AUX39
FPGA52 A16 F15 Y16
IO_L22N_1 VCCO_1 IO_L21P_4/VREF_4 SDIN2 AUX40
FPGA53 B16 W16
IO_L22P_1 IO_L21N_4 SDOUT2 AUX41
FPGA58 C16 V15
IO_L21N_1/VREF_1 IO_L19P_4 AUX42
FPGA60 D16 +3.3VD +3.3VD V16
IO_L21P_1 IO_L19N_4 AUX43
E16 AB17
IO_L06N_1 IO_L06P_4 AUX44
E17 AA17
IO_L06P_1 IO_L06N_4 Reset_FF2 AUX45
FPGA51 A17 Y17
IO_L05N_1 IO_L05P_4/VRN_4 AUX46
FPGA57 B17 W17
IO_L05P_1 IO_L05N_4/VRP_4 AUX47
FPGA54 C17 AB18
IO_L04N_1 IO_L04P_4 SFS2 AUX48
M16
K16
H17
G17
N16
R17
L16
T17
P16
FPGA56 D17 AA18
J16
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
IO_L03P_1/VRN_1 IO_L03N_4/D2/ALT_VRP_4
FPGA50 C18 V17
IO_L02N_1 IO_L02P_4/D1
FPGA55 D18 V18
IO_L93N_3/VREF_3
IO_L51N_3/VREF_3
IO_L45N_3/VREF_3
IO_L21N_3/VREF_3
IO_L03N_3/VREF_3
IO_L03P_2/VREF_2
IO_L21P_2/VREF_2
IO_L45P_2/VREF_2
IO_L51P_2/VREF_2
IO_L93P_2/VREF_2
IO_L02P_1 IO_L02N_4/D0
IO_L02N_2/VRP_2
IO_L02P_2/VRN_2
IO_L02N_3VRP_3
IO_L02P_3VRN_3
IO_L01N_1 IO_L01P_4/INIT_B
FPGA63 B19 AB19
IO_L01P_1 IO_L01N_4/DOUT
IO_L01N_2
IO_L03N_2
IO_L04N_2
IO_L06N_2
IO_L19N_2
IO_L21N_2
IO_L22N_2
IO_L24N_2
IO_L43N_2
IO_L45N_2
IO_L46N_2
IO_L48N_2
IO_L49N_2
IO_L51N_2
IO_L52N_2
IO_L54N_2
IO_L91N_2
IO_L93N_2
IO_L94N_2
IO_L96N_2
IO_L96N_3
IO_L94N_3
IO_L91N_3
IO_L54N_3
IO_L52N_3
IO_L49N_3
IO_L48N_3
IO_L46N_3
IO_L43N_3
IO_L24N_3
IO_L22N_3
IO_L19N_3
IO_L06N_3
IO_L04N_3
IO_L01N_3
IO_L01P_2
IO_L04P_2
IO_L06P_2
IO_L19P_2
IO_L22P_2
IO_L24P_2
IO_L43P_2
IO_L46P_2
IO_L48P_2
IO_L49P_2
IO_L52P_2
IO_L54P_2
IO_L91P_2
IO_L94P_2
IO_L96P_2
IO_L96P_3
IO_L94P_3
IO_L93P_3
IO_L91P_3
IO_L54P_3
IO_L52P_3
IO_L51P_3
IO_L49P_3
IO_L48P_3
IO_L46P_3
IO_L45P_3
IO_L43P_3
IO_L24P_3
IO_L22P_3
IO_L21P_3
IO_L19P_3
IO_L06P_3
IO_L04P_3
IO_L03P_3
IO_L01P_3
AUX22
AUX23
AUX24
AUX25
AUX26
AUX27
AUX28
AUX29
FPGA[0..63]
FPGA[0..63]
C21
C22
M21
M20
M19
M18
M17
F18
F19
F20
F21
F22
P18
P22
P21
P20
P19
R22
R21
R20
R19
R18
P17
AA20
J17
J18
J19
J20
J21
J22
W20
E18
D21
D22
E19
E20
E21
E22
G18
H18
G19
G20
G21
G22
H19
H20
H21
H22
K17
K18
K19
K20
K21
K22
L17
L18
L19
L20
L21
L22
N17
N22
N21
N20
N19
N18
T22
T21
T20
T19
U22
U21
U20
U19
T18
U18
V22
V21
V20
V19
W22
W21
Y22
Y21
+1.5VD
JP12
10
12
14
16
2
4
6
8
HEADER
C80 C100 C102 C105 C107 C109 C111 C127
AUX46
AUX48
AUX42
AUX44
AUX47
AUX49
AUX38
AUX40
AUX43
AUX45
AUX34
AUX36
AUX39
AUX41
AUX32
AUX35
AUX37
AUX33
AUX21
AUX20
AUX19
AUX18
AUX17
AUX16
AUX29
AUX28
AUX27
AUX26
AUX25
AUX24
AUX23
AUX22
11
13
15
.1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF
1
3
5
7
9
AUX34
AUX32
AUX41
AUX40
AUX39
AUX38
AUX37
AUX36
AUX35
AUX33
DWN. BY MATERIAL R
PROPRIETARY RIGHTS are included in
JP11
16
14
12
10
8
6
4
2
A HEADER
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC. A
JP9 this document nor the information dis- DESIGNER( S)
10
12
14
16
2
4
6
8
15
13
11
.1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF TITLE
1
3
5
7
9
DB10
DB11
DB12
DB13
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
E 3-1-04 No Changes to This Sheet EG 11111
FPGA45
FPGA44
FPGA47
FPGA46
FPGA49
FPGA48
FPGA51
FPGA50
FPGA53
FPGA52
FPGA55
FPGA54
FPGA57
FPGA56
FPGA59
FPGA58
FPGA61
FPGA60
FPGA63
FPGA62
D D
EndBoot_DSP2
U41 +3.3VD
HDS2_DSP2
ED15_DSP2
ED10_DSP2
ED14_DSP2
ED12_DSP2
ED11_DSP2
ED17_DSP2
ED18_DSP2
ED16_DSP2
ED19_DSP2
ED20_DSP2
ED21_DSP2
ED22_DSP2
ED25_DSP2
ED23_DSP2
ED24_DSP2
ED27_DSP2
ED26_DSP2
ED31_DSP2
ED29_DSP2
ED28_DSP2
ED13_DSP2
ED30_DSP2
Reset_DSP2
Ardy_DSP2
Reset_DAC
Awe_DSP2
ED5_DSP2
ED8_DSP2
ED4_DSP2
ED6_DSP2
ED9_DSP2
ED7_DSP2
ED3_DSP2
ED2_DSP2
ED1_DSP2
ED0_DSP2
Aoe_DSP2
CE2_DSP2
Are_DSP2
CK_DSP2
CFG_D0 2 42
CK_1852
D0 Vcco
35 32
D1 Vcco
4 22
D2 Vcco
33 14
D3 Vcco
+3.3VD TP80 15
D4
CF 31
D5
20
R225 TP197 D6
25 +3.3VD JP31
W1
W2
M1
M2
M3
M4
M5
M6
D2
D1
G5
G4
G3
G2
G1
H5
H4
H3
H2
H1
K5
K6
K4
K3
K2
K1
N1
N2
N3
N4
N5
N6
U1
U2
V1
V2
U3
U4
V3
V4
Y1
Y2
U5
V5
C2
C1
R1
R2
R3
R4
R5
E6
E5
E4
E3
E2
E1
L6
L5
L4
L3
L2
T1
T2
T3
T4
T5
F5
F4
F3
F2
F1
P1
P2
P3
P4
P5
P6
D7
J6
J4
J3
J2
J1
J5
U14 332 27
CEO 6
16 13 TCK
IO_L01N_7
IO_L03N_7
IO_L04N_7
IO_L06N_7
IO_L19N_7
IO_L21N_7
IO_L22N_7
IO_L24N_7
IO_L43N_7
IO_L45N_7
IO_L46N_7
IO_L48N_7
IO_L49N_7
IO_L51N_7
IO_L52N_7
IO_L54N_7
IO_L91N_7
IO_L93N_7
IO_L94N_7
IO_L96N_7
IO_L96N_6
IO_L94N_6
IO_L91N_6
IO_L54N_6
IO_L52N_6
IO_L49N_6
IO_L48N_6
IO_L46N_6
IO_L43N_6
IO_L24N_6
IO_L22N_6
IO_L19N_6
IO_L06N_6
IO_L04N_6
IO_L01N_6
IO_L21P_7VREF_7
IO_L93N_6/VREF_6
IO_L51N_6/VREF_6
IO_L45N_6/VREF_6
IO_L21N_6/VREF_6
IO_L03N_6/VREF_6
IO_L01P_7
IO_L04P_7
IO_L06P_7
IO_L19P_7
IO_L22P_7
IO_L24P_7
IO_L43P_7
IO_L46P_7
IO_L48P_7
IO_L49P_7
IO_L52P_7
IO_L54P_7
IO_L91P_7
IO_L94P_7
IO_L96P_7
IO_L96P_6
IO_L94P_6
IO_L93P_6
IO_L91P_6
IO_L54P_6
IO_L52P_6
IO_L51P_6
IO_L49P_6
IO_L48P_6
IO_L46P_6
IO_L45P_6
IO_L43P_6
IO_L24P_6
IO_L22P_6
IO_L21P_6
IO_L19P_6
IO_L06P_6
IO_L04P_6
IO_L03P_6
IO_L01P_6
IO_L03P_7/VREF_7
IO_L45P_7/VREF_7
IO_L51P_7/VREF_7
IO_L93P_7/VREF_7
IO_L02N_7/VRP_7
IO_L02P_7/VRN_7
IO_L02N_6/VRP_6
IO_L02P_6/VRN_6
CF TCK 5
INIT_B 19 9 TDI
Fpga_Done OE/Reset TDI 4
CCLK 5 11 TMS
CLK TMS 3
+3.3VD AB20 DONE_Virtex 21 37 TDO
DONE CE TDO 2
A2 +3.3VD JP32
PROGR_B Reset_Virtex 1
AB2 Y19 XC18V04PC44C
R238 M0 CCLK 6
W3 C19 TCK_VIRT HEADER
M1 TCK 5
AB3 D3 TDI_VIRT
TP66 M2 TDI 4
VCCO_7
VCCO_7
VCCO_7
VCCO_7
VCCO_7
VCCO_6
VCCO_6
VCCO_6
VCCO_6
VCCO_6
4.75K HSWAP_En B3 D20 TDO_VIRT
HSWAP_EN TDO 3
AB21 B20 TMS_VIRT
PWRDWN_B TMS 2
D5 AA3 +3.3VD
DXN IO_L01P_5/CS_B LR_DT 1
A3 Y4
DXP IO_L01N_5/RDWR_B LR_CK
A21 AA4 HEADER C300 C301 C302 C303
L7
T6
J7
K7
H6
G6
N7
P7
R6
M7
VBATT IO_L02P_5/D7 CK_CS5397
A20 +3.3VD +3.3VD AB4
RSVD IO_L02N_5/D6 OTR .1uF .1uF .1uF .1uF
FPGA43 B4 W5
IO_L01N_0 IO_L03P_5/D5/ALT_VRN_5 LR_FS
FPGA42 A4 Y5
IO_L01P_0 IO_L03N_5/D4/ALT_VRP_5 CAL_CS5397
FPGA41 C4 AA5
IO_L02N_0 IO_L04P_5/VREF_5 bit1 (MSB)
FPGA40 C5 AB5
IO_L02P_0 IO_L04N_5 bit2
FPGA39 B5 V6
IO_L03N_0/VRP_0 IO_L05P_5/VRN_5
FPGA38 A5 V7
IO_L03P_0/VRN_0 IO_L05N_5/VRP_5
FPGA37 D6 W6
IO_L04N_0/VREF_0 IO_L06P_5 Rst9260
FPGA36 C6 Y6
IO_L04P_0 IO_L06N_5 AES_DT
FPGA35 B6 AA6
IO_L05N_0 IO_L19P_5 DAV
FPGA34 A6 AB6
IO_L05P_0 IO_L19N_5 bit3
E7 +3.3VD W7
IO_L06N_0 IO_L21P_5 AES_FS
E8 Y7
IO_L06P_0 IO_L21N_5/VREF_5 AES_CK
FPGA33 D7 +3.3VD AA7
IO_L21N_0 IO_L22P_5 bit4
FPGA32 C7 U8 AB7
IO_L21P_0/VREF_0 VCCO_5 IO_L22N_5 bit5
FPGA31 B7 U7 V8
C FPGA30
FPGA29
A7
D8
IO_L22N_0
IO_L22P_0 VCCO_0
G11
G10
T11
T10
VCCO_5 IO_L24P_5
VCCO_5 IO_L24N_5
U9
W8
C
IO_L24N_0 VCCO_0 VCCO_5 IO_L49P_5 Mclk1896
FPGA28 C8 G9 T9 Y8
IO_L24P_0 VCCO_0 VCCO_5 IO_L49N_5 Rst1896
FPGA27 B8 F8 AA8
IO_L49N_0 VCCO_0 IO_L51P_5 bit6
FPGA26 A8 F7 AB8
IO_L49P_0 VCCO_0 IO_L51N_5/VREF_5 bit7
E9 W9
IO_L51N_0 IO_L52P_5
F9 Y9
IO_L51P_0/VREF_0 IO_L52N_5
FPGA25 D9 AA9
IO_L52N_0 IO_L54P_5 bit8
FPGA24 C9 AB9
IO_L52P_0 IO_L54N_5 bit9
FPGA23 B9 V9
IO_L54N_0 IO_L91P_5/VREF_5
FPGA22 A9 V10
IO_L54P_0 IO_L91N_5
E10 W10
IO_L91N_0/VREF_0 IO_L92P_5
F10 Y10
IO_L91P_0 IO_L92N_5
FPGA21 D10 AA10
IO_L92N_0 IO_L93P_5 bit10
FPGA20 C10 Xilinx XC2V1000-4FG456CES AB10
IO_L92P_0 IO_L93N_5 bit11
FPGA19 B10 U10
IO_L39N_0 IO_L94P_5VREF_5
FPGA18 A10 U11
IO_L93P_0 IO_L94N_5
E11 V11 GCLK4P
IO_L94N_0/VREF_0 IO_L95P_5/GCLK4P
F11 W11
IO_L94P_0 IO_L95N_5/GCLK5S
D11 XC2V1000-4FG456CES Y11
IO_L95N_0/GCLK7P IO_L96P_5GCLK6P bit13 TP198
C11 AA11
IO_L95P_0/GCLK6S IO_L96N_5/GCLK7S bit12
B11 AB12
IO_L96N_0/GCLK5P IO_L96P_4/GCLK0P CK_AD9260
A11 AA12
IO_L96P_0/GCLK4S IO_L96N_4GCLK1S bit14
CK_Out F12 Y12 Ck_30.72MHz
CK_Out IO_L96N_1/GCLK3P IO_L95P_4/GCLK2P Ck_30.72MHz
CK_Out F13 W12
R239 IO_L96P_1/GCLK2S IO_L95N_4/GCLK3S Ck_Virtex2 R135
E12 V12
IO_L95N_1/GCLK1P IO_L94P_4 Not Mount
D12 U12
49.9 IO_L95P_1/GCLK0S IO_L94N_4/VREF_4
FPGA17 C12 AB13
IO_L94N_1 IO_L93P_4 bit15
FPGA16 B12 AA13
C1 IO_L94P_1/VREF_1 IO_L93N_4 bit16
FPGA15 A13 Y13
IO_L93N_1 IO_L92P_4
FPGA14 B13 W13
.1uF IO_L93P_1 IO_L92N_4
FPGA13 C13 V13
IO_L92N_1 IO_L91P_4
FPGA12 D13 U13
IO_L92P_1 IO_L91N_4/VREF_4
E13 AB14
IO_L91N_1 IO_L54P_4
E14 +3.3VD AA14
IO_L91P_1/VREF_1 IO_L54N_4
FPGA11 A14 Y14
IO_L54N_1 IO_L52P_4 SCA_DT
FPGA10 B14 W14
IO_L54P_1 IO_L52N_4 SCA_CK
FPGA9 C14 V14
IO_L52N_1 IO_L51P_4
FPGA8 D14 +3.3VD U16 U14
IO_L52P_1 VCCO_4 IO_L51N_4
FPGA7 A15 U15 AB15
IO_L51N_1/VREF_1 VCCO_4 IO_L49P_4
FPGA6 B15 T14 AA15
IO_L51P_1 VCCO_4 IO_L49N_4
FPGA5 C15 G14 T13 Y15
B FPGA4 D15
F14
IO_L49N_1 VCCO_1
IO_L49P_1 VCCO_1
G13
G12
T12
VCCO_4 IO_L24P_4
VCCO_4 IO_L24N_4
W15
AB16
SCA_FS
CK_AD57 B
IO_L24N_1 VCCO_1 IO_L22P_4
E15 F16 AA16
IO_L24P_1 VCCO_1 IO_L22N_4
FPGA3 A16 F15 Y16
IO_L22N_1 VCCO_1 IO_L21P_4/VREF_4 SDIN1
FPGA2 B16 W16
IO_L22P_1 IO_L21N_4 SDOUT1
RefCK C16 V15
RefCK IO_L21N_1/VREF_1 IO_L19P_4
D16 +3.3VD +3.3VD V16
IO_L21P_1 IO_L19N_4
E16 AB17
IO_L06N_1 IO_L06P_4
E17 AA17
IO_L06P_1 IO_L06N_4
FPGA1 A17 Y17
IO_L05N_1 IO_L05P_4/VRN_4
FPGA0 B17 W17
IO_L05P_1 IO_L05N_4/VRP_4
C17 AB18
IO_L04N_1 IO_L04P_4 SFS1
M16
K16
H17
G17
N16
R17
L16
T17
P16
D17 AA18
J16
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
HD6_DSP1 IO_L03P_1/VRN_1 IO_L03N_4/D2/ALT_VRP_4
C18 V17
Reset_FF IO_L02N_1 IO_L02P_4/D1
D18 V18
IO_L93N_3/VREF_3
IO_L51N_3/VREF_3
IO_L45N_3/VREF_3
IO_L21N_3/VREF_3
IO_L03N_3/VREF_3
IO_L03P_2/VREF_2
IO_L21P_2/VREF_2
IO_L45P_2/VREF_2
IO_L51P_2/VREF_2
IO_L93P_2/VREF_2
A19 AA19
IO_L02N_3VRP_3
IO_L02P_3VRN_3
HD9_DSP1 IO_L01N_1 IO_L01P_4/INIT_B
B19 AB19
HD14_DSP1 IO_L01P_1 IO_L01N_4/DOUT
IO_L01N_2
IO_L03N_2
IO_L04N_2
IO_L06N_2
IO_L19N_2
IO_L21N_2
IO_L22N_2
IO_L24N_2
IO_L43N_2
IO_L45N_2
IO_L46N_2
IO_L48N_2
IO_L49N_2
IO_L51N_2
IO_L52N_2
IO_L54N_2
IO_L91N_2
IO_L93N_2
IO_L94N_2
IO_L96N_2
IO_L96N_3
IO_L94N_3
IO_L91N_3
IO_L54N_3
IO_L52N_3
IO_L49N_3
IO_L48N_3
IO_L46N_3
IO_L43N_3
IO_L24N_3
IO_L22N_3
IO_L19N_3
IO_L06N_3
IO_L04N_3
IO_L01N_3
IO_L01P_2
IO_L04P_2
IO_L06P_2
IO_L19P_2
IO_L22P_2
IO_L24P_2
IO_L43P_2
IO_L46P_2
IO_L48P_2
IO_L49P_2
IO_L52P_2
IO_L54P_2
IO_L91P_2
IO_L94P_2
IO_L96P_2
IO_L96P_3
IO_L94P_3
IO_L93P_3
IO_L91P_3
IO_L54P_3
IO_L52P_3
IO_L51P_3
IO_L49P_3
IO_L48P_3
IO_L46P_3
IO_L45P_3
IO_L43P_3
IO_L24P_3
IO_L22P_3
IO_L21P_3
IO_L19P_3
IO_L06P_3
IO_L04P_3
IO_L03P_3
IO_L01P_3
FPGA[0..63]
FPGA[0..63]
+3.3VD
C21
C22
M21
M20
M19
M18
M17
F18
F19
F20
F21
F22
P18
P22
P21
P20
P19
R22
R21
R20
R19
R18
P17
AA20
E18
D21
D22
E19
E20
E21
E22
G18
H18
G19
G20
G21
G22
H19
H20
H21
H22
K17
K18
K19
K20
K21
K22
J17
J18
J19
J20
J21
J22
L17
L18
L19
L20
L21
L22
N17
N22
N21
N20
N19
N18
T22
T21
T20
T19
U22
U21
U20
U19
T18
U18
V22
V21
V20
V19
W22
W21
Y22
Y21
W20
C82 C83 C84 C86 C88 C90 C92 C94 C96 C98
.1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF
HCNTL1_DSP1
HCNTL0_DSP1
CKX0_DSP1
HDS1_DSP1
EndBoot_DSP1
HD10_DSP1
HD11_DSP1
HD13_DSP1
HD15_DSP1
HD12_DSP1
ED31_DSP1
FSX0_DSP1
ED30_DSP1
ED26_DSP1
ED29_DSP1
ED28_DSP1
ED27_DSP1
ED10_DSP1
ED12_DSP1
ED24_DSP1
ED25_DSP1
ED23_DSP1
ED13_DSP1
ED22_DSP1
ED21_DSP1
ED11_DSP1
ED15_DSP1
ED20_DSP1
ED19_DSP1
ED14_DSP1
ED18_DSP1
ED16_DSP1
ED17_DSP1
Reset_DSP1
HHWIL_DSP1
DSPCK_DSP1
DSPDT_DSP1
HD5_DSP1
HD7_DSP1
HD8_DSP1
HD1_DSP1
HD0_DSP1
HD3_DSP1
HD4_DSP1
HD2_DSP1
Awe_DSP1
DSPFS_DSP1
Ardy_DSP1
ED1_DSP1
ED0_DSP1
ED3_DSP1
ED2_DSP1
ED5_DSP1
ED7_DSP1
ED4_DSP1
ED8_DSP1
ED6_DSP1
ED9_DSP1
HR/W_DSP1
DTX0_DSP1
CK_DSP1
CKS0_DSP1
+1.5VD
A
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC. A
this document nor the information dis- DESIGNER( S)
closed herein shall be reproduced or trans- 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
ferred to other documents or used or dis-
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
ELECTRONICS, INC.
FPGA SERIALIZER AND CONTROL INTERFACE
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S C
.x + .030 .xxx + .005
.xx + .015 ANGLES + 1 MODEL SCALE NONE SHEET 12 OF 18
1 2 3 4 5 6 7 8
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
A 9-6-02 Model Release with Changes EG ----
B 11-07-02 Delete R532 R597 R623 C578 C540 C521 C679 C680 EG 10821
Add R532 R597 R619 R620 R623 R700 R701 R702 R703 R704
S S
Add C521 C540 C578 C679 C680 C689 C690 C691 C692 U527
Q501 Q502 C 2-4-03 Change R598, R623, R702 Values; Make R702 Not Placed EG ----
TOS/XLR 2N7002 AES_SRC_SEL 2N7002
G G +5V +5VA D 5-14-03 No Changes to This Sheet EG 10969
D D E 3-1-04 No Changes to This Sheet EG 11111
C502 R546 R547
FL502 10K 10K
D 4 5 D
0.01uF 6 CS8414 U501
270-0066 TP532 TP533 TP534 TP535 TP536 +5V
TP537
J501 16 +12VA
+12VA 1
C VERF
28
R501 16
2 27
1 F1 Cd/F1 Ce/F2 F2
S 110 D501
MMBD914LT1 D502 3 26
AES -
3 2
MMBD914LT1
F0 Cc/F0 SDATA AESDATA_I
U18-4 +5V
FL501 1
4 25
+
2 1 8 8
1
E2 Cb\E2 ERF AES/EBU_FAULT
HI=FAULT
14
4 8
5 24
4 E1 Ca/E1 M1
T501 6 4
6 23 3
1
RESET HI=RESET
6 E0 C0/E0 M0 U502A
9 C504 C505 4071
2
13 9
7
VD+ VA+
22 R530
0.01uF 10K
11 13
TP531 0.01uF
+5V
C503
8
DGND AGND
21
RECOVERED
11
R502 C506 5
OUT
1
K501 9 20 C1K 4
RXP FILT U502B
3 0.01uF 475 0.068uF TP501 4071
6
VCC K502 10
RXN
MCK
19
GND
5
FROM EXTERNAL .1uF 14
U CBL
15 R545 +5V 12
C582
GND
6 SRC AES BYPASS C507 10K +12VA
C581
11
U502D 13
+5V Y502 1uF 4071
4 F910 3
7
J504 .1uF 4 3
U512 C580 1uF
C FL503 R505 R507 C508 1 16 C579 C
RIGHT- (MBI SDI) 6.144MHz GND VDD
.1uF
100 100 C595 1 2 2 15
100uF .1uF
1 2 A2 VCC
.1uF
R504 R509 C563
R503 D503 D504 3 14
634 J506 1M
A1 SCL PLL_CLK
RIGHT -
3
3 .1uF 6 W0 W 11 10uF
FL504 10K C510 .1uF 1uF
INPUT R506 R508 C689
+
2
RIGHT+ (MBI SDI) 7 L0 H1 10
+10dBM 100 100 100uF
4
8 H0 L1 9
0.01uF
R510 R701
D505
8
3
SMBJ10CA 1M C564 DS1808 1K
R623 U528A 1
0 +12VA OPA2134
.1uF C530 2
C513 R703
J503
BALANCED 0 R619 10uF
1 .1uF C531
LEFT/MONO/ S
FL505 R513 R515 C514 (MBI SDI) 0*
R702 *
INPUT -
3
LEFT- 6
0.01uF
100 100 100uF 10K R620
+10dBM 2 U528B TP540
8
+ R511 R512 7 3
D506 D507 R517 C568 OPA2134 C679
10K 634 3.01K R599
4 SMBJ10CA SMBJ10CA 1M 5 U504A 1
J509
4
1 .1uF OP275 10K
2 100uF
P509 C515
4
600 2
C690 R598
.1uF
FL506 10K
3
R514 C516 (MBI SDI) 8.25K
C532
R516 0.01uF
B LEFT+ R597 B
100 100 100uF C692 10K 0.01uF
D508 R518 C533
S
8
3
3.3pF 6
.1uF R539 R541
U503A 1
+12VA
FL508 OPA2134 3.16K 3.16K
R523 R525 C540 R531 2 D514
100K R543 MMBD914LT1
100 100 330uF 1.69K
R533 R535 R537 5
R521 R522 R527 2
D511 D512 C517 1M C570 10K 10K 10K 6 R668
10K 51.1 J515 SMBJ10CA SMBJ10CA 4
390pF C671 C680 R544
1 P515 .1uF C523 U504B 7 1 10K
3
12pF OP275 10K
C520 10pF R538 100uF 6 TP541
50 5
2 C672 TP502 *
J513 10K R704 R548 K503 R529 U510B 7
.1uF 10K 10K IN_MPX
BALANCED 10K
3
10pF R540 R542 10K OP275
FL509 R524 R526 C521 TO IN MPX(P1)
COMPOSITE R534 R536 3.16K 3.16K
5
INPUT C529
100 100 330uF 10K 10K C681
R532 6 10uF
D513 C518 R528 100K 3.3pF -SCA/-RBDS
SMBJ10CA 390pF 1M 7
U503B
A OPA2134 A
5
TP538 COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC.
4
8
5 1
R550 C586 C583
6 11 3
0.01uF
*0 1uF 0.1uF L0 H1 10
ETC1-1T 7 U510A 1
-SCA/-RBDS
R622 +12VA C618 OP275
8 H0 L1 9 2
4
+5VA
J529 R678 3.01K 1uF
3 DS1808 C593
C619
P529 1K
2
S Q504 R666
2N7002 R669 0.01uF
G 0.01uF
1 51.1 Q510 C594
10K BF93A J527
D K504 C667 SMB
C687
R554 6
0.01uF 1 SMB TO 10uF
INT/EXT_CONT 10K +5V
CLOCK -12VA
0.01uF
2
HI=EXTERNAL +5V +12VA R600
D516 D525
+12VA R674
LOW=INTERNAL R912 MMBD914 MMBD914 U527 R662 C556 0
5
2 1 10K 243 0.01uF
1K C538 IN C621 R601 +5V
4
3 C620 1uF 1K *
4
S Q515 +5V
5 OUT EXT_10MHz_DETECT 0.01uF +5V
2N7002 1uF 3
1 D26 R663 2
IN
D515
+5VA
G
C537 MMBD914 10K C668
74HCT1G00DBV
LO=10MHz PRESENT MMBD914 U505 R553
TP551
L502 R913 0.1uF R551 1 10K
C682 L503 Q511 3 IN
10uH 100
D
0.1uF 10uF 10uH 10K BF93A 4
J510 5 OUT REF_INT/EXT
C688 SMB D27 R552 C539 2
IN
C536 C535 Y501 10K
C C
4
1
10uF 10uF MMBD914 0.1uF 74HCT1G00DBV
VDD
2
3
1
Q509
NC
C571 C617 R676
15pF 10pF 243
GND
BF93A
3
CLKOSC R621
51 0.01uF
1
U506 J519
16
VDD
1
SCA2+
10
PS_MUX_0 A
2
SCA2-
9
PS_MUX_1 B
MBI DOUBLE MONO
PS_MUX_2
6
INH XCOM
13
SCA INPUT 3
R584 R555
12
SPARE1 X0
4
SCA1+
3.01K R556 1K
1
Y0
+5V R585 1K
U508 C549 R557 SCA1-
5
1K 14
X1
1 0.1uF +3.3VD R602 1K
IN 3 5 6
TP547 4
Y1
OUT 5 1K R559
IN 15 3
2 X2 YCOM
7
74HCT1G00DBV R560 10K
+3.3VD R566 C684 2
Y2
+1.5VD
10K 0.1uF 1K R561 8
11 GND 8
X3
R562 1K 9
4 VEE 7
R565 R567 +12VA
Y3
+1.8VD +5VA
3.01K 3.01K 1K
R572 4052 -5VA
3.01K C560
B -12VA
+5VA 0.1uF
B
R569 R571 R573 R563
3.01K 3.01K 3.01K 3.01K C542
C544 C545
0.1uF 0.1uF
0.01uF
U507
MBI TOTAL CLOCK (U30 PIN 10) R570 C546 C547 R558 C548 R564 C543 16
VDD
C683 1K 1K 1K
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
10
A
PLL_MUXOUT
9
B
R592
6 13
INH XCOM SAMPLE_V_1
R586 1K
12
X0
1K R587 C557
1
Y0
0.01uF
R588 1K
14
X1
1K R589
5
Y1
R603 1K R593
15 3
X2 YCOM SAMPLE_V_2
1K R590 1K
2
Y2
R580 R604 1K C558
11 GND 8
3.01K X3
0.01uF
1K R596
R568 4
Y3
VEE 7
+16V +8V 3.01K 1K
4052
R581 C554 -5VA
-5VA
-16V
1K 0.1uF C561
R574 R576 R578 R582 R606 R594 0.1uF
3.01K 3.01K 3.01K R605 3.01K 3.01K 3.01K
A 1K A
COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC.
DWN. BY MATERIAL R
R575 R577 R579 R583 * R595
PROPRIETARY RIGHTS are included in
KT 3-7-02
1K
C551
1K
C552
1K
C553
1K
C555 R607
1K
C559 information disclosed herein. This informa-
tion is submitted in confidence and neither SEE BOM BROADCAST ELECTRONICS INC.
0.1uF 0.1uF 0.1uF 0.1uF 1K C511 0.1uF this document nor the information dis- DESIGNER(S)
0.1uF
closed herein shall be reproduced or trans-
ferred to other documents or used or dis-
919-0542 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
R677 -CLK_PLL_CS
1 1 3-11-02 PROTOTYPE RELEASE KT ----
1K DIG_POT_CS
2 2 7-12-02 Combined DTC and DSP____ Boards EG ----
D 3
A 9-6-02 Model Release with Changes EG ----
-VCO_PLL_CS
PLL_CLK B 11-07-02Add R692 R693 R694 R695 R696 R697 U527 TP554 L524 C686 C685 EG 10821
4
G
-441_PLL_CS Add MICRO RESET to J505 Pin 15, Change J505 Pins 37&38 to +12VC
Q512 S
5 C 2-4-03 No Changes to This Sheet EG ----
2N7002 PLL_D 6 D 5-14-03 No Changes to This Sheet EG 10969
7
E 3-1-04 No Changes to This Sheet EG 11111
PLL_LE
8
INT/EXT_CONT
D D
9
PS_MUX_0
PLL_D
10
PS_MUX_1
+5V
11
PS_MUX_2
U529
R610 R609 TX
12
LM317T
1K 1K +16V TP554 +12VC
RX
13 L524
3 2
D IN OUT
DI 14
DI .56uH
ADJ
15
R697 C685 C686
1
G
Q505 365 47uF 10uF
S
2N7002
16
F1
17
F0
R696
3.16K
18
E2
19
E1
20
E0
21
F2
22
-RC_SEL
U521
+8V
23 LT1085IT +5V TP544
MICRO RESET
24 L507 +5VA
3 2
IN OUT
QSPI_DIN 25 .56uH
ADJ
SAMPLE_V_2
QSPI_DOUT
26
R612 C610 C611
1
SAMPLE_V_1
QSPICLK
121 47uF 10uF
C J526 C
1 27
28
TO FILTER PCB
2
29
R611
365
3
30
AUX1OUT
31
4 +5V RESET_VIRTEX
U515 C598 32
FPGA_DONE
5 QSPI_FILTER_CS 15 16
Y0 VCC
U517
33
14 0.1uF REF_INT/EXT LM317T
6 Y1 +16V TP542 +12VA
+5V L508
13 1 3 2
Y2 A IN OUT
7
.56uH
ADJ
12 2
Y3 B 34
R614 C612 C613
1
8
CLOCK_VCO_VOLT
11 3 35 365 47uF 10uF
Y4 C
9 -12VA C565
10
C573 Y5 10uF
+16V C599
10 10uF 9 6
Y6 G1
R613
11 7 4 0.1uF 36
3.16K
Y7 G2A
8 5 +12VC
12 GND G2B
37
74ACT138
C572 38
10uF
C566
J526 10uF U519
13 LM337T TP543
RESET
B 14
2
IN OUT
3 B
39
ADJ
AES/EBU_FAULT
+5V
15
R616
1
CLOCK_PLL_LOCK 40 -16V -5VA
U516 C600 121 C614
+5V
41
16 15 16
Y0_CS Y0 VCC 10uF
42
14 0.1uF
Y1_CS Y1
+5V
43
13 1 C567 R615
Y2_CS Y2 A
10uF 44
365
12 2
Y3_CS Y3 B 45
R692 R693 R694 R695
11 3
Y4_CS Y4 C 10K 10K 10K 10K
46
10
Y5_CS Y5
-SPI_CS_2 47 U520
9 6
Y6_CS Y6 G1 LM337T TP545
-SPI_CS_3 48 L509
J516 +16V
Y7_CS
7
Y7 G2A
4
2 3
L504 -SPI_CS_4 49
IN OUT
.56uH
ADJ
1 8 5
GND G2B
-12VA
.56uH
R618
1
-SPI_CS_5 50 -16V
2 74ACT138 C615 C616
C604 C605 365
C601 10uF 10uF
10uF 10uF
3 .1uF
51
RERR -12V
4
L505 +8V
AUX1IN
52 R617
3.16K
5 .78uH 53
AUX2IN
6 C606 C607 54
C602 10uF 10uF IBOC_INSTALLED
.1uF
55
7 EXT_10MHz_DETECT
A A
L506 COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC.
8
56
DWN. BY MATERIAL R
.56uH
9 -16V 57
PROPRIETARY RIGHTS are included in
KT 3-7-02 SEE BOM
RESET
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC.
this document nor the information dis- DESIGNER(S)
C603 C608 C609
10
.1uF 10uF 10uF
TOS/XLR
58 closed herein shall be reproduced or trans-
ferred to other documents or used or dis- 919-0542 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
59 any other purpose except as specifically FINISH
AES_SRC_SEL
authorized in writing by BROADCAST TITLE
MPX_ENABLE
60
ELECTRONICS, INC.
CONTROLLER INT/ANALOG PS
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S D
.x + .030 .xxx + .005
COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC. NONE
.xx + .015 ANGLES + 1 MODEL SCALE SHEET 15 OF 18
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
A 9-6-02 Model Release with Changes EG ----
B 11-07-02 No Changes to This Sheet EG 10821
J507 C 2-4-03 No Changes to This Sheet EG ----
1 AES+ 41 QSPI_DOUT D 5-14-03 No Changes to This Sheet EG 10969
E 3-1-04 No Changes to This Sheet EG 11111
2 AES- 42 QSPICLK
3 43 QSPI_DIN
D D
4 44 +3.3VD
C663
5 DIG_POT_CS 45
10uF
6 PLL_CLK 46 LVDS2
+1.8VD
7 44.1KHZ_PLL_LOCK 47
8 48 LVDS1
+1.5VD
9 Y0_CS 49
10 Y1_CS 50 LVDS4
11 Y2_CS 51 SPARE1
12 Y3_CS 52 LVDS3
13 Y4_CS 53 44.1KHz_VOLTAGE
14 Y5_CS 54 LVDS6
-5VA
C664
15 Y6_CS 55
10uF
16 Y7_CS 56 LVDS5
C C
17 57 RESET
+12VA
+5VA
C632
18 58
10uF
19 59 IBOC_INSTALLED NC
20 60 AUX32
C633
21 61 AUX33
10uF
22 62 AUX34
C634
23 63 AUX35
10uF
-12VA
24 64 AUX36
25 65 AUX37
26 -CLK_PLL_CS 66 AUX38
27 -VCO_PLL_CS 67 AUX39
28 -441_PLL_CS 68 AUX40
29 PLL_D 69 AUX41
30 PLL_LE 70 AUX42
B B
31 71 AUX43
32 RERR 72 AUX44
33 AUX1IN 73 AUX45
34 AUX2IN 74 AUX46
35 IBOC_INSTALLED 75 AUX47
+8V
36 76 AUX48
37 AUX6 77 AUX49
38 78
39 79
+3.3VD
40 80
A A
COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC.
DWN. BY MATERIAL R
PROPRIETARY RIGHTS are included in
KT 3-7-02 SEE BOM
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC.
this document nor the information dis- DESIGNER(S)
closed herein shall be reproduced or trans-
ferred to other documents or used or dis- 919-0542 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
6
authorized in writing by BROADCAST 7 TITLE
ELECTRONICS, INC.
IBOC CARD INTERFACE
PROJ. LEADER
TYPE SIZE DWG. NO. REV
919-0542 E
TOLERANCE (DECIMAL) U.O.S.
MFG. NEXT ASSY.
S D
.x + .030 .xxx + .005
COPYRIGHT C 2002 BROADCAST ELECTRONICS, INC. NONE
.xx + .015 ANGLES + 1 MODEL SCALE SHEET 16 OF 18
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
REVISIONS
REV DATE DESCRIPTION DRAFTER APPROVED ECN
1 3-11-02 PROTOTYPE RELEASE KT ----
2 7-12-02 Combined DTC and DSP____ Boards EG ----
R636 A 9-6-02 Model Release with Changes EG ----
B 11-07-02 Switch to Green LED for DS501 - DS504 EG 10821
1K DS501
C 2-4-03 No Changes to This Sheet EG ----
2
GREEN D 5-14-03 No Changes to This Sheet EG 10969
GREEN
R635
RED
E 3-1-04 No Changes to This Sheet EG 11111
+5SW 1K ON +5V
1
L512 L513 L515 L516
D518 D520
D D
68uH 1uH TP503 68uH 1uH TP505
1N5818 TP504 1N5818 TP506
C639 C646
22uF C640 +5VD
22uF C647 +3.3VD
C638 D517 1uF C645 D519 1uF
3
DS502
GREEN
R631 R637
RED
15.8K 15.8K +5SW
GREEN
4
R632 R638
10K 10K R641 ON +3.3V
1K
R642
1K
C C
L518 L519
D522
68uH 1uH TP507
1N5818 TP508 L521 L522
D524
C653
22uF C654 +1.8VD 68uH 1uH
D521 C652 1uF 1N5818 TP509 TP510
R646 C660
MMBD914 1uF 22uF C661 +1.5VD
C650 4
GND
5
390pF GREEN 1uH
VIN FB/SENSE
C658
C649 100uF
BIAS
C673 ON +1.8V 3
BOOST VC
6
0.1uF LT1576 Q507 4 5
390pF
390pF MMBT3904 C657 GND
B C656 100uF
BIAS C674 B
C675 0.1uF LT1576
3
R673
R644 DS503 390pF Q508
GREEN
MMBT3904
RED
4.99K .001uF R672 C676
15.8K +5SW
3
R645 R651
2
4
R648 4.99K .001uF
10K
GREEN
DS504
RED
15.8K +5SW
1K R652 GREEN
4
10K ON +1.5V R655
R649
1K
1K
R656
1K
TP511
TP512
TP513
TP514
TP515
TP516
TP517
TP518
TP519
TP520
NOT PLACED
JP30
3
MANUAL RESET
2
+3.3VD
P30
1
R690
+3.3VD 4.75K
U39
RESET_UC R689 8 1
RESET MR
1K 7 2
R186 RESET VCC
6 3 Q513
NC GND Q514
*
47.5K 5 4
PFO PFI D D 2N7002
+3.3VD
MAX708T R691 R699
G RESET G MICRO RESET
*
C287 1K 1K
.1uF
JP14 2N7002
1 2 S S
JP13
3 4
Y6
1 2 5 6
3 4 7 8
5 6 C291 C292 9 10
12MHz
7 8 11 12
C 9
11
10
12
12pF 12pF
13
15
14
16
C
HEADER 6X2 HEADER 8X2
U38 AT89LS8252
32 10
PSEN RST
20 21 +3.3VD +3.3VD RP1
XTAL2 XTAL1
33 35
ALE/PROG EA/ VPP 1
19 43
RD/P3.7 P0.0/AD0 2
18 42
WR/P3.6 P0.1/AD1 3
17 41 Reset_Virtex
T1/P3.5 P0.2/AD2 4
16 40 Fpga_Done
PLL_CLC T0/P3.4 P0.3/AD3 5
15 39 Reset_FF
J9 PLL_DATA INT1/P3.3 P0.4/AD4 6
TX 14 38 Reset_FF2
PLL_LE INT0/P3.2 P0.5/AD5 7
5 13 37 Reset_Virtex2
TXD/P3.1 P0.6/AD6 8
9 11 36 Fpga2_Done
RXD/P3.0 P0.7/AD7 9
4 31 2 SFS2
P2.7/A15 P1.0/T2 SFS2
8 +5VD 30 3 SCK2 4.75K
P2.6/A14 P1.1/T2EX SCK2
3 29 4 SDIN2
P2.5/A13 P1.2 SDIN2
7 U37 LT1180A 28 5 SDOUT2
R659 P2.4/A12 P1.3 SDOUT2
2 15 12 SDOUT1 27 6
Tr1_Out Tr1_In P2.3/A11 P1.4/SS
6 1K 8 11 SDIN1 26 7
Tr2_Out Tr2_In P2.2/A10 P1.5/MOSI
1 2 5 SCK1 25 8
C1+ C2+ P2.1/A9 P1.6/MISO
R660 17 16 TP179 SFS1 24 9
C285 +5V GND C286 P2.0/A8 P1.7/SCLK
DB9
1K .1uF 4 6 .1uF
C1- C2-
14 13
Rec1_In Rec1_Out
9 10
Rec2_In Rec2_Out
7 3
V- V+ Reset_Virtex
RX 18 1 TP180
C288 on/off NC C290 Fpga_Done
.1uF Reset_FF
.1uF Reset_FF2
+5VD
R203 SFS1 Reset_Virtex2
SCK1 Fpga2_Done
3.32K SDIN1
C289
.1uF SDOUT1
B B
JP15 JP16
2 1 16 15
4 3 14 13
6 5 12 11
8 7 10 9
10 9 8 7
12 11 6 5
14 13 4 3
16 15 2 1
HEADER 8X2 HEADER 8X2
A
information disclosed herein. This informa-
tion is submitted in confidence and neither BROADCAST ELECTRONICS INC. A
this document nor the information dis- DESIGNER( S)
closed herein shall be reproduced or trans- 4100 N.24TH ST.,P.O.BOX 3606 QUINCY,IL 62305 217/224-9600
ferred to other documents or used or dis-
closed to others for manufacturing or for TELEX 250142 CABLE BROADCAST FAX 217/224-9607
any other purpose except as specifically FINISH
authorized in writing by BROADCAST TITLE
ELECTRONICS, INC.
MICRO CONTROLLER
PROJ. LEADER
TYPE SIZE DWG. NO. REV
TOLERANCE (DECIMAL) U.O.S.
S C E
MFG. NEXT ASSY.
.x + .030 .xxx + .005
.xx + .015 ANGLES + 1 MODEL SCALE NONE SHEET 18 OF 18