00 TE 242 - Syllabus - N - Schedule

TE 242: Digital Electronics for Engineers I – 2.
0 units
Course Description
The objective of the course is to build the students with the basic tools used in designing and
analysing basic digital circuits. The course also introduces the concept of Finite State Machine (FSM)
and CAD of digital circuits.
Objectives
1. To enable students understand the binary and hexadecimal numbering systems.
2. To enable students be able to design combinational logic systems using basic logic gates.
3. To enable students be able to optimize logic designs using Boolean algebra and Karnaugh maps
4. To enable students be able to design simple sequential circuits
5. To introduce the concept of Finite State Machine (FSM) and CAD of digital circuits
____________________ COURSE CONTENTS __________________
Introduction to digital technology and digital electronics: digital vs analog world, digital
systems
Number systems: numerical representations, different bases (binary, octal, hexadecimal, BCD),
conversion between the different bases.
Basic logic gates and Boolean algebra: Boolean constants and variable, OR operation, AND
operation, NOT operation, NOR operation, NAND operation, truth tables, basic logic gates, Boolean
algebra postulates and theorems, DeMorgan’s theorem, Boolean expression from simple combinational
logic circuits, EX-OR gate, EX-NOR gate.
Design of combinational logic circuits: definition, SoP and PoS representation, canonical
maxiterm/minterm expressions, algebraic simplification of logic circuits, Karnaugh method, don’t
cares, decoders, encoders, multiplexers.
Sequential logic circuits: definition, Flip-flops, NAND latch, NOR latch, clock signal and clocked flip-
flops, SR-FF, JK-FF, D-FF, synchronous inputs, asynchronous inputs, master/slave FF, flip-flop
applications, asynchronous and synchronous counters,
Concept of finite state machine (FSM)
CAD of digital circuits.
Recommended References/Textbooks
1. Ronald J. Tocci, “Digital Systems: Principles and Applications, “Prentice-Hall, 5th Ed. 1991.
2. Alan C. Dixon and James L. Antonakos, “Practical Approach to Digital Electronics, Prentice Hall, 1999.
3. Nigel P. Cook, “Introductory Digital Electronics, “Prentice Hall, 1997
4. Myke Predko, “Digital Electronics Demystified”, McGraw Hill, 2004
5 Dale R. Patrick, Stephen W. Fardo and Vigyan Chandra, “Electronic Digital System Fundamentals”,
Fairmont Press, 2007.
6 V.M. Rao and P.K. Srivastava, “Fundamentals of Digital Electronics and its Applications”, BPB
Publications, 2006
7 Nigel P. Cook, “A First Course in Digital Electronics”, Prentice Hall, 1998.
TE 242: Digital Electronics for Engineers I – 2.0 units
Semester 2 – 2010/2011
____________________ TENTATIVE COURSE SCHEDULE __________________
Session Topics Remarks
01 Introduction to digital technology and digital electronics: digital vs. analog world,
digital systems
02 Number systems: numerical representations, different bases (binary, octal, hexadecimal,
BCD), conversion between the different bases
Basic logic gates and Boolean algebra: Boolean constants and variable, OR operation,
03
AND operation, NOT operation, NOR operation, NAND operation, truth tables, basic
logic gates, Boolean algebra postulates and theorems, DeMorgan’s theorem, Boolean
expression from simple combinational logic circuits, EX-OR gate, EX-NOR gate
Basic logic gates and Boolean algebra: Boolean constants and variable, OR operation,
04
AND operation, NOT operation, NOR operation, NAND operation, truth tables, basic
logic gates, Boolean algebra postulates and theorems, DeMorgan’s theorem, Boolean
expression from simple combinational logic circuits, EX-OR gate, EX-NOR gate
04.5 Quiz (Saturday, May 21st – 08:30~09:30) 5%
05 maxiterm/minterm expressions, algebraic simplification of logic circuits, Karnaugh
method, don’t cares, decoders, encoders, multiplexers
06
maxiterm/minterm expressions, algebraic simplification of logic circuits, Karnaugh
method, don’t cares, decoders, encoders, multiplexers
06.5 Quiz (Saturday, June 11th – 08:00~09:30) 5%
Sequential logic circuits: definition, Flip-flops, NAND latch, NOR latch, clock signal and
07
clocked flip-flops, SR-FF, JK-FF, D-FF, synchronous inputs, asynchronous inputs,
master/slave FF, flip-flop applications, asynchronous and synchronous counters
Sequential logic circuits: definition, Flip-flops, NAND latch, NOR latch, clock signal and
08 clocked flip-flops, SR-FF, JK-FF, D-FF, synchronous inputs, asynchronous inputs,
master/slave FF, flip-flop applications, asynchronous and synchronous counters
09 Concept of finite state machine (FSM)
10 CAD of digital circuits

10.5 Test (Saturday, June 25th – 08:00~10:00) 20%
Assessment: CA (40%) - Test (20%) + 3 Quizzes (5% each) + Homeworks/Presentations/Projects/Viva voce (5%)
UE (60%) – End of the semester – strictly covering the whole syllabus and all the lectures
MAY JUNE JULY

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TE 242: Digital Electronics for Engineers I – 2.

__ COURSE CONTENTS

Concept of finite state machine (FSM)

CAD of digital circuits.

__ TENTATIVE COURSE SCHEDULE

Session Topics Remarks

09 Concept of finite state machine (FSM)

10 CAD of digital circuits

MAY JUNE JULY

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