Scientech 2601

Analog to Digital
Converter
Scientech 2601
Product Tutorials
Ver 1.1
Designed & Manufactured by-

An ISO 9001:2008 company
Scientech Technologies Pvt. Ltd.
94, Electronic Complex, Pardesipura, Indore - 452 010 India,
+ 91-731 4211100, : info@scientech.bz , : www.ScientechWorld.com
Scientech 2601
Analog to Digital Converter
Scientech 2601
Table of Contents
1. Safety Instructions 3
2. Introduction to TechBook 4
3. Features 5
4. Technical Specifications 6
5. Theory 7
• Introduction to A/D Converter 7
• Sampling theory 9
• Sampling techniques 13
• Quantization 23
• Sample and hold circuit 29
• Low pass filter 31
• Digital to analog converter 33
• Analog to digital conversion 35
• Parameters effecting A/D converter 46
6. Experiments
• Experiment 1 50
Analysis of operation of Counter Converter
• Experiment 2 52
Testing the working of a Monolithic converter
7. Frequently Asked Questions 55
8. Warranty 58
9. List of Accessories 58
Scientech Technologies Pvt. Ltd. 2

Scientech 2601
Safety Instructions
Read the following safety instructions carefully before operating the instrument. To
avoid any personal injury or damage to the instrument or any product connected to it.
Do not operate the instrument if suspect any damage to it.
The instrument should be serviced by qualified personnel only.
For your safety:

Use proper Mains cord : Use only the mains cord designed for this instrument.
Ensure that the mains cord is suitable for your
country.
Ground the Instrument : This instrument is grounded through the protective
earth conductor of the mains cord. To avoid electric
shock the grounding conductor must be connected to
the earth ground. Before making connections to the
input terminals, ensure that the instrument is properly
grounded.
Observe Terminal Ratings : To avoid fire or shock hazards, observe all ratings and
marks on the instrument.
Use only the proper Fuse : Use the fuse type and rating specified for this
instrument.
Use in proper Atmosphere : Please refer to operating conditions given in the
manual.
1. Do not operate in wet / damp conditions.
2. Do not operate in an explosive atmosphere.
3. Keep the product dust free, clean and dry.

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Introduction
The digital systems have been spreading considerably since they allow to realize
complex functions accurately, low cost and in a way comparatively simple to
implement. Analog/digital converters are the natural interface between the world of
physical quantities that vary analogically i.e. in a continuous way and that of the
digital control systems which vary with finite increases. A/D converters have
numerous applications and consequently have a high diffusion. Just think for example
of the digital multi-meters. Each one of this contains an A/D converter for converting
the analog quantity that has to be measured to corresponding numerical value.

Scientech 2601
Features
• Self contained TechBook
• Functional block indicated on board mimic
• Discrete and monolithic A/D conversion
• O/P status displayed by LED
• Fully documented student WB & OM
• Built in DC Power Supply
• Compact size

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Technical Specifications
A/D Conversion : 1. 4 bit discrete (ramp)

2. 8 bit Monolithic converter.
Signal Source : Unipolar & Bipolar DC voltage
O/P indication : By LEDs (separate for each type)
Interconnections : 4 mm banana socket
Dimensions (mm) : W420, X H100, X D255
Weight : 2 Kgs. approximately
Power : 230V±10%; 50 Hz

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Theory
Analog to Digital Converters (ADC) are devices that convert continuous signals to
discrete digital numbers. Analog to Digital Converters is commonly of two types.
Linear Analog to Digital Converter is designed to produce an output which is a linear
function or proportional to the output. The other common type of Analog to Digital
Converter is the Logarithmic Analog to Digital Converter, which functions by using
voiced communications systems to increase the entropy of the digitized signal.
Analog to Digital Converter models produced today are highly configurable and can
run largely free of program involvement. The other features include Single channel,
single conversion, Single channel repeated conversions, Multiple channel single
conversion each, and Multiple channel-repeated conversions. Analog to digital
converters (ADC's) are used in many applications. ADC's are used to convert an
analog signal to a digital bit representation for analog video signal, audio signals and
any other suitable analog signals. Analog to digital converters have been used in
communication applications to provide an effective way of converting analog signals
into digital signals. Analog to digital converters range in size, complexity, and
accuracy or resolution, where each of these factors depends upon the particular needs
of the underlying application.
Why to use analog to digital converter:
A digital signal is superior to an analog signal because it is more robust to noise and
can easily be recovered, corrected and amplified. For this reason, the tendency today
is to change an analog signal to digital data.
Introduction to analog to digital converter:
In analog to digital converter, analog signal is converted into discrete values. First of
all, sampling of the analog signal should be performed. Considering the sampling
process, the sampled signal appears as a train of samples which is a form of PAM
(Pulse Amplitude Modulation) signal. Analog to digital converter process is executed
in three steps:
1. Sampling
2. Quantizing
3. Coding
These steps are shown in Figure 1 with a block diagram:

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Figure 1
Analog to Digital Conversion process

Figure 2

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Steps involved in analog to digital conversion:

Sampling:
The signals which are required to be transmitted as information is known as
information signal and in the case of voice communication this will be a continuously
changing signal containing speech information. The aim of the kit is to transmit the
signals in digital form and is to reproduce this information signal in analog form at the
receiving end of the communication system with the help of sampling and
reconstruction TechBook.
In the exercises to follow, you will simulate audio signal by a 1 KHz test signal
provided On-board. The repetitive, non-changing waveform does not contain
information. Provided the frequency of the test-signal lies within the frequency range
which an information signal will occupy, a test signal of this type can be extremely
helpful in system analysis and testing.
The voice signals are limited to the range 300 Hz to 3.4 KHz, a 1 KHz frequency fits
conveniently in this range and can be used to demonstrate and test many techniques
used in communication system.
Theory of sampling:
The signals we use in the real world, such as our voice, are called "analog" signals.
To process these signals for digital communication, we need to convert analog signals
to "digital" form. While an analog signal is continuous in both time and amplitude, a
digital signal is discrete in both time and amplitude. To convert continuous time
signal to discrete time signal, a process is used called as sampling. The value of the
signal is measured at certain intervals in time. Each measurement is referred to as a
sample.
Principle of sampling:
Consider an analogue signal x(t) that can be viewed as a continuous function of time,
as shown in figure 3. We can represent this signal as a discrete time signal by using
values of x(t) at intervals of nTs to form x(nTs) as shown in figure 3. We are
"grabbing" points from the function x(t) at regular intervals of time, Ts, called the
sampling period.
Basic Sampling Process

Figure 3

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Sampling of signal at sampling interval (period) Ts

Figure 4
Figure 4 depicts the sampling of a signal at regular interval (period) t=nTs where n is
an integer. The sampling signal is a regular sequence of narrow pulses δ (t) of
amplitude 1.Figure 5 shows the sampled output of narrow pulses δ (t) at regular
interval of time.
Sampled Output of narrow pulses δ (t)

Figure 5
The time distance Ts is called sampling interval or sampling period, fs=1/Ts is called
as sampling frequency (Hz or samples/sec), also called sampling rate.

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The Sampling Theorem:

The Sampling Theorem states that a signal can be exactly reproduced if it is sampled
at a frequency Fs, where Fs is greater than twice the maximum frequency Fmax in the
signal.
Fs > 2· Fmax
The frequency 2·Fmax is called the Nyquist sampling rate. Half of this value, Fmax,
is sometimes called the Nyquist frequency.
The sampling theorem is considered to have been articulated by Nyquist in 1928 and
mathematically proven by Shannon in 1949. Some books use the term "Nyquist
Sampling Theorem", and others use "Shannon Sampling Theorem". They are in fact
the same sampling theorem.
The sampling theorem clearly states what the sampling rate should be for a given
range of frequencies. In practice, however, the range of frequencies needed to
faithfully record an analog signal is not always known beforehand. Nevertheless,
engineers often can define the frequency range of interest. As a result, analog filters
are sometimes used to remove frequency components outside the frequency range of
interest before the signal is sampled.
For example, the human ear can detect sound across the frequency range of 20 Hz to
20 KHz. According to the sampling theorem, one should sample sound signals at least
at 40 KHz in order for the reconstructed sound signal to be acceptable to the human
ear. Components higher than 20 KHz cannot be detected, but they can still pollute the
sampled signal through aliasing. Therefore, frequency components above 20 KHz are
removed from the sound signal before sampling by a band-pass or low-pass analog
filter.
Nyquist Criterion
As shown-in the figure 6 the lowest sampling frequency that can be used without the
sidebands overlapping is twice the highest frequency component present in the
information signal. If we reduce this sampling frequency even further, the sidebands
and the information signal will overlap and we cannot recover the information signal
simply by low pass filtering. This phenomenon is known as fold-over distortion or
aliasing.

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Nyquist Criterion (Sampling Theorem)

Figure 6
The Nyquist criteria states that a continuous signal band limited to Fm Hz can be
completely represented by and reconstructed from the samples taken at a rate greater
than or equal to 2Fm samples/second.
This minimum sampling frequency is called as Nyquist Rate i.e. for faithful
reproduction of information signal fs > 2 fm.
For audio signals the highest frequency component is 3.4 KHz.
So, Sampling Frequency ≥ 2 fm
≥ 2 x 3.4 KHz
≥ 6.8 KHz
Practically, the sampling frequency is kept slightly more than the required rate. In
telephony the standard sampling rate is 8 KHz. Sample quantifies the instantaneous
value of the analog signal point at sampling point to obtain pulse amplitude output.

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Nyquist’s Uniform Sampling Theorem for Low pass Signal:

Part - I If a signal x(t) does not contain any frequency component beyond W Hz, then
the signal is completely described by its instantaneous uniform samples with sampling
interval (or period ) of Ts < 1/(2W) sec.
Part – II The signal x(t) can be accurately reconstructed (recovered) from the set of
uniform instantaneous samples by passing the samples sequentially through an ideal
(brick-wall) low pass filter with bandwidth B, where W ≤ B < fs – W and fs = 1/(Ts).
As the samples are generated at equal (same) interval (Ts) of time, the process of
sampling is called uniform sampling. Uniform sampling, as compared to any non-
uniform sampling, is more extensively used in time-invariant systems as the theory of
uniform sampling (either instantaneous or otherwise) is well developed and the
techniques are easier to implement in practical systems.
Sampling Techniques:
There are three types of sampling techniques as under:
1. Ideal sampling or Instantaneous sampling or Impulse sampling
2. Natural sampling
3. Flat top sampling
1. Ideal sampling or Instantaneous sampling or Impulse sampling:
For the proof of sampling theorem we use ideal or impulse sampling.
The concept of ‘instantaneous’ sampling is more of a mathematical abstraction as no
practical sampling device can actually generate truly instantaneous samples (a
sampling pulse should have non-zero energy). However, this is not a deterrent in
using the theory of instantaneous sampling, as a fairly close approximation of
instantaneous sampling is sufficient for most practical systems. To contain our
discussion on Nyquist’s theorems, we will introduce some mathematical expressions.
If x(t) represents a continuous-time signal, the equivalent set of instantaneous uniform
samples {x(nTs)} may be represented as:
{x(nTs)} = Σ x(t).δ(t- nTs)

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Where x (nTs) = x(t) =nTs , δ(t) is a unit pulse singularity function and ‘n’ is an
integer
Ideal sampling process

Figure 7(a)
Figure 7(b)

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2. Natural sampling:
In the analogue-to-digital conversion process an analogue waveform is sampled to
form a series of pulses whose amplitude is the amplitude of the sampled waveform at
the time the sample was taken. In natural sampling the pulse amplitude takes the
shape of the analogue waveform for the period of the sampling pulse as shown in
figure 8.
Figure 8
3. Flat Top sampling:
After an analogue waveform is sampled in the analogue-to-digital conversion process,
the continuous analogue waveform is converted into a series of pulses whose
amplitude is equal to the amplitude of the analogue signal at the start of the sampling
process. Since the sampled pulses have uniform amplitude, the process is called flat
top sampling as shown in figure 9.
Figure 9
Note that due to the flat-top pulses, the spectrum of the sampled signal is distorted.
The narrower the pulse width, the less distortion.
The original signal may be obtained by using a low-pass filter with a characteristic
which inverts the distortion.

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1. Aliasing:
A precondition of the sampling theorem is that the signal to be band limited.
However, in practice, no time-limited signal can be band limited. Since signals of
interest are almost always time-limited (e.g., at most spanning the lifetime of the
sampling device in question), it follows that they are not band limited. However, by
designing a sampler with an appropriate guard band, it is possible to obtain output that
is as accurate as necessary.
Aliasing is the presence of unwanted components in the reconstructed signal. These
components were not present when the original signal was sampled. In addition,
some of the frequencies in the original signal may be lost in the reconstructed signal.
Aliasing occurs because signal frequencies can overlap if the sampling frequency is
too low. As a result, the higher frequency components roll into the reconstructed
signal and cause distortion of the signal Frequencies "fold" around half the sampling
frequency. This type of signal distortion is called aliasing.
We only sample the signal at intervals.
We don't know what happened between the samples.
A crude example is to consider a 'glitch' that happened to fall between adjacent
samples. Since we don't measure it, we have no way of knowing the glitch was there
at all.
Example of aliasing
Figure 10

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In a less obvious case, we might have signal components that are varying rapidly in
between samples. Again, we could not track these rapid inter-sample variations.
We must sample fast enough to see the most rapid changes in the signal.
Sometimes we may have some a prior knowledge of the signal, or be able to make
some assumptions about how the signal behaves in between samples.
If we do not sample fast enough, we cannot track completely the most rapid changes
in the signal.
Some higher frequencies can be incorrectly interpreted as lower ones.
Example of High frequency signal

Figure 11
In the diagram, the high frequency signal is sampled just under twice every cycle. The
result is that each sample is taken at a slightly later part of the cycle. If we draw a
smooth connecting line between the samples, the resulting curve looks like a lower
frequency. This is called 'aliasing' because one frequency looks like another.
Note that the problem of aliasing is that we cannot tell which frequency we have - a
high frequency looks like a low one so we cannot tell the two apart. But sometimes
we may have some a prior knowledge of the signal, or be able to make some
assumptions about how the signal behaves in between samples, that will allow us to
tell unambiguously what we have.

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Nyquist showed that to distinguish unambiguously between all signal frequencies

components we must sample faster than twice the frequency of the highest frequency
component.
Sampling process as per the Nyquist criteria

Figure 12
In the diagram, the high frequency signal is sampled twice every cycle. If we draw a
smooth connecting line between the samples, the resulting curve looks like the
original signal. But if the samples happened to fall at the zero crossings, we would see
no signal at all - this is why the sampling theorem demands we sample faster than
twice the highest signal frequency.
The highest signal frequency allowed for a given sample rate is called the Nyquist
frequency.
Actually, Nyquist says that we have to sample faster than the signal bandwidth, not
the highest frequency. But this leads us into multi rate signal processing which is a
more advanced subject.

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Anti-aliasing:
Nyquist showed that to distinguish unambiguously between all signal frequencies
components we must sample at least twice the frequency of the highest frequency
component. To avoid aliasing, we simply filter out all the high frequency components
before sampling.
Example of anti-aliasing
Figure 13
Note that anti-alias filters must be analogue – it is too late once you have done the
sampling.
This simple brute force method avoids the problem of aliasing. But it does remove
information – if the signal had high frequency components, we cannot now know
anything about them.
Although Nyquist showed that provide we sample at least twice the highest signal
frequency we have all the information needed to reconstruct the signal, the sampling
theorem does not say the samples will look like the signal as shown in figure 14.

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Example of sampling theorem

Figure 14
The diagram shows a high frequency sine wave that is nevertheless sampled fast
enough according to Nyquist sampling theorem – just more than twice per cycle.
When straight lines are drawn between the samples, the signal’s frequency is indeed
evident – but it looks as though the signal is amplitude modulated. This effect arises
because each sample is taken at a slightly earlier part of the cycle. Unlike aliasing, the
effect does not change the apparent signal frequency. The answer lies in the fact that
the sampling theorem says there is enough information to reconstruct the signal – and
the correct reconstruction is not just to draw straight lines between samples.
The signal is properly reconstructed from the samples by low pass filtering: the low
pass filter should be the same as the original anti-alias filter.
Example of anti-aliasing
Figure 15

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The reconstruction filter interpolates between the samples to make a smoothly varying
analogue signal. In the example, the reconstruction filter interpolates between samples
in a ‘peaky’ way that seems at first sight to be strange. The explanation lies in the
shape of the reconstruction filter’s impulse response.
Low pass filter response

Figure 16
The impulse response of the reconstruction filter has a classic 'sin(x)/x shape. The
stimulus fed to this filter is the series of discrete impulses which are the samples.
Every time an impulse hits the filter, we get 'ringing' - and it is the superposition of all
these peaky rings that reconstructs the proper signal. If the signal contains frequency
components that are close to the Nyquist, then the reconstruction filter has to be very
sharp indeed. This means it will have a very long impulse response - and so the long
'memory' needed to fill in the signal even in region of the low amplitude samples.
To avoid the aliasing there are two approaches:
1. To raise the sampling frequency to satisfy the sampling theorem,
2. The other is to filter off the unnecessary high-frequency component from the
continuous-time signal. We limit the signal frequency by an effective low pass
filter, called anti aliasing pre filter, so that the remained highest frequency is less
than half of the intended sampling rate. If the filter is not perfect we must give
some allowance.
The schematic below repeats the above aliasing argument in the frequency domain.
Spectrum of Under Sampled Signal

Figure 17

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Reason for aliasing & its preventation:

1. Aliasing due to Under-Sampling:
If the signal is sampled at rate lower than 2Fm then it causes aliasing. Let us assume a
sinusoidal waveform of frequency FIN which is being sampled at rate Fs < 2Fm. In the
figure 18 dots represents the sample points.
The low-pass filter at demodulator effectively 'joins' the sample causing an unwanted
frequency component to appear at the output. This unwanted component has
frequency equal to (FS-FM)
Aliasing due to Under - Sampling

Figure 18
2. Aliasing due to wide Band Signal:
The system is designed to take samples at frequency slightly greater than that stated
by Nyquist rate. If higher frequencies are ever present in the information signal or it is
affected by high frequency noise then the aliasing will occur.
This does not generally happen in properly designed telephone network where speech
channels are band-limited by filters before sampling.
In control engineering and telemetry, however, out of band high frequencies either
from source or due to noise pick-up can be present. In this case band-limiting filters,
generally known as anti-aliasing filters are usually installed prior to sampling to
prevent aliasing.
As a principle, the system is designed to sample at rate higher than the rate to take
into account the equipment tolerances, aging and filter response.

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3. Aliasing Due to Filter Roll-off:

Roll-off is a term applied to the cut-off gradient of a filter. No filter is ideal and
therefore frequencies above the nominal cut-off frequency may still have significant
amplitudes at a filter's output. If proper sampling rate and appropriate filter response
is not chosen, aliasing will occur.
4. Aliasing due to Noise:
If very small duty cycle is used in sample-and-hold circuit aliasing may occur if the
signal has been affected by noise. High frequency noise generally ‘mixes’ with the
high frequency component of the signal and hence causes undesirable frequency
components to be present at the output.
Quantization:
In quantization the levels are assigned a binary codeword. All sample values falling
between two quantization levels are considered to be located at the centre of the
quantization interval. In this manner the quantization process introduces a certain
amount of error or distortion into the signal samples. This error known as quantization
noise is minimized by establishing a large number of small quantization intervals. Of
course, as the number of quantization intervals increase, so must the number or bits
increase to uniquely identify the quantization intervals. For example, if an analogue
voltage level is to be converted to a digital system with 8 discrete levels or
quantization steps three bits are required. In the ITU-T version there are 256
quantization steps, 128 positive and 128 negative, requiring 8 bits. A positive level is
represented by having bit 8 (MSB) at 0 and for a negative level the MSB is 1.
This is the process of setting the sample amplitude, which can be continuously
variable to a discrete value. Look at Uniform Quantization first, where the discrete
values are evenly spaced.

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Uniform Quantization
We assume that the amplitude of the signal m(t) is confined to the range (-mp, +mp ).
This range (2mp) is divided into L levels, each of step size δ, given by
δ = 2 mp / L
A sample amplitude value is approximated by the midpoint of the interval in which it
lies. The input/output characteristic of a uniform quantizer is shown figure 19.
Output
-m p +m p
δ In p u t
Figure 19
The conventional, practical digital-to-analog converter (DAC) does not output a
sequence of impulses (such that, if ideally low-pass filtered, result in the original
signal before sampling) but instead output a sequence of piecewise constant values or
rectangular pulses. This means that there is an inherent effect of the zero-order hold
on the effective frequency response of the DAC resulting in a mild roll-off of gain at
the higher frequencies (a 3.9224 dB loss at the Nyquist frequency). This zero-order
hold effect is a consequence of the hold action of the DAC and is not due to the
sample and hold that might precede a conventional ADC as is often misunderstood.
The DAC can also suffer errors from jitter, noise, slewing, and non-linear mapping of
input value to output voltage.
Each binary word defines a particular narrow range of amplitude level. The sampled
value is then approximated to the nearest amplitude level. The sample is then assigned
a code corresponding to the amplitude level, which is then transmitted.
This process is called as Quantization & it is generally carried out by the A/D
converter.
The analog to digital conversion is a logical process that requires conceptually
two-steps: the Quantizing and the Coding. Quantization is the process that performs
the transformation of a continuous analog signal in a set of discrete levels. Soon
afterwards we combine through the coding each discrete levels with a digital word.

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The figure 20 shows what explains above lines:
Figure 20
The straight line is the continuous analog signal, while the staircase line is the
quantized corresponding signal. If we assume a binary code, the 8 quantized states are
coded through a 3 bits digital word and this corresponds to the output of a 3 bits A/D
converter. The sequences of binary numbers starting from "000" and reaching "111"
are assigned to the 8 output states. Let us analyze in detail a few aspects of the
quantized signal. The first aspect is the "resolution", defined as the number of output
states that can be coded through a binary word of n bits; with n bits we can code 2n
output states. In this case we have a 3 bits quantizer; therefore we code 8 output states
whereas with 12 bits we code 4096 of them. The diagram showed in figure 20 point
out that in the quantized signal there are 2n - 1 = 7 threshold levels. These points are at
0.625 - 1.875 - 3.125 - 4.375 - 5.625 - 6.875 - 8.125 V.
The threshold points have to be set accurately to divide the range of the signal to
quantize in correct quantized signals. The voltages 1.25, 2.5, 3.75, 5, 6.25, 7.5, 8.75 V
are the center points of each output code word. The staircase quantization is the best
possible approximation for a straight line starting from the origin and reaching full
scale. The range of the input voltage for which the same output code is used is called
"quantum". In figure 20, the quantum is 1.25 V. In general the quantum is expressed
by the relation:
Q = FSR / 2n = Full scale range / 2n

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It is explained that the quantum is the lowest analog difference that can be
discriminated at the output. In case of a 12 bits quantizer, still with a full scale of 10V
the quantum is:
Q = 10/212 = 10/4096 = .00244 V = 2.44 mV
In figure 20 is also reported a curve called "quantizing error". This represents the error
that could not be eliminated, due to quantization. Increasing the bit number can
reduce the error. The uncertainty due to quantization and therefore the error due to
quantization is ± Q/2. A/D converter requires a given time interval, even small, to
perform the quantizing and coding operations. This time is called "conversion time"
and depends on several factors, as the converter resolution, the conversion technique,
the speed of the components used in the converter.
During the conversion the signal can vary. Therefore the conversion speed for a given
application depends both upon the required accuracy and upon how much rapidly
varies the signal to convert. The conversion time is often called improperly "aperture
time" ta (figure 21)
Figure 21
If the signal changes of ∆V during the conversion, we have an amplitude error ∆V
which is :
∆V = ta ⋅ dV(t) / dt
Where dV(t) /dt is the rate of change of input signal with time. A signal has not the
same rate of variation everywhere, e.g. a sinusoidal signal has the biggest derivative at
the zero passage.
Sample & Hold circuit:
In electronics, a sample and hold circuit is used to interface real-world signals, by
changing analogue signals to a subsequent system. The purpose of this circuit is to
hold the analogue value steady for a short time while the converter or other following
system performs some operation that takes a little time.

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Sampling mode:
In this mode, the switch is in the closed position and the capacitor charges to the
instantaneous input voltage.
Hold mode:
In this mode, the switch is in the open position. The capacitor is now disconnected
from the input. As there is no path for the capacitor to discharge, it will hold the
voltage on it just before opening the switch. The capacitor will hold this voltage till
the next sampling instant.
Sample and Hold Waveform

Figure 22
Now, from figure 22 the area under the curve (which is equivalent to the signal
power) is greater and so the filter output amplitude and quality of reproduced signal is
improved.
In most circuits, a capacitor is used to store the analogue voltage and an electronic
switch or gate is used to alternately connect and disconnect the capacitor from the
analogue input. The rate at which this switch is operated is the sampling rate of the
system.
In a sample and hold circuit the switch opens for a very short duration. The sample
and hold circuit integrates for a short duration charge into a capacitor.
The 'hold' facility can be provided by a capacitor, when the switch connects the
capacitor to PAM output it charges to the instantaneous value.

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A buffered sample and hold circuit consists of unit gain buffer preceding and
succeeding the charging capacitor. The high input impedance of the preceding buffer
prevents the loading of the message source and also ensures that the capacitor charges
by a constant rate irrespective of the source impedance see figure 23(a).
Sample Hold Circuit

Figure 23(a)
The high input impedance of the succeeding buffer prevents the charging from the
capacitor due to loading and hence the capacitor can hold the charge for infinite time,
at least theoretically. However, small leakage current through the capacitor dielectric
into '+'ve input of second buffer is always present which causes gradual charge loss.
The rate of change of voltage with respect to time dv / dt is called as droop rate and is
important parameter in sample and Hold circuit design. The sample and hold
waveform is shown in figure 23(b).
Sample and hold wave form

Figure 23(b)

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Important Parameters of Sample & Hold Circuit

1. Aperture time:
The aperture time is defined as the delay time between the beginnings of the hold
command to the time the capacitor voltage ceases to follow the information signal.
Hence the hold value is different from the true sample value. The aperture time cannot
be reducing to zero because on application of finite time taken by a switch to close &
open on application of the hold signal. Therefore a small value of aperture time is
sought after.
Timing Diagram for Sample and Hold Circuit

Figure 24(a)
2. Acquisition Time:
In sample mode, it takes finite time for the capacitor to charge to the information
signal value depending on the RC time constant. This is called as the acquisition time.
The acquisition time is dependent on the current flowing from the input buffer
through switch and hence on RC time constant. The maximum acquisition time occurs
when the capacitor voltage has to change by the full amplitude of the information
signal.
3. Droop Rate:
As it has been discussed earlier, the presence of leakage current through capacitor
dielectric to +ve input of succeeding buffer causes charge loss of capacitor. Hence the
voltage level at the output falls with in time. This rate of change of voltage with
respect to time dv/dt is known as droop rate. Over value of droop rate is desirable as
the circuit should be able to maintain the sample at a relatively constant level until the
next sample.
4. Feed Through:
At high frequencies, the stray capacitance within the switch causes some of the input
signal to appear at the output during the hold state (switch open). The fraction of input
signal appearing at the output of sample and hold circuit is called feed through.

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Quantization & Encoding of a sampled signal
Figure 24(b)

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Low Pass Filter

Reconstruction of the message signal is done with the help of Low pass filter. Low
pass filter pass the message signal as low frequency signals and higher frequency
signals are attenuated.
Filter Basic:
The simplest type of filter is a resistance-capacitance (RC) filter. The high pass and
low pass RC filters are as shown in figure 25 (a) & 25 (b).
The analysis of these filters becomes easier if we think of them as A.C. potential
dividers. The reactance of the capacitor is frequency dependent with a high value at
low frequencies and a low value at high frequencies.
Passive High Pass Filter

Figure 25 (a)
Passive Low Pass Filter

Figure 25 (b)

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In case of high pass filter, the series capacitance has high reactance at low frequencies
and hence results in reduction in output voltage. An increase in frequency causes an
increase in output voltage with VOUT approaching input voltage VIN.
The effect of capacitance is just opposite as the case of low pass filter. Here, the
capacitance is in short and hence VOUT reduces as frequency increases thereby
decreasing its reactance.
The ratio of VOUT to VIN is known as Transfer function for the circuit. For RC low pass
filter, the transfer function can be derived by using potential divider resistance.
So,
This is the half-power point of the filter i.e. at frequency ω = RC, the output power
decreases to half of the input power. This is also known as the cut-off frequency (Fc).
The filter not only causes amplitude change but a change in phase is also experienced.

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D/A Conversion
A digital-to-analog converter, or simply DAC, is a semiconductor device that is
used to convert a digital code into an analog signal. Digital-to-analog conversion is
the primary means by which digital equipment such as computer-based systems are
able to translate digital data into real-world signals that are more understandable to or
useable by humans, such as music, speech, pictures, video, and the like. It also allows
digital control of machines, equipment, household appliances, and the like.
A typical digital-to-analog converter outputs an analog signal, which is usually
voltage or current that is proportional to the value of the digital code provided to its
inputs. Most DAC's have several digital input pins to receive all the bits of its input
digital code in parallel (at the same time). Some DAC's, however, are designed to
receive the input digital data in serial form (one bit at a time), so these only have a
single digital input pin.
A simple DAC may be implemented using an op-amp circuit known as a summer, so
named because its output voltage is the sum of its input voltages. Each of its inputs
uses a resistor of different binary weight, such that if R0=R, then R1=R/2, R2=R/4,
R3=R/8,.., RN-1=R/(2N-1). The output of a summer circuit with N bits is:
Vo = -VR (Rf / R) (SN-12N-1 + SN-22N-2+...+S020)
Where VR is the voltage to which the bit is connected when the digital input is '1'. A
digital input is '0' if the bit is connected to 0V (ground). A 4-bit summer circuit is
shown in Figure 26.
An Op Amp Summer Circuit Used as a DAC

Figure 26

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One problem with this circuit is the wide range of resistor values needed to build a
DAC with a high number of digital inputs. Putting thin-film resistors that come in a
wide range of values (e.g., from a few kΩs to several MΩs) on a single semiconductor
chip can be very difficult, especially if high accuracy and stability are required.
A better-designed and more commonly-used circuit for digital-to-analog conversion is
known as the R-2R ladder DAC, a 4-bit version of which is shown in Fig. 29. It
consists of a network of resistors with only two values, R and 2R. The input SN to bit
N is '1' if it is connected to a voltage VR and '0' if it is grounded. Thevenin's Theorem
may be applied to prove that the output Vo of an R-2R ladder DAC with N bits is:
Vo = VR/2N (SN-12N-1 + SN-22N-2+...+S020).
Thus, the output of the R-2R ladder in Figure 27 is Vo = VR/24 (S323+S222+S121+S020)
or Vo = VR (S3 / 2 + S2 / 4 + S1 / 8 + S0 / 16) . In effect, contribution of each bit to the
analog output is proportional to its binary weight.
A 4-bit R-2R Ladder DAC

Figure 27

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Analog to Digital Conversion

Analog to digital (A/D, ADC) converters are electrical circuit devices that convert
continuous signals, such as voltages or currents, from the analog domain to the digital
domain where the signals are represented by numbers. Most processing equipment
today are digital in nature, and they work with signals which are binary valued. In a
digital or binary representation, a signal is represented by a word, which is composed
of a finite number of bits. The processing of signals is preferably carried out in the
digital domain because digital processing is fast, accurate and reliable. Analog to
digital converters are widely used for converting analog signals to corresponding
digital signals for many electronic circuits. Analog to digital converters allow the use
of sophisticated digital signal processing systems to process analog signals, which are
common in the real world. Many modern electronic systems require conversion of
signals from analog to digital or from digital to analog form. Circuits for performing
these functions are now required in numerous common consumer devices such as
digital cameras, cellular telephones, wireless data network equipment, audio devices
such as MP3 players. Analog to digital converters (ADC's) form an essential link in
the signal processing pathway at the interface between the analog and digital domains.
Advances in ADC technology have increased the speed, lowered the cost, and reduced
the power requirements of analog to digital converters, and resulted in a proliferation
of ADC applications.
Analog to digital converters perform a common and basic function that is necessary in
many different types of applications. The primary function of an ADC is to convert an
analog input signal to a digital value or binary code for use by various circuits and
electronic devices. A simple ADC generally provides a low resolution digital
representation for each sample, such as an eight-bit value, for example. More complex
ADCs provide higher accuracy's, such a sixteen-bit values, or higher. The A/D
converter may be part of a large analog system, and is frequently the component that
limits the performance of the system. A process of converting an analog signal into a
digital signal comprises measuring the amplitude of the analog signal at consistent
time intervals and producing a set of signals representing the measured digital value.
The information in the digital signals and the known time interval enables one to
convert the digital signal back to the analog signal. Analog to digital conversion of a
continuous input signal normally occurs in two steps: sampling and quantization. The
sampler takes a time-varying analog input signal and converts it to a fixed voltage,
current, electrical charge, or other output level. The quantizer takes the constant
sampled level and compares it to the closest level from a discrete range of values
called quantization levels. The performance of analog and digital converters is
typically quantified by two primary parameters, speed (in samples per second) and
resolution (in bits). Higher resolution A/D converters typically require a large signal
to noise ratio and good linearity. A/D converters with high sampling rates are
frequently desired, but generally have lower resolution.

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There are two basic techniques for performing analog to digital conversion: an open-
loop technique and a feedback technique. An analog to digital converter is typically
tested to assure proper function during operation by identifying repeatable
discrepancies between the sampled analog signal and the corresponding value of the
converted digital instance.
Analog to digital converters provide the link between analog and digital domains. The
ADC is required to be capable of converting analog data to digital data in an accurate
manner, appropriate to the bandwidth and resolution requirements of particular
application. Analog ICs often require the use of, and constantly consume, a DC bias
current. Digital integrated circuits are ICs which process digital signals. A/D
converters are designed to process analog signals over a specified range of analog
signal values. When the input signal exceeds the specified peak input signal level, the
output registers of the A/D converter overflow. A/D converters are often used with
microprocessors to convert an analog signal to a corresponding digital signal which is
processed by the microprocessor.
Types of Analog to digital converter:
There are variety of A/D converter exist, including flash ADC, sub-ranging ADC,
successive approximation ADC, pipelined ADC, integrating ADC, and sigma delta or
delta sigma A/D converters.
1. Flash ADC:
Flash ADC is performed by a highly parallel comparison of an input analog signal to
each of a set of reference voltages. A flash converter uses a resistive divider to obtain
the quantization. A flash converter has multiple reference levels and comparators.
Each comparator compares the analog input signal to one of the reference levels and
produces an output that indicates whether the input is above or below the reference
level. Flash ADC can provide very high speed and accuracy at the cost of high
component count and high power consumption. Flash ADCs are limited by higher
input capacitance, power consumption, and device yield constraints associated with
the high number of comparators in the circuitry.

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Figure 28
2. Successive approximation ADC:

Successive approximation ADC uses one or a few comparators, operated iteratively,
to yield high accuracy conversion with far fewer components than flash conversion.
A/D converter using successive approximation technique effectively performs a
binary search in a digital analog look up table and using a digital to analog converter
(DAC) and comparator circuit. Successive approximation converters also allow higher
resolutions but tend to be slower since they usually require N cycles to produce the
answer. Successive approximation ADC operates at much slower conversion rates
than flash ADC. Sub ranging analog to digital converters provide an intermediate
compromise between flash ADCs and successive approximation ADCs. Sub ranging
analog to digital converters typically use a low resolution flash quantizer during a first
or coarse pass to convert the analog input signal into the most significant bits (MSB)
of its digital value. A digital to analog converter (DAC) then generates an analog

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version of the MSB word. The residue signal is sent through one or more fine passes
to produce the lower significant bits of the input signal. The lower significant bits and
the MSB word are then combined by digital error correcting circuitry to produce the
desired digital output word. A switched capacitor analog to digital converter (ADC)
operated according to successive approximation register technique comprises a
plurality of weighted capacitors with associated switches and a local DAC. The
capacitors are charged by a voltage sample of an analog signal to be converted. The
voltage sample is compared with an analog signal generated by the local DAC.
Figure 29
The DAC performs the conversion in n steps where n is the converter settlement in
bits. The working principle of this converter is analogous to that of weighing an
object on a laboratory balance, using standard weights as reference, according to the
binary sequence 1, 1/4, 1/8, 1/16………… 1/n kilograms. To perform accurately the
measure, we have to start with the largest standard weight and go on in decreasing
order till the one of smallest weight. We place the largest weight; if the balance
doesn't tip we leave the weight and add the one from the others of largest weight. If
the balance doesn't tip we go on. If instead it does tip, we remove the largest weight
added and we replace it with the next one. After having tried n standard weights, the
weighing operation stops. The total of the standard weights remaining on the balance
is the closest approximation to the unknown.

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Figure 30
We start by setting the bit 3, thus "1000". The corresponding voltage is worth 5V and
being lower than the voltage to convert we leave it at "1". We set to "1" the bit 2 too.
The word turns into "1100" corresponding to 7.5 V which is larger than the voltage to
convert. We put therefore at zero the bit 2 and we proceed to the bit 1 and set it to "1".
The corresponding word "1010" is worth 6.25 V still larger than 5.0V, we put than at
zero the bit 1 and set to "1" the bit 0. The word turns into "1001" and is worth 5.625V.
This value is still larger than 5.0V and so the reading jams at "1000" which is the
digital conversion of the voltage 5.0V. We can see as in this case we have done only
four comparisons to perform the conversion. In the case of an n bits converter are
required n comparisons instead of the 2n foreseen, in the worst case, by the previous
converter. We have to make a precise statement: “while the counter had converted
5.0V into the word "1001", the successive approximation one converts into "1000".”
This is because whereas the counter converter blocks the clock when the digital word
goes over the value to convert and so approaches in excess with the last significant
bit, the successive approximation converter approaches in deficiency.

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3. Integrating A/D converter:

It integrates unknown and fixed charges over fixed and measured time periods
respectively.
Figure 31
The integrator produces a sawtooth waveform on its output, from zero to the
maximum possible analog voltage to be sampled, set by -Vref. The minute the
waveform is started, the counter starts counting from 0 to 2^n-1, where n is the
number of bits implemented by the ADC. When the voltage found at Vin (the analog
signal) is equal to the voltage achieved by the triangle waveform generated by the
integrator, the control circuit captures the last value produced by the counter (by
trigging the output buffer clock pin), which will be the digital correspondent of the
analog sample being converted. At the same time, it resets the counter and the
integrator, starting the conversion of the next sample.
Like the successive approximation ADC, this circuit uses an output buffer, meaning
that the last converted value can be read while the ADC is converting the current
value.

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Even though its design is simpler than ramp counter design, it is still based on a
counter, and thus suffering from the same basic problem found on ramp counter
design: speed. It requires up to 2^n-1 clock cycles to convert each sample. For an
eight-bit ADC, it would take up to 255 clock cycles to convert a single sample. For a
16-bit ADC it would take up to 65,535 clock cycles to convert one sample.
4. Dual ramp integrating A/D converter:
It integrates the signal being measured for a fixed period of time onto a capacitor and
then de-integrates the capacitor charge back to the starting voltage using a reference
voltage as the input. The converter measures the time it takes to return to the starting
voltage. The resulting digital conversion in the time counter or digital accumulator is
then proportional to the ratio of the unknown and reference signals.
Figure 32
The analog switch first connects Vin to the integrator. With that, the integrator starts
generating the saw tooth waveform, and the switch position will remain set at Vin
during a fixed number of clock cycles. When this number of clock cycles is reached,
the analog switch moves its position to allow –Vref to enter the integrator. Since –
Vref is a negative voltage, the saw tooth waveform goes towards zero, using a number
of clock cycles proportional of the Vin value.
For a better understanding, see Figure 33, where we show the waveform at the
integrator output. So, T1 is fixed, while T2 duration is proportional to the value of
Vin. Vin sets the slope angle: the higher Vin is, the higher the angle will be.

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Figure 33
T2 = T1 x Vin / Vref.
5. Delta sigma or sigma delta modulator:
They are often used in mixed signal integrated A/D converters, because of their
insensitivity to CMOS process linearity and matching problems when compared to
other A/D converter types. These features make delta sigma based mixed signal
solutions very attractive for a number of applications, such as audio, receiver channels
of communication devices, sensor interface circuits, and measurement systems. A
sigma-delta converter generally includes an analog modulator portion and digital
filtering and decimation portion. The analog modulator portion essentially digitizes an
analog input signal at very high sampling rates greater than the Nyquist’s rate, in
order to perform a noise shaping function. A noise shaping or loop filter, typically a
low pass filter is commonly provided in the forward signal path of the delta sigma
modulator to push some of the quantization noise into the higher frequency spectrum
beyond the band of interest. Digital filtering is performed on the over sampled digital
output to achieve a high resolution. The digital filtering portion allows the ADC to
achieve a high resolution. Decimation is thereafter used to reduce the effective
sampling rate back to the Nyquist’s rate. Sigma delta techniques allow much higher
resolutions, but are relatively slow since the requisite level resolution is achieved by
over sampling the input signal and noise shaping. Folding is a high speed technique in
which the signal is folded by using several folding amplifiers to replicate the input
signal and by detecting zero crossings of the folding amplifiers to produce the digital
output.

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6. Counter or servo A/D converter:

The A/D converters use very different techniques to perform the analog/digital
conversion. The conversion speed and the resolution are the two guiding criteria in
choosing an A/D converter. One of the more simple A/D converters is the counter
one, see figure 34. This circuit uses a digital counter to control the input of a D/A
converter. The clock pulses are applied to a counter and the D/A converter output is
increased a step at a time of amplitude corresponding to that of the less significant bit.
A comparator compares the D/A converter output with the analog input and stops the
clock pulses when the output of the D/A converter goes over the input signal. The
counter output is therefore the converted digital word. Let us see in detail how is
performed the conversion. The oscillator is always working. The clock is transmitted
to the counter only when the AND input, connected to the comparator is in the logic
state high ("1") or when the signal to convert is larger than the D/A converter output.
Figure 34
Let us suppose the signal to convert is 5.0V.

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Figure 35
Let us apply a reset control. The counter goes to "0000" and the converter gives zero
voltage at the output. The comparator results at high level at the output, the first pulse
that leads the counter to "0001" and the converter output to 0.625 is let go(Here we
are assuming that ADC has resolution of 0.625V). The converter remains in the
starting state. When the new clock pulse passes the counter goes to "0010" and the
DAC output to 1.25V. The process continues until the counter receives the ninth
pulse, its state then becomes "1001" and the converter output goes to 5.625V and thus
is larger than the voltage to converter. The comparator output changes its state and so
the clock pulses are not transmitted to the counter any more. The word "1001" is then
the digital conversion of 5.0V. The used converter allows the conversion of positive
signals included in the range from 0 to 5V and has a maximum resolution of 0.625V.
The counter converter is conceptually simple and its realization is of little difficulty
and cheap. On the other hand it is rather slow in the conversion. Moreover the
conversion time is not constant but depends upon the value to convert.
Pipeline ADC provides analog to digital conversion that, while slower than flash
conversion, is faster than most other ADC architectures. Pipeline converters behave
similarly to flash converters except that there is a finite latency between the analog
sample and the digital representation of the sample which is dependent on the number
of stages in the pipeline. A pipeline analog to digital converter may include stage
amplifiers. The number of stage amplifiers may be substantially equal to the number
of output bits. The advantage of pipelined analog-to-digital conversion is that each
stage of resolution is separated. A typical pipelined ADC includes a series of stages,
wherein each stage provides one or more output digital bits. Each stage accepts an
analog input and produces digital bits representing the band in which the input signal
falls. The stage also creates an analog output representing the difference between the

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digital representation of the signal and the actual analog signal. The output digital bits
from each stage taken together represent the digital value of an input signal provided
to the ADC. Once the analog signal is resolved at the first stage and the result passed
to the second stage, a new signal can be processed by the first stage. Multi-stage
pipelined analog to digital converters (ADC) provide efficient high speed conversion
of analog signals to digital equivalents. Pipelined ADCs have many applications.
They are particularly useful when low voltage, high speed, high resolution
quantization is required. This feature makes it ideal for high volume
telecommunications application such as various digital subscriber lines, digital signal
processing at video rates, and for stand alone high speed analog-to-digital converters.
Unlike flash converters, for which component counts increase exponentially with
converter resolution, the component counts of pipeline ADC converters increase
linearly with resolution. Therefore, pipeline ADC converters are relatively compact,
inexpensive, and power efficient. Accordingly, pipeline ADC's are widely used in
portable signal processing apparatus.
Analog to digital converters (ADC's) are used in many applications. ADC's are used
to convert an analog signal to a digital bit representation for analog video signal,
audio signals and any other suitable analog signals. Analog to digital converters have
been used in communication applications to provide an effective way of converting
analog signals into digital signals. Wireless communication devices are widely used to
communicate data, voice, and other information between physical locations without
the use of wires. Wireless communications products and other modern electronic
devices typically process and generate both digital and analog signals. To perform
their intended functions, these systems often convert analog signals into digital
signals. ADCs enable many systems to implement real-time processing of analog
data. Such data capture and processing systems usually include sensors for collection
of analog information and digital signal processors or microprocessors for processing
of the data. Analog to digital converters range in size, complexity, and accuracy or
resolution, where each of these factors depends upon the particular needs of the
underlying application. Different architectures are suited to different needs. Serial
analog-to-digital architecture offers the widest range of performance in analog-to-
digital conversion, from low power and low resolution to quantization with very high
resolutions. Parallel analog-to-digital architecture provides the fastest quantization
rate per analog signal. The pipelined analog-to-digital converter has become a popular
ADC architecture for use in high-speed applications such as CCD imaging, ultrasonic
medical imaging, digital videos, cable modems, and fast Ethernets.

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Parameters related to analog to digital converter

1. Accuracy:
An ADC has several sources of errors. Quantization error and (assuming the ADC is
intended to be linear) non-linearity is intrinsic to any analog-to-digital conversion.
There is also a so-called aperture error which is due to a clock jitter and is revealed
when digitizing a time-variant signal (not a constant value).
These errors are measured in a unit called the LSB, which is an abbreviation for least
significant bit. In the above example of an eight-bit ADC, an error of one LSB is
1/256 of the full signal range, or about 0.4%.
Quantization error :
Quantization error is due to the finite resolution of the ADC, and is an unavoidable
imperfection in all types of ADC. The magnitude of the quantization error at the
sampling instant is between zero and half of one LSB.
In the general case, the original signal is much larger than one LSB. When this
happens, the quantization error is not correlated with the signal, and has a uniform
distribution. Its RMS value is the standard deviation of this distribution, given by . In
the eight-bit ADC example, this represents 0.113% of the full signal range.
At lower levels the quantizing error becomes dependent of the input signal, resulting
in distortion. This distortion is created after the anti-aliasing filter, and if these
distortions are above 1/2 the sample rate they will alias back into the audio band. In
order to make the quantizing error independent of the input signal, noise with
amplitude of 1 quantization step is added to the signal. This slightly reduces signal to
noise ratio, but completely eliminates the distortion. It is known as dither.
Non-linearity:
All ADCs suffer from non-linearity errors caused by their physical imperfections,
resulting in their output to deviate from a linear function (or some other function, in
the case of a deliberately non-linear ADC) of their input. These errors can sometimes
be mitigated by calibration, or prevented by testing.
Important parameters for linearity are integral non-linearity (INL) and differential
non-linearity (DNL). These non-linearities reduce the dynamic range of the signals
that can be digitized by the ADC, also reducing the effective resolution of the ADC.
Sampling rate:
The analog signal is continuous in time and it is necessary to convert this to a flow of
digital values. It is therefore required to define the rate at which new digital values are
sampled from the analog signal. The rate of new values is called the sampling rate or
sampling frequency of the converter.
A continuously varying band limited signal can be sampled (that is, the signal values
at intervals of time T, the sampling time, are measured and stored) and then the
original signal can be exactly reproduced from the discrete-time values by an
interpolation formula. The accuracy is limited by quantization error. However, this

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faithful reproduction is only possible if the sampling rate is higher than twice the
highest frequency of the signal. This is essentially what is embodied in the Shannon-
Nyquist sampling theorem.
Since a practical ADC cannot make an instantaneous conversion, the input value must
necessarily be held constant during the time that the converter performs a conversion
(called the conversion time). An input circuit called a sample and hold performs this
task—in most cases by using a capacitor to store the analog voltage at the input, and
using an electronic switch or gate to disconnect the capacitor from the input. Many
ADC integrated circuits include the sample and hold subsystem internally.
Aliasing:
All ADCs work by sampling their input at discrete intervals of time. Their output is
therefore an incomplete picture of the behavior of the input. There is no way of
knowing, by looking at the output, what the input was doing between one sampling
instant and the next. If the input is known to be changing slowly compared to the
sampling rate, then it can be assumed that the value of the signal between two sample
instants was somewhere between the two sampled values. If, however, the input
signal is changing rapidly compared to the sample rate, then this assumption is not
valid.
If the digital values produced by the ADC are, at some later stage in the system,
converted back to analog values by a digital to analog converter or DAC, it is
desirable that the output of the DAC be a faithful representation of the original signal.
If the input signal is changing much faster than the sample rate, then this will not be
the case, and spurious signals called aliases will be produced at the output of the
DAC. The frequency of the aliased signal is the difference between the signal
frequency and the sampling rate. For example, a 2 KHz sine wave being sampled at
1.5 KHz would be reconstructed as a 500 Hz sine wave. This problem is called
aliasing.
To avoid aliasing, the input to an ADC must be low-pass filtered to remove
frequencies above half the sampling rate. This filter is called an anti-aliasing filter,
and is essential for a practical ADC system that is applied to analog signals with
higher frequency content.
Although aliasing in most systems is unwanted, it should also be noted that it can be
exploited to provide simultaneous down-mixing of a band-limited high frequency
signal.
Dither:
In A to D converters, performance can usually be improved using dither. This is a
very small amount of random noise (white noise) which is added to the input before
conversion. Its amplitude is set to be about half of the least significant bit. Its effect is
to cause the state of the LSB to randomly oscillate between 0 and 1 in the presence of
very low levels of input, rather than sticking at a fixed value. Rather than the signal
simply getting cut off altogether at this low level (which is only being quantized to a
resolution of 1 bit), it extends the effective range of signals that the A to D converter

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can convert, at the expense of a slight increase in noise - effectively the quantization
error is diffused across a series of noise values which is far less objectionable than a
hard cutoff. The result is an accurate representation of the signal over time. A suitable
filter at the output of the system can thus recover this small signal variation.
An audio signal of very low level (with respect to the bit depth of the ADC) sampled
without dither sounds extremely distorted and unpleasant. Without dither the low
level always yields a '1' from the A to D. With dithering, the true level of the audio is
still recorded as a series of values over time, rather than a series of separate bits at one
instant in time.
A virtually identical process, also called dither or dithering, is often used when
quantizing photographic images to a fewer number of bits per pixel—the image
becomes noisier but to the eye looks far more realistic than the quantized image,
which otherwise becomes banded. This analogous process may help to visualize the
effect of dither on an analogue audio signal that is converted to digital.
Dithering is also used in integrating systems such as electricity meters. Since the
values are added together, the dithering produces results that are more exact than the
LSB of the analog-to-digital converter.
Note that dither can only increase the resolution of a sampler, it cannot improve the
linearity, and thus accuracy does not necessarily improve.
Over sampling:
Usually, signals are sampled at the minimum rate required, for economy, with the
result that the quantization noise introduced is white noise spread over the whole pass
band of the converter. If a signal is sampled at a rate much higher than the Nyquist
frequency and then digitally filtered to limit it to the signal bandwidth then there are 3
main advantages:
Digital filters can have better properties (sharper roll off, phase) than analogue filters,
so a sharper anti-aliasing filter can be realized and then the signal can be down
sampled giving a better result
A 20 bit ADC can be made to act as a 24 bit ADC with 256× over sampling the
signal-to-noise ratio due to quantization noise will be higher than if the whole
available band had been used. With this technique, it is possible to obtain an effective
resolution larger than that provided by the converter alone
The improvement in SNR is 3dB (equivalent to 0.5 bits) per decade of over sampling
which is not sufficient for many applications. So, over sampling is usually coupled
with noise shaping. With noise shaping, the improvement is 6L+3 dB per decade
where L is the order of loop filter used for noise shaping. e.g. - a 2nd order loop filter
will provide an improvement of 15dB/decade.

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Relative speed and precision:

The speed of an ADC varies by type. The Wilkinson ADC is limited by the clock rate
which is process able by current digital circuits. Currently, frequencies up to
300 MHz are possible. The conversion time is directly proportional to the number of
channels. For a successive approximation ADC, the conversion time scales with the
logarithm of the number of channels. Thus for a large number of channels, it is
possible that the successive approximation ADC is faster than the Wilkinson.
However, the time consuming steps in the Wilkinson are digital, while those in the
successive approximation are analog. Since analog is inherently slower than digital, as
the number of channels increases, the time required also increases. Thus there are
competing processes at work. Flash ADCs are certainly the fastest type of the three.
The conversion is basically performed in a single parallel step. For an 8-bit unit,
conversion takes place in a few tens of nanoseconds.
There is, as expected, somewhat of a trade off between speed and precision. Flash
ADCs have drifts and uncertainties associated with the comparator levels, which lead
to poor uniformity in channel width. Flash ADCs have a resulting poor linearity. For
successive approximation ADCs, poor linearity is also apparent, but less so than for
flash ADCs. Here, non-linearity arises from accumulating errors from the subtraction
processes. Wilkinson ADCs are the best of the three. These have the best differential
non-linearity. The other types require channel smoothing in order to achieve the level
of the Wilkinson.
The sliding scale principle:
The sliding scale or randomizing method can be employed to greatly improve the
channel width uniformity and differential linearity of any type of ADC, but especially
flash and successive approximation ADCs. Under normal conditions, a pulse of
particular amplitude is always converted to a certain channel number. The problem
lies in that channels are not always of uniform width, and the differential linearity
decreases proportionally with the divergence from the average width. The sliding
scale principle uses an averaging effect to overcome this phenomenon. A random, but
known analog voltage is added to the input pulse. It is then converted to digital form,
and the equivalent digital version is subtracted, thus restoring it to its original value.
The advantage is that the conversion has taken place at a random point. The statistical
distribution of the final channel numbers is decided by a weighted average over a
region of the range of the ADC. This in turn desensitizes it to the width of any given
channel.
Recommended testing instruments for Experimentation

1. Digital Multi-meter
2. Oscilloscope

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Experiment 1
Objective: Analysis of operation of Counter converter
Equipment Required:
1. Scientech 2601 with power supply cord
2. Connecting Cords
Connection Diagram:
Figure 1.1

Scientech 2601
Procedure:
1. Connect the power supply to the TechBook.
2. Make the connections as shown in figure 1.1.
a. Connect the DC supply to the Vi of the converter.
b. Keep the DC potentiometer in counter clockwise position.
c. Place the Reset/Count switch in Reset position.
3. Switch ON the power supply.
4. Keep the DC potentiometer at mid Position.
5. To start the conversion, place the switch in Count position. The LEDs lit
according to binary sequence. When the signal from the D/A goes over the input
signal, the counter stops and the LEDs show the binary conversion.
6. Vary the DC potentiometer and observe the corresponding Digital output. The
converter will follow the changes in the analog signal without resetting the
converter in upward direction because, the counter is configured as UP counter
only, but to observe the converted output when the input is being decreased, you
have to reset the converter.
7. Observe on the oscilloscope the typical steps signal at the D/A output.
8. Repeat the test with different values of the input signal.
Conclusion:
According to applied input signal in form of DC level it provides the digital signals in
1 and 0 form.
Questions:
1. Why digital signals are more preferred?
2. Differentiate between analog and digital signals?
3. List various types of analog to digital converter?
4. Which analog to digital converter is best for conversion?
5. List the parameters on which the performance of analog to digital converter is
based?
6. What is the significance of using digital to analog converter during analog to
digital conversion process?

Scientech 2601
Experiment 2
Objective: Testing the working of a monolithic converter
Equipment Required:
1. Scientech 2601 with power supply cord
2. Connecting Cords
Connection Diagram:
Figure 2.1

Scientech 2601
Procedure:
1. Connect supply to the TechBook.
2. Make the connections as shown in figure 2.1.
a. Connect the USB/ BOB to GND.
b. Connect the DC output to Vi of Monolithic converter.
c. Keep the DC potentiometer in counterclockwise direction.
d. Keep the Auto /Manual switch in Auto position.
3. Switch ON the power supply.
4. Vary the DC potentiometer and observe the corresponding digital output on
LEDs.
5. Now keep the Auto / Manual switch in Manual position.
6. Keep the Blank / Convert switch in Blank position
7. Vary the DC potentiometer
8. Set the switch to convert position, The LEDs will light forming a digital word
which corresponds to the digital conversion of the analog voltage applied to the
input.
9. Perform the same procedure with different DC voltages.
10. Now, connect the USB / BOB terminal to +5V and bipolar o/p to Vi. This gives
output voltage from +2.5V to -2.5V.
11. Keep the switch in Auto position.
12. Vary the Bipolar potentiometer from -2.5V to +2.5V, and note the
corresponding digitized outputs
13. Set the Auto / Manual switch to manuals position.
14. Keep the Blank / Convert switch to blank position.
15. Now to observe the conversion you have to throw the switch to convert position.
16. Perform the experiment with various DC inputs.
Conclusion:
According to applied input signal in form of DC level it provides the digital signals in
1 and 0 form.

Scientech 2601
Questions:
1. What do you understand by SAR?
2. Draw the block diagram of SAR ADC?
3. Write the advantages and disadvantages of SAR ADC?
4. Describe the functionality of SAR ADC?
5. Name the terms EOC, BOB, USB.

Scientech 2601
Frequently Asked Questions

1. What is Analog to digital converter?
Ans: Analog to Digital Converters (ADC) is device that converts continuous
signals to discrete digital numbers.
2. How many types of analog to digital converters are there?
Ans: Analog to Digital Converters is commonly of two types.
Linear Analog to Digital Converter is designed to produce an output which is a
linear function or proportional to the output.
The other common type of Analog to Digital Converter is the Logarithmic
Analog to Digital Converter, which functions by using voiced communications
systems to increase the entropy of the digitized signal.
3. Why to use analog to digital converter?
Ans: A digital signal is superior to an analog signal because it is more robust to
noise and can easily be recovered, corrected and amplified. For this reason, the
tendency today is to change an analog signal to digital data.
4. What are the steps to execute the process of analog to digital converter?
Ans: Analog to digital converter process is executed in three steps:
1. Sampling
2. Quantizing
3. Coding
5. What do you mean by sampling?
Ans: To convert continuous time signal to discrete time signal, a process is used
called as sampling.
6. What is sampling theorem?
Ans: The Sampling Theorem states that a signal can be exactly reproduced if it
is sampled at a frequency Fs, where Fs is greater than twice the maximum
frequency Fmax in the signal.
Fs > 2· Fmax
7. What is Nyquist frequency?
Ans: The frequency 2· Fmax is called the Nyquist sampling rate. Half of this
value, Fmax, is sometimes called the Nyquist frequency.
8. List different sampling techniques?
Ans: There are three types of sampling, which are as follows:
1. Ideal sampling or Instantaneous sampling or Impulse sampling
2. Natural sampling
3. Flat top sampling
9. What is under sampling?
Ans: When the sampling rate is lower than or equal to the Nyquist rate, a
condition defined as under sampling, it is impossible to rebuild the original
signal according to the sampling theorem.

Scientech 2601
10. What do you mean by aliasing?

Ans: Aliasing is the presence of unwanted components in the reconstructed
signal. These components were not present when the original signal was
sampled. In addition, some of the frequencies in the original signal may be lost
in the reconstructed signal. Aliasing occurs because signal frequencies can
overlap if the sampling frequency is too low. As a result, the higher frequency
components roll into the reconstructed signal and cause distortion of the
signal Frequencies "fold" around half the sampling frequency. This type of
signal distortion is called aliasing.
11. Explain the process of sample and hold?
Ans: In electronics, a sample and hold circuit is used to interface real-world
signals, by changing analogue signals to a subsequent system. The purpose of
this circuit is to hold the analogue value steady for a short time while the
converter or other following system performs some operation that takes a little
time.
Sampling mode:
In this mode, the switch is in the closed position and the capacitor charges to the
instantaneous input voltage.
Hold mode:
In this mode, the switch is in the open position. The capacitor is now
disconnected from the input. As there is no path for the capacitor to discharge, it
will hold the voltage on it just before opening the switch. The capacitor will
hold this voltage till the next sampling instant.
12. How aliasing is removed?
Ans: Aliasing is removed by simply filtering out all the high frequency
components before sampling.
13. List methods to avoid aliasing?
Ans: To avoid the aliasing there are two approaches:
1. To raise the sampling frequency to satisfy the sampling theorem
2. The other is to filter off the unnecessary high-frequency component from the
continuous-time signal. We limit the signal frequency by an effective low pass
filter, called anti aliasing pre filter, so that the remained highest frequency is less
than half of the intended sampling rate. If the filter is not perfect we must give
some allowance.
14. What are active and passive filter?
Ans: filter is a network designed to pass signals having frequencies within
certain bands (called pass bands) with little attenuation, but greatly attenuates
signals within other bands (called attenuation bands or stop bands). A filter
network containing no source of power is termed passive, and one containing
one or more power sources is known as an active filter network.

Scientech 2601
15. What is digital to analog converter?

Ans: A digital-to-analog converter, or simply DAC, is a semiconductor device
that is used to convert a digital code into an analog signal.
A typical digital-to-analog converter outputs an analog signal, which is usually
voltage or current that is proportional to the value of the digital code provided to
its inputs.
16. List the types of digital to analog converter?
Ans: There are two types of digital to analog converter which are as follows:
1. Binary weighted resistor DAC
2. R-2R ladder DAC
17. How the performance of analog and digital converters is quantified?
Ans: The performance of analog and digital converters is typically quantified by
two primary parameters, speed (in samples per second) and resolution (in bits).
18. List the types of analog to digital converter?
Ans: There are variety of A/D converter exist, including flash ADC, sub-
ranging ADC, successive approximation ADC, pipelined ADC, integrating
ADC, and sigma delta or delta sigma A/D converters.
19. Explain the working of flash type ADC?
Ans: Flash ADC is performed by a highly parallel comparison of an input
analog signal to each of a set of reference voltages. A flash converter uses a
resistive divider to obtain the quantization. A flash converter has multiple
reference levels and comparators. Each comparator compares the analog input
signal to one of the reference levels and produces an output that indicates
whether the input is above or below the reference level.
20. What are the advantages and disadvantages of flash type ADC?
Ans: Advantages:
Flash ADC can provide very high speed and accuracy.
Disadvantages:
Cost of high component count and high power consumption.
Flash ADCs are limited by higher input capacitance, power consumption, and
device yield constraints associated with the high number of comparators in the
circuitry.
21. What is the advantage Successive approximation ADC?
Ans: Successive approximation ADC uses one or a few comparators, operated
iteratively, to yield high accuracy conversion with far fewer components than
flash conversion.
22. What is the disadvantage of Successive approximation ADC over flash type
ADC?
Ans: Successive approximation ADC operates at much slower conversion rates
than flash ADC.

Scientech 2601
Warranty
1. We guarantee this product against all manufacturing defects for 24 months from
the date of sale by us or through our dealers.
2. The guarantee will become void, if
a. The product is not operated as per the instruction given in the Learning
Material.
b. The agreed payment terms and other conditions of sale are not followed.
c. The customer resells the instrument to another party.
d. Any attempt is made to service and modify the instrument.
3. The non-working of the product is to be communicated to us immediately giving
full details of the complaints and defects noticed specifically mentioning the
type, serial number of the product and date of purchase etc.
4. The repair work will be carried out, provided the product is dispatched securely
packed and insured. The transportation charges shall be borne by the customer.
Hope you enjoyed the Scientech Experience.
List of Accessories
1. Patch Cord 16”........................................................................................ 3 Nos.
2. Mains Cord ............................................................................................. 1 No.
3. TechBook Power Supply......................................................................... 1 No

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Analog to Digital

Designed & Manufactured by-

Analog to Digital Converter

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For your safety:

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A/D Conversion : 1. 4 bit discrete (ramp)

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Analog to Digital Conversion process

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Steps involved in analog to digital conversion:

Basic Sampling Process

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Sampling of signal at sampling interval (period) Ts

Sampled Output of narrow pulses δ (t)

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The Sampling Theorem:

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Nyquist Criterion (Sampling Theorem)

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Nyquist’s Uniform Sampling Theorem for Low pass Signal:

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Ideal sampling process

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Example of High frequency signal

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Nyquist showed that to distinguish unambiguously between all signal frequencies

Sampling process as per the Nyquist criteria

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Example of sampling theorem

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Low pass filter response

Spectrum of Under Sampled Signal

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Reason for aliasing & its preventation:

Aliasing due to Under - Sampling

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3. Aliasing Due to Filter Roll-off:

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The figure 20 shows what explains above lines:

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Sample and Hold Waveform

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Sample Hold Circuit

Sample and hold wave form

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Important Parameters of Sample & Hold Circuit

Timing Diagram for Sample and Hold Circuit

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Quantization & Encoding of a sampled signal

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Low Pass Filter