Chapter 2

E 12 V
1. The load line will intersect at ID =  = 16 mA and VD = 12 V.
R 750 

(a) VDQ  0.85 V

I DQ  15 mA
VR = E  VDQ = 12 V  0.85 V = 11.15 V

(b) VDQ  0.7 V

I DQ  15 mA
VR = E  VDQ = 12 V  0.7 V = 11.3 V

(c) VDQ  0 V
I DQ  16 mA
VR = E  VDQ = 12 V  0 V = 12 V

For (a) and (b), levels of VDQ and I DQ are quite close. Levels of part (c) are reasonably close
but as expected due to level of applied voltage E.

E 6V
2. (a) ID =  = 30 mA
R 0.2 k
The load line extends from ID = 30 mA to VD = 6 V.
VDQ  0.95 V, I DQ  25.3 mA

E 6V
(b) ID =  = 12.77 mA
R 0.47 k
The load line extends from ID = 12.77 mA to VD = 6 V.
VDQ  0.8 V, I DQ  11 mA

E 6V
(c) ID =  = 8.82 mA
R 0.68 k
The load line extends from ID = 8.82 mA to VD = 6 V.
VDQ  0.78 V, I DQ  78 mA

The resulting values of VDQ are quite close, while I DQ extends from 7.8 mA to 25.3 mA.

3. Load line through I DQ = 10 mA of characteristics and VD = 7 V will intersect ID axis as

11.3 mA.
E 7V
ID = 11.3 mA = 
R R
7V
with R = = 619.47 k  0.62 kΩ standard resistor
11.3 mA

12
 E  VD 30 V  0.7 V
4. (a) ID = IR =  = 19.53 mA
R 1.5 k
VD = 0.7 V, VR = E  VD = 30 V  0.7 V = 29.3 V

E  VD 30 V  0 V
(b) ID =  = 20 mA
R 1.5 k
VD = 0 V, VR = 30 V

Yes, since E  VT the levels of ID and VR are quite close.

5. (a) I = 0 mA; diode reverse-biased.

(b) V20 = 20 V  0.7 V = 19.3 V (Kirchhoff’s voltage law)

I(20 Ω) =
19.3 V
= 0.965 A
20 
V(10 Ω) = 20 V  0.7 V = 19.3 V
I(10 Ω) =
19.3 V
= 1.93 A
10 
I = I(10 Ω) + I(20 Ω)
= 2.895 A
10 V
(c) I = = 1 A; center branch open
10 

6. (a) Diode forward-biased,

Kirchhoff’s voltage law (CW): 5 V + 0.7 V  Vo = 0
Vo = 4.3 V
Vo 4.3 V
IR = ID =  = 1.955 mA
R 2.2 k

(b) Diode forward-biased,

8 V + 6 V  0.7 V
ID = = 2.25 mA
1.2 k  4.7 k
Vo = 8 V  (2.25 mA)(1.2 kΩ) = 5.3 V

10 k(12 V  0.7 V  0.3 V)

7. (a) Vo = = 9.17 V
2 k  10 k
(b) Vo = 10 V

13
8. (a) Determine the Thevenin equivalent circuit for the 10 mA source and 2.2 k resistor.

ETh = IR = (10 mA)(2.2 k) = 22 V

RTh = 2. 2k

Diode forward-biased
22 V  0.7 V
ID = = 4.84 mA
2.2 k  2.2 k
Vo = ID(1.2 k)
= (4.84 mA)(1.2 k)
= 5.81 V
(b) Diode forward-biased
20 V + 20 V  0.7 V
ID = = 5.78 mA
6.8 k
Kirchhoff’s voltage law (CW):
+Vo  0.7 V + 20 V = 0
Vo = 19.3 V

9. (a) Vo1 = 12 V – 0.7 V = 11.3 V

Vo2 = 1.2 V
(b) Vo1 = 0 V
Vo2 = 0 V

10. (a) Both diodes forward-biased

Si diode turns on first and locks in 0.7 V drop.
12 V  0.7 V
IR  = 2.4 mA
4.7 k
ID = IR = 2.4 mA
Vo = 12 V  0.7 V = 11.3 V

(b) Right diode forward-biased:

20 V + 4 V  0.7 V
ID = = 10.59 mA
2.2 k
Vo = 20 V  0.7 V = 19.3 V

11. (a) Si diode “on” preventing GaAs diode from turning “on”:
1 V  0.7 V 0.3 V
I=  = 0.3 mA
1 k 1 k
Vo = 1 V  0.7 V = 0.3 V

16 V  0.7 V  0.7 V + 4 V 18.6 V

(b) I =  = 3.96 mA
4.7 k 4.7 k
Vo = 16 V  0.7 V  0.7 V = 14.6 V

14
12. Both diodes forward-biased:
Vo1 = 0.7 V, Vo2 = 0.7 V
20 V  0.7 V 19.3 V
I1 k = = = 19.3 mA
1 k 1 k
I0.47 k = 0 mA
I = I1 kΩ  I0.47 kΩ = 19.3 mA  0 mA
= 19.3 mA

13.

1 k(9.3 V)
Superposition: Vo1 (9.3 V)   3.1 V
1 k  2 k
16 k(8.8 V)
Vo2 (8.8 V)   2.93 V
1 k  2 k
Vo = Vo1  Vo2 = 6.03 V
9.3 V  6.03 V
ID = = 1.635 mA
2 k

14. Both diodes “off”. The threshold voltage of 0.7 V is unavailable for either diode.
Vo = 0 V

15. Both diodes “on”, Vo = 10 V  0.7 V = 9.3 V

16. Both diodes “on”.

Vo = 0.7 V

17. Both diodes “off”, Vo = 10 V

18. The Si diode with 5 V at the cathode is “on” while the other is “off”. The result is
Vo = 5 V + 0.7 V = 4.3 V

19. 0 V at one terminal is “more positive” than 5 V at the other input terminal. Therefore
assume lower diode “on” and upper diode “off”.
The result:
Vo = 0 V  0.7 V = 0.7 V
The result supports the above assumptions.

20. Since all the system terminals are at 10 V the required difference of 0.7 V across either diode
cannot be established. Therefore, both diodes are “off” and
Vo = +10 V
as established by 10 V supply connected to 1 k resistor.

15
21. The Si diode requires more terminal voltage than the Ge diode to turn “on”. Therefore, with
5 V at both input terminals, assume Si diode “off” and Ge diode “on”.

The result: Vo = 5 V  0.3 V = 4.7 V

The result supports the above assumptions.

Vdc 2V
22. Vdc = 0.318 Vm Vm =  = 6.28 V
0.318 0.318

Vm 6.28 V
Im =  = 3.14 mA
R 2 k

23. Using Vdc  0.318(Vm  VT)

2 V = 0.318(Vm  0.7 V)
Solving: Vm = 6.98 V  10:1 for Vm:VT

Vdc 2V
24. Vm =  = 6.28 V
0.318 0.318

6.28 V
I Lmax = = 0.628 mA
10 k

16
 6.28 V
Imax(2 k) = = 3.14 mA
2 k
I Dmax  I Lmax + Imax(2 k) = 0.678 mA + 3.14 mA = 3.77 mA

25. Vm = 2 (120 V) = 169.68 V

Vdc = 0.318Vm = 0.318(169.68 V) = 53.96 V

26. Diode will conduct when vo = 0.7 V; that is,

1 k(vi )
vo = 0.7 V =
1 k  1 k
Solving: vi = 1.4 V

For vi  1.4 V Si diode is “on” and vo = 0.7 V.

For vi < 1.4 V Si diode is open and level of vo is determined
by voltage divider rule:
1 k(vi )
vo = = 0.5 vi
1 k  1 k

For vi = 10 V:
vo = 0.5(10 V)
= 5 V

When vo = 0.7 V, vRmax  vimax  0.7 V

= 10 V  0.7 V = 9.3 V
9.3 V
I Rmax  = 9.3 mA
1 k

10 V
Imax(reverse) = = 0.5 mA
1 k  1 k

17
27. (a) Pmax = 14 mW = (0.7 V)ID
14 mW
ID = = 20 mA
0.7 V

(b) Imax = 2 × 20 mA = 40 mA

(c) 4.7 k  68 k = 4.4 kΩ

VR = 160 V  0.7 V = 159.3 V
159.3 V
Imax = = 36.2 mA
4.4 k
I
Id = max = 18.1 mA
2

(d) Total damage, 36.2 mA > 20 mA

28. (a) Vm = 2 (120 V) = 169.7 V

VLm = Vim  2VD
= 169.7 V  2(0.7 V) = 169.7 V  1.4 V
= 168.3 V
Vdc = 0.636(168.3 V) = 107.04 V

(b) PIV = Vm(load) + VD = 168.3 V + 0.7 V = 169 V

VLm 168.3 V
(c) ID(max) =  = 168.3 mA
RL 1 k

(d) Pmax = VDID = (0.7 V)Imax

= (0.7 V)(168.3 mA)
= 117.81 mW

29.

100 V
Imax = = 45.45 mA
2.2 k

18
30. Positive half-cycle of vi:
Voltage-divider rule:
2.2 k(Vimax )
Vomax =
2.2 k  2.2 k
1
= (Vimax )
2
1
= (100 V)
2
= 50 V

Polarity of vo across the 2.2 k

resistor acting as a load is the same.

Voltage-divider rule:
2.2 k(Vimax )
Vomax =
2.2 k  2.2 k
1
= (Vimax )
2
1
= (100 V)
2
= 50 V
Vdc = 0.636Vm = 0.636 (50 V)
= 31.8 V

31. Positive pulse of vi:

Top left diode “off”, bottom left diode “on”
2.2 k  2.2 k = 1.1 k
1.1 k(170 V)
Vopeak = = 56.67 V
1.1 k  2.2 k

Negative pulse of vi:

Top left diode “on”, bottom left diode “off”
1.1 k(170 V)
Vopeak = = 56.67 V
1.1 k  2.2 k
Vdc = 0.636(56.67 V) = 36.04 V

32. (a) Si diode open for positive pulse of vi and vo = 0 V

For 20 V < vi  0.7 V diode “on” and vo = vi + 0.7 V.
For vi = 20 V, vo = 20 V + 0.7 V = 19.3 V
For vi = 0.7 V, vo = 0.7 V + 0.7 V = 0 V

19
 (b) For vi  8 V the 8 V battery will ensure the diode is forward-biased and vo = vi  8 V.
At vi = 8 V
vo = 8 V  8 V = 0 V
At vi = 20 V
vo = 20 V  8 V = 28 V
For vi > 8 V the diode is reverse-biased and vo = 0 V.

33. (a) Positive pulse of vi:

1.8 k(12 V  0.7 V)
Vo = = 5.09 V
1.8 k  2.2 k
Negative pulse of vi:
diode “open”, vo = 0 V

(b) Positive pulse of vi:

Vo = 12 V  0.7 V + 4 V = 15.3 V
Negative pulse of vi:
diode “open”, vo = 0 V

34. (a) For vi = 20 V the diode is reverse-biased and vo = 0 V.

For vi = 5 V, vi overpowers the 4 V battery and the diode is “on”.

Applying Kirchhoff’s voltage law in the clockwise direction:

5 V + 4 V  vo = 0
vo = 1 V

(b) For vi = 20 V the 20 V level overpowers the 5 V supply and the diode is “on”. Using the
short-circuit equivalent for the diode we find vo = vi = 20 V.

For vi = 5 V, both vi and the 5 V supply reverse-bias the diode and separate vi from vo.
However, vo is connected directly through the 2.2 k resistor to the 5 V supply and
vo = 5 V.

20
35. (a) Diode “on” for vi  4.7 V
For vi > 4.7 V, Vo = 4 V + 0.7 V = 4.7 V
For vi < 4.7 V, diode “off” and vo = vi

(b) Again, diode “on” for vi  3.7 V but vo

now defined as the voltage across the diode
For vi  3.7 V, vo = 0.7 V

For vi < 3.7 V, diode “off”, ID = IR = 0 mA and V2.2 k = IR = (0 mA)R = 0 V

Therefore, vo = vi  3 V
At vi = 0 V, vo = 3 V
vi = 8 V, vo = 8 V  3 V = 11 V

36. For the positive region of vi:

The right Si diode is reverse-biased.
The left Si diode is “on” for levels of vi greater than
5.3 V + 0.7 V = 6 V. In fact, vo = 6 V for vi  6 V.

For vi < 6 V both diodes are reverse-biased and vo = vi.

For the negative region of vi:

The left Si diode is reverse-biased.
The right Si diode is “on” for levels of vi more negative than 7.3 V + 0.7 V = 8 V. In
fact, vo = 8 V for vi  8 V.

For vi > 8 V both diodes are reverse-biased and vo = vi.

iR: For 8 V < vi < 6 V there is no conduction through the 10 k resistor due to the lack of a
complete circuit. Therefore, iR = 0 mA.
For vi  6 V
vR = vi  vo = vi  6 V
For vi = 10 V, vR = 10 V  6 V = 4 V
4V
and iR = = 0.4 mA
10 k
For vi  8 V
vR = vi  vo = vi + 8 V

21
 For vi = 10 V
vR = 10 V + 8 V = 2 V
2 V
and iR = = 0.2 mA
10 k

37. (a) Starting with vi = 20 V, the diode is in the “on” state and the capacitor quickly charges
to 20 V+. During this interval of time vo is across the “on” diode (short-current
equivalent) and vo = 0 V.
When vi switches to the +20 V level the diode enters the “off” state (open-circuit
equivalent) and vo = vi + vC = 20 V + 20 V = +40 V

(b) Starting with vi = 20 V, the diode is in the “on” state and the capacitor quickly charges
up to 15 V+. Note that vi = +20 V and the 5 V supply are additive across the capacitor.
During this time interval vo is across “on” diode and 5 V supply and vo = 5 V.

When vi switches to the +20 V level the diode enters the “off” state and vo = vi + vC =
20 V + 15 V = 35 V.

22
38. (a) For negative half cycle capacitor charges to peak value of 120 V = 120 V with polarity
. The output vo is directly across the “on” diode resulting in vo = 0 V as a
negative peak value.
For next positive half cycle vo = vi + 120 V with peak value of
vo = 120 V + 120 V = 240 V.

(b) For positive half cycle capacitor charges to peak value of 120 V  20 V = 100 V with
polarity . The output vo = 20 V = 20 V
For next negative half cycle vo = vi  100 V with negative peak value of
vo = 120 V  100 V = 220 V.

39. (a)  = RC = (56 k)(0.1 F) = 5.6 ms

5 = 28 ms

T 1 ms
(b) 5 = 28 ms  = = 0.5 ms, 56:1
2 2

(c) Positive pulse of vi:

Diode “on” and vo = 2 V + 0.7 V = 1.3 V
Capacitor charges to 12 V + 2 V  0.7 V = 13.3 V

Negative pulse of vi:

Diode “off” and vo = 12 V  13.3 V = 25.3 V

40. Solution is network of Fig. 2.181(b) using a 10 V supply in place of the 5 V source.

23
41. Network of Fig. 2.178 with 2 V battery reversed.

42. (a) In the absence of the Zener diode

180 (20 V)
VL = =9V
180   220 
VL = 9 V < VZ = 10 V and diode non-conducting

20 V
Therefore, IL = IR = = 50 mA
220   180 
with IZ = 0 mA
and VL = 9 V

(b) In the absence of the Zener diode

470 (20 V)
VL = = 13.62 V
470   220 
VL = 13.62 V > VZ = 10 V and Zener diode “on”

Therefore, VL = 10 V and VRs = 10 V

I Rs  VRs / Rs  10 V/220  = 45.45 mA
IL = VL/RL = 10 V/470  = 21.28 mA
and IZ = I Rs  IL = 45.45 mA  21.28 mA = 24.17 mA

(c) PZ max = 400 mW = VZIZ = (10 V)(IZ)

400 mW
IZ = = 40 mA
10 V
I Lmin = I Rs  I Z max = 45.45 mA  40 mA = 5.45 mA
VL 10 V
RL =  = 1,834.86 
I Lmin 5.45 mA
Large RL reduces IL and forces more of I Rs to pass through Zener diode.

(d) In the absence of the Zener diode

RL (20 V)
VL = 10 V =
RL  220 
10RL + 2200 = 20RL
10RL = 2200
RL = 220 

24
 VL 12 V
43. (a) VZ = 12 V, RL =  = 60 
I L 200 mA
RLVi 60 (16 V)
VL = VZ = 12 V = 
RL  RS 60   Rs
720 + 12Rs = 960
12Rs = 240
Rs = 20 

(b) PZ max = VZ I Z
max
= (12 V)(200 mA)
= 2.4 W

VL VZ
44. Since IL =  is fixed in magnitude the maximum value of I Rs will occur when IZ is a
RL RL
maximum. The maximum level of I Rs will in turn determine the maximum permissible level
of Vi.
PZ max 400 mW
I Zmax   = 50 mA
VZ 8V
VL VZ 8V
IL =   = 36.36 mA
RL RL 220 
I Rs = IZ + IL = 50 mA + 36.36 mA = 86.36 mA
Vi  VZ
I Rs 
Rs
or Vi = I Rs Rs + VZ
= (86.36 mA)(91 ) + 8 V = 7.86 V + 8 V = 15.86 V

Any value of vi that exceeds 15.86 V will result in a current IZ that will exceed the maximum
value.

45. At 30 V we have to be sure Zener diode is “on”.

RLVi 1 k(30 V)
 VL = 20 V = 
RL  Rs 1 k  Rs
Solving, Rs = 0.5 k

50 V  20 V 20 V
At 50 V, I RS  = 60 mA, IL = = 20 mA
0.5 k 1 k
IZM = I RS  IL = 60 mA  20 mA = 40 mA

46. For vi = +50 V:

Z1 forward-biased at 0.7 V
Z2 reverse-biased at the Zener potential and VZ2 = 10 V.
Therefore, Vo = VZ1  VZ2 = 0.7 V + 10 V = 10.7 V

25
 For vi = 50 V:
Z1 reverse-biased at the Zener potential and VZ1 = 10 V.
Z2 forward-biased at 0.7 V.
Therefore, Vo = VZ1  VZ2 = 10.7 V

For a 5 V square wave neither Zener diode will reach its Zener potential. In fact, for either
polarity of vi one Zener diode will be in an open-circuit state resulting in vo = vi.

47. Vm = 1.414(120 V) = 169.68 V

2Vm = 2(169.68 V) = 339.36 V

48. The PIV for each diode is 2Vm

PIV = 2(1.414)(Vrms)

26